listings such as gas version, passed options, and time stamp.
(listing_general_info): New function.
(print_options): New function.
(print_single_option): New function.
(print_timestamp): New function.
(MAX_DATELEN): Define.
(listing_print): Add call to listing_general_info.
* listing.h (LISTING_GENERAL): Define.
(listing_print): Add new parameter.
* as.c (show_usage): Print new switch.
(parse_args): Parse new switch.
(main): Pass command line on to listing_print.
* NEWS: Mention this new feature.
* doc/as.texinfo: Document the new sub-option.
* gas/all/gas.exp: Check the performance of the -ag command line
switch.
* s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
(s390_crb_extensions): New extensions table.
(insertExpandedMnemonic): Handle '$' tag.
* s390-opc.txt: Remove conditional jump variants which can now
be expanded automatically.
Replace '*' tag with '$' in the compare and branch instructions.
2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
* gas/s390/zarch-z10.d: Map the compare and branch variants
with odd condition code mask to version with an even mask.
* config/tc-sh64.c (shmedia_md_pcrel_from_section): Use
md_pcrel_from_section for BFD_RELOC_64 and BFD_RELOC_64_PCREL.
* gas/sh/sh64/eh-1.d: New.
* gas/sh/sh64/eh-1.d: Likewise.
* config/tc-bfin.c (bfin_start_line_hook): Localize the labels
generated for LOOP_BEGIN and LOOP_END instructions.
(bfin_gen_loop): Likewise.
gas/testsuite/:
* gas/bfin/flow.d: Adjust since the generated labels for LOOP_BEGIN
and LOOP_END instruction are local now.
* gas/bfin/flow2.d: Likewise.
* config/bfin-parse.y (check_macfunc_option): Allow (IU)
option for multiply and multiply-accumulate to data register
instruction.
(check_macfuncs): Don't check if accumulator matches the data register
here.
(assign_macfunc): Check if accumulator matches the
data register in each rule that moves to the data
register.
gas/testsuite/
* gas/bfin/arithmetic.s, gas/bfin/arithmetic.d: Add check
for IU option.
* gas/bfin/expected_errors.l, gas/bfin/expected_errors.s:
Add check for mismatch of accumulator and data register.
opcodes/
* bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
multiply and multiply-accumulate to data register instruction.
* config/bfin-parse.y (check_macfunc_option): New.
(check_macfuncs): Check option by calling check_macfunc_option.
Fix comparison always true warnings. Both scalar instructions
of vector instruction must share the same mode option. Only allow
option mode at the end of the second instruction of the vector.
(asm_1): Check option by calling check_macfunc_option.
gas/testsuite/:
* gas/bfin/expected_errors.l, gas/bfin/expected_errors.s: Add
tests for bad options of "multiply and multipy-accumulate to
accumulator" instructions. Add new vector instruction option
mode tests.
* gas/bfin/vector2.s: Add new vector instruction option mode test.
* gas/bfin/vector2.d: Adjust accordingly.
* gas/bfin/expected_errors.s, gas/bfin/expected_errors.l: Add test
for mismatched half registers in vector multipy-accumulate
instructions.
From Jie Zhang <jie.zhang@analog.com>
* config/bfin-parse.y (asm_1): Check AREGS in comparison
instructions. And call yyerror () when comparing PREG with
DREG.
gas/testsuite/:
* gas/bfin/expected_comparison_errors.l: New test.
* gas/bfin/expected_comparison_errors.s: New test.
* gas/bfin/bfin.exp: Add expected_comparison_errors.
* read.c (s_mexit): Warn if attempting to exit a macro when not
inside a macro definition.
* gas/macros/exit.s: New test case.
* gas/macros/macros.exp: Run the new test, expect it to produce an
error result.
* h8300.h (h8_opcodes): Add an encoding for a mov.l instruction
with a 32-bit displacement but without the top bit of the 4th byte
set.
* gas/h8300/pr3134.s: New test.
* gas/h8300/pr3134.d: Expected disassembly
* gas/h8300/h8300.exp: Run the new test.
* gas/h8300/h8300-coff.exp: Fix test for COFF based ports to
accept h8300-rtemscoff not just h8300-rtems.
2008-02-18 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (match_template): Disallow 'l' suffix when
currently selected CPU has no 32-bit support.
(parse_real_register): Do not return registers not available on
currently selected CPU.
gas/testsuite/
2008-02-18 Jan Beulich <jbeulich@novell.com>
* gas/i386/att-regs.s, gas/i386/att-regs.d,
gas/i386/intel-regs.s, gas/i386/intel-regs.d: New.
* gas/i386/i386.exp: Run new tests.
* config/tc-arm.c (s_arm_unwind_save): Advance the input line
pointer past the comma after parsing a floating point register
name.
* gas/arm/fp-save.s: New test.
* gas/arm/fp-save.d: Expected disassembly.
2008-02-13 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (parse_real_register): Don't return 'FLAT'
if not in Intel mode.
(i386_intel_operand): Ignore segment overrides in immediate and
offset operands.
(intel_e11): Range-check i.mem_operands before use as array
index. Filter out FLAT for uses other than as segment override.
(intel_get_token): Remove broken promotion of "FLAT:" to mean
"offset FLAT:".
gas/testsuite/
2008-02-13 Jan Beulich <jbeulich@novell.com>
* gas/i386/intelok.s: Replace invalid offset expression with
valid ones.
* gas/i386/x86_64.s: Likewise.
opcodes/
2008-02-13 Jan Beulich <jbeulich@novell.com>
* i386-opc.h (RegFlat): New.
* i386-reg.tbl (flat): Add.
* i386-tbl.h: Re-generate.
2008-02-13 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (allow_pseudo_reg): New.
(parse_real_register): Check for NULL just once. Allow all
register table entries when allow_pseudo_reg is non-zero.
Don't allow any registers without type when allow_pseudo_reg
is zero.
(tc_x86_regname_to_dw2regnum): Replace with ...
(tc_x86_parse_to_dw2regnum): ... this.
(tc_x86_frame_initial_instructions): Adjust for above change.
* config/tc-i386.h (tc_regname_to_dw2regnum): Remove.
(tc_parse_to_dw2regnum): New.
(tc_x86_regname_to_dw2regnum): Replace with ...
(tc_x86_parse_to_dw2regnum): ... this.
* dw2gencfi.c (tc_parse_to_dw2regnum): New, broken out of ...
(cfi_parse_reg): ... this. Use tc_parse_to_dw2regnum. Adjust
error handling.
gas/testsuite/
2008-02-13 Jan Beulich <jbeulich@novell.com>
* gas/cfi/cfi-i386.s: Add code testing use of all registers.
Fix a few comments.
* gas/cfi/cfi-x86_64.s: Likewise.
* gas/cfi/cfi-i386.d, gas/cfi/cfi-x86_64.d: Adjust.
opcodes/
2008-02-13 Jan Beulich <jbeulich@novell.com>
* i386-gen.c (process_i386_registers): Process new fields.
* i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
unsigned char. Add dw2_regnum and Dw2Inval.
* i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
register names.
* i386-tbl.h: Re-generate.
2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/nops.s: Add more tests with opcodes from 0x0f19
to 0x0f1f.
* gas/i386/x86-64-nops.s: Likewise.
* gas/i386/nops.d: Updated.
* gas/i386/x86-64-nops.d: Likewise.
opcodes/
2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
(REG_0F18): Updated.
(reg_table): Updated.
(dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e.
(twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
* dwarf2dbg.c (out_sleb128): Delete.
(size_fixed_inc_line_addr, emit_fixed_inc_line_addr): New.
(out_fixed_inc_line_addr): Delete.
(relax_inc_line_addr, dwarf2dbg_estimate_size_before_relax): Call new
size_fixed_inc_line_addr if DWARF2_USE_FIXED_ADVANCE_PC is set.
(dwarf2dbg_convert_frag): Likewise for emit_fixed_inc_line_addr.
(process_entries): Remove calls to out_fixed_inc_line_addr. When
DWARF2_USE_FIXED_ADVANCE_PC is set, call relax_inc_line_addr.
* read.h (emit_expr_fix): New prototype.
* read.c (emit_expr): Move code to emit_expr_fix and use it here.
(emit_expr_fix): New.
testsuite/
* gas/lns/lns.exp: Run new lns-big-delta test for targets that set
DWARF2_USE_FIXED_ADVANCE_PC.
* gas/lns/lns-big-delta.s: New.
* gas/lns/lns-big-delta.d: New.
PPC_OPCODE_ALTIVEC and PPC_OPCODE_SPE flags.
* gas/ppc/altivec_and_spe.s: New test - checks that ISA extension
command line options (-maltivec, -mspe) can be specified before
CPU selection command line options.
* gas/ppc/altivec_and_spe.d: Expected disassembly.
* gas/ppc/ppc.exp: Run the new test
2007-12-22 H.J. Lu <hongjiu.lu@intel.com>
* doc/binutils.texi: Document the new intel-mnemonic and
intel-mnemonic options for i386 disassembler.
gas/testsuite/
2007-12-22 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/compat-intel.d: New file.
* gas/i386/compat.d: Likewise.
* gas/i386/compat.s: Likewise.
* gas/i386/i386.exp: Run compat.
opcodes/
2007-12-22 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (intel_mnemonic): New.
(print_i386_disassembler_options): Display att-mnemonic and
intel-mnemonic options.
(print_insn): Handle att-mnemonic and intel-mnemonic.
(float_reg): Replace SYSV386_COMPAT with "!M" and "M".
(putop): Handle "!M" and "M".
* config/tc-xtensa.c (xg_symbolic_immeds_fit): Relax for weak
references but not weak definitions.
gas/testsuite/
* gas/xtensa/all.exp: Run new weak-call test.
* gas/xtensa/weak-call.d: New.
* gas/xtensa/weak-call.s: New.
the symbol's section is the undefined section.
* gas/testsuite/gas/elf/symtab.s: New test.
gas/testsuite/gas/elf/symtab.d: New expected output.
gas/testsuite/gas/elf/elf.exp: Run the new symbtab test.
* config/tc-mips.h (mips_nop_opcode): Declare.
(NOP_OPCODE): Define.
(mips_segment_info): New structure.
(TC_SEGMENT_INFO_TYPE): Use it instead of insn_label_list.
* config/tc-mips.c (label_list): Adjust for new TC_SEGMENT_INFO_TYPE.
(mips_record_mips16_mode): New function.
(install_insn): Call it.
(mips_align): Likewise. Turn the fill argument into an "int *".
Use frag_align_code for code segments if no fill data is given.
(s_align): Adjust call accordingly.
(mips_nop_opcode): New function.
(mips_handle_align): Use the first variable byte to decide which
nop sequence is needed. Use md_number_to_chars and mips16_nop_insn.
gas/testsuite/
* gas/mips/align2.s, gas/mips/align2.d, gas/mips/align2-el.d: New
tests.
* gas/mips/mips.exp: Run them.
* config/tc-s390.c (md_begin): If the -mesa option is specified
add zarch opcodes to the hash table only if there is no variant
that is available for the esa mode as well.
2007-11-29 Martin Schwidefsky <schwidefsky@de.ibm.com>
* gas/s390/esa-z9-109.d: Add check for old version of sske.
* gas/s390/esa-z9-109.s: Likewise.
(dwarf2_emit_insn): Use it here.
(dwarf2_directive_loc): Fix check for consecutive .loc directives
when debug_type is DEBUG_DWARF2.
* dwarf2dbg.h (dwarf2_consume_line_info): New prototype.
* config/tc-ia64.c (ia64_flush_insns): Call dwarf2_consume_line_info.
(md_assemble): Likewise.
testsuite/
* gas/lns/lns.exp: Run lns-common-1 with alternate source for ia64.
* gas/lns/lns-common-1-ia64.s: New file.
* config/tc-mn10300.h (md_allow_eh_opt): Define. Only allow call frame optimization if linker relaxation is not enabled.
* gas/elf/elf.exp: Disable ehopt test for mn10300.
(display_debug_frames): Remove check in is_relocatable.
* dwarf.h (is_relocatable): Remove declaration.
* objdump.c (is_relocatable): New static definition.
* readelf.c (dump_relocations): Make the function void.
(is_32bit_abs_reloc): Add support for x86, Arc, Arm, D10V, Dlx, OR32 and Score.
(is_32bit_pcrel_reloc): Add support for x86 and Arm.
(is_16bit_abs_reloc): Add support for D10V.
(debug_apply_rela_addends): Rename to debug_apply_relocations.
Add code to support rel relocations.
(load_debug_section): Fix call to debug_apply_relocations.
(get_file_header): Remove setting of is_relocatable.
* gas/cfi/cfi-common-6.d: Allow for possible relocation of the .debug.eh_frame section.
* reloc.c (BFD_RELOC_MN10300_ALIGN): Add.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* elf-m10300.h: Handle R_MN10300_ALIGN relocs.
* mn10300_elf_relax_delete_bytes): Honour R_MN10300_ALIGN relocs.
Re-fix off by one error in comparisons.
* config/tc-mn10300.c (tc_gen_reloc): Fix test that decides when
sym_diff relocs should be generated.
(md_apply_fix): Skip R_MN10300_ALIGN relocs.
(mn10300_fix_adjustable): Do not adjust R_MN10300_ALIGN relocs.
(mn10300_handle_align): New function. Generate R_MN10300_ALIGN
relocs to record alignment requests.
* config/tc-mn10300.h (TC_FORCE_RELOCATION_SUB_SAME): Also force
R_MN10300_ALIGN relocs.
(HANDLE_ALIGN): Define. Call mn10300_handle_align.
* gas/all/gas.exp: Do not run diff1.s test for mn10300.
* ld-mn10300/mn10300.exp: Run new tests. Skip i126256 test if
a compiler is not available.
* ld-mn10300/i112045-3.s: New test.
* ld-mn10300/i112045-3.d: Expected disassembly.
* ld-mn10300/i135409.s: Rename to i135409-1.s.
* ld-mn10300/i135409.d: Rename to i135409-1.d
* ld-mn10300/i135409-2.s: New test.
* ld-mn10300/i135409-2.d: Expected symbol table.
* ld-mn10300/i36434.d: Adjust expected disassembly.
comma then the following argument must be a subsection number.
* testsuite/gas/elf/elf.exp (run_elf_list_test): Run section6 test.
* testsuite/gas/elf/section6.s: New file: Check behaviour of .pushsection with a subsection argument.
* testsuite/gas/elf/section6.d: New file: Expected disassembly.
* opcodes/mips-dis.c (mips_cp0_names_r3000): New definition.
(mips_cp0_names_r4000): Likewise.
(mips_arch_choices): Link to the above as appropriate.
gas/testsuite/:
* gas/mips/cp0-names-r3000.d: New test for R3000 CP0 symbolic
disassembly.
* gas/mips/cp0-names-r4000.d: New test for R4000/R4400 symbolic
CP0 disassembly.
* mips/mips.exp: Run the new tests.
* config/tc-mips.c (AT): Rename to...
(ATREG): ... this.
(AT): New definition.
(mips_set_options): Rename "noat" to "at"; change the type.
(mips_opts): Update accordingly.
(append_insn): Likewise.
(macro_build_ldst_constoffset): Likewise.
(load_address): Likewise.
(macro, macro2): Likewise.
(s_mipsset): Handle ".set at=REG". Update handling of ".set at"
and ".set noat".
gas/testsuite/:
* gas/mips/at-1.d, gas/mips/at-2.l: New tests to check the ".set
at=REG" directive.
* gas/mips/at-1.s, gas/mips/at-2.s: Sources for the new tests.
* gas/mips/mips.exp: Run the new tests.
2007-10-04 David Daney <ddaney@avtrex.com>
* mips-opc.c (mips_builtin_opcodes): Mark lwxc1 as working on FP_S
registers.
gas/testsuite/
2007-10-04 David Daney <ddaney@avtrex.com>
* gas/mips/odd-float.d, gas/mips/odd-float.s: New test.
* gas/mips/mips.exp: Run it.
2007-09-27 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/5072
* gas/i386/i386.exp: Run x86-64-opcode-inval and
x86-64-opcode-inval-intel.
* gas/i386/x86-64-opcode-inval-intel.d: New.
* gas/i386/x86-64-opcode-inval.d: Likewise.
* gas/i386/x86-64-opcode-inval.s: Likewise.
opcodes/
2007-09-27 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/5072
* i386-dis.c: Update comments on '{', '}' and '|' to support
only AT&T and Intel modes.
(X86_64_4...X86_64_27): New.
(dis386): Updated. Use X86_64_4...X86_64_21.
(dis386_twobyte): Updated.
(float_mem): Likewise.
(x86_64_table): Add X86_64_4...X86_64_27.
(opc_ext_table): Updated. Use X86_64_22 and X86_64_27.
(putop): Updated handling of '{', '}' and '|' to support only
AT&T and Intel modes.
* config/m68k-parse.h (m68k_register): Use MBO instead of MBB.
(last_movec_reg): Change to MBO.
* config/tc-m68k.c (fido_ctrl): Use MBO instead of MBB.
(m68k_ip): Use MBO instead of MBO.
(init_table): Use MBO instead of MBO. Add an entry for mbo.
gas/testsuite/
* gas/m68k/fido.s: Add tests for %mbo.
* gas/m68k/fido.d: Update accordingly.
opcodes/
* m68k-dis.c (print_insn_arg): Use %mbo instead of %mbb.
2007-09-26 Jan Beulich <jbeulich@novell.com>
* gas/i386/x86-64-addr32.d: Adjust expectations.
opcodes/
2007-09-26 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (OP_E_extended): Distinguish rip- and eip-
relative addressing. Update used_prefixes based on whether any
base or index register was printed.
2007-09-24 Carlos O'Donell <carlos@codesourcery.com>
* config/tc-mips.c (s_align): Set max_alignment to 28.
gas/testsuite/
2007-09-24 Carlos O'Donell <carlos@codesourcery.com>
* gas/mips/align.s, gas/mips/align.d: New test.
* gas/mips/mips.exp: Run it.
2007-09-17 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (intel_e04): Revert the last change.
gas/testsuite/
2007-09-17 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/x86-64-rip.s: Revert the last change.
* gas/i386/x86-64-rip-intel.d: Likewise.
* gas/i386/x86-64-rip.d: Likewise.
2007-09-12 Jan Beulich <jbeulich@novell.com>
* gas/i386/sse4_1.s, gas/i386/x86-64-sse4_1.s: Add two-operand forms
of blendvps, blendvpd, and pblendvb.
* gas/i386/sse4_1.d, gas/i386/sse4_1-intel.d,
gas/i386/x86-64-sse4_1.d, gas/i386/x86-64-sse4_1-intel.d: Adjust,
making last/first operand of blendvps, blendvpd, and pblendvb
optional.
opcodes/
2007-09-12 Jan Beulich <jbeulich@novell.com>
* i386-opc.tbl: Add two-operand forms of blendvps, blendvpd, and
pblendvb.
* i386-tbl.h: Regenerate.
* gas/i386/i386.exp: Run x86-64-reg and x86-64-reg-intel.
* gas/i386/x86-64-reg.s: New. Add tests for instructions
with one register operand.
* gas/i386/x86-64-reg-intel.d: Likewise.
* gas/i386/x86-64-reg.d: Likewise.
2007-08-28 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (process_suffix): Handle cmpxchg8b in
Intel mode.
gas/testsuite/
2007-08-28 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/mem.s: New. Add tests for instructions with one
memory operand.
* gas/i386/x86-64-mem.s: Likewise.
* gas/i386/mem-intel.d: Updated.
* gas/i386/mem.d: Likewise.
* gas/i386/x86-64-mem-intel.d: Likewise.
* gas/i386/x86-64-mem.d: Likewise.
opcodes/
2007-08-28 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (Md): New.
(grps): Use 0 on invlpg. Use M on fxsave and fxrstor. Use
Md on ldmxcsr and stmxcsr. Use b_mode on clflush.
(OP_0fae): Clear bytemode for sfence.
2007-08-28 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* elf32-arm.c (elf32_arm_compare_mapping): Compare first on vma,
then on type.
binutils/testsuite:
2007-08-28 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* binutils-all/ar.exp (long_filenames): Delete temporary files on
the host.
* binutils-all/arm/objdump.exp: Only check "which $OBJDUMP" if
host is local.
* binutils-all/objcopy.exp: Use ${srecfile} to get the name of the
srec file to be passed to binutils_run.
(objcopy_test_readelf): Use remote_exec.
* binutils-all/readelf.exp (readelf_find_size): Use remote_exec.
(readelf_test): Likewise.
(readelf_wi_test): Likewise.
* lib/utils-lib.exp (run_dump_test): Only check "which $binary" if
host is local. Use remote_exec. Use $tempfile not
tmpdir/bintest.o.
gas:
2007-08-28 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* as.c (main): Flush stderr before printing listings to ensure
consistent output order across platforms.
gas/testsuite:
2007-08-28 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* lib/gas-defs.exp (gas_version): Use remote_* functions instead
of exec.
(gas_host_run): New.
(gas_run): Use gas_host_run.
(gas_start): Likewise.
(run_dump_test): Likewise.
(objdump): Use gas_host_run.
(objdump_start_no_subdir): Likewise.
* lib/gas-dg.exp (gas-dg-test): Use "remote_file host delete".
* lib/run: Remove.
* gas/macros/macros.exp: Download app4b.s to host.
* gas/i386/i386.exp (gas_64_check): Use gas_host_run.
(gas_32_check): Likewise.
* gas/maxq10/maxq10.exp (gas_64_check): Likewise
(gas_32_check): Likewise.
* gas/maxq20/maxq20.exp (gas_64_check): Likewise
(gas_32_check): Likewise.
* gas/sparc/sparc.exp (gas_64_check): Likewise.
* gas/cfi/cfi.exp: Likewise.
* gas/elf/elf.exp (run_list_test): Likewise. Use temporary file
for readelf output in place of pipe.
* gas/all/gas.exp: Download incbin.dat to host.
(do_comment): Allow \r\r\n.
ld:
2007-08-28 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* ldlang.c (sort_sections_by_lma): Sort by internal id after lma
for stable sort.
ld/testsuite:
2007-08-28 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* ld-elfcomm/elfcomm.exp: Use run_host_cmd. Only check "which
$CC" if host is local.
* ld-checks/checks.exp: Use run_host_cmd.
* ld-elf/exclude.exp: Likewise.
* ld-elf/elf.exp: Download merge.ld if host is remote.
* ld-elf/binutils.exp (binutils_test): Use remote_exec.
* ld-elf/tls_common.exp: Use run_host_cmd.
* lib/ld-lib.exp (ld_version): Only check "which $ld" if host is
local. Use remote_exec.
(run_host_cmd): New.
(run_host_cmd_yesno): New.
(default_ld_relocate): Use run_host_cmd_yesno.
(default_ld_link): Likewise.
(default_ld_simple_link): Use run_host_cmd.
(default_ld_compile): Only check "which $ccprog" if host is local.
Use remote_file and remote_exec.
(default_ld_assemble): Only check "which $as" if host is local.
Use run_host_cmd.
(default_ld_nm): Use remote_exec, remote_upload and remote_file.
(run_dump_test): Use remote_exec, remote_upload and remote_file.
Only check "which $binary" if host is local.
(run_ld_link_tests): Use remote_exec, remote_upload and
remote_file.
* ld-selective/selective.exp: Only check "which $CXX" if host is
local. Use remote_exec.
* ld-scripts/phdrs.exp: Only check "which $objdump" if host is
local. Use run_host_cmd.
* ld-scripts/phdrs2.exp: Likewise.
* ld-scripts/weak.exp: Likewise.
* ld-undefined/weak-undef.exp: Likewise.
* ld-scripts/crossref.exp: Only check "which $CC" if host is local.
Use run_host_cmd.
* ld-scripts/map-address.exp: Upload map_address.map if host is
remote.
* ld-srec/srec.exp (run_srec_tests): Use run_host_cmd. Only check
"which $CC" and "which $CXX" if host is local.
* ld-undefined/undefined.exp: Only check "which $CC" if host is
local. Use remote_file and run_host_cmd.
* config/default.exp: Use remote_exec to create tmpdir.
* gas/elf/elf.exp (target_machine): Treat the arm-linux-gnu target in the same way as the arm-eabi target.
* gas/arm/mapshort-eabi.d: Use this file for the arm-linux-gnu target.
* gas/arm/mapshort-elf.d: Do not use this file for the arm-linux-gnu target.
Check the return value of insert_reg_alias and do not continue to create aliases once an insertion has failed.
(s_unreq): Delete the all-upper-case and all-lower-case alternatives as well.
* testsuite/gas/arm/arm.s: Add tests for re-aliasing a previously removed alias.
* testsuite/gas/arm/arm.l: Add new expected warning message.
2007-07-04 H.J. Lu <hongjiu.lu@intel.com>
* config/obj-coff.h (x86_64_target_format): Renamed to ...
(i386_target_format): This
(TARGET_FORMAT): Use i386_target_format.
* config/tc-i386.c (x86_64_target_format): Removed.
(i386_target_format): Handle PE formats.
gas/testsuite/
2007-07-04 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run x86-64-nops-1 for x86_64-*-mingw*.
* config/tc-m68k.c (relaxable_symbol): Make sure that the correct addend is stored for relocs against weak symbols.
(md_apply_fix): So not loose track of addend for relocs against weak symbols.
* testsuite/gas/m68k/p3041.s: New test case.
* testsuite/gas/m68k/p3041.d: New expected disassembly.
* testsuite/gas/m68k/all.exp: Run new test for m68k-*-netbsd toolchains.
Only run arch-cpu-1 test for ELF based toolchains.
Tidy ups for m68k-netbsd gas toolchain:
* testsuite/gas/m68k/cpu32.d: Allow for extra text after expected disassembly.
* testsuite/gas/m68k/mcf-trap.d: Allow for alternative trap mnemonics.
* testsuite/gas/m68k/br-isab.d: Fix name of test.
* testsuite/gas/m68k/br-isac.d: Fix name of test.
2007-05-01 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (match_template): Check suffix for crc32 in
Intel mdoe.
(process_suffix): Default the suffix of 8bit crc32 to
BYTE_MNEM_SUFFIX.
(check_byte_reg): Skip check for 8bit crc32.
gas/testsuite/
2007-05-01 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/crc32-intel.d: New file.
* gas/i386/crc32.d:Likewise.
* gas/i386/crc32.s:Likewise.
* gas/i386/x86-64-crc32-intel.d:Likewise.
* gas/i386/x86-64-crc32.d:Likewise.
* gas/i386/x86-64-crc32.s:Likewise.
* gas/i386/i386.exp: Run crc32, crc32-intel, x86-64-crc32
and x86-64-crc32-intel.
opcodes/
2007-05-01 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (CRC32_Fixup): Properly handle Intel mode and
check data size prefix in 16bit mode.
* i386-opc.c (i386_optab): Default crc32 to non-8bit and
support Intel mode.
2007-04-26 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/4429
* gas/i386/i386.exp: Run "x86-64-addr32-intel" and
"x86-64-rip-intel".
* gas/i386/intelok.d: Updated.
* gas/i386/x86-64-addr32-intel.d: New file.
* gas/i386/x86-64-rip-intel.d: Likewise.
opcodes/
2007-04-26 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/4429
* i386-dis.c (print_insn): Also swap the order of op_riprel
when swapping op_index. Break when the RIP relative address
is printed.
(OP_E): Properly handle RIP relative addressing and print the
explicit zero displacement for Intel mode.
gas/testsuite/
* gas/arm/thumb1_unified.d: New test.
* gas/arm/thumb1_unified.s: New test.
gas/
* config/tc-arm.c (md_assemble): Only allow 16-bit instructions on
Thumb-1. Add sanity check for bogus relaxations.
gas/
* config/tc-arm.c (encode_thumb2_ldmstm): New function.
(do_t_ldmstm): Generate 16-bit push/pop. Use encode_thumb2_ldmstm.
(do_t_push_pop): Use encode_thumb2_ldmstm.
gas/testsuite/
* gas/arm/thumb2_ldmstm.d: New test.
* gas/arm/thumb2_ldmstm.s: New test.
PR gas/3918
* lib/gas-defs.exp (gas_started): New variable. Initialized to
0.
(gas_start): Set gas_started to 1.
(gas_finish): Skip if gas_started is 0. Reset gas_started to 0.
* config/tc-mips.c (mips_set_options, mips_opts, file_ase_dspr2,
ISA_SUPPORTS_DSPR2_ASE, MIPS_CPU_ASE_DSPR2): Add DSP R2 ASE support.
(macro_build): Add case '2'.
(macro): Expand M_BALIGN to nop, packrl.ph or balign.
(validate_mips_insn): Add support for balign instruction.
(mips_ip): Handle DSP R2 instructions. Support balign instruction.
(OPTION_DSPR2, OPTION_NO_DSPR2, OPTION_COMPAT_ARCH_BASE,
md_parse_option, mips_after_parse_args): Add -mdspr2 and -mno-dspr2
command line options.
(s_mipsset): Add support for .set dspr2 and .set nodspr2 directives.
(md_show_usage): Add -mdspr2 and -mno-dspr2 help output.
* doc/c-mips.texi, doc/as.texinfo: Document -mdspr2, -mno-dspr2,
.set dspr2, .set nodspr2.
[ gas/testsuite/ChangeLog ]
* gas/mips/mips32-dspr2.s, gas/mips/mips32-dspr2.d: New test for
DSP R2.
* gas/mips/mips.exp: Run new test.
[ include/opcode/Changelog ]
* mips.h (OP_SH_BP, OP_MASK_BP): Add support for balign instruction.
(INSN_DSPR2): Add flag for DSP R2 instructions.
(M_BALIGN): New macro.
[ opcodes/ChangeLog ]
* mips-dis.c (mips_arch_choices): Add DSP R2 support.
(print_insn_args): Add support for balign instruction.
* mips-opc.c (D33): New shortcut for DSP R2 instructions.
(mips_builtin_opcodes): Add DSP R2 instructions.
[ sim/mips/ChangeLog ]
* Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
* configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
Add dsp2 to sim_igen_machine.
* configure: Regenerate.
* dsp.igen (do_ph_op): Add MUL support when op = 2.
(do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
(mulq_rs.ph): Use do_ph_mulq.
(MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
* mips.igen: Add dsp2 model and include dsp2.igen.
(MFHI, MFLO, MTHI, MTLO): Extend these instructions for
for *mips32r2, *mips64r2, *dsp.
(MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
for *mips32r2, *mips64r2, *dsp2.
* dsp2.igen: New file for MIPS DSP REV 2 ASE.
[ sim/testsuite/sim/mips/ChangeLog ]
* basic.exp: Run the dsp2 test.
* utils-dsp.inc (dspckacc_astio, dspck_tsimm): New macro.
* mips32-dsp2.s: New test.
2007-02-11 H.J. Lu <hongjiu.lu@intel.com>
PR gas/4027
* gas/i386/opcode.s: Add more tests for "test".
* i386/opcode-intel.d: Updated.
* gas/i386/opcode-suffix.d: Likewise.
* gas/i386/opcode.d: Likewise.
include/opcode/
2007-02-11 H.J. Lu <hongjiu.lu@intel.com>
PR gas/4027
* i386.h (i386_optab): Put the real "test" before the pseudo
one.
* gas/elf/elf.exp: Expect the redef test to fail on targets which do not
convert fixups against ordinary symbols into relocs against section symbols.
* gas/all/gas.exp: Likewise.
gas/
* config/tc-arm.c (do_t_add_sub): Use Rd and Rs.
gas/testsuite/
* gas/arm/thumb2_add.d: Add test for missing operand.
* gas/arm/thumb2_add.s: Ditto.
2006-12-13 H.J. Lu <hongjiu.lu@intel.com>
PR gas/3712
* config/tc-i386.c (match_template): Use MAX_OPERANDS for the
number of operands. Issue an error if MAX_OPERANDS != 4. Add
the 4th operand check.
gas/testsuite/
2006-12-13 H.J. Lu <hongjiu.lu@intel.com>
PR gas/3712
* gas/i386/inval.s: Add invalid insertq.
* gas/i386/x86-64-inval.s: Likewise.
* gas/i386/inval.l: Updated.
* gas/i386/x86-64-inval.l: Likewise.
2006-12-04 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (OP_J): Update used_prefixes in v_mode.
gas/testsuite/
2006-12-04 Jan Beulich <jbeulich@novell.com>
* gas/i386/opcode-intel.d: Fix wrong expectation. Make white space
expectations more consistent.
gas/
* config/tc-arm.c (arm_force_relocation): Return 1 for relocs against
function symbols.
gas/testsuite/
* gas/arm/thumbrel.s: New test.
* gas/arm/thumbrel.d: New test.
2006-11-30 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (SEG_Fixup): Delete.
(Sv): Use OP_SEG.
(putop): New suffix character 'D'.
(dis386): Use it.
(grps): Likewise.
(OP_SEG): Handle bytemode other than w_mode.
gas/testsuite/
2006-11-30 Jan Beulich <jbeulich@novell.com>
* gas/i386/intel.d: Adjust.
* gas/i386/naked.d: Adjust.
* gas/i386/opcode.d: Adjust.
2006-11-30 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (dis386): Use 'R' and 'O' for cbw/cwd unconditionally.
(putop): For 'O' suffix, print 'q' in Intel mode, and mark data prefix
used. For 'R' and 'W' suffix, simplify and fix Intel mode.
gas/testsuite/
2006-11-30 Jan Beulich <jbeulich@novell.com>
* gas/i386/intel.s: Use Intel syntax in Intel syntax test.
* gas/i386/x86-64-cbw.[sd]: New.
* gas/i386/x86-64-cbw-intel.d: New.
* gas/i386/i386.exp: Run new tests.
* elf32-xtensa.c (elf_xtensa_special_sections): Add .xtensa.info.
gas/
* config/tc-xtensa.c (XSHAL_ABI): Add default definition.
(directive_state): Disable scheduling by default.
(xtensa_add_config_info): New.
(xtensa_end): Call xtensa_add_config_info.
gas/testsuite/
* gas/elf/section2.e-xtensa: New file.
* gas/elf/elf.exp: Use it.
include/
* xtensa-config.h (XSHAL_ABI): New.
(XTHAL_ABI_WINDOWED, XTHAL_ABI_CALL0): New.
ld/
* emultempl/xtensaelf.em (XSHAL_ABI): Add default definition.
(replace_insn_sec_with_prop_sec): Use bfd_make_section_with_flags.
Delete redundant code to set sections flags and alignment.
(xt_config_info_unpack_and_check, check_xtensa_info): New.
(elf_xtensa_after_open): Iterate over input statements instead of
link_info.input_bfds.
(elf_xtensa_before_allocation): Likewise. Call check_xtensa_info for
each input, and write a new .xtensa.info section in the output.
* arm-dis.c (last_is_thumb): Delete.
(enum map_type, last_type): New.
(print_insn_data): New.
(get_sym_code_type): Take MAP_TYPE argument. Check the type of
the right symbol. Handle $d.
(print_insn): Check for mapping symbols even without a normal
symbol. Adjust searching. If $d is found see how much data
to print. Handle data.
gas/
* config/tc-arm.h (md_cons_align): Define.
(mapping_state): New prototype.
* config/tc-arm.c (mapping_state): Make global.
gas/testsuite/
* gas/arm/arm7t.d, gas/arm/neon-ldst-rm.d, gas/arm/thumb2_pool.d,
gas/arm/tls.d: Update for $d support.
* gas/arm/mapshort.d, gas/arm/mapshort.s: New test.
* gas/elf/section2.e-armeabi: Update.
* gas/elf/section2.e-armelf: New file.
* gas/elf/elf.exp: Use it.
ld/testsuite/
* ld-arm/mixed-app.d, ld-arm/tls-app.d, ld-arm/tls-lib.d: Update
for $d support.
* config/tc-m68k.c (m68k_ip): Correct output of cpu aliases.
gas/testsuite/
* gas/m68k/all.exp: Add mcf-trap.
* gas/m68k/mcf-trap.[sd]: New.
opcodes/
* m68k-opc.c (m68k_opcodes): Place trap instructions before set
conditionals. Add tpf coldfire instruction as alias for trapf.
2006-11-15 Jan Beulich <jbeulich@novell.com>
PR/3469
* symbols.c (symbol_clone): Mark symbol ending up not on symbol
chain by linking it to itself.
(resolve_symbol_value): Also check symbol_shadow_p().
(symbol_shadow_p): New.
* symbols.h (symbol_shadow_p): Declare.
gas/testsuite/
2006-11-15 Jan Beulich <jbeulich@novell.com>
* gas/elf/equ-reloc.[sd]: New.
* gas/elf/elf.exp: Run new test.
(arm_fix_adjustable) [OBJ_ELF]: Use it on coff targets too.
* gas/arm/local_label_coff.s: New test.
* gas/arm/local_label_coff.d: New test.
* gas/arm/local_label_elf.s: New test.
* gas/arm/local_label_elf.d: New test.
* gas/arm/local_label_wince.s: New test.
* gas/arm/local_label_wince.d: New test.
* pei-arm-wince.c (LOCAL_LABEL_PREFIX): Likewise.
* coff-arm.c (LOCAL_LABEL_PREFIX): Only define if not defined before.
* gas/arm/undefined.d: Run test on Windows CE.
* gas/arm/undefined_coff.d: Don't run test on Windows CE.
* config/tc-mips.c (pic_need_relax): Return true for section symbols.
gas/testsuite:
* gas/mips/elf-rel26.s: New test.
* gas/mips/elf-rel26.d: Ditto.
* gas/mips/mips.exp: Run it.
personality and lsda.
(struct cie_entry): Add per_encoding, lsda_encoding and personality.
(alloc_fde_entry): Initialize per_encoding and lsda_encoding.
(cfi_pseudo_table): Handle .cfi_personality and .cfi_lsda.
(dot_cfi_personality, dot_cfi_lsda, encoding_size): New functions.
(output_cie): Output personality including its encoding and LSDA encoding.
(output_fde): Output LSDA.
(select_cie_for_fde): Don't share CIE if personality, its encoding or
LSDA encoding are different. Copy the 3 fields from fde_entry to
cie_entry.
* doc/as.texinfo (.cfi_personality, .cfi_lsda): Document.
* gas/cfi/cfi-common-6.d: New test.
* gas/cfi/cfi-common-6.s: New.
* gas/cfi/cfi.exp: Add cfi-common-6 test.
* elf-bfd.h (local_call_stubs): New member.
* elfxx-mips.c (FN_STUB_P, CALL_STUB_P, CALL_FP_STUB_P): New macros.
(mips_elf_calculate_relocation): Handle local mips16 call stubs.
(mips16_stub_section_p): Rename from mips_elf_stub_section_p, use
the new stub macros.
(_bfd_mips_elf_check_relocs): Handle call stubs for code which
mixes mips16 and mips32 functions. Use mips16_stub_section_p. Mark
used stubs with SEC_KEEP. Use the new stub macros.
[ gas/testsuite/ChangeLog ]
* gas/mips/mips16-intermix.d, gas/mips/mips16-intermix.s: New
testcase.
* gas/mips/mips.exp: Run new testcase.
[ ld/testsuite/ChangeLog ]
* ld-mips-elf/mips16-intermix-1.s, ld-mips-elf/mips16-intermix-2.s,
ld-mips-elf/mips16-intermix.d: New testcase.
* ld-mips-elf/mips-elf.exp (mips16_intermix_test): Run new testcases.
2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Ian Lance Taylor <ian@wasabisystems.com>
Ben Elliston <bje@wasabisystems.com>
* archures.c: Add definition for bfd_mach_arm_iWMMXt2.
* cpu-arm.c (processors): Add bfd_mach_arm_iWMMXt2.
(arch_info_struct, bfd_arm_update_notes): Likewise.
(architectures): Likewise.
(bfd_arm_merge_machines): Check for iWMMXt2.
* bfd-in2.h: Rebuild.
gas/
2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Ian Lance Taylor <ian@wasabisystems.com>
Ben Elliston <bje@wasabisystems.com>
* config/tc-arm.c (arm_cext_iwmmxt2): New.
(enum operand_parse_code): New code OP_RIWR_I32z.
(parse_operands): Handle OP_RIWR_I32z.
(do_iwmmxt_wmerge): New function.
(do_iwmmxt_wldstd): Handle iwmmxt2 case where second operand is
a register.
(do_iwmmxt_wrwrwr_or_imm5): New function.
(insns): Mark instructions as RIWR_I32z as appropriate.
Also add torvsc<b,h,w>, wabs<b,h,w>, wabsdiff<b,h,w>,
waddbhus<l,m>, waddhc, waddwc, waddsubhx, wavg4{r}, wmaddu{x,n},
wmadds{x,n}, wmerge, wmiaxy{n}, wmiawxy{n}, wmul<sm,um>{r},
wmulw<um,sm,l>{r}, wqmiaxy{n}, wqmulm{r}, wqmulwm{r}, wsubaddhx.
(md_begin): Handle IWMMXT2.
(arm_cpus): Add iwmmxt2.
(arm_extensions): Likewise.
(arm_archs): Likewise.
gas/testsuite/
2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Ian Lance Taylor <ian@wasabisystems.com>
Ben Elliston <bje@wasabisystems.com>
* gas/arm/iwmmxt2.s: New file.
* gas/arm/iwmmxt2.d: New file.
include/opcode/
2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Ian Lance Taylor <ian@wasabisystems.com>
Ben Elliston <bje@wasabisystems.com>
* arm.h (ARM_CEXT_IWMMXT2, ARM_ARCH_IWMMXT2): Define.
opcodes/
2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Ian Lance Taylor <ian@wasabisystems.com>
Ben Elliston <bje@wasabisystems.com>
* arm-dis.c (coprocessor_opcodes): The X-qualifier to WMADD may
only be used with the default multiply-add operation, so if N is
set, don't bother printing X. Add new iwmmxt instructions.
(IWMMXT_INSN_COUNT): Update.
(iwmmxt_wwssnames): Qualify "wwss" names at index 2, 6, 10 and 14
with a 'c' suffix.
(print_insn_coprocessor): Check for iWMMXt2. Handle format
specifiers 'r', 'i'.
gas/
* config/tc-arm.c (do_neon_dyadic_if_i): Remove.
(do_neon_dyadic_if_i_d): Avoid setting U bit.
(do_neon_mac_maybe_scalar): Ditto.
(do_neon_dyadic_narrow): Force operand type to NT_integer.
(insns): Remove out of date comments.
gas/testsuite/
* gas/arm/neon-cov.s: Test .u and .s aliases for .i suffixes.
* gas/arm/neon-cov.d: Adjust expected output.
opcodes/
* arm-dis.c (neon_opcode): Fix suffix on VMOVN.
* config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
merging with previous long opcode.
gas/testsuite:
* gas/arm/unwind.s: Test not merging iWMMXt register save with
previous long opcode.
* gas/arm/unwind.d, gas/arm/unwind_vxworks.d: Update.
* config/tc-arm.c (parse_operands): Handle invalid register name
for OP_RIWR_RIWC.
gas/testsuite:
* gas/arm/iwmmxt-bad.s: Test invalid register names for wldrw and
wstrw.
* gas/arm/iwmmxt-bad.l: Update.
* config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
(parse_operands): Handle it.
(insns): Use it for tmcr and tmrc.
gas/testsuite:
* gas/arm/iwmmxt.s: Test tmcr and tmrc with wcgr registers.
* gas/arm/iwmmxt.d: Update.
bfd/
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* reloc.c: Add BFD_RELOC_ARM_T32_ADD_IMM.
gas/
* tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
(md_convert_frag): Use correct reloc for add_pc. Use
BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
(md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
(arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
gas/testsuite/
* gas/arm/thumb2_add.d: New test.
* gas/arm/thumb2_add.s: New test.
fixup_segment() to repeat a range check on a value that have already
been checked here.
* gas/sh/basic.exp: Run "too_large" dump test.
* gas/sh/too_large.s: New test file. Check that .byte directives do not
generate a bogus overflow message.
* gas/sh/too_large.s: New test control file.
* gas/mips/mips.exp: Move mips16e testcase to ELF only tests.
Run elf{el}-rel2 and elf-rel4 for all arches with gpr64. Run
e32-rel2 and e32-rel4 also for 64 bit configurations.
2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (cpu_arch_tune_set): New.
(cpu_arch_isa): Likewise.
(i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
nops with short or long nop sequences based on -march=/.arch
and -mtune=.
(set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
set cpu_arch_tune and cpu_arch_tune_flags.
(md_parse_option): For -march=, set cpu_arch_isa and set
cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
0. Set cpu_arch_tune_set to 1 for -mtune=.
(i386_target_format): Don't set cpu_arch_tune.
gas/testsuite/
2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run nops-1, nops-1-i386, nops-1-i686,
nops-1-merom, nops-2, nops-2-i386, nops-2-merom, x86-64-nops-1,
x86-64-nops-1-k8, x86-64-nops-1-nocona and x86-64-nops-1-merom.
* gas/i386/nops-1.s: New file.
* gas/i386/nops-2.s: Likewise.
* gas/i386/nops-1-i386.d: Likewise.
* gas/i386/nops-1-i686.d: Likewise.
* gas/i386/nops-1-merom.d: Likewise.
* gas/i386/nops-1.d: Likewise.
* gas/i386/nops-2-i386.d: Likewise.
* gas/i386/nops-2-merom.d: Likewise.
* gas/i386/nops-2.d: Likewise.
* gas/i386/x86-64-nops-1.s: Likewise.
* gas/i386/x86-64-nops-1-k8.d: Likewise.
* gas/i386/x86-64-nops-1-merom.d: Likewise.
* gas/i386/x86-64-nops-1-nocona.d: Likewise.
* gas/i386/x86-64-nops-1.d: Likewise.
* gas/i386/sse2.d: Updated to expect xchg %ax,%ax as 2 byte
nop.
to R_ARM_LDC_SB_G{0,1,2} respectively.
bfd/
* bfd-in2.h: Regenerate.
* elf32-arm.c (R_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0,
R_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1, R_ARM_ALU_PC_G2,
R_ARM_LDR_PC_G1, R_ARM_LDR_PC_G2, R_ARM_LDRS_PC_G0,
R_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G2, R_ARM_LDC_PC_G0,
R_ARM_LDC_PC_G1, R_ARM_LDC_PC_G2, R_ARM_ALU_SB_G0_NC,
R_ARM_ALU_SB_G0, R_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1,
R_ARM_ALU_SB_G2, R_ARM_LDR_SB_G0, R_ARM_LDR_SB_G1,
R_ARM_LDR_SB_G2, R_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G1,
R_ARM_LDRS_SB_G2, R_ARM_LDC_SB_G0, R_ARM_LDC_SB_G1,
R_ARM_LDC_SB_G2): New relocation types.
(R_ARM_PC13): Rename to AAELF name R_ARM_LDR_PC_G0 and
adjust HOWTO entry to be consistent with R_ARM_LDR_PC_G1
and friends.
(elf32_arm_howto_table_3): Delete; contents merged into
elf32_arm_howto_table_2.
(elf32_arm_howto_from_type): Adjust correspondingly.
(elf32_arm_reloc_map): Extend with the above relocations.
(calculate_group_reloc_mask): New function.
(identify_add_or_sub): New function.
(elf32_arm_final_link_relocate): Support for the above
relocations.
* reloc.c: Add enumeration entries for BFD_RELOC_ARM_...
codes to correspond to the above relocations.
gas/
* config/tc-arm.c (enum parse_operand_result): New.
(struct group_reloc_table_entry): New.
(enum group_reloc_type): New.
(group_reloc_table): New array.
(find_group_reloc_table_entry): New function.
(parse_shifter_operand_group_reloc): New function.
(parse_address_main): New function, incorporating code
from the old parse_address function. To be used via...
(parse_address): wrapper for parse_address_main; and
(parse_address_group_reloc): new function, likewise.
(enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
OP_ADDRGLDRS, OP_ADDRGLDC.
(parse_operands): Support for these new operand codes.
New macro po_misc_or_fail_no_backtrack.
(encode_arm_cp_address): Preserve group relocations.
(insns): Modify to use the above operand codes where group
relocations are permitted.
(md_apply_fix): Handle the group relocations
ALU_PC_G0_NC through LDC_SB_G2.
(tc_gen_reloc): Likewise.
(arm_force_relocation): Leave group relocations for the linker.
(arm_fix_adjustable): Likewise.
gas/testsuite/
* gas/arm/group-reloc-alu.d: New test.
* gas/arm/group-reloc-alu-encoding-bad.d: New test.
* gas/arm/group-reloc-alu-encoding-bad.l: New test.
* gas/arm/group-reloc-alu-encoding-bad.s: New test.
* gas/arm/group-reloc-alu-parsing-bad.d: New test.
* gas/arm/group-reloc-alu-parsing-bad.l: New test.
* gas/arm/group-reloc-alu-parsing-bad.s: New test.
* gas/arm/group-reloc-alu.s: New test.
* gas/arm/group-reloc-ldc.d: New test.
* gas/arm/group-reloc-ldc-encoding-bad.d: New test.
* gas/arm/group-reloc-ldc-encoding-bad.l: New test.
* gas/arm/group-reloc-ldc-encoding-bad.s: New test.
* gas/arm/group-reloc-ldc-parsing-bad.d: New test.
* gas/arm/group-reloc-ldc-parsing-bad.l: New test.
* gas/arm/group-reloc-ldc-parsing-bad.s: New test.
* gas/arm/group-reloc-ldc.s: New test.
* gas/arm/group-reloc-ldr.d: New test.
* gas/arm/group-reloc-ldr-encoding-bad.d: New test.
* gas/arm/group-reloc-ldr-encoding-bad.l: New test.
* gas/arm/group-reloc-ldr-encoding-bad.s: New test.
* gas/arm/group-reloc-ldr-parsing-bad.d: New test.
* gas/arm/group-reloc-ldr-parsing-bad.l: New test.
* gas/arm/group-reloc-ldr-parsing-bad.s: New test.
* gas/arm/group-reloc-ldr.s: New test.
* gas/arm/group-reloc-ldrs.d: New test.
* gas/arm/group-reloc-ldrs-encoding-bad.d: New test.
* gas/arm/group-reloc-ldrs-encoding-bad.l: New test.
* gas/arm/group-reloc-ldrs-encoding-bad.s: New test.
* gas/arm/group-reloc-ldrs-parsing-bad.d: New test.
* gas/arm/group-reloc-ldrs-parsing-bad.l: New test.
* gas/arm/group-reloc-ldrs-parsing-bad.s: New test.
* gas/arm/group-reloc-ldrs.s: New test.
ld/testsuite/
* ld-arm/group-relocs-alu-bad.d: New test.
* ld-arm/group-relocs-alu-bad.s: New test.
* ld-arm/group-relocs.d: New test.
* ld-arm/group-relocs-ldc-bad.d: New test.
* ld-arm/group-relocs-ldc-bad.s: New test.
* ld-arm/group-relocs-ldr-bad.d: New test.
* ld-arm/group-relocs-ldr-bad.s: New test.
* ld-arm/group-relocs-ldrs-bad.d: New test.
* ld-arm/group-relocs-ldrs-bad.s: New test.
* ld-arm/group-relocs.s: New test.
* ld-arm/arm-elf.exp: Wire in new tests.
2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run nops and x86-64-nops.
* gas/i386/nops.d: New file.
* gas/i386/nops.s: Likewise.
* gas/i386/x86-64-nops.d: Likewise.
* gas/i386/x86-64-nops.s: Likewise.
include/opcode/
2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (i386_optab): Add "nop" with memory reference.
opcodes/
2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (dis386_twobyte): Use "nopQ" for 0x1f.
(twobyte_has_modrm): Set 1 for 0x1f.
* config/tc-mips.c (mips_ip): Maintain argument count.
[ gas/testsuite/ChangeLog ]
* gas/mips/mips32-sf32.s, gas/mips/mips32-sf32.d: New test for odd
single precision FPRs on MIPS32.
* gas/mips/mips.exp: Run them.
blocks.
* gas/arm/neon-cond-bad-inc.s: New test. Make sure unconditional
Neon instructions are rejected...
* gas/arm/neon-cond-bad.s: In ARM mode, and...
* gas/arm/neon-cond-bad_t2.s: Accepted in Thumb mode (with IT).
* gas/arm/neon-cond-bad.l: Expected error output in ARM mode.
* gas/arm/neon-cond-bad.d: Control ARM mode test.
* gas/arm/neon-cond-bad_t2.d: Expected output in Thumb mode.
* gas/arm/vfp-neon-syntax-inc.s: Test VFP Neon-style syntax.
* gas/arm/vfp-neon-syntax.s: ...in ARM mode.
* gas/arm/vfp-neon-syntax_t2.s: ...and Thumb mode.
* gas/arm/vfp-neon-syntax.d: Expected output in ARM mode.
* gas/arm/vfp-neon-syntax_t2.d: Expected output in Thumb mode.
* config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
appropriate.
(mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
(mips_ip): Make overflowed/underflowed constant arguments in DSP
and MT instructions a fatal error. Use INSERT_OPERAND where
appropriate. Improve warnings for break and wait code overflows.
Use symbolic constant of OP_MASK_COPZ.
(mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
[ gas/testsuite/ChangeLog ]
* gas/mips/mips32-dsp.d, gas/mips/mips32-dsp.s, gas/mips/mips32-mt.d,
gas/mips/mips32-mt.s: Remove instructions with invalid arguments.
* gas/mips/mips32-dsp.l, gas/mips/mips32-mt.l: Delete file.
[ include/opcode/ChangeLog ]
* mips.h: Improve description of MT flags.
* m68k.h (mcf_mask): Define.
opcodes/
* m68k-opc.c (m68k_opcodes): Fix the masks of the Coldfire fmovemd
and fmovem entries. Put register list entries before immediate
mask entries. Use "l" rather than "L" in the fmovem entries.
* m68k-dis.c (match_insn_m68k): Remove the PRIV argument and work it
out from INFO.
(m68k_scan_mask): New function, split out from...
(print_insn_m68k): ...here. If no architecture has been set,
first try printing an m680x0 instruction, then try a Coldfire one.
gas/testsuite/
* gas/m68k/mcf-fpu.s: Add fmovemd and fmovem instructions.
* gas/m68k/mcf-fpu.d: Adjust accordingly.
* config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
(ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
ISA_HAS_MXHC1): New macros.
(HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
(mips_cpu_info): Change to use combined ASE/IS_ISA flag.
(MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
(mips_after_parse_args): Change default handling of float register
size to account for 32bit code with 64bit FP. Better sanity checking
of ISA/ASE/ABI option combinations.
(s_mipsset): Support switching of GPR and FPR sizes via
.set {g,f}p={32,64,default}. Better sanity checking for .set ASE
options.
(mips_elf_final_processing): We should record the use of 64bit FP
registers in 32bit code but we don't, because ELF header flags are
a scarce ressource.
(mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
(mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
* doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
missing -march options. Document .set arch=CPU. Move .set smartmips
to ASE page. Use @code for .set FOO examples.
[ gas/testsuite/Changelog ]
* gas/mips/mips-gp32-fp64-pic.d, mips/mips-gp32-fp64.d,
gas/mips/mips-gp64-fp32-pic.d, gas/mips/mips-gp64-fp32.l,
gas/mips/mips-gp64-fp64.d: Adjust test cases to the changes assembler
output.
* gas/mips/mips-gp32-fp64.l, gas/mips/mips-gp64-fp32-pic.l: New files,
catch assembler warnings.
* config/tc-mips.c (macro_build): Test for currently active
mips16 option.
(mips16_ip): Reject invalid opcodes.
[ opcodes/ChangeLog ]
* mips16-opc.c (I1, I32, I64): New shortcut defines.
(mips16_opcodes): Change membership of instructions to their
lowest baseline ISA.
[ gas/testsuite/ChangeLog ]
* gas/mips/mips.exp: Run new tests.
* gas/mips/mips16e.s, gas/mips/mips16e.d, gas/mips/mips16e-64.s,
gas/mips/mips16e-64.d, gas/mips/mips16e-64.l: New tests.
gas/
* config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
gas/testsuite/
* gas/arm/local_function.d: New test.
* gas/arm/local_function.s: New test.
* config/tc-mips.c (append_insn): Don't check the range of j or
jal addresses.
[ gas/testsuite/ChangeLog ]
* gas/mips/jal-range.l: Don't check the range of j or jal
addresses.
* config/tc-mips.c (append_insn): Only warn about an out-of-range
j or jal address.
[ gas/testsuite/ChangeLog ]
* gas/mips/jal-range.l: Only warn about an out-of-range j or jal
address.
here.
(md_apply_fix3): Multiply offset by 4 here for
BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
testsuite:
* gas/arm/iwmmxt.s: Increase offsets for wstrb and wstrh.
* gas/arm/iwmmxt.d: Update expected results.
* gas/arm/iwmmxt-bad2.s: Test wstrb, wstrh, wldrb and wldrh.
* gas/arm/iwmmxt-bad2.l: Update expected error messages.
* gas/arm/copro.d: Update accordingly.
* gas/arm/neon-cond.s: New test. Conditional Neon opcodes in ARM mode.
* gas/arm/neon-cond.d: Expected results of above.
* gas/arm/neon-cov.s: New test. Coverage of Neon instructions.
* gas/arm/neon-cov.d: Expected results of above.
* gas/arm/neon-ldst-es.s: New test. Element and structure loads and
stores.
* gas/arm/neon-ldst-es.d: Expected results of above.
* gas/arm/neon-ldst-rm.s: New test. Single and multiple register loads
and stores.
* gas/arm/neon-ldst-rm.d: Expected results of above.
* gas/arm/neon-omit.s: New test. Omission of optional operands.
* gas/arm/neon-omit.d: Expected results of above.
* gas/arm/vfp1.d: Expect Neon syntax for some VFP instructions.
* gas/arm/vfp1_t2.d: Likewise.
* gas/arm/vfp1xD.d: Likewise.
* gas/arm/vfp1xD_t2.d: Likewise.
* gas/arm/vfp2.d: Likewise.
* gas/arm/vfp2_t2.d: Likewise.
* gas/arm/vfp3-32drs.s: New test. Extended D register range for VFP
instructions.
* gas/arm/vfp3-32drs.d: Expected results of above.
* gas/arm/vfp3-const-conv.s: New test. VFPv3 constant-load and
conversion instructions.
* gas/arm/vfp3-const-conv.d: Expected results of above.
Daniel Jacobowitz <dan@codesourcery.com>
Phil Edwards <phil@codesourcery.com>
Zack Weinberg <zack@codesourcery.com>
Mark Mitchell <mark@codesourcery.com>
Nathan Sidwell <nathan@codesourcery.com>
bfd/
* bfd-in2.h: Regenerate.
* config.bfd (mips*-*-vxworks*, mips*el-*-vxworks*): New stanzas.
* configure.in (bfd_elf32_bigmips_vxworks_vec): New stanza.
(bfd_elf32_littlemips_vxworks_vec): Likewise.
(bfd_elf32_bigmips_vec): Add elf-vxworks.lo.
(bfd_elf32_littlemips_vec): Likewise.
(bfd_elf32_nbigmips_vec): Likewise.
(bfd_elf32_nlittlemips_vec): Likewise.
(bfd_elf32_ntradbigmips_vec): Likewise.
(bfd_elf32_ntradlittlemips_vec): Likewise.
(bfd_elf32_tradbigmips_vec): Likewise.
(bfd_elf32_tradlittlemips_vec): Likewise.
(bfd_elf64_bigmips_vec): Likewise.
(bfd_elf64_littlemips_vec): Likewise.
(bfd_elf64_tradbigmips_vec): Likewise.
(bfd_elf64_tradlittlemips_vec): Likewise.
* elf32-mips.c: Include elf-vxworks.h.
(mips_info_to_howto_rel): Use elf_backend_mips_rtype_to_howto
instead of calling mips_elf32_rtype_to_howto directly.
(mips_vxworks_copy_howto_rela): New reloc howto.
(mips_vxworks_jump_slot_howto_rela): Likewise.
(mips_vxworks_bfd_reloc_type_lookup): New function.
(mips_vxworks_rtype_to_howto): Likewise.
(mips_vxworks_final_write_processing): Likewise.
(TARGET_LITTLE_SYM, TARGET_LITTLE_NAME): Override for VxWorks.
(TARGET_BIG_SYM, TARGET_BIG_NAME, elf_bed, ELF_MAXPAGESIZE): Likewise.
(elf_backend_want_got_plt): Likewise.
(elf_backend_want_plt_sym): Likewise.
(elf_backend_got_symbol_offset): Likewise.
(elf_backend_want_dynbss): Likewise.
(elf_backend_may_use_rel_p): Likewise.
(elf_backend_may_use_rela_p): Likewise.
(elf_backend_default_use_rela_p): Likewise.
(elf_backend_got_header_size: Likewise.
(elf_backend_plt_readonly): Likewise.
(bfd_elf32_bfd_reloc_type_lookup): Likewise.
(elf_backend_mips_rtype_to_howto): Likewise.
(elf_backend_adjust_dynamic_symbol): Likewise.
(elf_backend_finish_dynamic_symbol): Likewise.
(bfd_elf32_bfd_link_hash_table_create): Likewise.
(elf_backend_add_symbol_hook): Likewise.
(elf_backend_link_output_symbol_hook): Likewise.
(elf_backend_emit_relocs): Likewise.
(elf_backend_final_write_processing: Likewise.
(elf_backend_additional_program_headers): Likewise.
(elf_backend_modify_segment_map): Likewise.
(elf_backend_symbol_processing): Likewise.
* elfxx-mips.c: Include elf-vxworks.h.
(mips_elf_link_hash_entry): Add is_relocation_target and
is_branch_target fields.
(mips_elf_link_hash_table): Add is_vxworks, srelbss, sdynbss, srelplt,
srelplt2, sgotplt, splt, plt_header_size and plt_entry_size fields.
(MIPS_ELF_RELA_SIZE, MIPS_ELF_REL_DYN_NAME): New macros.
(MIPS_RESERVED_GOTNO): Take a mips_elf_link_hash_table argument.
Return 3 for VxWorks.
(ELF_MIPS_GP_OFFSET): Change the argument from a bfd to a
mips_elf_link_hash_table. Return 0 for VxWorks.
(MIPS_ELF_GOT_MAX_SIZE): Change the argument from a bfd to a
mips_elf_link_hash_table. Update the call to ELF_MIPS_GP_OFFSET.
(mips_vxworks_exec_plt0_entry): New variable.
(mips_vxworks_exec_plt_entry): Likewise.
(mips_vxworks_shared_plt0_entry): Likewise.
(mips_vxworks_shared_plt_entry): Likewise.
(mips_elf_link_hash_newfunc): Initialize the new hash_entry fields.
(mips_elf_rel_dyn_section): Change the bfd argument to a
mips_elf_link_hash_table. Use MIPS_ELF_REL_DYN_NAME to get
the name of the section.
(mips_elf_initialize_tls_slots): Update the call to
mips_elf_rel_dyn_section.
(mips_elf_gotplt_index): New function.
(mips_elf_local_got_index): Add an input_section argument.
Update the call to mips_elf_create_local_got_entry.
(mips_elf_got_page): Likewise.
(mips_elf_got16_entry): Likewise.
(mips_elf_create_local_got_entry): Add bfd_link_info and input_section
arguments. Create dynamic relocations for each entry on VxWorks.
(mips_elf_merge_gots): Update the use of MIPS_ELF_GOT_MAX_SIZE.
(mips_elf_multi_got): Update the uses of MIPS_ELF_GOT_MAX_SIZE
and MIPS_RESERVED_GOTNO.
(mips_elf_create_got_section): Update the uses of
MIPS_ELF_GOT_MAX_SIZE. Create .got.plt on VxWorks.
(is_gott_symbol): New function.
(mips_elf_calculate_relocation): Use a dynobj local variable.
Update the calls to mips_elf_local_got_index, mips_elf_got16_entry and
mips_elf_got_page_entry. Set G to the .got.plt entry when calculating
VxWorks R_MIPS_CALL* relocations. Calculate and use G for all GOT
relocations on VxWorks. Add dynamic relocations for references
to the VxWorks __GOTT_BASE__ and __GOTT_INDEX__ symbols. Don't
create dynamic relocations for R_MIPS_32, R_MIPS_REL32 or R_MIPS_64
in VxWorks executables.
(mips_elf_allocate_dynamic_relocations): Add a bfd_link_info argument.
Use MIPS_ELF_RELA_SIZE to calculate the size of a VxWorks entry.
Don't allocate a null entry on VxWorks.
(mips_elf_create_dynamic_relocation): Update the call to
mips_elf_rel_dyn_section. Use absolute rather than relative
relocations for VxWorks, and make them RELA rather than REL.
(_bfd_mips_elf_create_dynamic_sections): Don't make .dynamic
read-only on VxWorks. Update the call to mips_elf_rel_dyn_section.
Create the .plt, .rela.plt, .dynbss and .rela.bss sections on
VxWorks. Likewise create the _PROCEDURE_LINKAGE_TABLE symbol.
Call elf_vxworks_create_dynamic_sections for VxWorks and
initialize the plt_header_size and plt_entry_size fields.
(_bfd_mips_elf_check_relocs): Don't allow GOT relocations to be
used in VxWorks executables. Don't allocate dynamic relocations
for R_MIPS_32, R_MIPS_REL32 or R_MIPS_64 in VxWorks executables.
Set is_relocation_target for each symbol referenced by a relocation.
Allocate .rela.dyn entries for relocations against the special
VxWorks __GOTT_BASE__ and __GOTT_INDEX__ symbols. Create GOT
entries for all VxWorks R_MIPS_GOT16 relocations. Don't allocate
a global GOT entry for symbols mentioned in VxWorks R_MIPS_CALL*,
R_MIPS_32, R_MIPS_REL32 or R_MIPS_64 relocations. Update the calls
to mips_elf_rel_dyn_section and mips_elf_allocate_dynamic_relocations.
Set is_branch_target for symbols mentioned in R_MIPS_PC16 or R_MIPS_26
relocations. Don't set no_fn_stub on VxWorks.
(_bfd_mips_elf_adjust_dynamic_symbol): Update the call to
mips_elf_allocate_dynamic_relocations.
(_bfd_mips_vxworks_adjust_dynamic_symbol): New function.
(_bfd_mips_elf_always_size_sections): Do not allocate GOT page
entries for VxWorks, and do not create multiple GOTs.
(_bfd_mips_elf_size_dynamic_sections): Use MIPS_ELF_REL_DYN_NAME.
Handle .got specially for VxWorks. Update the uses of
MIPS_RESERVED_GOTNO and mips_elf_allocate_dynamic_relocations.
Check for sgotplt and splt. Allocate the .rel(a).dyn contents last,
once its final size is known. Set DF_TEXTREL for VxWorks. Add
DT_RELA, DT_RELASZ, DT_RELAENT, DT_PLTREL, DT_PLTRELSZ and DT_JMPREL
tags on VxWorks. Do not add the MIPS-specific tags for VxWorks.
(_bfd_mips_vxworks_finish_dynamic_symbol): New function.
(mips_vxworks_finish_exec_plt): Likewise.
(mips_vxworks_finish_shared_plt): Likewise.
(_bfd_mips_elf_finish_dynamic_sections): Remove an unncessary call
to mips_elf_rel_dyn_section. Use a VxWorks-specific value of
DT_PLTGOT. Handle DT_RELA, DT_RELASZ, DT_RELAENT, DT_PLTREL,
DT_PLTRELSZ and DT_JMPREL. Update the uses of MIPS_RESERVED_GOTNO
and mips_elf_rel_dyn_section. Use a different GOT header for
VxWorks. Don't sort .rela.dyn on VxWorks. Finish the PLT on VxWorks.
(_bfd_mips_elf_link_hash_table_create): Initialize the new
mips_elf_link_hash_table fields.
(_bfd_mips_vxworks_link_hash_table_create): New function.
(_bfd_mips_elf_final_link): Set the GP value to _GLOBAL_OFFSET_TABLE_
on VxWorks. Update the call to ELF_MIPS_GP_OFFSET.
* elfxx-mips.h (_bfd_mips_vxworks_adjust_dynamic_symbol): Declare.
(_bfd_mips_vxworks_finish_dynamic_symbol): Likewise.
(_bfd_mips_vxworks_link_hash_table_create): Likewise.
* libbfd.h: Regenerate.
* Makefile.am (elfxx-mips.lo): Depend on elf-vxworks.h.
(elf32-mips.lo): Likewise.
* Makefile.in: Regenerate.
* reloc.c (BFD_RELOC_MIPS_COPY, BFD_RELOC_MIPS_JUMP_SLOT): Declare.
* targets.c (bfd_elf32_bigmips_vxworks_vec): Declare.
(bfd_elf32_littlemips_vxworks_vec): Likewise.
(_bfd_target_vector): Add entries for them.
gas/
* config/tc-mips.c (mips_target_format): Handle vxworks targets.
(md_begin): Complain about -G being used for PIC. Don't change
the text, data and bss alignments on VxWorks.
(reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
generating VxWorks PIC.
(load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
(macro): Likewise, but do not treat la $25 specially for
VxWorks PIC, and do not handle jal.
(OPTION_MVXWORKS_PIC): New macro.
(md_longopts): Add -mvxworks-pic.
(md_parse_option): Don't complain about using PIC and -G together here.
Handle OPTION_MVXWORKS_PIC.
(md_estimate_size_before_relax): Always use the first relaxation
sequence on VxWorks.
* config/tc-mips.h (VXWORKS_PIC): New.
gas/testsuite/
* gas/mips/vxworks1.s, gas/mips/vxworks1.d,
* gas/mips/vxworks1-xgot.d: New tests.
* gas/mips/mips.exp: Run them. Do not run other tests on VxWorks.
include/elf/
* mips.h (R_MIPS_COPY, R_MIPS_JUMP_SLOT): New relocs.
ld/
* configure.tgt (mips*el-*-vxworks*, mips*-*-vxworks*): Use
separate VxWorks emulations.
* emulparams/elf32ebmipvxworks.sh: New file.
* emulparams/elf32elmipvxworks.sh: New file.
* Makefile.am (ALL_EMULATIONS): Add eelf32ebmipvxworks.o and
eelf32elmipvxworks.o.
(eelf32ebmipvxworks.c, eelf32elmipvxworks.c): New rules.
* Makefile.in: Regenerate.
ld/testsuite/
* ld-mips/vxworks1.dd, ld-mips/vxworks1.ld, ld-mips/vxworks1-lib.dd,
* ld-mips/vxworks1-lib.nd, ld-mips/vxworks1-lib.rd,
* ld-mips/vxworks1-lib.s, ld-mips/vxworks1.rd, ld-mips/vxworks1.s,
* ld-mips/vxworks1-static.d, ld-mips/vxworks2.s, ld-mips/vxworks2.sd,
* ld-mips/vxworks2-static.sd: New tests.
* ld-mips/mips-elf.exp: Run them.
gas/
* config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
(do_t_branch): Encode branches inside IT blocks as unconditional.
(do_t_cps): New function.
(do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
(opcode_lookup): Allow conditional suffixes on all instructions in
Thumb mode.
(md_assemble): Advance condexec state before checking for errors.
(insns): Use do_t_cps.
gas/testsuite/
* gas/arm/thumb2_bcond.d: New test.
* gas/arm/thumb2_bcond.s: New test.
* gas/arm/thumb2_it_bad.d: New test.
* gas/arm/thumb2_it_bad.l: New test.
* gas/arm/thumb2_it_bad.s: New test.
* configure.in (bfd_elf32_bigarm_vec): Include elf-vxworks.lo.
(bfd_elf32_bigarm_symbian_vec): Likewise.
(bfd_elf32_bigarm_vxworks_vec): Likewise.
(bfd_elf32_littlearm_vec): Likewise.
(bfd_elf32_littlearm_symbian_vec): Likewise.
(bfd_elf32_littlearm_vxworks_vec): Likewise.
* configure: Regenerate.
* elf32-arm.c: Include libiberty.h and elf-vxworks.h.
(RELOC_SECTION, RELOC_SIZE, SWAP_RELOC_IN, SWAP_RELOC_OUT): New macros.
(elf32_arm_vxworks_bed): Add forward declaration.
(elf32_arm_howto_table_1): Fix the masks for R_ASM_ABS12.
(elf32_arm_vxworks_exec_plt0_entry): New table.
(elf32_arm_vxworks_exec_plt_entry): Likewise.
(elf32_arm_vxworks_shared_plt_entry): Likewise.
(elf32_arm_link_hash_table): Add vxworks_p and srelplt2 fields.
(reloc_section_p): New function.
(create_got_section): Use RELOC_SECTION.
(elf32_arm_create_dynamic_sections): Likewise. Call
elf_vxworks_create_dynamic_sections for VxWorks targets.
Choose between the two possible values of plt_header_size
and plt_entry_size.
(elf32_arm_link_hash_table_create): Initialize vxworks_p and srelplt2.
(elf32_arm_abs12_reloc): New function.
(elf32_arm_final_link_relocate): Call it. Allow the creation of
dynamic R_ARM_ABS12 relocs on VxWorks. Use reloc_section_p,
RELOC_SIZE, SWAP_RELOC_OUT and RELOC_SECTION. Initialize the
r_addend fields of relocs. On rela targets, skip any code that
adjusts in-place addends. When using _bfd_link_final_relocate
to perform a final relocation, pass rel->r_addend as the addend
argument.
(elf32_arm_merge_private_bfd_data): If one of the bfds is a VxWorks
object, ignore flags that are not standard on VxWorks.
(elf32_arm_check_relocs): Allow the creation of dynamic R_ARM_ABS12
relocs on VxWorks. Use reloc_section_p.
(elf32_arm_adjust_dynamic_symbol): Use RELOC_SECTION and RELOC_SIZE.
(allocate_dynrelocs): Use RELOC_SIZE. Account for the size of
.rela.plt.unloaded relocs on VxWorks targets.
(elf32_arm_size_dynamic_sections): Use RELOC_SIZE. Check for
.rela.plt.unloaded as well as .rel(a).plt. Add DT_RELA* tags
instead of DT_REL* tags on RELA targets.
(elf32_arm_finish_dynamic_symbol): Use RELOC_SECTION, RELOC_SIZE
and SWAP_RELOC_OUT. Initialize r_addend fields. Handle VxWorks
PLT entries. Do not make _GLOBAL_OFFSET_TABLE_ absolute on VxWorks.
(elf32_arm_finish_dynamic_sections): Use RELOC_SECTION, RELOC_SIZE
and SWAP_RELOC_OUT. Initialize r_addend fields. Handle DT_RELASZ
like DT_RELSZ. Handle the VxWorks form of initial PLT entry.
Correct the .rela.plt.unreloaded symbol indexes.
(elf32_arm_output_symbol_hook): Call the VxWorks version of this
hook on VxWorks targets.
(elf32_arm_vxworks_link_hash_table_create): Set vxworks_p to true.
Minor formatting tweak.
(elf32_arm_vxworks_final_write_processing): New function.
(elf_backend_add_symbol_hook): Override for VxWorks and reset
for Symbian.
(elf_backend_final_write_processing): Likewise.
(elf_backend_emit_relocs): Likewise.
(elf_backend_want_plt_sym): Likewise.
(ELF_MAXPAGESIZE): Likewise.
(elf_backend_may_use_rel_p): Minor formatting tweak.
(elf_backend_may_use_rela_p): Likewise.
(elf_backend_default_use_rela_p): Likewise.
(elf_backend_rela_normal): Likewise.
* Makefile.in (elf32-arm.lo): Depend on elf-vxworks.h.
gas/
* config/tc-arm.c (md_apply_fix): Install a value of zero into a
BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
R_ARM_ABS12 reloc.
(tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
gas/testsuite/
* gas/arm/abs12.s, gas/arm/abs12.d: New test.
* gas/arm/pic.d: Skip for *-*-vxworks*...
* gas/arm/pic_vxworks.d: ...use this version instead.
* gas/arm/unwind_vxworks.d: Fix expected output.
ld/
* emulparams/armelf_vxworks.sh: Include vxworks.sh.
(MAXPAGESIZE): Define.
* emulparams/vxworks.sh: Undefine.
* Makefile.am (earmelf_vxworks.c): Depend on vxworks.sh and vxworks.em.
* Makefile.in: Regenerate.
ld/testsuite/
* ld-arm/vxworks1.dd, ld-arm/vxworks1.ld, ld-arm/vxworks1-lib.dd,
* ld-arm/vxworks1-lib.nd, ld-arm/vxworks1-lib.rd,
* ld-arm/vxworks1-lib.s, ld-arm/vxworks1.rd, ld-arm/vxworks1.s,
* ld-arm/vxworks1-static.d, ld-arm/vxworks2.s, ld-arm/vxworks2.sd,
* ld-arm/vxworks2-static.sd: New tests.
* ld-arm/arm-elf.exp: Run them.
2006-02-28 Jan Beulich <jbeulich@novell.com>
PR/1070
* macro.c (getstring): Don't treat parentheses special anymore.
(get_any_string): Don't consider '(' and ')' as quoting anymore.
Special-case '(', ')', '[', and ']' when dealing with non-quoting
characters.
gas/testsuite/
2006-02-28 Jan Beulich <jbeulich@novell.com>
* gas/macros/paren[sd]: New.
* gas/macros/macros.exp: Run new test.
2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
* gas/config/tc-i386.c (output_insn): Support Intel Merom New
Instructions.
* gas/config/tc-i386.h (CpuMNI): New.
(CpuUnknownFlags): Add CpuMNI.
gas/testsuite/
2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Add merom and x86-64-merom.
* gas/i386/merom.d: New file.
* gas/i386/merom.s: Likewise.
* gas/i386/x86-64-merom.d: Likewise.
* gas/i386/x86-64-merom.s: Likewise.
include/opcode/
2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (i386_optab): Support Intel Merom New Instructions.
opcodes/
2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
Intel Merom New Instructions.
(THREE_BYTE_0): Likewise.
(THREE_BYTE_1): Likewise.
(three_byte_table): Likewise.
(dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
THREE_BYTE_1 for entry 0x3a.
(twobyte_has_modrm): Updated.
(twobyte_uses_SSE_prefix): Likewise.
(print_insn): Handle 3-byte opcodes used by Intel Merom New
Instructions.
* gas/sparc/rdhpr.s: New test.
* gas/sparc/rdhpr.d: New test.
* gas/sparc/wrhpr.s: New test.
* gas/sparc/wrhpr.d: New test.
* gas/sparc/window.s: New test.
* gas/sparc/window.d: New test.
* gas/sparc/rdpr.s: Add case for reading %gl register.
* gas/sparc/rdpr.d: Likewise.
* gas/sparc/wrpr.s: Add case for writing %gl register.
* gas/sparc/wrpr.d: Likewise.
* gas/sparc/sparc.exp: Update for new tests.
2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Add "x86-64-crx" and "x86-64-crx-suffix".
* gas/i386/x86-64-crx-suffix.d: New file.
* gas/i386/x86-64-crx.d: Likewise.
* gas/i386/x86-64-crx.s: Likewise.
opcodes/
2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c ('Z'): Add a new macro.
(dis386_twobyte): Use "movZ" for control register moves.
* config/tc-avr.c (mod_index): New union to allow conversion
between pointers and integers.
(md_begin, avr_ldi_expression): Use it.
* config/tc-i370.c (md_assemble): Add cast for argument to print
statement.
* config/tc-tic54x.c (subsym_substitute): Likewise.
* config/tc-mn10200.c (md_assemble): Use a union to convert the
opindex field of fr_cgen structure into a pointer so that it can
be stored in a frag.
* config/tc-mn10300.c (md_assemble): Likewise.
* config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
types.
* config/tc-v850.c: Replace uses of (int) casts with correct
types.
* gas/tic54x/address.d: Work with 64bit hosts.
* gas/tic54x/addrfar.d: Likewise.
* gas/tic54x/align.d: Likewise.
* gas/tic54x/all-opcodes.d: Likewise.
* gas/tic54x/asg.d: Likewise.
* gas/tic54x/cons.d: Likewise.
* gas/tic54x/consfar.d: Likewise.
* gas/tic54x/extaddr.d: Likewise.
* gas/tic54x/field.d: Likewise.
* gas/tic54x/labels.d: Likewise.
* gas/tic54x/loop.d: Likewise.
* gas/tic54x/lp.d: Likewise.
* gas/tic54x/macro.d: Likewise.
* gas/tic54x/math.d: Likewise.
* gas/tic54x/opcodes.d: Likewise.
* gas/tic54x/sections.d: Likewise.
* gas/tic54x/set.d: Likewise.
* gas/tic54x/struct.d: Likewise.
* gas/tic54x/subsym.d: Likewise.
2005-12-22 Jan Beulich <jbeulich@novell.com>
* symbols.h (snapshot_symbol): First parameter is now pointer
to pointer to symbolS.
* symbols.c (snapshot_symbol): Likewise. Store resulting symbol
there. Use symbol_equated_p.
* expr.c (resolve_expression): Change first argument to
snapshot_symbol. Track possibly changed add_symbol consistently
across function. Resolve more special cases with known result.
Also update final_val when replacing add_symbol.
gas/testsuite/
2005-12-22 Jan Beulich <jbeulich@novell.com>
* gas/all/cond.s: Also check .if works on equates to undefined
when the expression value can be known without knowing the
value of the symbol.
* gas/all/cond.l: Adjust.
* gas/i386/equ.s: Also check .if works on (equates to)
registers when the expression value can be known without
knowing the value of the register.
* gas/i386/equ.e: Adjust.
2005-12-14 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (add_prefix): More fine-grained handling of
REX prefixes. Or new prefix value into i.prefix instead of
assigning.
gas/testsuite/
2005-12-14 Jan Beulich <jbeulich@novell.com>
* gas/i386/rex.[sd]: New.
* gas/i386/i386.exp: Run new test.
* config/tc-hppa.c (hppa_fix_adjustable): Don't reject for reduction
R_HPPA relocations that are 32-bits wide.
* gas/all/redef2.d: Allow "$DATA$" as well as ".data" in matches.
* gas/all/weakref1.d: Allow "$CODE$" as well as ".text" in matches.
* gas/hppa/reloc/reloc.exp: Adjust regexp for new output.
* gas/all/gas.exp (redef3): xfail on hppa*-*-hpux*.
* gas/all/redef.d: Add -j "\$DATA\$". Modify regexp to check for
"$DATA$" as well as ".data".
* gas/all/redef2.d: Likewise.
2005-11-17 Jan Beulich <jbeulich@novell.com>
* symbols.h (S_CLEAR_VOLATILE): Declare.
* symbols.c (colon): Also accept redefinable symbols for
redefinition. Clone them before modifying.
(S_CLEAR_VOLATILE): Define.
* cond.c (s_ifdef): Also test for equated symbols.
* read.c (s_comm_internal): Also exclude non-redefinable
equated symbols. Clone redefinable ones before modifying.
(s_weakref): Clone redefinable symbols before modifying.
* doc/internals.texi: Document sy_volatile, sy_forward_ref,
S_IS_VOLATILE, S_SET_VOLATILE, S_CLEAR_VOLATILE,
S_IS_FORWARD_REF, and S_SET_FORWARD_REF.
gas/testsuite/
2005-11-17 Jan Beulich <jbeulich@novell.com>
* gas/all/cond.s: Also check ifdef works on equates and
commons.
* gas/all/cond.l: Adjust.
* gas/all/redef2.s: Also test redefining equate to label.
* gas/all/redef2.d: Adjust.
* gas/all/redef3.[sd]: New.
* gas/all/redef4.s: New.
* gas/all/redef5.s: New.
* gas/elf/redef.s: New, copied from original gas/all/redef2.s.
* gas/elf/redef.d: Remove #source.
* gas/all/gas.exp: Remove exclusion of iq2000-*-* from and
adjust xfails for redefinition tests. Run new tests. Exclude
alpha*-*-*, mips*-*-*, *c54x*-*-* from weakref tests.
* config/tc-arm.c (s_arm_unwind_save_core): Don't emit an extra
opcode if r4-r15 are not saved.
gas/testsuite/
* gas/arm/unwind.s, gas/arm/unwind.d, gas/arm/unwind_vxworks.d: Add
a test for saving only the low registers.
instructions. Define MIPS16_ALL_ARGS and MIPS16_ALL_STATICS for
save/restore encoding of the args field.
* mips16-opc.c: Add MIPS16e save/restore opcodes.
* mips-dis.c (print_mips16_insn_arg): Handle printing of 'm'/'M'
codes for save/restore.
* config/tc-mips.c (mips16_ip): Add handling of 'm' and 'M' codes
for the MIPS16e save/restore instructions.
* gas/mips/mips.exp: Run new save/restore tests.
* gas/testsuite/gas/mips/mips16e-save.s: New test for generating
different styles of save/restore instructions.
* gas/testsuite/gas/mips/mips16e-save.d: New.
(arm_reg_parse_multi): Return NULL rather than FAIL.
(arm_reg_parse): Fix comment, the function returns FAIL rather than NULL if
it is unable to parse the register name.
(do_ldrex): Use BAD_ADDR_MODE.
Change error message for PC-relative addressing.
(do_strex): Likewise.
(do_t_ldrex): Use BAD_ADDR_MODE.
(do_t_strex): Likewise.
* gas/arm/archv6t2-bad.s: Add tests of badly composed ldrex and strex
instructions.
* gas/arm/archv6t2-bad.l: Add expected error messages.
* gas/arm/r15-bad.l: Adjust error messages for r15 usage in ldrex and strex
instructions.
2005-11-07 Jan Beulich <jbeulich@novell.com>
* gas/all/redef2.[sd]: New.
* gas/all/gas.exp: Run new test.
* gas/elf/redef.d: New.
* gas/elf/elf.exp: Run new test.
2005-10-24 Jan Beulich <jbeulich@novell.com>
* ia64.h (enum ia64_opnd): Move memory operand out of set of
indirect operands.
bfd/
2005-10-24 Jan Beulich <jbeulich@novell.com>
* cpu-ia64-opc.c (elf64_ia64_operands): Move memory operand out of
set of indirect operands.
gas/
2005-10-24 Jan Beulich <jbeulich@novell.com>
* config/tc-ia64.c (enum reg_symbol): Delete IND_MEM.
(dot_rot): Change type of num_* variables. Check for positive count.
(ia64_optimize_expr): Re-structure.
(md_operand): Check for general register.
gas/testsuite/
2005-10-24 Jan Beulich <jbeulich@novell.com>
* gas/ia64/index.[sl]: New.
* gas/ia64/rotX.[sl]: New.
* gas/ia64/ia64.exp: Run new tests.
opcodes/
2005-10-24 Jan Beulich <jbeulich@novell.com>
* ia64-asmtab.c: Regenerate.
2005-10-24 Jan Beulich <jbeulich@novell.com>
* config/tc-ia64.c (declare_register): Call symbol_create.
(md_begin): Remove local variables total, ar_base, and cr_base.
Start loops for registers at their respective first one. Don't
update md.regsym for alias names. Generate alias name tp for r13.
gas/testsuite/
2005-10-24 Jan Beulich <jbeulich@novell.com>
* gas/ia64/regs.pl: Also check tp alias of r13.
* gas/ia64/regs.s: Regenerate.
* gas/ia64/regs.d: Adjust.
into jrc/jalrc versions if ISA_MIPS32+ and not doing the swap,
hence avoiding to emit a nop.
* gas/mips/mips.exp: Run new test.
* gas/testsuite/gas/mips/mips16e-jrc.s: New test for converting
jalr/jr to the compact jalrc/jrc instructions.
* gas/testsuite/gas/mips/mips16e-jrc.d: New.
- allowing true forward references (which will always assume the referenced
symbols have at the point of use) through the new .eqv pseudo-op and the
new == operator
- disallowing changing .equiv-generated equates (so that the protection this
provides is both forward and backward)
- snapshotting equates when their value gets changed so that previous uses
don't get affected by the new value.
- allowing expressions in places where absolute expressions (or register
names) are needed which were not completely resolvable at the point of
their definition but which are fully resolvable at the point of use
In addition it fixes PR/288.
(parse_reg_without_prefix): New function.
(parse_reg): Check for '$' register prefix if --allow-reg-prefix is set.
(option md_longopts): Add allow-reg-prefix option.
* doc/c-sh.texi: Document --allow-reg-prefix option.
* NEWS: Mention the new switch.
* gas/sh/basic.exp: Run reg-prefix test.
* gas/sh/reg-prefix.s: New
* gas/sh/reg-prefix.d: New
2005-09-29 Jan Beulich <jbeulich@novell.com>
* config/tc-ia64.c (parse_operands): Always parse first operand of
alloc.
gas/testsuite/
2005-09-29 Jan Beulich <jbeulich@novell.com>
* gas/ia64/alloc.[sl]: New.
* gas/ia64/ia64.exp: Run new test.
2005-09-28 Jan Beulich <jbeulich@novell.com>
* gas/i386/x86-64-stack.s, gas/i386/x86-64-stack.d,
gas/i386/x86-64-stack-suffix.d, gas/i386/x86-64-stack-intel.d: New.
* gas/i386/i386.exp: Run new tests.
ld/testsuite/
2005-09-28 Jan Beulich <jbeulich@novell.com>
* ld-x86-64/tlspic.dd: Adjust.
opcodes/
2005-09-28 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
(indirEv): Use it.
(stackEv): New.
(Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
(dis386): Document and use new 'V' meta character. Use it for
single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
(putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
data prefix as used whenever DFLAG was examined. Handle 'V'.
(intel_operand_size): Use stack_v_mode.
(OP_E): Use stack_v_mode, but handle only the special case of
64-bit mode without operand size override here; fall through to
v_mode case otherwise.
(OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
and no operand size override is present.
(OP_J): Use get32s for obtaining the displacement also when rex64
is present.
(dwarf2_set_isa): New.
(dwarf2_directive_loc): Rearrange to allow all options on one line.
* dwarf2dbg.h (dwarf2_set_isa): Declare.
* doc/as.texinfo: Update .loc documentation.
* gas/lns/lns-common-1.d: Don't match header or special opcode numbers.
* gas/lns/lns-common-1.s: Update for syntax change.
* gas/lns/lns-diag-1.[sl]: Likewise.
bfd/
* libbdf.h: Regenerate.
* bfd-in2.h: Regenerate.
* reloc.c: Add BFD_RELOC_ARM_T32_CP_OFF_IMM and
BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
gas/
* config/tc-arm.c (encode_arm_cp_address): Use
BFD_RELOC_ARM_T32_CP_OFF_IMM in thumb mode.
(do_iwmmxt_wldstbh): Use BFD_RELOC_ARM_T32_CP_OFF_IMM_S2 in thumb
mode.
(md_assemble): Only allow coprocessor instructions when Thumb-2 is
available.
(cCE, cC3): Define.
(insns): Use them for coprocessor instructions.
(md_pcrel_from_section): Handle BFD_RELOC_ARM_T32_CP_OFF_IMM.
(get_thumb32_insn): New function.
(put_thumb32_insn): New function.
(md_apply_fix): Handle BFD_RELOC_ARM_T32_CP_OFF_IMM and
BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
gas/testsuite/
* gas/arm/vfp-bad_t2.d, gas/arm/vfp-bad_t2.l, arm/vfp-bad_t2.s,
gas/arm/vfp1_t2.d, gas/arm/vfp1_t2.s, gas/arm/vfp1xD_t2.d,
gas/arm/vfp1xD_t2.s, gas/arm/vfp2_t2.d, gas/arm/vfp2_t2.s): New files.
opcodes/
* arm-dis.c (coprocessor_opcodes): New.
(arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
(print_insn_coprocessor): New function.
(print_insn_arm): Use print_insn_coprocessor. Remove coprocessor
format characters.
(print_insn_thumb32): Use print_insn_coprocessor.
2005-08-26 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (intel_e09): Set JumpAbsolute when seeing a PTR-
qualified operand of a branch.
(intel_bracket_expr): Set JumpAbsolute here...
(intel_e11): ... rather than here.
gas/testsuite/
2005-08-26 Jan Beulich <jbeulich@novell.com>
* gas/i386/intel.s: Adjust.
* gas/i386/intelok.s: Add two more insns.
* gas/i386/intelok.d: Adjust.
2005-08-26 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (intel_operand_size): New, broken out from OP_E for
re-use.
(OP_E): Call intel_operand_size, move call site out of mode
dependent code.
(OP_OFF): Call intel_operand_size if suffix_always. Remove
ATTRIBUTE_UNUSED from parameters.
(OP_OFF64): Likewise.
(OP_ESreg): Call intel_operand_size.
(OP_DSreg): Likewise.
(OP_DIR): Use colon rather than semicolon as separator of far
jump/call operands.
gas/testsuite/
2005-08-26 Jan Beulich <jbeulich@novell.com>
* gas/i386/intelok.d: Adjust.
2005-08-22 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (object_64bit): New.
(i386_target_format): Initialize it.
(output_disp): Use object_64bit for relocation type determination.
(output_imm): Likewise.
(i386_validate_fix): Likewise.
(tc_gen_reloc): Likewise.
(lex_got): Likewise. Remove static mode_name. Change array size
of gotrel's rel field, and adjust its initializer. Adjust diagnostic.
(x86_cons): Use object_64bit for deciding whether quad fields can
have relocations.
gas/testsuite/
2005-08-22 Jan Beulich <jbeulich@novell.com>
* gas/i386/mixed-mode-reloc.s, gas/i386/mixed-mode-reloc32.d,
gas/i386/mixed-mode-reloc64.d: New.
* gas/i386/i386.exp: Run new tests.
gas/
* config/tc-arm.c (current_it_mask, current_cc): New variables.
(do_t_add_sub): Use correct encodings inside IT block.
(do_t_arit3c): Ditto.
(do_t_it): Simplify logic. Set current_it_mask and current_cc.
(md_assemble): Verify conditional suffixes agains IT blocks.
gas/testsuite/
* gas/arm/thumb32.s: Use correct conditional suffixes inside IT
blocks.
* gas/arm/thumb2_it.d, gas/arm/thumb2_it.s: New test.
instruction.
gas/arm/iwmmxt-bad2.s: New file: Check for error messages about erroneous
offsets in iwmmxt instructions. Cannot be part of iwmmxt-bad.s because
the errors there stop the assembler before it gets to check the offsets
in instructions.
gas/arm/iwmmxt-bad2.d: New file.
gas/arm/iwmmxt-bad2.l: New file: Expected error messages.
gas/arm/iwmmxt.s: Change the offset values of the WLDRD, WSTRD and WSTRW
instructions to be larger than +/-255.
gas/arm/iwmmxt.d: Fix the expected results for these instructions.
2005-07-26 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (optimize_imm): Calculate candidate immediates
mask from guessed suffix, but mask out other immediate types only
if at least on candidate is valid for the insn.
gas/testsuite/
2005-07-26 Jan Beulich <jbeulich@novell.com>
* gas/i386/immed32.[sd]: New.
* gas/i386/immed64.[sd]: New.
* gas/i386/i386.exp: Run new tests.
2005-07-18 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (reloc): Convert to ISO C90. Change first
parameter to unsigned. Parameter sign now is tristate - zero/
positive mean unsigned/signed, negative means signedness doesn't
matter. Check field size,
signedness, and pcrel-ness are in agreement between relocated field
and relocation type. Adjust diagnostics.
(optimize_imm): And type mask of operand instead of overwriting it.
(lex_got): Convert to ISO C90. Add third parameter. Add new field to
local structure and initialize gotrel accordingly. Pass caller as
mask of types that the operator can match.
(x86_cons_fix_new): Let reloc know that signedness of relocation
doesn't matter.
(x86_pe_cons_fix_new): Likewise.
(x86_cons): Pass additional argument to lex_got.
(i386_immediate): New local variable 'types'. Pass its address as
additional argument to lex_got. Mask out operand types not supported
befoe returning.
(i386_displacement): Likewise. Set bigdisp to all types supported in
64-bit mode, combining the previously split initialization.
gas/testsuite/
2005-07-18 Jan Beulich <jbeulich@novell.com>
* gas/i386/reloc32.[sdl]: New.
* gas/i386/reloc64.[sdl]: New.
* gas/i386/i386.exp: Run new tests.
2005-07-05 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.h (CpuSVME): New.
(CpuUnknownFlags): Include CpuSVME.
* config/tc-i386.c (cpu_arch): Add .pacifica and .svme. Add opteron
as alias of sledgehammer.
(md_assemble): Include invlpga in the check for insns with two source
operands.
(process_operands): Include SVME insns in the check for ignored
segment overrides. Adjust diagnostic.
(i386_index_check): Special-case SVME insns with memory operands.
gas/testsuite/
2005-07-05 Jan Beulich <jbeulich@novell.com>
* gas/i386/svme.d: New.
* gas/i386/svme.s: New.
* gas/i386/svme64.d: New.
* gas/i386/i386.exp: Run new tests.
include/opcode/
2005-07-05 Jan Beulich <jbeulich@novell.com>
* i386.h (i386_optab): Add new insns.
opcodes/
2005-07-05 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (SVME_Fixup): New.
(grps): Use it for the lidt entry.
(PNI_Fixup): Call OP_M rather than OP_E.
(INVLPG_Fixup): Likewise.
* lib/gas-defs.exp (run_dump_tests): New proc.
(run_dump_test): Add support for new options: target, not-target,
skip, not-skip, error-output. Document stderr. Tidy a
little.
(slurp_options): If a line doesn't match the option regexp, but
does begin with #, ignore it; don't stop parsing options.
* gas/arm/arm.exp: Remove most code. Use run_dump_tests.
* gas/arm/archv6t2-bad.d, gas/arm/armv1.d, gas/arm/iwmmxt-bad.d
* gas/arm/r15-bad.d, gas/arm/req.d, gas/arm/t16-bad.d
* gas/arm/undefined.d, gas/arm/undefined_coff.d, gas/arm/vfp-bad.d:
New files.
* gas/arm/bignum1.d, gas/arm/mapping.d, gas/arm/pic.d:
Only run on ELF targets.
* gas/arm/tls.d, gas/arm/unwind.d: Only run on ELF targets.
Skip on VxWorks.
* gas/arm/tls_vxworks.d, gas/arm/unwind_vxworks.d: New files.
* gas/arm/thumb.d, gas/arm/thumb32.d: Don't run on aout or pe.
* gas/arm/le-fpconst.d: Only run on *-*-pe.
* gas/arm/inst.d: Skip on WinCE.
* gas/arm/wince_inst.d: Skip unless WinCE.
* gas/arm/el_segundo.d: Mark up for actual use; adjust
expectations.
* gas/arm/el_segundo.s: Remove irrelevant junk. Add padding
for a.out's sake.
2005-07-01 Jan Beulich <jbeulich@novell.com>
* config/tc-ia64.c (line_separator_chars): Add '{' and '}'.
(output_spill_psprel, output_spill_psprel_p): Combine.
(output_spill_sprel, output_spill_sprel_p): Combine.
(output_spill_reg, output_spill_regp_p): Combine.
(process_one_record): Handle psp_psprel.
(parse_predicate_and_operand): New.
(convert_expr_to_ab_reg): Two new parameters. Return void. Always
initialize output values. Emit diagnostic case here.
(convert_expr_to_xy_reg): Likewise. Don't allow r0, f0, and f1.
(add_unwind_entry): New second parameter. Allow first parameter to
be NULL. Parse optional tag, emit warning about further support for
it otherwise being missing. Check end-of-line when requested.
(dot_fframe): Clear operand when wrong. Allow tag.
(dot_vframe): Likewise.
(dot_vframesp): Likewise. Rename parameter, issue warning when psp
relative.
(dot_vframepsp): Remove.
(dot_altrp): Clear operand when wrong. Allow tag.
(dot_save): Likewise. Let default case also go through
add_unwind_entry.
(dot_savemem): Likewise.
(dot_restore): Don't return when wrong operand. Allow tag.
(dot_spillreg, dot_spillreg_p): Combine. Simplify by using
parse_predicate_and_operand and the new arguments to
convert_expr_to_ab_reg and convert_expr_to_xy_reg. Don't return
when wrong operand. Allow tag.
(dot_restorereg, dot_restorereg_p): Likewise.
(dot_spillmem, dot_spillmem_p): Likewise.
(dot_saveg): Clear operand when wrong. Perform tighter operand
checks. Allow tag.
(dot_savef): Likewise.
(dot_saveb): Likewise.
(dot_savegf): Likewise.
(dot_spill): Remove end-of-line check. Combine. Simplify by using
parse_predicate_and_operand and the new arguments to
convert_expr_to_ab_reg and convert_expr_to_xy_reg. Don't return
when wrong operand. Allow tag.
(popcount): New.
(dot_label_state): Don't return when wrong operand.
(dot_copy_state): Likewise.
(dot_unwabi): Likewise. Check if in prologue.
(dot_body): Don't call demand_empty_rest_of_line.
(dot_prologue): Type of mask and grsave is unsigned. Perform tighter
operand checks.
(md_pseudo_table): Also use dot_restorereg for .restorereg.p. Also
use dot_spillreg for .spillreg.p. Also use dot_spillmem for
.spillpsp.p and .spillsp.p. Also use dot_vframesp for .vframepsp.
(parse_operand): New second parameter. Don't deal with '}' here
anymore. Don't advance past end-of-line.
(parse_operands): Pass second argument to parse_operand.
(ia64_start_line): Prevent out-of-bounds access through
input_line_pointer. Deal with '}' here.
(ia64_unrecognized_line): Don't deal with '}' here.
(dot_alias): Use ignore_rest_of_line not its deprecated alias
discard_rest_of_line.
gas/testsuite/
2005-07-01 Jan Beulich <jbeulich@novell.com>
* gas/ia64/group-2.s: Use register as second operand of .prologue.
* gas/ia64/unwind-err.s: Add check for .vframesp.
* gas/ia64/unwind-err.l: Adjust.
* gas/ia64/strange.[sd]: New.
* gas/ia64/unwind-bad.[sl]: New.
* gas/ia64/unwind-ok.[sd]: New.
* gas/ia64/ia64.exp: Run new tests.
* config/tc-arm.c (T_OPCODE_BRANCH, encode_arm_addr_mode_2)
(encode_arm_addr_mode_3, encode_arm_cp_address, do_blx, do_t_blx)
(do_t_branch, insns [b, bl]): Don't encode pipeline offset.
(s_arm_elf_cons): Disallow use of (plt) suffix.
(do_adrl): Adjust X_add_number unconditionally.
(md_pcrel_from): Rename md_pcrel_from_section, add second segT
argument. Handle all adjustment for pipeline offset here.
(md_apply_fix): No need to undo work of md_pcrel_from. No
need to extract pre-encoded pipeline adjustments from various
branch instructions. Generally, assume instructions are already
all-bits-zero in the field being fixed up. Remove all OBJ_ELF
special cases. Handle BFD_RELOC_ARM_PLT32 like
BFD_RELOC_ARM_PCREL_BRANCH.
(tc_gen_reloc): Remove OBJ_ELF special case.
* config/tc-arm.c: Define MD_PCREL_FROM_SECTION.
gas/testsuite:
* gas/arm/arm.exp: Don't special case ldconst, arm7t, or copro
for *-wince-*.
* gas/arm/wince_arm7t.d, gas/arm/wince_copro.d
* gas/arm/wince_ldconst.d: Delete.
2005-06-20 H.J. Lu <hongjiu.lu@intel.com>
PR 1013
* config/tc-i386.c (md_assemble): Don't call optimize_disp on
movabs.
(optimize_disp): Optimize only if possible. Don't use 64bit
displacement on non-constants and do same on constants if
possible.
gas/testsuite/
2005-06-20 H.J. Lu <hongjiu.lu@intel.com>
PR 1013
* i386/x86_64.s: Add absolute 64bit addressing tests for mov.
* i386/x86_64.s: Updated.
include/opcode/
2005-06-20 H.J. Lu <hongjiu.lu@intel.com>
PR 1013
* i386.h (i386_optab): Update comments for 64bit addressing on
mov. Allow 64bit addressing for mov and movq.
2005-06-17 Jan Beulich <jbeulich@novell.com>
* bfd-in2.h (elf_x86_64_reloc_type): Add BFD_RELOC_X86_64_GOTOFF64
and BFD_RELOC_X86_64_GOTPC32.
* libbfd.h (bfd_reloc_code_real_names): Likewise.
* elf64-x86-64.c (x86_64_elf_howto_table): Add entries for
R_X86_64_PC64, R_X86_64_GOTOFF64, and R_X86_64_GOTPC32.
(x86_64_reloc_map): Add entries for R_X86_64_PC64, R_X86_64_GOTOFF64,
and R_X86_64_GOTPC32.
(elf64_x86_64_info_to_howto): Adjust bounding relocation type.
(elf64_x86_64_check_relocs): Also handle R_X86_64_PC64,
R_X86_64_GOTOFF64, and R_X86_64_GOTPC32.
(elf64_x86_64_relocate_section): Likewise.
(elf64_x86_64_gc_sweep_hook): Also handle R_X86_64_PC64.
gas/
2005-06-17 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (reloc): Also handle BFD_RELOC_64_PCREL.
(tc_i386_fix_adjustable): Include BFD_RELOC_X86_64_GOTOFF64,
BFD_RELOC_X86_64_DTPOFF64, and BFD_RELOC_X86_64_TPOFF64.
(output_disp): Do GOTPC conversion also for BFD_RELOC_X86_64_32S
and BFD_RELOC_32_PCREL. Use BFD_RELOC_X86_64_GOTPC32 instead of
aborting.
(output_imm): Do GOTPC conversion also for BFD_RELOC_X86_64_32S.
Use BFD_RELOC_X86_64_GOTPC32 instead of aborting.
(tc_gen_reloc): Do GOTPC conversion also for BFD_RELOC_32_PCREL.
Use BFD_RELOC_X86_64_GOTPC32 instead of aborting. Also handle
BFD_RELOC_X86_64_GOTOFF64, BFD_RELOC_X86_64_GOTPC32,
BFD_RELOC_X86_64_DTPOFF64, and BFD_RELOC_X86_64_TPOFF64. Also
convert 8-byte pc-relative relocations.
(lex_got): Use BFD_RELOC_X86_64_GOTOFF64 for 64-bit @gotoff.
(i386_validate_fix): Likewise.
(x86_cons): Also handle quad values in 64-bit mode.
(i386_displacement): Also handle BFD_RELOC_X86_64_GOTOFF64.
(md_apply_fix): Include BFD_RELOC_X86_64_DTPOFF64 and
BFD_RELOC_X86_64_TPOFF64 in the TLS check. Also convert BFD_RELOC_64
to pc-relative variant. Also check for BFD_RELOC_64_PCREL.
gas/testsuite/
2005-06-17 Jan Beulich <jbeulich@novell.com>
* gas/i386/x86-64-pcrel.s: Add insn requiring 64-bit pc-relative
relocation. Add insns for all widths of non-pc-relative relocations.
* gas/i386/x86-64-pcrel.d: Adjust.
include/elf/
2005-06-17 Jan Beulich <jbeulich@novell.com>
* x86-64.h (elf_x86_64_reloc_type): Adjust comment for
R_X86_64_GOTPCREL. Add R_X86_64_PC64, R_X86_64_GOTOFF64, and
R_X86_64_GOTPC32.
* config/tc-arm.c (find_real_start): Check S_IS_LOCAL on
symbolP as well as for names with a leading dot. Use ACONCAT.
(md_apply_fix): For branch relocations, only replace value
with fixP->fx_offset (under #ifdef OBJ_ELF) when !fixP->fx_done.
(arm_force_relocation): Remove #ifdef OBJ_ELF case.
* config/tc-arm.h (LOCAL_LABEL): Remove unnecessary parentheses.
(LOCAL_LABEL_PREFIX): Don't define.
gas/testsuite:
* gas/arm/thumb.s: Only branch to labels defined in this file.
* gas/arm/thumb.d, gas/arm/thumb32.d: Adjust expected output.
* config/tc-mips.c (load_register): Add leading "0x" to the
output of sprintf_vma().
(macro): Likewise.
gas/testsuite/:
* gas/mips/ldstla-32-1.l: Update to handle leading zeroes.
* gas/mips/ldstla-32-mips3-1.l: Likewise.
2005-05-27 Jan Beulich <jbeulich@novell.com>
* config/tc-ia64.c (struct proc_pending): New.
(unwind): Replace proc_start with proc_pending.
(unwind_diagnostic): Check unwind.proc_pending.sym.
(dot_proc): Replace unwind.proc_start with unwind.proc_pending.sym.
Check if previous proc not closed. Record all entry points.
(dot_endp): Replace unwind.proc_start with unwind.proc_pending.sym.
Set symbol sizes for entry points recorded in dot_proc. Check
arguments for consistency with respective .proc's.
(md_assemble): Replace unwind.proc_start with
unwind.proc_pending.sym.
gas/testsuite/
2005-05-27 Jan Beulich <jbeulich@novell.com>
* gas/ia64/proc.l: Adjust.
2005-05-25 Jan Beulich <jbeulich@novell.com>
* gas/i386/intelok.d: Account for 32-bit displacements being shown
in hex.
opcodes/
2005-05-25 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
hex (but retain it being displayed as signed). Remove redundant
checks. Add handling of displacements for 16-bit addressing in Intel
mode.
2005-05-19 Jan Beulich <jbeulich@novell.com>
* config/tc-ia64.c (dot_endp): Don't use global symbol for unwind
relocations in unwind section.
gas/testsuite/
2005-05-19 Jan Beulich <jbeulich@novell.com>
* gas/ia64/reloc-uw.s: New.
* gas/ia64/reloc-uw.d: New.
* gas/ia64/reloc-uw-ilp32.d: New.
* gas/ia64/ia64.exp: Run new test.
* arm.h: Import complete list of official relocation names
and numbers from AAELF. Define FAKE_RELOCs for old names.
Remove a few old names no longer used anywhere.
bfd:
* elf32-arm.c: Wherever possible, use official reloc names
from AAELF.
(elf32_arm_howto_table, elf32_arm_tls_gd32_howto)
(elf32_arm_tls_ldo32_howto, elf32_arm_tls_ldm32_howto)
(elf32_arm_tls_le32_howto, elf32_arm_tls_ie32_howto)
(elf32_arm_vtinherit_howto, elf32_arm_vtentry_howto)
(elf32_arm_pc11_howto, elf32_arm_thm_pc9_howto, elf32_arm_got_prel)
(elf32_arm_r_howto): Replace with elf32_arm_howto_table_1,
elf32_arm_howto_table_2, and elf32_arm_howto_table_3.
Add many new relocations from AAELF.
(elf32_arm_howto_from_type): Update to match.
(elf32_arm_reloc_map): Add entries for R_ARM_THM_JUMP24,
R_ARM_THM_JUMP11, R_ARM_THM_JUMP19, R_ARM_THM_JUMP8,
R_ARM_THM_JUMP6, R_ARM_GNU_VTINHERIT, and R_ARM_GNU_VTENTRY.
(elf32_arm_reloc_type_lookup): Use elf32_arm_howto_from_type.
(elf32_arm_final_link_relocate): Add support for
R_ARM_THM_JUMP24, R_ARM_THM_JUMP19, R_ARM_THM_JUMP6. Remove
case entries redundant with default.
* reloc.c: Reorganize ARM relocations. Add Thumb
assembler-internal relocations BFD_RELOC_ARM_T32_OFFSET_U8,
BFD_RELOC_ARM_T32_OFFSET_IMM, BFD_RELOC_ARM_T32_IMMEDIATE.
Add visible relocations BFD_RELOC_THUMB_PCREL_BRANCH7,
BFD_RELOC_THUMB_BRANCH20, BFD_RELOC_THUMB_BRANCH25.
Delete unused relocations BFD_RELOC_ARM_GOT12, BFD_RELOC_ARM_COPY.
* bfd-in2.h, libbfd.h: Regenerate.
opcodes:
* arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
instructions. Adjust disassembly of some opcodes to match
unified syntax.
(thumb32_opcodes): New table.
(print_insn_thumb): Rename print_insn_thumb16; don't handle
two-halfword branches here.
(print_insn_thumb32): New function.
(print_insn): Choose among print_insn_arm, print_insn_thumb16,
and print_insn_thumb32. Be consistent about order of
halfwords when printing 32-bit instructions.
gas:
* hash.c (hash_lookup): Add len parameter. All callers changed.
(hash_find_n): New interface.
* hash.h: Prototype hash_find_n.
* sb.c: Include as.h.
(scrub_from_sb, sb_to_scrub, scrub_position): New statics.
(sb_scrub_and_add_sb): New interface.
* sb.h: Prototype sb_scrub_and_add_sb.
* input-scrub.c (input_scrub_include_sb): Use sb_scrub_and_add_sb.
* config/tc-arm.h (TC_FORCE_RELOCATION_LOCAL): Remove
reference to BFD_RELOC_ARM_GOT12 which is never generated.
* config/tc-arm.c: Rewrite, adding Thumb-2 support.
gas/testsuite:
* gas/arm/arm.exp: Convert all existing "gas_test" tests to
"run_dump_test" tests. Run more tests unconditionally. Run new tests.
* gas/arm/arch4t.s, gas/arm/arch6zk.s, gas/arm/arm3.s, gas/arm/arm6.s
* gas/arm/arm7dm.s, gas/arm/bignum1.s, gas/arm/float.s
* gas/arm/immed.s, gas/arm/iwmmxt.s, gas/arm/offset.s, gas/arm/thumb.s:
Adjust to work as a dump test.
* gas/arm/arch4t.d, gas/arm/arch6zk.d, gas/arm/arm3.d, gas/arm/arm6.d
* gas/arm/arm7dm.d, gas/arm/bignum1.d, gas/arm/float.d
* gas/arm/immed.d, gas/arm/iwmmxt.d, gas/arm/offset.d, gas/arm/thumb.d:
New files.
* gas/arm/armv1-bad.l, gas/arm/armv1-bad.s: Remove tests for
diagnostics that don't happen in the first pass anymore.
* gas/arm/iwmmxt-bad.l, gas/arm/r15-bad.l, gas/arm/req.l
* gas/arm/vfp-bad.l:
Update expected diagnostics.
* gas/arm/pic.d: Update expected reloc name.
* gas/arm/thumbv6.d: CPY no longer appears in disassembly.
* gas/arm/r15-bad.s: Avoid two-argument mul.
* gas/arm/req.s: Adjust comments.
* gas/arm/maverick.d, gas/arm/maverick.s: Avoid inappropriate
use of PC.
* gas/arm/macro-1.d, gas/arm/macro1.s
* gas/arm/t16-bad.l, gas/arm/t16-bad.s
* gas/arm/tcompat.d, gas/arm/tcompat.s
* gas/arm/tcompat2.d, gas/arm/tcompat2.s
* gas/arm/thumb32.d, gas/arm/thumb32.s
New test pair.
ld/testsuite:
* ld-arm/mixed-app.d: Adjust expected disassembly a little.
2005-05-17 Jan Beulich <jbeulich@novell.com>
* read.c (_find_end_of_line): New.
(find_end_of_line): New.
(HANDLE_CONDITIONAL_ASSEMBLY): Use it.
(read_a_source_file): Use it.
(s_globl): Use it.
(s_macro): Use it.
(get_line_sb): Use it.
(s_errwarn): Replace discard_rest_of_line by ignore_rest_of_line.
(s_comm_internal): Likewise.
(s_lsym): Likewise.
(s_macro): Likewise.
(s_ignore): Use ignore_rest_of_line.
* read.h (find_end_of_line): Prototype.
(discard_rest_of_line): Remove prototype. #define to
ignore_rest_of_line.
gas/testsuite/
2005-05-17 Jan Beulich <jbeulich@novell.com>
* gas/mmix/err-byte1.s: Adjust expected error text on line 10.
* config/tc-v850.c (md_assemble): When creating a fix record the operand in the
tc_fix_data field.
(md_apply_fix3): When applying a resolved fix use the operand's insertion
procedure to store the value, if the operand has been recorded.
* gas/v850/split-lo16.s: Add test for a lo() pseudo reloc corrupting an ld.w
instruction.
* gas/v850/split-lo16.d: Add expected, correct (ie not corrupt) output.
* frags.c (frag_grow): Don't be too greedy in allocating memory.
* config/tc-hppa.c (pa_block): Check arguments to .block[z].
gas/testsuite/
* gas/hppa/parse/block1.s: Use official limit (0x3fffffff) for
.block.
2005-05-09 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (optimize_disp): Discard displacement entirely when zero and
not required by encoding constraints.
gas/testsuite/
2005-05-09 Jan Beulich <jbeulich@novell.com>
* gas/i386/tlsd.[sd]: Adjust to not assume zero displacement will
actually be present in memory addressing.
* gas/i386/tlspic.[sd]: Likewise.
2005-05-06 Jan Beulich <jbeulich@novell.com>
* macro.c (new_formal, del_formal): New.
(do_formals): Use new_formal. Check for and parse qualifier. Warn if
required argument has default value. Stop looking for more formal
when there was a vararg one.
(macro_expand_body): Use new_formal and del_formal.
(macro_expand): Likewise. Initialize local variable err. Don't
return immediately when encountering an error. Warn when keyword
argument already had a value assigned. Eliminate duplicate clearing
of argument value. When current positional argument matches parameter
of vararg type, assign to it all the remaining arguments. Issue error
when required parameter does not have value.
(free_macro): Use del_formal.
(expand_irp): Initialize formal type. Free buffers associated with
formal prior to returning.
* macro.h (struct formal_struct): Add new field 'type' with new
enumeration type 'formal_type'.
* doc/as.texinfo: Document macro parameter qualifiers.
* NEWS: Mention new functionality.
gas/testsuite/
2005-05-06 Jan Beulich <jbeulich@novell.com>
* gas/macros/badarg.s: Add check for bad qualifier specification.
* gas/macros/badarg.l: Adjust.
* gas/macros/vararg.[sd]: New.
* gas/macros/macros.exp: Run new test.
2005-05-06 Jan Beulich <jbeulich@novell.com>
* gas/macros/dot.s: Don't use pseudo-ops in first column.
* gas/macros/dot.l: Match broader range of possible outputs.
* gas/macros/purge.l: Likewise.
* gas/macros/purge.s: Start generated macro names with an underscore.
bfd/
* config.bfd: Use bfd_elf32_i386_vxworks_vec for i?86-*-vxworks.
* configure.in: Add bfd_elf32_i386_vxworks_vec. i386 targets need
elf-vxworks.lo.
* configure: Regenerate.
* Makefile.am (BFD32_BACKENDS): Add elf-vxworks.lo.
(BFD32_BACKENDS_CFILES): Add elf-vxworks.c.
(elf32-i386.lo): Depend on elf-vxworks.h.
(elf-vxworks.lo): New rule.
* Makefile.in: Regenerate.
* elf-bfd.h (elf_backend_data): Update type of
elf_backend_emit_relocs.
(_bfd_elf_link_output_relocs): Update prototype.
* elflink.c (_bfd_elf_link_output_relocs): Always use
bed->elf_backend_emit_relocs when outputting relocations.
* elfxx-target.h (elf_backend_emit_relocs): Default to
_bfd_elf_link_output_relocs.
* targets.c (bfd_elf32_i386_vxworks_vec): Declare.
(_bfd_target_vector): Add bfd_elf32_i386_vxworks_vec.
* elf32-i386.c: Add elf32-i386-vxworks target BFD.
(elf_i386_plt0_entry): Remove padding.
(elf_i386_pic_plt0_entry): Ditto.
(PLTRESOLVE_RELOCS_SHLIB, PLTRESOLVE_RELOCS): Define.
(PLT_NON_JUMP_SLOT_RELOCS): Define.
(elf_i386_link_hash_table): Add srelplt2, hgot, hplt, is_vxworks and
plt0_pad_byte fields.
(elf_i386_link_hash_table_create): Zero them.
(elf_i386_create_dynamic_sections): Create static relocation section.
(allocate_dynrelocs): Allocate space for static PLT relocations.
(elf_i386_size_dynamic_sections): Save shortcuts to PLT and GOT
symbols. Give PLT symbols function type. Don't strip PLT sections
if we have exported symbols from them.
(elf_i386_finish_dynamic_symbol): Fill in VxWorks PLT static
relocation section. Don't mark _GLOBAL_OFFSET_TABLE_ as absolute on
VxWorks.
(elf_i386_finish_dynamic_sections): Allow different pad bytes.
Add relocation for GOT location. Fill in PLT static relocations.
(elf_i386_vxworks_link_hash_table_create): New function.
(elf_i386_vxworks_link_output_symbol_hook): New function.
* elf-vxworks.h: New file.
gas/
* config/tc-i386.h (ELF_TARGET_FORMAT): Define for TE_VXWORKS.
gas/testsuite/
* gas/i386/i386.exp: Don't run divide test on vxworks.
ld/
* Makefile.am: Add eelf_i386_vxworks.
* Makefile.in: Regenerate.
* configure.tgt: Make i?86-*-vxworks use targ_emul=elf_i386_vxworks.
* emulparams/elf_i386_vxworks.sh: New file.
* emulparams/vxworks.sh: New file.
* scripttempl/elf.sc: Add DATA_END_SYMBOLS and ETEXT_NAME.
gas/testsuite/
* lib/gas-defs.exp (regexp_diff): Pass test if last line is "#...".
ld/testsuite/
* lib/ld-lib.exp (regexp_diff): Pass test if last line is "#...".
* ld-elfweak/elfweak.exp: Run size2.d.
* ld-elfwaek/size2.d: New file.
* ld-elfwaek/size2a.s: New file.
* ld-elfwaek/size2b.s: New file.
2005-04-26 H.J. Lu <hongjiu.lu@intel.com>
* config/obj-multi.h (FAKE_LABEL_NAME): Defined.
* read.c (pseudo_set): Disallow symbol set to common symbol.
PR 857
* write.c (write_object_file): Report common symbol name when
disallowing local symbol set to common symbol.
(adjust_reloc_syms): Disallow local symbol set to undefined
symbol.
gas/testsuite/
2005-04-26 H.J. Lu <hongjiu.lu@intel.com>
* gas/all/assign.s: Make `x' and `y' global.
2005-04-25 Jan Beulich <jbeulich@novell.com>
* macro.c (macro_expand_body): Replace locals indicator parameters
with actual macro_entry. New local variables macro_line and err.
Don't return when encountering an error, just record the fact.
Detect local symbol name colliding with parameter. Track line number
inside of macro expansion.
(do_formals): Move local variable name to wider scope. Check
parameter of the same name doesn't already exist. In MRI mode, also
check it doesn't collide with the argument count pseudo-parameter).
(define_macro): Add file and line number parameters. Remove local
variable namestr. New local variable error. Initialize macro_entry
members file, line, and name. Don't return when encountering an
error, just record the fact. Use %s in some diagnostics for read.c
to insert the macro name. Free macro_entry on error.
(macro_expand): Pass macro_entry to macro_epand_body. Don't return
when encountering an error, just record the fact.
(expand_irp): Don't return when encountering an error, just record
the fact.
* macro.h (macro_struct): New members name, file, and line.
(define_macro): Add file and line number parameters.
* read.c (s_macro): Pass file and line to define_macro. Tag warning
regarding pseudo-op redefinition with the file/line that macro
definition started at.
gas/testsuite/
2005-04-25 Jan Beulich <jbeulich@novell.com>
* gas/macros/badarg.s: Add tests for collisions between/among macro
parameters and local symbols.
* gas/macros/badarg.l: Adjust.
2005-04-20 Jan Beulich <jbeulich@novell.com>
* gas/elf/struct.s: Adjust to not get into alignment issues.
* gas/elf/struct.d: Adjust for the above and the test's name.
2005-04-18 Jan Beulich <jbeulich@novell.com>
* macro.c (free_token): New, freeing all the memory associated with a
macro.
(do_formals): Move initializers to ...
(define_macro): ... here.
(delete_macro): Convert passed in name to lower case. Warn when
purging macro that doesn't exist. Use hash_jam instead of hash_delete.
gas/testsuite/
2005-04-18 Jan Beulich <jbeulich@novell.com>
* gas/macros/purge.[ls]: New.
* gas/macros/macros.exp: Run new test.
2005-04-15 Jan Beulich <jbeulich@novell.com>
* config/obj-elf.c (obj_elf_struct): New.
(elf_pseudo_table). Use it for .offset and .struct.
gas/testsuite/
2005-04-15 Jan Beulich <jbeulich@novell.com>
* gas/elf/struct.[sd]: New.
* gas/elf/elf.exp: Run new test.
* config/tc-mips.c (IS_ZEXT_32BIT_NUM): New macro.
(normalize_address_expr): New function to sign-extend address
offsets that fit into 32 bits in 32-bit mode.
(macro_build_ldst_constoffset): Use normalize_address_expr()
instead of a handcoded sequence.
(load_register): Likewise. Report oversized numbers in a useful
way.
(macro) [ld_st, ldd_std]: Reject all oversized offsets, not only
for constant addresses. Report oversized numbers in a useful way.
(mips_ip): Use normalize_address_expr() for addresses.
gas/testsuite/:
* gas/mips/ldstla-32.s: Exclude offsets that are now meant to fail
and include more instructions/offsets that are meant to succeed.
Use $4 instead $3 to avoid register dependencies.
* gas/mips/ldstla-32.d: Update accordingly.
* gas/mips/ldstla-32-shared.d: Likewise.
* gas/mips/ldstla-32-mips3.d: New test based on the above, except
for mips3.
* gas/mips/ldstla-32-mips3-shared.d: Similarly, for PIC.
* gas/mips/ldstla-32-mips3.s: Source for the new tests.
* gas/mips/ldstla-32-1.s: New test for offsets that are meant to
fail.
* gas/mips/ldstla-32-mips3-1.s: Likewise, for mips3.
* gas/mips/ldstla-32-1.l: Stderr output for the new test.
* gas/mips/ldstla-32-mips3-1.l: Likewise.
* gas/mips/mips.exp: Run the new tests.
2005-04-11 Jan Beulich <jbeulich@novell.com>
* NEWS: Mention these changes and their effects.
* macro.c (get_token): Use is_name_beginner/is_part_of_name/
is_name_ender.
(check_macro): Likewise.
(buffer_and_nest): Likewise. Permit multiple labels. Don't discard
labels together with the closing pseudo-op.
(macro_expand_body): Adjust comment. Range-check input before use.
Adjust mis-spelled diagnostic. Use is_name_beginner.
* read.c (try_macro): New.
(read_a_source_file): New static variable last_eol. Don't list
macro expansion lines more than once. Call try_macro.
(s_macro): Set section of line_label to absolute instead of undefined.
* doc/as.texinfo: Add information on the caveats of these changes.
gas/testsuite/
2005-04-11 Jan Beulich <jbeulich@novell.com>
* gas/macros/dot.[ls]: New.
* gas/macros/macros.exp: Run new test.
2005-04-01 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (md_apply_fix3): Also handle BFD_RELOC_X86_64_32S.
(tc_gen_reloc): Handle BFD_RELOC_X86_64_32S in the default case.
gas/testsuite/
2005-04-01 Jan Beulich <jbeulich@novell.com>
* gas/i386/x86-64-pcrel.[sd]: New.
* gas/i386/i386.exp: Run new test.
* bfd/bfd-in2.h: Regenerate.
* bfd/elf32-arm.c (elf32_arm_is_target_special_symbol): Rename call to
bfd_elf32_is_arm_mapping_symbol_name.
(elf32_arm_output_symbol_hook): Likewise.
(arm_elf_find_function): Likewise, and include STT_NOTYPE in test for
mapping symbols.
(is_arm_mapping_symbol_name): Function moved from here...
* bfd/cpu-arm.c (bfd_elf32_is_arm_mapping_symbol_name): ...to here,
renamed and made global.
* gas/config/tc-arm.c (mapping_state): Change documentation in function
comment to cross-reference spec instead. Change type of mapping symbols
to BSF_NO_TYPE.
(arm_adjust_symtab): Don't change type of mapping symbols here.
* gas/testsuite/gas/arm/mapping.d: Update expected output.
* ld/testsuite/ld-arm/arm-app-abs32.d: Likewise.
* ld/testsuite/ld-arm/arm-app.d: Likewise.
* ld/testsuite/ld-arm/mixed-app.d: Likewise.
2005-03-29 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run segment and inval-seg for i386. Run
x86-64-segment and x86-64-inval-seg for x86-64.
* gas/i386/intel.d: Expect movw for moving between memory and
segment register.
* gas/i386/naked.d: Likewise.
* gas/i386/opcode.d: Likewise.
* gas/i386/x86-64-opcode.d: Likewise.
* gas/i386/opcode.s: Use movw for moving between memory and
segment register.
* gas/i386/x86-64-opcode.s: Likewise.
* : Likewise.
* gas/i386/inval-seg.l: New.
* gas/i386/inval-seg.s: New.
* gas/i386/segment.l: New.
* gas/i386/segment.s: New.
* gas/i386/x86-64-inval-seg.l: New.
* gas/i386/x86-64-inval-seg.s: New.
* gas/i386/x86-64-segment.l: New.
* gas/i386/x86-64-segment.s: New.
include/opcode/
2005-03-29 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (i386_optab): Don't allow the `l' suffix for moving
moving between memory and segment register. Allow movq for
moving between general-purpose register and segment register.
opcodes/
2005-03-29 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (SEG_Fixup): New.
(Sv): New.
(dis386): Use "Sv" for 0x8c and 0x8e.
2005-03-17 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (i386_scale): Beautify error message.
(Intel syntax comments): Update.
(struct intel_parser_s): Add fields in_offset, in_bracket, and
next_operand.
(intel_e04_1, intel_e05_1, intel_e05_1, intel_e09_1, intel_e10_1):
Remove declarations.
(intel_bracket_expr): Declare.
(i386_intel_operand): Initialize new intel_parser fields. Wrap most
of the function body in a loop allowing to split an operand into two.
Replace calls to malloc and checks of it returning non-NULL with
calls to xmalloc/xstrdup.
(intel_expr): SHORT no longer handled here. Add comment indicating
comparison ops need implementation.
(intel_e04, intel_e04_1): Combine, replace recursion with loop.
Check right operand of - does not specify a register when parsing
the address of a memory reference.
(intel_e05, intel_e05_1): Combine, replace recursion with loop.
Check operands do not specify a register when parsing the address of
a memory reference.
(intel_e06, intel_e06_1): Likewise.
(intel_e09, intel_e09_1): Combine, replace recursion with loop. Also
handle SHORT as well as unary + and -. Don't accept : except for
segment overrides or in direct far jump/call insns.
(intel_brack_expr): New.
(intel_e10, intel_e10_1): Combine, replace recursion with loop. Use
intel_brack_expr.
(intel_e11): Replace chain of if/else-if by switch, alloing fall-
through in certain cases. Use intel_brack_expr. Add new diagnostics.
Allow symbolic constants as register scale value.
(intel_get_token): Replace call to malloc and check of return value
with call to xmalloc. Change handling for FLAT to match MASM's.
(intel_putback_token): Don't try to back up/free current token if
that is T_NIL.
gas/testsuite/
2005-03-17 Jan Beulich <jbeulich@novell.com>
* gas/i386/intel.d: Add stderr directive.
* gas/i386/intel.e: New.
* gas/i386/intel16.d: Add stderr directive. Adjust for changed
source.
* gas/i386/intel16.e: New.
* gas/i386/intel16.s: Add instances of addressing forms with base
and index specified in reverse order.
* gas/i386/intelbad.l: Adjust for changed source.
* gas/i386/intelbad.s: Add more operand forms to check.
* gas/i386/intelok.d: Remove -r from objdump options. Add stderr
directive. Adjust for changed source.
* gas/i386/intelok.e: New.
* gas/i386/intelok.s: Define MASM constants byte, word, etc. Add
more operand forms to check.
* gas/i386/x86_64.d: Add stderr directive.
* gas/i386/x86_64.e: New.
* gas/i386/x86_64.s: Adjust for parser changes.
* ppc-opc.c (insert_sprg, extract_sprg): New Functions.
(powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
(SPRG_MASK): Delete.
(XSPRG_MASK): Mask off extra bits now part of sprg field.
(powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
mfsprg4..7 after msprg and consolidate.
gas/testsuite
* gas/ppc/booke.s: Add new m[t,f]sprg testcases.
* gas/ppc/booke.d: Likewise.
(MAX_NOPS): Bump to 4.
(mips_fix_vr4130): New variable.
(nops_for_vr4130): New function.
(nops_for_insn): Use MAX_DELAY_NOPS rather than MAX_NOPS. Use
nops_for_vr4130 if working around VR4130 errata.
(OPTION_FIX_VR4130, OPTION_NO_FIX_VR4130): New macros.
(md_longopts): Add -mfix-vr4130 and -mno-fix-vr4130.
(md_parse_option): Handle them.
(md_show_usage): Print them.
* doc/c-mips.texi: Document -mfix-vr4130 and -mno-fix-vr4130.
2005-03-08 Jan Beulich <jbeulich@novell.com>
* config/tc-ia64.c (emit_one_bundle): Track last slot user insn was
emitted to. Add more precise diagnostics for non-fitting insns based
on that. Eliminate now superfluous special casing of MLX. Clear out
slot information when dropping an insn.
gas/testsuite/
2005-03-08 Jan Beulich <jbeulich@novell.com>
* gas/ia64/no-fit.[ls]: New.
* gas/ia64/ia64.exp: Run new test.
2005-03-08 Jan Beulich <jbeulich@novell.com>
* config/tc-ia64.c (parse_section_name): Rename to...
(cross_section): In addition to separating the name from the rest of
the arguments, also carry out the operation.
(dot_xdata): Use cross_section.
(dot_float_cons): Likewise.
(dot_xstringer): Likewise.
(dot_xdata_ua): Likewise.
(dot_float_cons_ua): Likewise. Pass float_cons, not stmt_float_cons.
gas/testsuite/
2005-03-08 Jan Beulich <jbeulich@novell.com>
* gas/ia64/xdata.[sd], gas/ia64/xdata-ilp32.d: New.
* gas/ia64/ia64.exp: Run new tests.
* elfxx-mips.c (mips_elf_calculate_relocation): Handle special
'__gnu_local_gp' symbol used by gas -mno-shared.
gas/ChangeLog
* config/tc-mips.c (macro_build_lui): Use '__gnu_local_gp'
instead of '_gp' for -mno-shared optimization.
(s_cpload): Ditto.
(s_abicalls): Document it in the comment.
(md_show_usage): Document the -mno-shared option.
gas/testsuite/ChangeLog
* gas/mips/elf-rel23b.d: Use '__gnu_local_gp' instead of '_gp'
for -mno-shared optimization.
* gas/mips/elf-rel25a.d: Ditto.
ld/testsuite/ChangeLog
* ld-mips-elf/multi-got-no-shared-1.s,
ld-mips-elf/multi-got-no-shared-2.s,
ld-mips-elf/multi-got-no-shared.d: New tests.
* ld-mips-elf/mips-elf.exp: Run them.
(mips_opts): Initialize it.
(HAVE_32BIT_ADDRESSES): Set to true if pointers are 32 bits wide.
(HAVE_64BIT_ADDRESSES): Redefine as !HAVE_32BIT_ADDRESSES.
(HAVE_32BIT_SYMBOLS, HAVE_64BIT_SYMBOLS): New macros.
(load_address): Use HAVE_64BIT_SYMBOLS instead of HAVE_64BIT_ADDRESSES
when deciding whether to use a symbolic %highest/%higher expansion.
(macro): Likewise. Remove o64/n32 linux hack. Always use
ADDRESS_ADD*_INSN for address addition in the expansion of "dla"
and "la". Handle constants separately from symbolic expressions in
the "ld_st:" case, using 64-bit arithmetic if HAVE_64BIT_ADDRESSES
and using load_register to load the high part of the address.
(OPTION_MSYM32, OPTION_NO_MSYM32): New macros.
(OPTION_ELF_BASE): Bump by 2.
(md_longopts): Add entries for -msym32 and -mno-sym32.
(md_parse_option): Handle them.
(usage): Document them.
(s_mipsset): Handle ".set sym32" and ".set nosym32".
(s_cpload, s_cpsetup): Use HAVE_64BIT_SYMBOLS instead of
HAVE_64BIT_ADDRESSES to detect 64-bit values of "_gp".
* doc/c-mips.texi: Document ".set sym32", ".set nosym32",
-msym32 and -mno-sym32.
* gas/sh/pcrel-hms.d: New file. Adjusted form of pcrel-coff.d for the sh-hms
target.
* gas/sh/arch/arch.exp: Expect the same failures for sh-hms port as for the
sh-coff port.
2005-03-02 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (intel_e11): If not followed by T_PTR, treat T_BYTE
etc. like normal symbol references (T_ID).
gas/testsuite/
2005-03-02 Jan Beulich <jbeulich@novell.com>
* gas/i386/intelok.d: Add -r to objdump options. Adjust expectations.
* gas/i386/intelok.s: Add checks for various special memory operands.
