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2005-09-28  Jan Beulich  <jbeulich@novell.com>

	* config/tc-i386.c (reloc): Disable signedness check for 4-byte
	relocations in 16- and 32-bit modes.
	(i386_displacement): Make pc-relative branch handling dependent
	upon operand (rather than address) size.

gas/testsuite/
2005-09-28  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/mixed-mode-reloc.s: Enable all insns.
	* gas/i386/mixed-mode-reloc32.d: Adjust.
	* gas/i386/mixed-mode-reloc64.d: Adjust.
This commit is contained in:
Jan Beulich 2005-09-28 15:31:21 +00:00
parent dd86362472
commit e05278afa3
6 changed files with 59 additions and 13 deletions
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7
gas/ChangeLog
View file

@ -1,3 +1,10 @@
2005-09-28 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (reloc): Disable signedness check for 4-byte
relocations in 16- and 32-bit modes.
(i386_displacement): Make pc-relative branch handling dependent
upon operand (rather than address) size.
2005-09-28 Jan Beulich <jbeulich@novell.com>
* dw2gencfi.c (dot_cfi): Call ignore_rest_of_line when not fully

41
gas/config/tc-i386.c
View file

@ -1237,6 +1237,11 @@ reloc (unsigned int size,
default:
break;
}
/* Sign-checking 4-byte relocations in 16-/32-bit code is pointless. */
if (size == 4 && flag_code != CODE_64BIT)
sign = -1;
reloc = bfd_reloc_type_lookup (stdoutput, other);
if (!reloc)
as_bad (_("unknown relocation (%u)"), other);
@ -4111,16 +4116,44 @@ i386_displacement (disp_start, disp_end)
segT exp_seg = 0;
char *save_input_line_pointer;
char *gotfree_input_line;
int bigdisp = Disp32;
int bigdisp, override;
unsigned int types = Disp;
if ((i.types[this_operand] & JumpAbsolute)
|| !(current_templates->start->opcode_modifier & (Jump | JumpDword)))
{
bigdisp = Disp32;
override = (i.prefix[ADDR_PREFIX] != 0);
}
else
{
/* For PC-relative branches, the width of the displacement
is dependent upon data size, not address size. */
bigdisp = 0;
override = (i.prefix[DATA_PREFIX] != 0);
}
if (flag_code == CODE_64BIT)
{
if (i.prefix[ADDR_PREFIX] == 0)
if (!bigdisp)
bigdisp = (override || i.suffix == WORD_MNEM_SUFFIX)
? Disp16
: Disp32S | Disp32;
else if (!override)
bigdisp = Disp64 | Disp32S | Disp32;
}
else if ((flag_code == CODE_16BIT) ^ (i.prefix[ADDR_PREFIX] != 0))
bigdisp = Disp16;
else
{
if (!bigdisp)
{
if (!override)
override = (i.suffix == (flag_code != CODE_16BIT
? WORD_MNEM_SUFFIX
: LONG_MNEM_SUFFIX));
bigdisp = Disp32;
}
if ((flag_code == CODE_16BIT) ^ override)
bigdisp = Disp16;
}
i.types[this_operand] |= bigdisp;
exp = &disp_expressions[i.disp_operands];

6
gas/testsuite/ChangeLog
View file

@ -1,3 +1,9 @@
2005-09-28 Jan Beulich <jbeulich@novell.com>
* gas/i386/mixed-mode-reloc.s: Enable all insns.
* gas/i386/mixed-mode-reloc32.d: Adjust.
* gas/i386/mixed-mode-reloc64.d: Adjust.
2005-09-28 Jan Beulich <jbeulich@novell.com>
* gas/i386/reloc64.s: Also test .slong.

6
gas/testsuite/gas/i386/mixed-mode-reloc.s
View file

@ -2,12 +2,12 @@
.code16
_start16:
#FIXME movl xtrn@got(%ebx), %eax
#FIXME calll xtrn@plt
movl xtrn@got(%ebx), %eax
calll xtrn@plt
.code32
_start32:
#FIXME movl xtrn@got(%ebx), %eax
movl xtrn@got(%ebx), %eax
calll xtrn@plt
.code64

6
gas/testsuite/gas/i386/mixed-mode-reloc32.d
View file

@ -6,9 +6,9 @@
RELOCATION RECORDS FOR \[.text\]:
OFFSET[ ]+TYPE[ ]+VALUE[ ]*
#[0-9a-f]+[ ]+R_386_GOT32[ ]+xtrn[ ]*
#[0-9a-f]+[ ]+R_386_PLT32[ ]+xtrn[ ]*
#[0-9a-f]+[ ]+R_386_GOT32[ ]+xtrn[ ]*
[0-9a-f]+[ ]+R_386_GOT32[ ]+xtrn[ ]*
[0-9a-f]+[ ]+R_386_PLT32[ ]+xtrn[ ]*
[0-9a-f]+[ ]+R_386_GOT32[ ]+xtrn[ ]*
[0-9a-f]+[ ]+R_386_PLT32[ ]+xtrn[ ]*
[0-9a-f]+[ ]+R_386_GOT32[ ]+xtrn[ ]*
[0-9a-f]+[ ]+R_386_PLT32[ ]+xtrn[ ]*

6
gas/testsuite/gas/i386/mixed-mode-reloc64.d
View file

@ -6,9 +6,9 @@
RELOCATION RECORDS FOR \[.text\]:
OFFSET[ ]+TYPE[ ]+VALUE[ ]*
#[0-9a-f]+[ ]+R_X86_64_GOT32[ ]+xtrn[ ]*
#[0-9a-f]+[ ]+R_X86_64_PLT32[ ]+xtrn\+0xf+c[ ]*
#[0-9a-f]+[ ]+R_X86_64_GOT32[ ]+xtrn[ ]*
[0-9a-f]+[ ]+R_X86_64_GOT32[ ]+xtrn[ ]*
[0-9a-f]+[ ]+R_X86_64_PLT32[ ]+xtrn\+0xf+c[ ]*
[0-9a-f]+[ ]+R_X86_64_GOT32[ ]+xtrn[ ]*
[0-9a-f]+[ ]+R_X86_64_PLT32[ ]+xtrn\+0xf+c[ ]*
[0-9a-f]+[ ]+R_X86_64_GOT32[ ]+xtrn[ ]*
[0-9a-f]+[ ]+R_X86_64_PLT32[ ]+xtrn\+0xf+c[ ]*