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* gas/mips/mips4.s, gas/mips/mips4.d: Enable the "pref" test. Change

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arguments for "madd.s" so that the instruction is correct for mips1
	and still matches "bc3*".
This commit is contained in:
Thiemo Seufer 2006-07-18 14:06:10 +00:00
parent 9cd732686a
commit 2f2760a39d
3 changed files with 19 additions and 17 deletions
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6
gas/testsuite/ChangeLog
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@ -1,3 +1,9 @@
2006-07-18 Maciej W. Rozycki <macro@mips.com>
* gas/mips/mips4.s, gas/mips/mips4.d: Enable the "pref" test. Change
arguments for "madd.s" so that the instruction is correct for mips1
and still matches "bc3*".
2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
Michael Meissner <michael.meissner@amd.com>

17
gas/testsuite/gas/mips/mips4.d
View file

@ -21,7 +21,7 @@ Disassembly of section .text:
0+0030 <[^>]*> ldxc1 \$f2,a0\(a1\)
0+0034 <[^>]*> lwxc1 \$f2,a0\(a1\)
0+0038 <[^>]*> madd.d \$f0,\$f2,\$f4,\$f6
0+003c <[^>]*> madd.s \$f0,\$f2,\$f4,\$f6
0+003c <[^>]*> madd.s \$f10,\$f8,\$f2,\$f0
0+0040 <[^>]*> movf a0,a1,\$fcc4
0+0044 <[^>]*> movf.d \$f4,\$f6,\$fcc0
0+0048 <[^>]*> movf.s \$f4,\$f6,\$fcc0
@ -40,11 +40,12 @@ Disassembly of section .text:
0+007c <[^>]*> nmadd.s \$f0,\$f2,\$f4,\$f6
0+0080 <[^>]*> nmsub.d \$f0,\$f2,\$f4,\$f6
0+0084 <[^>]*> nmsub.s \$f0,\$f2,\$f4,\$f6
0+0088 <[^>]*> prefx 0x4,a0\(a1\)
0+008c <[^>]*> recip.d \$f4,\$f6
0+0090 <[^>]*> recip.s \$f4,\$f6
0+0094 <[^>]*> rsqrt.d \$f4,\$f6
0+0098 <[^>]*> rsqrt.s \$f4,\$f6
0+009c <[^>]*> sdxc1 \$f4,a0\(a1\)
0+00a0 <[^>]*> swxc1 \$f4,a0\(a1\)
0+0088 <[^>]*> pref 0x4,0\(a0\)
0+008c <[^>]*> prefx 0x4,a0\(a1\)
0+0090 <[^>]*> recip.d \$f4,\$f6
0+0094 <[^>]*> recip.s \$f4,\$f6
0+0098 <[^>]*> rsqrt.d \$f4,\$f6
0+009c <[^>]*> rsqrt.s \$f4,\$f6
0+00a0 <[^>]*> sdxc1 \$f4,a0\(a1\)
0+00a4 <[^>]*> swxc1 \$f4,a0\(a1\)
...

13
gas/testsuite/gas/mips/mips4.s
View file

@ -11,7 +11,8 @@ text_label:
ldxc1 $f2,$4($5)
lwxc1 $f2,$4($5)
madd.d $f0,$f2,$f4,$f6
madd.s $f0,$f2,$f4,$f6
# This choice of arguments is so that it matches bc3f on pre-mips4.
madd.s $f10,$f8,$f2,$f0
movf $4,$5,$fcc4
movf.d $f4,$f6,$fcc0
movf.s $f4,$f6,$fcc0
@ -30,14 +31,8 @@ text_label:
nmadd.s $f0,$f2,$f4,$f6
nmsub.d $f0,$f2,$f4,$f6
nmsub.s $f0,$f2,$f4,$f6
# We don't test pref because currently the disassembler will
# disassemble it as lwc3. lwc3 is correct for mips1 to mips3,
# while pref is correct for mips4. Unfortunately, the
# disassembler does not know which architecture it is
# disassembling for.
# pref 4,0($4)
# It used to be disabled due to a clash with lwc3.
pref 4,0($4)
prefx 4,$4($5)
recip.d $f4,$f6
recip.s $f4,$f6