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* config/tc-ppc.c (parse_cpu): Preserve the settings of the

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PPC_OPCODE_ALTIVEC and PPC_OPCODE_SPE flags.

* gas/ppc/altivec_and_spe.s: New test - checks that ISA extension
  command line options (-maltivec, -mspe) can be specified before
  CPU selection command line options.
* gas/ppc/altivec_and_spe.d: Expected disassembly.
* gas/ppc/ppc.exp: Run the new test
This commit is contained in:
Nick Clifton 2008-01-04 14:53:50 +00:00
parent ec4d452564
commit b0e34bfe93
6 changed files with 40 additions and 6 deletions
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5
gas/ChangeLog
View file

@ -1,3 +1,8 @@
2008-01-04 Nick Clifton <nickc@redhat.com>
* config/tc-ppc.c (parse_cpu): Preserve the settings of the
PPC_OPCODE_ALTIVEC and PPC_OPCODE_SPE flags.
2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (md_assemble): Use !intel_mnemonic instead

16
gas/config/tc-ppc.c
View file

@ -825,6 +825,8 @@ const size_t md_longopts_size = sizeof (md_longopts);
static int
parse_cpu (const char *arg)
{
unsigned long altivec_or_spe = ppc_cpu & (PPC_OPCODE_ALTIVEC | PPC_OPCODE_SPE);
/* -mpwrx and -mpwr2 mean to assemble for the IBM POWER/2
(RIOS2). */
if (strcmp (arg, "pwrx") == 0 || strcmp (arg, "pwr2") == 0)
@ -867,9 +869,9 @@ parse_cpu (const char *arg)
else if (strcmp (arg, "altivec") == 0)
{
if (ppc_cpu == 0)
ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC;
else
ppc_cpu |= PPC_OPCODE_ALTIVEC;
ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC;
altivec_or_spe |= PPC_OPCODE_ALTIVEC;
}
else if (strcmp (arg, "e500") == 0 || strcmp (arg, "e500x2") == 0)
{
@ -881,9 +883,9 @@ parse_cpu (const char *arg)
else if (strcmp (arg, "spe") == 0)
{
if (ppc_cpu == 0)
ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_SPE | PPC_OPCODE_EFS;
else
ppc_cpu |= PPC_OPCODE_SPE;
ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_EFS;
altivec_or_spe |= PPC_OPCODE_SPE;
}
/* -mppc64 and -m620 mean to assemble for the 64-bit PowerPC
620. */
@ -941,6 +943,8 @@ parse_cpu (const char *arg)
else
return 0;
/* Make sure the the Altivec and SPE bits are not lost. */
ppc_cpu |= altivec_or_spe;
return 1;
}

8
gas/testsuite/ChangeLog
View file

@ -1,3 +1,11 @@
2008-01-04 Nick Clifton <nickc@redhat.com>
* gas/ppc/altivec_and_spe.s: New test - checks that ISA extension
command line options (-maltivec, -mspe) can be specified before
CPU selection command line options.
* gas/ppc/altivec_and_spe.d: Expected disassembly.
* gas/ppc/ppc.exp: Run the new test
2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/arch-9.d: New file.

12
gas/testsuite/gas/ppc/altivec_and_spe.d Normal file
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@ -0,0 +1,12 @@
#as: -maltivec -mspe -mppc64
#objdump: -d -Mppc64
#name: Check that ISA extensions can be specified before CPU selection
.*: +file format elf.*-powerpc.*
Disassembly of section \.text:
0+00 <.*>:
0: 7e 00 06 6c dssall
4: 7d 00 83 a6 mtspr 512,r8
8: 4c 00 00 24 rfid

4
gas/testsuite/gas/ppc/altivec_and_spe.s Normal file
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@ -0,0 +1,4 @@
.text
dssall
mtspefscr 8
rfid

1
gas/testsuite/gas/ppc/ppc.exp
View file

@ -39,6 +39,7 @@ if { [istarget powerpc*-*-*] } then {
run_dump_test "booke_xcoff64"
} else {
run_dump_test "altivec"
run_dump_test "altivec_and_spe"
run_dump_test "booke"
run_dump_test "e500"
run_list_test "range" "-a32"