2007-02-19 Andreas Krebbel <krebbel1@de.ibm.com>
* s390-opc.c (INSTR_RRF_U0FR, MASK_RRF_U0FR): Removed. (INSTR_RRF_U0RF, MASK_RRF_U0RF): Added. * s390-opc.txt (cfxbr, cfdbr, cfebr, cgebr, cgdbr, cgxbr, cger, cgdr, cgxr, cfxr, cfdr, cfer): Instruction type set to INSTR_RRF_U0RF. 2007-02-19 Andreas Krebbel <krebbel1@de.ibm.com> * gas/s390/esa-g5.d (cfxbr, cfebr, cfdbr): Exchanged floating point and fixed point operands. * gas/s390/esa-g5.s: Likewise. * gas/s390/zarch-z900.d (cfdr, cfer, cfxr, cgdbr, cgebr, cgxbr, cgdr, cger, cgxr): Likewise. * gas/s390/zarch-z900.s: Likewise.
This commit is contained in:
parent
07802d9880
commit
929e4d1a15
8 changed files with 55 additions and 41 deletions
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@ -1,3 +1,12 @@
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2007-02-19 Andreas Krebbel <krebbel1@de.ibm.com>
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* gas/s390/esa-g5.d (cfxbr, cfebr, cfdbr): Exchanged floating
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point and fixed point operands.
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* gas/s390/esa-g5.s: Likewise.
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* gas/s390/zarch-z900.d (cfdr, cfer, cfxr, cgdbr, cgebr, cgxbr,
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cgdr, cger, cgxr): Likewise.
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* gas/s390/zarch-z900.s: Likewise.
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2007-02-11 H.J. Lu <hongjiu.lu@intel.com>
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PR gas/4027
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@ -104,9 +104,9 @@ Disassembly of section .text:
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.*: b3 b4 00 69 [ ]*cefr %r6,%f9
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.*: 39 69 [ ]*cer %f6,%f9
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.*: b2 1a 5f ff [ ]*cfc 4095\(%r5\)
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.*: b3 99 50 69 [ ]*cfdbr %f6,5,%r9
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.*: b3 98 50 69 [ ]*cfebr %f6,5,%r9
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.*: b3 9a 50 69 [ ]*cfxbr %f6,5,%r9
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.*: b3 99 50 69 [ ]*cfdbr %r6,5,%f9
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.*: b3 98 50 69 [ ]*cfebr %r6,5,%f9
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.*: b3 9a 50 69 [ ]*cfxbr %r6,5,%f9
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.*: 49 65 af ff [ ]*ch %r6,4095\(%r5,%r10\)
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.*: a7 6e 80 01 [ ]*chi %r6,-32767
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.*: b2 41 00 69 [ ]*cksm %r6,%r9
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@ -98,9 +98,9 @@ foo:
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cefr %r6,%f9
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cer %f6,%f9
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cfc 4095(%r5)
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cfdbr %r6,5,%r9
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cfebr %r6,5,%r9
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cfxbr %r6,5,%r9
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cfdbr %r6,5,%f9
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cfebr %r6,5,%f9
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cfxbr %r6,5,%f9
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ch %r6,4095(%r5,%r10)
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chi %r6,-32767
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cksm %r6,%r9
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@ -29,20 +29,20 @@ Disassembly of section .text:
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.*: eb 96 5f ff 00 3e [ ]*cdsg %r9,%r6,4095\(%r5\)
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.*: b3 a4 00 96 [ ]*cegbr %r9,%r6
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.*: b3 c4 00 96 [ ]*cegr %r9,%r6
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.*: b3 b9 90 65 [ ]*cfdr %f6,9,%r5
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.*: b3 b8 90 65 [ ]*cfer %f6,9,%r5
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.*: b3 ba 90 65 [ ]*cfxr %f6,9,%r5
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.*: b3 b9 90 65 [ ]*cfdr %r6,9,%f5
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.*: b3 b8 90 65 [ ]*cfer %r6,9,%f5
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.*: b3 ba 90 65 [ ]*cfxr %r6,9,%f5
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.*: e3 95 af ff 00 20 [ ]*cg %r9,4095\(%r5,%r10\)
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.*: b3 a9 f0 65 [ ]*cgdbr %f6,15,%r5
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.*: b3 c9 f0 65 [ ]*cgdr %f6,15,%r5
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.*: b3 a8 f0 65 [ ]*cgebr %f6,15,%r5
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.*: b3 c8 f0 65 [ ]*cger %f6,15,%r5
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.*: b3 a9 f0 65 [ ]*cgdbr %r6,15,%f5
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.*: b3 c9 f0 65 [ ]*cgdr %r6,15,%f5
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.*: b3 a8 f0 65 [ ]*cgebr %r6,15,%f5
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.*: b3 c8 f0 65 [ ]*cger %r6,15,%f5
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.*: e3 95 af ff 00 30 [ ]*cgf %r9,4095\(%r5,%r10\)
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.*: b9 30 00 96 [ ]*cgfr %r9,%r6
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.*: a7 9f 80 01 [ ]*cghi %r9,-32767
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.*: b9 20 00 96 [ ]*cgr %r9,%r6
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.*: b3 aa f0 65 [ ]*cgxbr %f6,15,%r5
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.*: b3 ca f0 65 [ ]*cgxr %f6,15,%r5
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.*: b3 aa f0 65 [ ]*cgxbr %r6,15,%f5
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.*: b3 ca f0 65 [ ]*cgxr %r6,15,%f5
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.*: e3 95 af ff 00 21 [ ]*clg %r9,4095\(%r5,%r10\)
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.*: e3 95 af ff 00 31 [ ]*clgf %r9,4095\(%r5,%r10\)
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.*: b9 31 00 96 [ ]*clgfr %r9,%r6
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@ -23,20 +23,20 @@ foo:
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cdsg %r9,%r6,4095(%r5)
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cegbr %r9,%r6
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cegr %r9,%r6
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cfdr %f6,9,%r5
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cfer %f6,9,%r5
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cfxr %f6,9,%r5
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cfdr %r6,9,%f5
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cfer %r6,9,%f5
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cfxr %r6,9,%f5
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cg %r9,4095(%r5,%r10)
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cgdbr %f6,15,%r5
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cgdr %f6,15,%r5
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cgebr %f6,15,%r5
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cger %f6,15,%r5
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cgdbr %r6,15,%f5
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cgdr %r6,15,%f5
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cgebr %r6,15,%f5
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cger %r6,15,%f5
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cgf %r9,4095(%r5,%r10)
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cgfr %r9,%r6
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cghi %r9,-32767
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cgr %r9,%r6
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cgxbr %f6,15,%r5
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cgxr %f6,15,%r5
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cgxbr %r6,15,%f5
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cgxr %r6,15,%f5
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clg %r9,4095(%r5,%r10)
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clgf %r9,4095(%r5,%r10)
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clgfr %r9,%r6
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@ -1,3 +1,10 @@
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2007-02-19 Andreas Krebbel <krebbel1@de.ibm.com>
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* s390-opc.c (INSTR_RRF_U0FR, MASK_RRF_U0FR): Removed.
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(INSTR_RRF_U0RF, MASK_RRF_U0RF): Added.
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* s390-opc.txt (cfxbr, cfdbr, cfebr, cgebr, cgdbr, cgxbr, cger, cgdr,
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cgxr, cfxr, cfdr, cfer): Instruction type set to INSTR_RRF_U0RF.
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2007-02-19 Andreas Krebbel <krebbel1@de.ibm.com>
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* s390-opc.txt ("efpc", "sfpc"): Set to RRE_RR_OPT instruction type.
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@ -212,9 +212,8 @@ const struct s390_operand s390_operands[] =
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#define INSTR_RRF_FUFF 4, { F_24,F_16,F_28,U4_20,0,0 } /* e.g. didbr */
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#define INSTR_RRF_RURR 4, { R_24,R_28,R_16,U4_20,0,0 } /* e.g. .insn */
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#define INSTR_RRF_R0RR 4, { R_24,R_28,R_16,0,0,0 } /* e.g. idte */
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#define INSTR_RRF_U0FF 4, { F_24,U4_16,F_28,0,0,0 } /* e.g. cfxbr */
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#define INSTR_RRF_U0FR 4, { F_24,U4_16,R_28,0,0,0 } /* e.g. cfebr */
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#define INSTR_RRF_U0FR 4, { F_24,U4_16,R_28,0,0,0 } /* e.g. cfxbr */
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#define INSTR_RRF_U0FF 4, { F_24,U4_16,F_28,0,0,0 } /* e.g. fixr */
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#define INSTR_RRF_U0RF 4, { R_24,U4_16,F_28,0,0,0 } /* e.g. cfebr */
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#define INSTR_RRF_M0RR 4, { R_24,R_28,M_16,0,0,0 } /* e.g. sske */
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#define INSTR_RR_0R 2, { R_12, 0,0,0,0,0 } /* e.g. br */
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#define INSTR_RR_FF 2, { F_8,F_12,0,0,0,0 } /* e.g. adr */
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#define MASK_RRF_RURR { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
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#define MASK_RRF_R0RR { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
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#define MASK_RRF_U0FF { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
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#define MASK_RRF_U0FR { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
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#define MASK_RRF_U0FR { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
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#define MASK_RRF_U0RF { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
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#define MASK_RRF_M0RR { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
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#define MASK_RR_0R { 0xff, 0xf0, 0x00, 0x00, 0x00, 0x00 }
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#define MASK_RR_FF { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
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@ -344,9 +344,9 @@ ed0000000008 keb RXE_FRRD "compare and signal short bfp" g5 esa,zarch
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b396 cxfbr RRE_RF "convert from fixed 32 to extended bfp" g5 esa,zarch
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b395 cdfbr RRE_RF "convert from fixed 32 to long bfp" g5 esa,zarch
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b394 cefbr RRE_RF "convert from fixed 32 to short bfp" g5 esa,zarch
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b39a cfxbr RRF_U0FR "convert to fixed extended bfp to 32" g5 esa,zarch
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b399 cfdbr RRF_U0FR "convert to fixed long bfp to 32" g5 esa,zarch
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b398 cfebr RRF_U0FR "convert to fixed short bfp to 32" g5 esa,zarch
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b39a cfxbr RRF_U0RF "convert to fixed extended bfp to 32" g5 esa,zarch
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b399 cfdbr RRF_U0RF "convert to fixed long bfp to 32" g5 esa,zarch
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b398 cfebr RRF_U0RF "convert to fixed short bfp to 32" g5 esa,zarch
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b34d dxbr RRE_FF "divide extended bfp" g5 esa,zarch
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b31d ddbr RRE_FF "divide long bfp" g5 esa,zarch
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ed000000001d ddb RXE_FRRD "divide long bfp" g5 esa,zarch
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b3a4 cegbr RRE_RR "convert from fixed 64 to short bfp" z900 zarch
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b3a5 cdgbr RRE_RR "convert from fixed 64 to long bfp" z900 zarch
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b3a6 cxgbr RRE_RR "convert from fixed 64 to extended bfp" z900 zarch
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b3a8 cgebr RRF_U0FR "convert to fixed short bfd to 64" z900 zarch
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b3a9 cgdbr RRF_U0FR "convert to fixed long bfp to 64" z900 zarch
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b3aa cgxbr RRF_U0FR "convert to fixed extended bfp to 64" z900 zarch
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b3a8 cgebr RRF_U0RF "convert to fixed short bfd to 64" z900 zarch
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b3a9 cgdbr RRF_U0RF "convert to fixed long bfp to 64" z900 zarch
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b3aa cgxbr RRF_U0RF "convert to fixed extended bfp to 64" z900 zarch
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b3c4 cegr RRE_RR "convert from fixed 64 to short hfp" z900 zarch
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b3c5 cdgr RRE_RR "convert from fixed 64 to long hfp" z900 zarch
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b3c6 cxgr RRE_RR "convert from fixed 64 to extended hfp" z900 zarch
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b3c8 cger RRF_U0FR "convert to fixed short hfp to 64" z900 zarch
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b3c9 cgdr RRF_U0FR "convert to fixed long hfp to 64" z900 zarch
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b3ca cgxr RRF_U0FR "convert to fixed extended hfp to 64" z900 zarch
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b3c8 cger RRF_U0RF "convert to fixed short hfp to 64" z900 zarch
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b3c9 cgdr RRF_U0RF "convert to fixed long hfp to 64" z900 zarch
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b3ca cgxr RRF_U0RF "convert to fixed extended hfp to 64" z900 zarch
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010b tam E "test addressing mode" z900 esa,zarch
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010c sam24 E "set addressing mode 24" z900 esa,zarch
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010d sam31 E "set addressing mode 31" z900 esa,zarch
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@ -631,9 +631,9 @@ b369 cxr RRE_FF "compare extended hfp" g5 esa,zarch
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b3b6 cxfr RRE_RF "convert from fixed 32 to extended hfp" g5 esa,zarch
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b3b5 cdfr RRE_RF "convert from fixed 32 to long hfp" g5 esa,zarch
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b3b4 cefr RRE_RF "convert from fixed 32 to short hfp" g5 esa,zarch
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b3ba cfxr RRF_U0FR "convert to fixed extended hfp to 32" z900 zarch
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b3b9 cfdr RRF_U0FR "convert to fixed long hfp to 32" z900 zarch
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b3b8 cfer RRF_U0FR "convert to fixed short hfp to 32" z900 zarch
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b3ba cfxr RRF_U0RF "convert to fixed extended hfp to 32" z900 zarch
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b3b9 cfdr RRF_U0RF "convert to fixed long hfp to 32" z900 zarch
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b3b8 cfer RRF_U0RF "convert to fixed short hfp to 32" z900 zarch
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b362 ltxr RRE_FF "load and test extended hfp" g5 esa,zarch
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b363 lcxr RRE_FF "load complement extended hfp" g5 esa,zarch
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b367 fixr RRF_U0FF "load fp integer extended hfp" g5 esa,zarch
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