Commit graph

650 commits

Author SHA1 Message Date
Alan Modra
b34976b65a s/boolean/bfd_boolean/ s/true/TRUE/ s/false/FALSE/. Simplify
comparisons of bfd_boolean vars with TRUE/FALSE.  Formatting.
2002-11-30 08:39:46 +00:00
DJ Delorie
9967baf0b2 * xstormy16-opc.c: Regenerate. 2002-11-25 21:15:04 +00:00
Jim Wilson
97dd3f1856 Patch from Kenneth Chen to fix brl disassembly.
* ia64-dis.c (print_insn_ia64): Correct handling of IA64_OPND_TGT64.
2002-11-25 19:59:29 +00:00
DJ Delorie
193eb15dba * xstormy16-desc.c: Regenerate.
* xstormy16-opc.c: Regenerate.
* xstormy16-opc.h: Regenerate.
2002-11-20 03:15:10 +00:00
Klee Dienes
11041102f2 2002-11-12 Klee Dienes <kdienes@apple.com>
* avr-dis.c: Include libiberty.h (for xmalloc).
	(struct avr_opcodes_s): Remove 'bin_mask' field (it's
	automatically computed in the init routine).
	(AVR_INSN): No longer provide bin_mask field in initializer.
	(avr_opcodes_s): Declare as const.
	(print_insn_avr): Store the bin_mask field in a separate table
	(allocated with xmalloc); iterate through it at the same time as
	we iterate through the opcodes.
2002-11-18 16:54:08 +00:00
Klee Dienes
a3e64b75ca 2002-11-11 Klee Dienes <kdienes@apple.com>
* h8300.h (h8_opcode): Remove 'length' field.
	(h8_opcodes): Mark as 'const' (both the declaration and
	definition).  Modify initializer and initializer macros to no
	longer initialize the length field.

2002-11-11  Klee Dienes  <kdienes@apple.com>

	* h8300-dis.c: Include libiberty.h (for xmalloc).
	(struct h8_instruction): New type, used to wrap h8_opcodes with a
	length field (computed at run-time).
	(h8_instructions): New variable.
	(bfd_h8_disassemble_init): Allocate the storage for
	h8_instructions.  Fill h8_instructions with pointers to the
	appropriate opcode and the correct value for the length field.
	(bfd_h8_disassemble): Iterate through h8_instructions instead of
	h8_opcodes.
2002-11-18 16:52:46 +00:00
Klee Dienes
84037f8c66 2002-11-18 Klee Dienes <kdienes@apple.com>
* arc.h (arc_ext_opcodes): Declare as extern.
	(arc_ext_operands): Declare as extern.
	* i860.h (i860_opcodes): Declare as const.

2002-11-18  Klee Dienes  <kdienes@apple.com>

	* arc-opc.c (arc_ext_opcodes): Define.
	(arc_ext_operands): Define.
	* i386-dis.c (Suffix3DNow): Declare as const.
	* arm-opc.h (arm_opcodes): Declare as const.
	(thumb_opcodes): Declare as const.
	* h8500-opc.h (h8500_table): Declare as const.
	(h8500_table): Use a NULL for the opcode in the terminator, so
	that code testing (opcode->name) behaves correctly.
	* mcore-opc.h (mcore_table): Declare as const.
	* sh-opc.h (sh_table): Declare as const.
	* w65-opc.h (optable): Declare as const.
	* z8k-opc.h (z8k_table): Declare as const.
2002-11-18 16:50:05 +00:00
Svein Seldal
9c87d6c7e4 * gas/config/tc-tic4x.c: Fixed proper commandline
parameters. Added support for new opcode-list format. General
	error message fixups.
	(c4x_inst_add): Reject insn not for our CPU
	(md_begin): Added matrix for setting the proper opcode-level &
	device-flags according to cpu type and revision. Rewrite the
	opcode hasher.
	(c4x_operand_parse): Fix opcode bug
	(c4x_operands_match): New function argument. Added dry-run
	mechanism, that is optional error generation. Added constraint 'i'
	and 'j'.
	(c4x_insn_check): Added new function for post-verification of the
	generated insn.
	(md_assemble): Check all opcodes before croaking because of an
	argument mismatch. Need this to be able to fully support
	ortogonally arguments.
	(md_parse_options): Revised commandprompt swicthes and added new
	ones.
	(md_show_usage): Complete rewrite of printout.
	* gas/testsuite/gas/tic4x/addressing.s: Fix bug in one insn
	* gas/testsuite/gas/tic4x/addressing_c3x.d: Update thereafter
	* gas/testsuite/gas/tic4x/addressing_c4x.d: Update thereafter
	* gas/testsuite/gas/tic4x/allopcodes.S: Add support for new
	opclass.h changes
	* gas/testsuite/gas/tic4x/opclasses.h: Added testsuites for
	the new enhanced opcodes.
	* gas/testsuite/gas/tic4x/opcodes.s: Regenerate
	* gas/testsuite/gas/tic4x/opcodes_c3x.d: Update from above
	* gas/testsuite/gas/tic4x/opcodes_c4x.d: Update from above
	* gas/testsuite/gas/tic4x/opcodes_new.d: Added new testsuite for
	the enhanced and special insns.
	* gas/testsuite/gas/tic4x/tic4x.exp: Added the opcodes_new testsuite
	* include/opcode/tic4x.h: File reordering. Added enhanced opcodes.
	* opcodes/tic4x-dis.c: Added support for enhanced and special
	insn.
	(c4x_print_op): Added insn class 'i' and 'j'
	(c4x_hash_opcode_special): Add to support special insn
	(c4x_hash_opcode): Update to support the new opcode-list
	format. Add support for the new special insns.
	(c4x_disassemble): New opcode-list support.
2002-11-18 09:09:35 +00:00
Klee Dienes
c444c2f661 2002-11-16 Klee Dienes <kdienes@apple.com>
* m88k-dis.c: Include libiberty.h (for xmalloc).
        (HASHTAB): New type, used to build instruction hash tables.
        Contains a pointer to an INSTAB and a pointer to the next hash
        chain entry.
        (instructions): Move definition from m88k.h; remove initialization
        of 'next' field.
        (hashtable): Now an aray of pointer-to-HASHTAB, not INSTAB.
        (printop): Mark pointer to OPSPEC as const.
        (install): Remove; fold into init_disasm.
        (m88kdis): Update to ihashtab_initialized to 1 after calling
        init_disasm.  entry_ptr now iterates through HASHTABs, not
        INSTABs.
        (init_disasm): Iterate through the instructions and add to
        hashtable[].
2002-11-16 18:42:12 +00:00
Svein Seldal
44287f6039 * gas/config/tc-tic4x.c: Remove c4x_pseudo_ignore function.
(c4x_operands_match): Added check for 8-bits LDF insn. Give
	  warning when using constant direct bigger than 2^16. Add the new
	  arguments.
	* include/opcode/tic4x.h: Major rewrite of entire file. Define
	  instruction classes, and put each instruction into a class.
	* opcodes/tic4x-dis.c: (c4x_print_op): Add support for the new
	  argument format. Fix bug in 'N' register printer.
2002-11-16 12:23:23 +00:00
Alan Modra
8b4fa15520 * ppc-dis.c (print_insn_powerpc): Correct condition register display. 2002-11-12 04:03:31 +00:00
Aldy Hernandez
ced05688d4 2002-11-07 Aldy Hernandez <aldyh@redhat.com>
* ppc-opc.c (EVUIMM_4): Change bit size to 32.
	(EVUIMM_2): Same.
	(EVUIMM_8): Same.
2002-11-08 00:46:21 +00:00
Aldy Hernandez
95e172a508 2002-11-07 Aldy Hernandez <aldyh@redhat.com>
* ppc-opc.c (EVUIMM_4): Change bit size to 32.
	(EVUIMM_2): Same.
2002-11-07 23:43:50 +00:00
Nick Clifton
bde78a07b9 Convert ia64-gen to use getopt(). Add standard GNU options plus --srcdir.
Convert Makefile.am to pass --srcdir to ia64-gen.  Fix compile time warnings.
2002-11-07 14:33:48 +00:00
Aldy Hernandez
fe58797755 2002-11-06 Aldy Hernandez <aldyh@redhat.com>
* opcodes/ppc-opc.c: Change RD to RS for evmerge*.
2002-11-07 00:54:09 +00:00
Nick Clifton
d3c866d1d8 Add conditional/unconditional branch classification. 2002-10-23 15:45:49 +00:00
Stephane Carrez
ac8c616a59 * m68hc11-dis.c (print_insn): Treat bitmask and branch operands
at the end.
2002-10-13 09:01:54 +00:00
Richard Sandiford
9752cf1b67 [include/opcode/]
* mips.h: Update comment for new opcodes.
	(OP_MASK_VECBYTE, OP_SH_VECBYTE): New.
	(OP_MASK_VECALIGN, OP_SH_VECALIGN): New.
	(INSN_4111, INSN_4120, INSN_5400, INSN_5500): New.
	(CPU_VR4120, CPU_VR5400, CPU_VR5500): New.
	(OPCODE_IS_MEMBER): Handle the new CPU_* values and INSN_* flags.
	Don't match CPU_R4111 with INSN_4100.

[opcodes/]
	* mips-dis.c (print_insn_arg): Handle '[', ']', 'e' and '%'.
	(mips_isa_type): Handle bfd_mach_mips4120, bfd_mach_mips5400
	and bfd_mach_mips5500.
	* mips-opc.c (V1): Include INSN_4111 and INSN_4120.
	(N411, N412, N5, N54, N55): New convenience defines.
	(mips_builtin_opcodes): Add vr4120, vr5400 and vr5500 opcodes.
	Change dmadd16 and madd16 from V1 to N411.
2002-09-30 11:58:10 +00:00
Thiemo Seufer
3396de367a /gas/ChangeLog
* config/tc-mips.c (CPU_HAS_MIPS16): Add mips-lsi-elf as MIPS16
	capable configuration.
	(macro_build): Check for MIPS16 capability, not for actual MIPS16 code
	generation.
	(mips_ip): Likewise.

	/gas/testsuite/ChangeLog
	* gas/mips/mips-jalx.d: New file, check jalx assembly.
	* gas/mips/mips-jalx.s: Likewise.
	* gas/mips/mips-no-jalx.l: Likewise.
	* gas/mips/mips-no-jalx.s: Likewise.
	* gas/mips/mips16-jalx.d: Likewise.
	* gas/mips/mips16-jalx.s: Likewise.
	* gas/mips/mips.exp: Add new tests.

	/opcodes/ChangeLog:
	* mips-dis.c (print_insn_mips): Always allow disassembly of
	32-bit jalx opcode.
2002-09-26 09:56:35 +00:00
Nick Clifton
1a40396432 Updated German translation. 2002-09-24 13:00:33 +00:00
Alan Modra
2d2550d688 * Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
	* po/POTFILES.in: Regenerate.
2002-09-21 10:49:05 +00:00
Nick Clifton
0ec499f72c Allow CRFS and CRFD operands to accept CR register names 2002-09-20 15:44:23 +00:00
Alan Modra
4415b5c296 * tic4x-dis.c: Add function declarations and ATTRIBUTE_UNUSED.
Convert functions to K&R format.
2002-09-17 08:34:17 +00:00
Nick Clifton
dde1b13223 Fix Book-E opcodes 2002-09-13 09:07:49 +00:00
Alan Modra
9ec878e367 * ppc-dis.c (powerpc_dialect): Add missing PPC_OPCODE_CLASSIC. 2002-09-12 03:58:37 +00:00
Nick Clifton
e09f439535 Update translations 2002-09-11 13:52:17 +00:00
Nick Clifton
341026c1c1 Do not insert non-BookE32 instructions into the hash table if the target cpu
is the BookE32. (case 107575)
2002-09-04 12:37:30 +00:00
Nick Clifton
07dd56a969 Have objdump's --help switch document PPC -M options. 2002-09-04 10:08:08 +00:00
Nick Clifton
2e32aab953 The BookE implementations of the TLBWE and TLBRE instructions do not take any
arguments.
2002-09-04 09:59:48 +00:00
Nick Clifton
bf5be08227 Remove redundant references to V850EA architecture. 2002-09-02 11:44:39 +00:00
Alan Modra
d943fe33c6 * arc-opc.c: Include bfd.h.
(arc_get_opcode_mach): Subtract off base bfd_mach value.
2002-09-02 06:00:05 +00:00
Alan Modra
53f32ea5c6 * v850-dis.c (disassemble): Remove bfd_mach_v850ea case.
* mips-dis.c (_print_insn_mips): Don't use hard-coded mach constants.
2002-08-30 08:28:08 +00:00
Nick Clifton
026df7c5e6 Add TMS320C4x support 2002-08-28 10:38:51 +00:00
Nick Clifton
1489984027 opcodes: Fix definition of "in rd,imm16" opcode.
gas: Adjust ptr variable also in "case 0" case.
2002-08-22 19:22:35 +00:00
Elena Zannoni
2397604975 2002-08-19 Elena Zannoni <ezannoni@redhat.com>
From  matthew green  <mrg@redhat.com>

        * ppc-dis.c (powerpc_dialect): Support `-m500', `-m500x2' and
        `-mefs'. Turn off AltiVec for E500 and efs.
        (print_insn_powerpc): Don't print an AltiVec instruction if the
        dialect is not efs.

        * ppc-opc.c (insert_pmrn, extract_pmrn, insert_ev2, extract_ev2,
        insert_ev4, extract_ev4, insert_ev8, extract_ev8): New functions
        for extracting pmrn/evld/evstd/etc operands.
        (CRB, CRFD, CRFS, DC, RD): New instruction fields.
        (CT): Make this equal to RD + 1.
        (PMRN): New operand.
        (RA): Update.
        (EVUIMM, EVUIMM_2, EVUIMM_4, EVUIMM_8): New operands.
        (WS): Update.
        (EVSEL, EVSEL_MASK): New instruction form and mask for EVSEL.
        (ISEL, ISEL_MASK): New instruction form and mask for ISEL.
        (XISEL, XISEL_MASK): New instruction form and mask for ISEL.
        (CTX, CTX_MASK): New instruction form and mask for context cache
        instructions.
        (UCTX, UCTX_MASK): New instruction form and mask for user context
        cache instructions.
        (XC, XC_MASK, XUC, XUC_MASK): New instruction forms.
        (CLASSIC): New define.
        (PPCESPE): New define.
        (PPCISEL, , PPCBRLK, PPCPMR, PPCCHLK, PPCRFMI): New
        defines for integer select, cache control, branch
        locking, power management, cache locking and machine check
        APU instructions, respectively.
        (efsabs, efsnabs, efsneg, efsadd, efssub, efsmul,
        efsdiv, efscmpgt, efscmplt, efscmpeq, efststgt, efststlt,
        efststeq, efscfui, efsctuiz, efscfsi, efscfuf, efscfsf,
        efsctui, efsctsi, efsctsiz, efsctuf, efsctsf,
        evaddw, evaddiw, evsubfw, evsubifw, evabs, evneg, evextsb,
        evextsh, evrndw, evcntlzw, evcntlsw, brinc, evand, evandc, evor,
        evorc, evxor, eveqv, evnand, evnor, evrlw, evrlwi, evslw, evslwi,
        evsrws, evsrwu, evsrwis, evsrwiu, evsplati, evsplatfi, evmergehi,
        evmergelo, evmergehilo, evmergelohi, evcmpgts, evcmpgtu, evcmplts,
        evcmpltu, evcmpeq, evsel, evldd, evlddx, evldw, evldwx, evldh,
        evldhx, evlwhe, evlwhex, evlwhou, evlwhoux, evlwhos, evlwhosx,
        evlwwsplat, evlwwsplatx, evlwhsplat, evlwhsplatx, evlhhesplat,
        evlhhesplatx, evlhousplat, evlhousplatx, evlhossplat, evlhossplatx,
        evstdd, evstddx, evstdw, evstdwx, evstdh, evstdhx, evstwwe,
        evstwwex, evstwwo, evstwwox, evstwhe, evstwhex, evstwho, evstwhox,
        evfsabs, evfsnabs, evfsneg, evfsadd, evfssub, evfsmul, evfsdiv,
        evfscmpgt, evfscmplt, evfscmpeq, evfststgt, evfststlt, evfststeq,
        evfscfui, evfsctuiz, evfscfsi, evfscfuf, evfscfsf, evfsctui,
        evfsctsi, evfsctsiz, evfsctuf, evfsctsf, evsabs, evsnabs, evsneg,
        evsadd, evssub, evsmul, evsdiv, evscmpgt, evsgmplt, evsgmpeq,
        evststgt, evststlt, evststeq, evscfui, evscfsi, evscfuf, evscfsf,
        evsctui, evsctuiz, evsctsi, evsctsiz, evsctuf, evsctsf, evmhossf,
        evmhossfa, evmhosmf, evmhosmfa, evmhosmi, evmhosmia, evmhoumi,
        evmhoumia, evmhessf, evmhessfa, evmhesmf, evmhesmfa, evmhesmi,
        evmhesmia, evmheumi, evmheumia, evmhossfaaw, evmhossiaaw,
        evmhosmfaaw, evmhosmiaaw, evmhousiaaw, evmhoumiaaw, evmhessfaaw,
        evmhessiaaw, evmhesmfaaw, evmhesmiaaw, evmheusiaaw, evmheumiaaw,
        evmhossfanw, evmhossianw, evmhosmfanw, evmhosmianw, evmhousianw,
        evmhoumianw, evmhessfanw, evmhessianw, evmhesmfanw, evmhesmianw,
        evmheusianw, evmheumianw, evmhogsmfaa, evmhogsmiaa, evmhogumiaa,
        evmhegsmfaa, evmhegsmiaa, evmhegumiaa, evmhogsmfan, evmhogsmian,
        evmhogumian, evmhegsmfan, evmhegsmian, evmhegumian, evmwhssf,
        evmwhssfa, evmwhssfaa, evmwhssmaa, evmwhsmfaa, evmwhsmiaa,
        evmwhusiaa, evmwhumiaa, evmwhssfan, evmwhssian, evmwhsmfan,
        evmwhsmian, evmwhusian, evmwhumian, evmwhgssfaa, evmwhgsmfaa,
        evmwhgsmiaa, evmwhgumiaa, evmwhgssfan, evmwhgsmfan, evmwhgsmian,
        evmwhgumian, evmwhsmf, evmwhsmfa, evmshsmi, evmshsmia, evmshumi,
        evmshumia, evmmlssf, evmmlssfa, evmwlsmf, evmwlsmfa, evmwlumi,
        evmwlumia, evmwlssfaaw, evmwlssiaaw, evmwlsmfaaw, evmwlsmiaaw,
        evmwlusiaaw, evmwlumiaaw, evmwissfanw, evmwissianw, evmwlsmfanw,
        evmwlsmianw, evmwlusianw, evmwlumianw, evmwssf, evmwssfa,
        evmwsmf, evmwsmfa, evmwsmi, evmwsmia, evmwumi, evmwumia,
        evmwssfaa, evmwsmfaa, evmwsmiaa, evmwumiaa, evmwssfan, evmwsmfan,
        evmwsmian, evmwumian, evaddssiaaw, evaddsmiaaw, evaddusiaaw,
        evaddumiaaw, evsubfssiaaw, evsubfsmiaaw, evsubfusiaaw,
        evsubfumiaaw, evmra, evdivws, evdivws): New e500x2 Core Complex
        instructions.
        (rfmci): New machine check APU instruction.
        (isel): New integer select APU instructino.
        (icbtls, icbtlse, icblc, icblce, dcbtls, dcbtlse, dcbtstls,
        dcbtstlse, dcblc, dcblce): New cache control APU instructions.
        (mtspefscr, mfspefscr): New instructions.
        (mfpmr, mtpmr): New performance monitor APU instructions.
        (savecontext): New context cache APU instructions.
        (bblels, bbelr): New branch locking APU instructions.
        (bblels, bbelr): New instructions.
        (mftbl, mftbu, mftb): Set as CLASSIC instructions.  Add BOOKE alias.
2002-08-19 20:59:10 +00:00
Stephane Carrez
7eccd7f6f1 * m68hc11-opc.c: Update call operand to accept the page definition.
Identify instructions that are branches and calls to generate a
	RL_JUMP relocation.
2002-08-13 19:09:01 +00:00
Stephane Carrez
f07534f64e * m68hc11-dis.c (print_insn): Take into account 68HC12 memory
banks and fix disassembling of call instruction.
	(print_indexed_operand): New param to tell whether
	it was an indirect addressing operand (for disassembling call).
2002-08-13 19:01:25 +00:00
Nick Clifton
2b692c5912 Updated Swedish translation 2002-08-09 15:07:57 +00:00
Maciej W. Rozycki
0c11417f42 * config/tc-mips.c (macro): Handle a register plus a 16-bit
immediate offset in "dla" and "la" expansions.
* gas/mips/empic.d: Treat "addiu" and "daddiu" as equivalent when
$0 is source.
* mips-opc.c (mips_builtin_opcodes): Remove "dla" and "la" as
aliases to "daddiu" and "addiu".
2002-08-09 11:07:24 +00:00
Nick Clifton
83e1617e06 Updated Translations 2002-07-30 15:53:18 +00:00
Nick Clifton
219576a4db New translations 2002-07-25 10:31:28 +00:00
Nick Clifton
ff3063f557 Update Spanish and Swedish translations 2002-07-24 09:34:08 +00:00
Alan Modra
8c3bb577a6 * Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
	* po/POTFILES.in: Regenerate.
2002-07-23 12:42:32 +00:00
Nick Clifton
2c71db8993 oops - omitted from previous delta 2002-07-23 09:59:47 +00:00
Nick Clifton
0461a601af update translations. 2002-07-23 09:58:05 +00:00
Nick Clifton
a40cbfa3c9 Add IP2k GAS and OPCODES support. 2002-07-19 07:52:40 +00:00
H.J. Lu
ae66e5d720 2002-07-17 David Mosberger <davidm@hpl.hp.com>
* ia64-opc-b.c (bWhc): New macro.
	(mWhc): Ditto.
	(OpPaWhcD): Ditto.
	(ia64_opcodes_b): Correct patterns for indirect call
	instructions to use 3-bit "wh" field.
	* ia64-asmtab.c: Regnerate.
2002-07-17 07:27:40 +00:00
Thiemo Seufer
aec421e08b * config/tc-mips.c (macro_build): Handle MIPS16 insns.
(mips_ip): Likewise.
	* mips.h (INSN_MIPS16): New define.
	* mips-dis.c (mips_isa_type): Add MIPS16 insn handling.
	* mips-opc.c (I16): New define.
	(mips_builtin_opcodes): Make jalx an I16 insn.
2002-07-09 14:21:40 +00:00
Dave Brolley
fd3c93d5a7 2002-06-18 Dave Brolley <brolley@redhat.com>
* po/POTFILES.in: Add frv-*.[ch].
	* disassemble.c (ARCH_frv): New macro.
	(disassembler): Handle bfd_arch_frv.
	* configure.in: Support frv_bfd_arch.
	* Makefile.am (HFILES): Add frv-*.h.
	(CFILES): Add frv-*.c
	(ALL_MACHINES): Add frv-*.lo.
	(CLEANFILES): Add stamp-frv.
	(FRV_DEPS): New variable.
	(stamp-frv): New target.
	(frv-asm.lo): New target.
	(frv-desc.lo): New target.
	(frv-dis.lo): New target.
	(frv-ibld.lo): New target.
	(frv-opc.lo): New target.
	(frv-*.[ch]): New files.
2002-06-18 21:21:05 +00:00
Ben Elliston
bc98a6310f * Makefile.am (CGENDEPS): Remove unnecessary stamp-cgen.
* Makefile.in: Regenerate.
2002-06-18 17:43:07 +00:00
Alan Modra
56da5fedc7 * a29k-dis.c: Replace CONST with const.
* h8300-dis.c: Likewise.
	* m68k-dis.c: Likewise.
	* or32-dis.c: Likewise.
	* sparc-dis.c: Likewise.
2002-06-08 07:29:27 +00:00
Jason Thorpe
5b0e55b627 bfd:
* Makefile.am (BFD32_BACKENDS): Add elf32-sh64-nbsd.lo.
(BFD32_BACKENDS_CFILES): Add elf32-sh64-nbsd.c.
(BFD64_BACKENDS): Add elf64-sh64-nbsd.lo.
(BFD64_BACKENDS_CFILES): Add elf64-sh64-nbsd.c.
(elf32-sh64-nbsd.lo, elf64-sh64-nbsd.lo): New rules.
* Makefile.in: Regenerate.
* config.bfd (sh5le-*-netbsd*, sh5-*-netbsd*, sh64le-*-netbsd*)
(sh64-*-netbsd*): New targets.
* configure.in: Add bfd_elf32_sh64nbsd_vec, bfd_elf32_sh64lnbsd_vec,
bfd_elf64_sh64nbsd_vec, and bfd_elf64_sh64lnbsd_vec.
* configure: Regenerate.
* elf32-sh64-nbsd.c: New file.
* elf64-sh64-nbsd.c: New file.
* targets.c: Add extern decls for bfd_elf32_sh64nbsd_vec,
bfd_elf32_sh64lnbsd_vec, bfd_elf64_sh64nbsd_vec, and
bfd_elf64_sh64lnbsd_vec.

gas:
* configure.in (sh5*): Set cpu_type to sh64 and endian to big.
(sh5le*, sh64le*): Set cpu_type to sh64 and endian to little.
(sh5*-*-netbsd*, sh64*-*-netbsd*): New targets.
* configure: Regenerate.
* config/tc-sh64.c (sh64_target_format): Add support for NetBSD
environment.

ld:
* Makefile.am (ALL_EMULATIONS): Add eshelf32_nbsd.o,
eshlelf32_nbsd.o, eshelf64_nbsd.o, and eshlelf64_nbsd.o.
(eshelf32_nbsd.c, eshelf64_nbsd.c, eshlelf32_nbsd.c)
(eshlelf64_nbsd.c): New rules.
* Makefile.in: Regenerate.
* configure.tgt (sh5le-*-netbsd*, sh5-*-netbsd*, sh64le-*-netbsd*)
(sh64-*-netbsd*): New targets.
* emulparams/shelf32_nbsd.sh: New file.
* emulparams/shelf64_nbsd.sh: New file.
* emulparams/shlelf32_nbsd.sh: New file.
* emulparams/shlelf64_nbsd.sh: New file.

opcodes:
* configure.in: Add "sh5*-*" to list of targets which include
sh64 support.
* configure: Regenerate.
2002-06-04 02:57:44 +00:00
Chris Demetriou
154bce22d5 2002-05-31 Chris G. Demetriou <cgd@broadcom.com>
* mips-opc.c: Clean up a few whitespace issues, and sort a
        few entries understanding that 'x' follows 'w' in the alphabet.
2002-05-31 20:46:07 +00:00
Chris Demetriou
107c6e1ad8 [ opcodes/ChangeLog ]
2002-05-31  Chris G. Demetriou  <cgd@broadcom.com>
            Ed Satterthwaite  <ehs@broadcom.com>

        * mips-opc.c: Add support for SB-1 MDMX subset and extensions.

[ gas/testsuite/ChangeLog ]
2002-05-31  Chris G. Demetriou  <cgd@broadcom.com>

        * gas/mips/sb1-ext-mdmx.s: New file.
        * gas/mips/sb1-ext-mdmx.d: Likewise.
        * gas/mips/mips.exp: Run new "sb1-ext-mdmx" test.
2002-05-31 18:27:03 +00:00
Alan Modra
194b521088 * Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
	* po/POTFILES.in: Regenerate.
2002-05-31 04:27:37 +00:00
Chris Demetriou
deec17343c [ gas/ChangeLog ]
2002-05-30  Chris G. Demetriou  <cgd@broadcom.com>
            Ed Satterthwaite  <ehs@broadcom.com>

	* config/tc-mips.c (mips_set_options): New "ase_mdmx" member.
	(mips_opts): Initialize "ase_mdmx" member.
	(file_ase_mdmx): New variable.
	(CPU_HAS_MDMX): New macro.
	(md_begin): Initialize mips_opts.ase_mdmx and file_ase_mdmx
	based on command line options and configuration defaults.
	(macro_build): Note in comment that use of MDMX in macros is
	not currently allowed.
	(validate_mips_insn): Add support for the "O", "Q", "X", "Y", and
	"Z" MDMX operand types.
	(mips_ip): Accept MDMX instructions if mips_opts.ase_mdmx is set,
	and add support for the "O", "Q", "X", "Y", and "Z" MDMX operand
	types.
	(OPTION_MDMX, OPTION_NO_MDMX, md_longopts, md_parse_option):
	Add support for "-mdmx" and "-no-mdmx" options.
	(OPTION_ELF_BASE): Move to accomodate new options.
	(s_mipsset): Support ".set mdmx" and ".set nomdmx".
	(mips_elf_final_processing): Set MDMX ASE ELF header flag if
	file_ase_mdmx was set.
	* doc/as.texinfo: Document -mdmx and -no-mdmx options.
	* doc/c-mips.texi: Likewise, and document ".set mdmx" and ".set
	nomdmx" directives.

[ gas/testsuite/ChangeLog ]
2002-05-30  Chris G. Demetriou  <cgd@broadcom.com>

	* gas/mips/mips64-mdmx.s: New file.
	* gas/mips/mips64-mdmx.d: Likewise.
	* gas/mips/mips.exp: Run new "mips64-mdmx" test.

[ include/opcode/ChangeLog ]
2002-05-30  Chris G. Demetriou  <cgd@broadcom.com>

	* mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL)
	(MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH)
	(MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC)
	(INSN_MDMX): New constants, for MDMX support.
	(opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX.

[ opcodes/ChangeLog ]
2002-05-30  Chris G. Demetriou  <cgd@broadcom.com>
            Ed Satterthwaite  <ehs@broadcom.com>

	* mips-dis.c (print_insn_arg): Add support for 'O', 'Q', 'X', 'Y',
	and 'Z' formats, for MDMX.
        (mips_isa_type): Add MDMX instructions to the ISA
	bit mask for bfd_mach_mipsisa64.
	* mips-opc.c: Add support for MDMX instructions.
	(MX): New definition.

	* mips-dis.c: Update copyright years to include 2002.
2002-05-31 01:17:18 +00:00
Tom Rix
c20129930b Fix for invalid conflict warning. 2002-05-30 15:25:37 +00:00
Nick Clifton
d172d4ba03 Add DLX target 2002-05-28 14:08:47 +00:00
Alan Modra
19f33eeef5 * Makefile.am (sh-dis.lo): Don't put make commands in deps.
* Makefile.in: Regenerate.
	* arc-dis.c: Use #include "" instead of <> for local header files.
	* m68k-dis.c: Likewise.
2002-05-25 12:55:19 +00:00
Nick Clifton
baf0cc5e96 Fix handling of BLX instruction to conform to Operations definition in the
ARM ARM.
2002-05-23 12:48:23 +00:00
Joern Rennecke
9ccc8931b8 * Makefile.am (sh-dis.lo): Compile with @archdefs@.
* Makefile.in: regenerate.
2002-05-22 19:18:16 +00:00
Joern Rennecke
4ee33023a0 Avoid dereferencing null pointer in:
* sh-dis.c (print_insn_sh): If coff and bfd_mach_sh, use arch_sh4
	for disassembly.
2002-05-22 18:16:45 +00:00
Joern Rennecke
426e6456c0 * sh-dis.c (print_insn_sh): If coff and bfd_mach_sh, use arch_sh4
for disassembly.
2002-05-22 13:17:27 +00:00
Thiemo Seufer
771c7ce4bc ? gas/testsuite/gas/mips/rol64.d
? gas/testsuite/gas/mips/rol64.s
Index: gas/ChangeLog
===================================================================
RCS file: /cvs/src/src/gas/ChangeLog,v
retrieving revision 1.1334
diff -u -p -r1.1334 ChangeLog
--- gas/ChangeLog	21 May 2002 20:01:51 -0000	1.1334
+++ gas/ChangeLog	21 May 2002 23:32:51 -0000
@@ -1,3 +1,8 @@
+2002-05-22  Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
+
+	* config/tc-mips.c (macro2): Add 64 bit drol, dror macros.
+	Optimize the rotate by zero case.
+
 2002-05-21  Nick Clifton  <nickc@cambridge.redhat.com>

 	* configure.in: Remove accidental enabling of bfd_gas=yes for
Index: gas/config/tc-mips.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-mips.c,v
retrieving revision 1.123
diff -u -p -r1.123 tc-mips.c
--- gas/config/tc-mips.c	14 May 2002 23:35:59 -0000	1.123
+++ gas/config/tc-mips.c	21 May 2002 23:32:52 -0000
@@ -6686,6 +6686,17 @@ macro2 (ip)
       --mips_opts.noreorder;
       break;

+    case M_DROL:
+      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsubu",
+		   "d,v,t", AT, 0, treg);
+      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsrlv",
+		   "d,t,s", AT, sreg, AT);
+      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsllv",
+		   "d,t,s", dreg, sreg, treg);
+      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
+		   "d,v,t", dreg, dreg, AT);
+      break;
+
     case M_ROL:
       macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "subu",
 		   "d,v,t", AT, 0, treg);
@@ -6697,15 +6708,55 @@ macro2 (ip)
 		   "d,v,t", dreg, dreg, AT);
       break;

+    case M_DROL_I:
+      {
+	unsigned int rot;
+	char *l, *r;
+
+	if (imm_expr.X_op != O_constant)
+	  as_bad (_("rotate count too large"));
+	rot = imm_expr.X_add_number & 0x3f;
+	if (! rot)
+	  break;
+	l = (rot < 0x20) ? "dsll" : "dsll32";
+	r = ((0x40 - rot) < 0x20) ? "dsrl" : "dsrl32";
+	rot &= 0x1f;
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, l,
+		     "d,w,<", AT, sreg, rot);
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, r,
+		     "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f);
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
+		     "d,v,t", dreg, dreg, AT);
+      }
+      break;
+
     case M_ROL_I:
-      if (imm_expr.X_op != O_constant)
-	as_bad (_("rotate count too large"));
-      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll", "d,w,<",
-		   AT, sreg, (int) (imm_expr.X_add_number & 0x1f));
-      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl", "d,w,<",
-		   dreg, sreg, (int) ((0 - imm_expr.X_add_number) & 0x1f));
-      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", "d,v,t",
-		   dreg, dreg, AT);
+      {
+	unsigned int rot;
+
+	if (imm_expr.X_op != O_constant)
+	  as_bad (_("rotate count too large"));
+	rot = imm_expr.X_add_number & 0x1f;
+	if (! rot)
+	  break;
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll",
+		     "d,w,<", AT, sreg, rot);
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl",
+		     "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f);
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
+		     "d,v,t", dreg, dreg, AT);
+      }
+      break;
+
+    case M_DROR:
+      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsubu",
+		   "d,v,t", AT, 0, treg);
+      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsllv",
+		   "d,t,s", AT, sreg, AT);
+      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsrlv",
+		   "d,t,s", dreg, sreg, treg);
+      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
+		   "d,v,t", dreg, dreg, AT);
       break;

     case M_ROR:
@@ -6719,15 +6770,44 @@ macro2 (ip)
 		   "d,v,t", dreg, dreg, AT);
       break;

+    case M_DROR_I:
+      {
+	unsigned int rot;
+	char *l, *r;
+
+	if (imm_expr.X_op != O_constant)
+	  as_bad (_("rotate count too large"));
+	rot = imm_expr.X_add_number & 0x3f;
+	if (! rot)
+	  break;
+	r = (rot < 0x20) ? "dsrl" : "dsrl32";
+	l = ((0x40 - rot) < 0x20) ? "dsll" : "dsll32";
+	rot &= 0x1f;
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, r,
+		     "d,w,<", AT, sreg, rot);
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, l,
+		     "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f);
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
+		     "d,v,t", dreg, dreg, AT);
+      }
+      break;
+
     case M_ROR_I:
-      if (imm_expr.X_op != O_constant)
-	as_bad (_("rotate count too large"));
-      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl", "d,w,<",
-		   AT, sreg, (int) (imm_expr.X_add_number & 0x1f));
-      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll", "d,w,<",
-		   dreg, sreg, (int) ((0 - imm_expr.X_add_number) & 0x1f));
-      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", "d,v,t",
-		   dreg, dreg, AT);
+      {
+	unsigned int rot;
+
+	if (imm_expr.X_op != O_constant)
+	  as_bad (_("rotate count too large"));
+	rot = imm_expr.X_add_number & 0x1f;
+	if (! rot)
+	  break;
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl",
+		     "d,w,<", AT, sreg, rot);
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll",
+		     "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f);
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
+		     "d,v,t", dreg, dreg, AT);
+      }
       break;

     case M_S_DOB:
Index: gas/testsuite/ChangeLog
===================================================================
RCS file: /cvs/src/src/gas/testsuite/ChangeLog,v
retrieving revision 1.315
diff -u -p -r1.315 ChangeLog
--- gas/testsuite/ChangeLog	20 May 2002 17:05:34 -0000	1.315
+++ gas/testsuite/ChangeLog	21 May 2002 23:32:54 -0000
@@ -1,3 +1,9 @@
+2002-05-22  Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
+
+	* gas/mips/rol64.s: New file, test of drol, dror macros.
+	* gas/mips/rol64.d: Likewise.
+	* gas/mips/mips.exp: Add new test.
+
 2002-05-20  Nick Clifton  <nickc@cambridge.redhat.com>

 	* gas/arm/arm.exp: Replace deprecated command line switches
Index: gas/testsuite/gas/mips/mips.exp
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/mips/mips.exp,v
retrieving revision 1.32
diff -u -p -r1.32 mips.exp
--- gas/testsuite/gas/mips/mips.exp	4 Apr 2002 08:23:30 -0000	1.32
+++ gas/testsuite/gas/mips/mips.exp	21 May 2002 23:32:54 -0000
@@ -122,6 +122,7 @@ if { [istarget mips*-*-*] } then {
 	run_dump_test "mul"
     }
     run_dump_test "rol"
+    run_dump_test "rol64"
     if !$aout { run_dump_test "sb" }
     run_dump_test "trunc"
     if !$aout { run_dump_test "ulh" }
Index: include/opcode/ChangeLog
===================================================================
RCS file: /cvs/src/src/include/opcode/ChangeLog,v
retrieving revision 1.167
diff -u -p -r1.167 ChangeLog
--- include/opcode/ChangeLog	17 May 2002 19:01:03 -0000	1.167
+++ include/opcode/ChangeLog	21 May 2002 23:32:57 -0000
@@ -1,3 +1,7 @@
+2002-05-22  Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
+
+	* mips.h: Add M_DROL, M_DROL_I, M_DROR, M_DROR_I macro cases.
+
 2002-05-17  Andrey Volkov  <avolkov@sources.redhat.com>

         * h8300.h: Corrected defs of all control regs
Index: include/opcode/mips.h
===================================================================
RCS file: /cvs/src/src/include/opcode/mips.h,v
retrieving revision 1.24
diff -u -p -r1.24 mips.h
--- include/opcode/mips.h	16 Mar 2002 03:09:18 -0000	1.24
+++ include/opcode/mips.h	21 May 2002 23:32:57 -0000
@@ -526,9 +526,13 @@ enum
   M_REM_3I,
   M_REMU_3,
   M_REMU_3I,
+  M_DROL,
   M_ROL,
+  M_DROL_I,
   M_ROL_I,
+  M_DROR,
   M_ROR,
+  M_DROR_I,
   M_ROR_I,
   M_S_DA,
   M_S_DOB,
Index: opcodes/ChangeLog
===================================================================
RCS file: /cvs/src/src/opcodes/ChangeLog,v
retrieving revision 1.447
diff -u -p -r1.447 ChangeLog
--- opcodes/ChangeLog	17 May 2002 14:36:45 -0000	1.447
+++ opcodes/ChangeLog	21 May 2002 23:33:00 -0000
@@ -1,3 +1,7 @@
+2002-05-22  Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
+
+	* mips-opc.c (mips_builtin_opcodes): Add drol, dror macros.
+
 Fri May 17 14:26:44 2002  J"orn Rennecke <joern.rennecke@superh.com>

 	* disassemble.c (disassembler): Just use print_insn_sh for bfd_arch_sh.
Index: opcodes/mips-opc.c
===================================================================
RCS file: /cvs/src/src/opcodes/mips-opc.c,v
retrieving revision 1.32
diff -u -p -r1.32 mips-opc.c
--- opcodes/mips-opc.c	17 Mar 2002 02:42:25 -0000	1.32
+++ opcodes/mips-opc.c	21 May 2002 23:33:00 -0000
@@ -492,6 +492,10 @@ const struct mips_opcode mips_builtin_op
 {"dremu",   "z,s,t",    0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HILO,      I3      },
 {"dremu",   "d,v,t",	3,    (int) M_DREMU_3,	INSN_MACRO,		I3	},
 {"dremu",   "d,v,I",	3,    (int) M_DREMU_3I,	INSN_MACRO,		I3	},
+{"drol",    "d,v,t",	0,    (int) M_DROL,	INSN_MACRO,		I3	},
+{"drol",    "d,v,I",	0,    (int) M_DROL_I,	INSN_MACRO,		I3	},
+{"dror",    "d,v,t",	0,    (int) M_DROR,	INSN_MACRO,		I3	},
+{"dror",    "d,v,I",	0,    (int) M_DROR_I,	INSN_MACRO,		I3	},
 {"dsllv",   "d,t,s",	0x00000014, 0xfc0007ff,	WR_d|RD_t|RD_s,		I3	},
 {"dsll32",  "d,w,<",	0x0000003c, 0xffe0003f, WR_d|RD_t,		I3	},
 {"dsll",    "d,w,s",	0x00000014, 0xfc0007ff,	WR_d|RD_t|RD_s,		I3	}, /* dsllv */
2002-05-21 23:54:48 +00:00
Joern Rennecke
1c509ca821 print_insn_sh cleanup:
include:
	* dis-asm.h (print_insn_shl, print_insn_sh64l): Remove prototype.
gdb:
	* sh-tdep.c (gdb_print_insn_sh64): Delete.
	(gdb_print_insn_sh): Just set info->endian and use print_insn_sh.
	(sh_gdbarch_init): Always use gdb_print_insn_sh.
opcodes:
	* disassemble.c (disassembler): Just use print_insn_sh for bfd_arch_sh.
	* sh-dis.c (LITTLE_BIT): Delete.
	(print_insn_sh, print_insn_shl): Deleted.
	(print_insn_shx): Renamed to
	(print_insn_sh).  No longer static.  Handle SHmedia instructions.
	Use info->endian to determine endianness.
	* sh64-dis.c (print_insn_sh64, print_insn_sh64l): Delete.
	(print_insn_sh64x): No longer static.  Renamed to
	(print_insn_sh64).  Removed pfun_compact and endian arguments.
	If we got an uneven address to indicate SHmedia, adjust it.
	Return -2 for SHcompact instructions.
sim/sh64:
	* sim-if.c (sh64_disassemble_insn): Use  print_insn_sh instead of
	print_insn_shl.
2002-05-17 14:36:46 +00:00
Alan Modra
81172ff2bd * acinclude.m4 (AM_INSTALL_LIBBFD): Fake to fool autotools.
* configure.in: Invoke AM_INSTALL_LIBBFD.
	* Makefile.am (install-data-local): Move to..
	(install_libopcodes): .. New target.
	(uninstall_libopcodes): Likewise.
	(install-bfdlibLTLIBRARIES): Likewise.
	(uninstall-bfdlibLTLIBRARIES): Likewise.
	(bfdlibdir): New.
	(bfdincludedir): New.
	(lib_LTLIBRARIES): Rename to bfdlib_LTLIBRARIES.
	* aclocal.m4: Regenerate.
	* configure: Regenerate.
	* Makefile.in: Regenerate.
2002-05-17 10:34:29 +00:00
Nick Clifton
a978a3e5d8 Regernate cgen built files. 2002-05-15 20:54:50 +00:00
Thiemo Seufer
563773fe03 * mips-dis.c (is_newabi): EABI is not a NewABI. 2002-05-14 23:34:00 +00:00
Jason Thorpe
942e7dd911 * configure.in (shle-*-*elf*): Include sh64 support.
* configure: Regenerate.
2002-05-13 15:39:44 +00:00
Jason Thorpe
d85cdfabd5 * vax-dis.c (print_insn_arg): Pass the insn info to print_insn_mode.
(print_insn_mode): Print some basic info about floating point values.
2002-05-09 23:11:30 +00:00
Alan Modra
c1a34e6066 * ppc-opc.c: Add "tlbiel" for POWER4. 2002-05-09 11:15:47 +00:00
Graydon Hoare
748f46d42a [ cgen/ChangeLog ]
2002-05-01  Graydon Hoare  <graydon@redhat.com>

	* desc-cpu.scm (@arch@_cgen_cpu_close): Fix memory leaks.

[ opcodes/ChangeLog ]

2002-05-07  Graydon Hoare  <graydon@redhat.com>

	* cgen-dis.in: (print_insn_@arch@): Cache list of opened CPUs rather
	than just most-recently-opened.
2002-05-08 20:47:07 +00:00
Alan Modra
7d4a12d20f * ppc-opc.c: Add "tlbsx." and "tlbsxe." for booke. 2002-05-01 01:22:00 +00:00
Nick Clifton
3c25c5f6e8 The patch contains mostly fixes for the disassembler. It also fixes
a crash of the assembler with some malformed source input.
Long segmented addresses are now correctly relocated.
Finally it updates my email address in the MAINTAINERS file.
2002-04-25 10:59:24 +00:00
Nick Clifton
c6ed57bdd2 Add Indonesian translation 2002-04-24 09:01:51 +00:00
Matthew Green
eb0fdfed10 * gas/ppc/altivec.d: Fix dssall test.
* gas/ppc/altivec.s: Likewise.
	* gas/ppc/altivec_xcoff.d: Likewise.
	* gas/ppc/altivec_xcoff.s: Likewise.
	* gas/ppc/altivec_xcoff64.d: Likewise.
	* gas/ppc/altivec_xcoff64.s: Likewise.

	* ppc-opc.c (powerpc_opcode): Fix dssall operand list.
2002-04-17 14:43:28 +00:00
Matthew Green
0565ba9601 fix a typo in my name 2002-04-07 13:56:38 +00:00
Alan Modra
82674a1fec * dep-in.sed: Cope with absolute paths.
* Makefile.am (dep.sed): Subst TOPDIR.
	Run "make dep-am".
	* Makefile.in: Regenerate.
	* ppc-opc.c: Whitespace.
	* s390-dis.c: Fix copyright date.
2002-04-04 14:05:44 +00:00
Matthew Green
294b41b344 * ppc-opc.c (vmaddfp): Fix operand order. 2002-03-23 14:14:30 +00:00
Alan Modra
71b2105039 * Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
2002-03-21 09:23:41 +00:00
Alan Modra
5ae2e65e90 * ppc-opc.c: Add optional field to mtmsrd.
(MTMSRD_L, XRLARB_MASK): Define.
2002-03-21 09:01:49 +00:00
Jan Hubicka
c1a64871f9 * i386-dis.c (prefix_name): Fix handling of 32bit address prefix
in 64bit mode.
	(print_insn) Likewise.
	(putop): Fix handling of 'E'
	(OP_E, OP_OFF): handle 32bit addressing mode in 64bit.
	(ptr_reg): Likewise.
2002-03-18 20:11:49 +00:00
Nick Clifton
a1c259a138 Updated French translations 2002-03-18 09:44:22 +00:00
Chris Demetriou
444269101d 2002-03-16 Chris Demetriou <cgd@broadcom.com>
* mips-opc.c (M3D): Tweak comment.
        (mips_builtin_op): Add comment indicating that opcodes of the
        same name must be placed together in the table, and sort
        the "recip.fmt", "recip1.fmt", "recip2.fmt", "rsqrt.fmt",
        "rsqrt1.fmt", and "rsqrt2.fmt" opcodes by name.
2002-03-17 02:42:25 +00:00
Nick Clifton
43079f18a8 Tidy up sh64 rules 2002-03-16 08:55:53 +00:00
Chris Demetriou
82f6ea4af0 2002-03-15 Chris G. Demetriou <cgd@broadcom.com>
* mips-dis.c: Update copyright years.
2002-03-16 03:12:07 +00:00
Chris Demetriou
1f25f5d300 [ gas/ChangeLog ]
2002-03-15  Chris G. Demetriou  <cgd@broadcom.com>

	* config/tc-mips.c (mips_set_options): New "ase_mips3d" member.
	(mips_opts): Initialize "ase_mips3d" member.
	(file_ase_mips3d): New variable.
	(CPU_HAS_MIPS3D): New macro.
	(md_begin): Initialize mips_opts.ase_mips3d and file_ase_mips3d
	based on command line options and configuration defaults.
	(macro_build, mips_ip): Accept MIPS-3D instructions if
	mips_opts.ase_mips3d is set.
	(OPTION_MIPS3D, OPTION_NO_MIPS3D, md_longopts, md_parse_option):
	Add support for "-mips3d" and "-no-mips3d" options.
	(OPTION_ELF_BASE): Move to accomodate new options.
	(s_mipsset): Support ".set mips3d" and ".set nomips3d".
	(mips_elf_final_processing): Add a comment indicating that a
	MIPS-3D ASE ELF header flag should be set, when one exists.
	* doc/as.texinfo: Document -mips3d and -no-mips3d options.
	* doc/c-mips.texi: Likewise, and document ".set mips3d" and ".set
	nomips3d" directives.

[ gas/testsuite/ChangeLog ]
2002-03-15  Chris G. Demetriou  <cgd@broadcom.com>

	* gas/mips/mips64-mips3d.s: New file.
	* gas/mips/mips64-mips3d.d: Likewise.
	* gas/mips/mips.exp: Run new "mips64-mips3d" test.

[ include/opcode/ChangeLog ]
2002-03-15  Chris G. Demetriou  <cgd@broadcom.com>

	* mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D
	instructions.
	(OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks
	may be passed along with the ISA bitmask.

[ opcodes/ChangeLog ]
2002-03-15  Chris G. Demetriou  <cgd@broadcom.com>

	* mips-dis.c (mips_isa_type): Add MIPS3D instructions to the ISA
	bit masks for bfd_mach_mips_sb1 and bfd_mach_mipsisa64.  Add
	comments for bfd_mach_mipsisa32 and bfd_mach_mipsisa64 that
	indicate that they should dissassemble all applicable
	MIPS-specified ASEs.
	* mips-opc.c: Add support for MIPS-3D instructions.
	(M3D): New definition.

	* mips-opc.c: Update copyright years.
2002-03-16 03:09:19 +00:00
Chris Demetriou
ff8a5556c4 2002-03-15 Chris G. Demetriou <cgd@broadcom.com>
* mips-opc.c (mips_builtin_opcodes): Sort bc<N> opcodes by name.
2002-03-16 02:53:52 +00:00
Chris Demetriou
4c563ebfce 2002-03-15 Chris Demetriou <cgd@broadcom.com>
* mips-dis.c (is_newabi): Fix ABI decoding.
2002-03-15 17:32:05 +00:00
Chris Demetriou
eb7b56d007 2002-03-14 Chris G. Demetriou <cgd@broadcom.com>
* mips-dis.c (mips_isa_type): Fix formatting of bfd_mach_mipsisa32
        and bfd_mach_mipsisa64 cases to match the rest.
2002-03-15 06:01:08 +00:00
Nick Clifton
9ce88e60f3 Updated French translations 2002-03-13 10:35:17 +00:00
Alan Modra
98acc1c518 * ppc-opc.c: Add optional `L' field to tlbie.
(XRTLRA_MASK): Define.
2002-03-13 08:34:04 +00:00
Chris Demetriou
aa0842299a 2002-03-06 Chris Demetriou <cgd@broadcom.com>
* mips-opc.c (mips_builtin_opcodes): Mark "pref" as being
        present on I4.

        * mips-opc.c (mips_builtin_opcodes): Add "movn.ps" and "movz.ps".
2002-03-06 20:31:14 +00:00
Alan Modra
84dd1cffbf * pdp11-opc.c: Fix "mark" operand type. Fix operand types
for float opcodes that take float operands.  Add alternate
	names (xxxD vs. xxxF) for float opcodes.
	* pdp11-dis.c (print_operand): Clean up formatting for mode 67.
	(print_foperand): New function to handle float opcode operands.
	(print_insn_pdp11): Use print_foperand to disassemble float ops.
2002-03-05 03:09:53 +00:00
Nick Clifton
ef412327e6 Update translation files. 2002-02-27 16:37:48 +00:00
Nick Clifton
263de0103e Export dis-asm.h as part of an install 2002-02-26 22:09:26 +00:00
Nick Clifton
fe41178f92 Import new Spanish and German translations 2002-02-26 10:28:13 +00:00
Alan Modra
94efba1253 * ppc-dis.c (powerpc_dialect): Handle power4 option.
* ppc-opc.c (insert_bdm): Correct description of "at" branch
	hints.  Test PPC_OPCODE_POWER4 to determine branch hint flavour.
	(extract_bdm, insert_bdp, extract_bdp, valid_bo): Likewise.
	(BOFM64, BOFP64, BOTM64, BOFP64): Rename to BOFM4, BOFP4 etc.
	(BODNZM64, BODNZP64, BODZM64, BODZP64): Likewise.
	(PPCCOM32, PPCCOM64): Delete.
	(NOPOWER4, POWER4): Define.
	(powerpc_opcodes): Replace occurences of PPCCOM32 with NOPOWER4,
	and PPCCOM4 with POWER4 so that "at" style branch hint opcodes
	are enabled for power4 rather than ppc64.
2002-02-25 03:43:46 +00:00
Tom Rix
ff3a6ee3fd XCOFF booke tests. Fix tlbre, tlbwe ppc WS field. 2002-02-21 03:57:36 +00:00
Martin Schwidefsky
45b38a80ad 2002-02-19 Martin Schwidefsky <schwidefsky@de.ibm.com>
* s390-dis.c (init_disasm): Use renamed architecture defines.
2002-02-19 18:59:49 +00:00
Matthew Green
9a0ccb2478 * ppc-opc.c (powerpc_dialect): Fix comment; BookE is not Motorola
specific.
2002-02-19 15:20:26 +00:00
Nick Clifton
6ad738c5d9 Updated translations 2002-02-18 08:40:03 +00:00
Richard Henderson
8bf7d691eb * alpha-opc.c (alpha_opcodes): Fix thinko in ret pseudo
disassembly mask.
2002-02-15 21:00:45 +00:00
Richard Henderson
fa024f00d2 * alpha-opc.c (alpha_opcodes): Add simple pseudos for
lda, ldah, jmp, ret.
2002-02-15 09:43:16 +00:00
Nick Clifton
9694d6b2ea Updated translation 2002-02-14 15:06:41 +00:00
Graydon Hoare
d7de8249f0 [ opcodes/ChangeLog ]
2002-02-12  Graydon Hoare  <graydon@redhat.com>

	* cgen-asm.in (parse_insn_normal): Change call from
	@arch@_cgen_parse_operand to cd->parse_operand, to
	facilitate CGEN_ASM_INIT_HOOK doing useful work.
2002-02-12 14:51:54 +00:00
Alexandre Oliva
56930d376b * sparc-dis.c (print_insn_sparc): Make sure 0xFFFFFFFF is not
sign-extended.
2002-02-11 13:24:51 +00:00
Alan Modra
2c73f9d861 * Makefile.am: "make dep-am".
* Makefile.in: Regenerate.
	* aclocal.m4: Regenerate.
	* config.in: Regenerate.
	* configure: Regenerate.
2002-02-11 05:05:09 +00:00
Hans-Peter Nilsson
ca0f2ed6f8 * configure.in <bfd_sh_arc>: For sh-* and shl-*, enable sh64
support only for sh-*-*elf*, shl-*-*elf*, sh-*-linux* and
	shl-*-linux*.
	* configure: Regenerate.
2002-02-10 20:40:56 +00:00
Daniel Jacobowitz
34b0f91d24 2002-02-10 Daniel Jacobowitz <drow@mvista.com>
* cgen-dis.c: Add prototypes for count_decodable_bits
	and add_insn_to_hash_chain.
2002-02-10 19:03:14 +00:00
Alexandre Oliva
e8b872bb02 * configure.in <bfd_sh_arc>: Enable sh64 support on sh-*.
* configure: Rebuilt.
2002-02-09 03:25:25 +00:00
Nick Clifton
5e37cc4676 Fix compile time warning messages 2002-02-08 12:12:15 +00:00
Alexandre Oliva
d28847ce8e Contribute sh64-elf.
2001-10-08  Nick Clifton  <nickc@cambridge.redhat.com>
* sh64-opc.c: Regenerate.
2001-03-13  DJ Delorie  <dj@redhat.com>
* sh64-opc.h: Rename A_RESV_Fx to A_REUSE_PREV so that its
purpose is more obvious.
* sh64-opc.c (shmedia_table): Ditto.
* sh64-dis.c (initialize_shmedia_opcode_mask_table): Ditto.
(print_insn_shmedia): Ditto.
2001-03-12  DJ Delorie  <dj@redhat.com>
* sh64-opc.c: Adjust comments to reflect reality: replace bits
3:0 with zeros (not "reserved"), replace "rrrrrr" with
"gggggg" for two-operand floating point opcodes.  Remove
"fsina".
2001-01-08  Hans-Peter Nilsson  <hpn@cygnus.com>
* sh64-dis.c (print_insn_shmedia) <failing read_memory_func>:
Correct printing of .byte:s.  Return number of printed bytes or
-1; never 0.
(print_insn_sh64x) <not CRT_SH5_ISA16>: Ditto.  Print as .byte:s
to next four-byte-alignment if insn or data is not aligned.
2001-01-06  Hans-Peter Nilsson  <hpn@cygnus.com>
* sh64-dis.c: Update comments and fix comment formatting.
(initialize_shmedia_opcode_mask_table) <case A_IMMM>:
Abort instead of setting length to 0.
(crange_qsort_cmpb, crange_qsort_cmpl, crange_bsearch_cmpb,
crange_bsearch_cmpl, sh64_get_contents_type,
sh64_address_in_cranges): Move to bfd/elf32-sh64.c.
2001-01-05  Hans-Peter Nilsson  <hpn@cygnus.com>
* sh64-opc.c: Remove #if 0:d entries for instructions not found in
SH-5/ST50-023-04: fcosa.s, fsrra.s and prefo.
2000-12-30  Hans-Peter Nilsson  <hpn@cygnus.com>
* sh64-dis.c (print_insn_shmedia): Display MOVI/SHORI-formed
address with same prefix as SHcompact.
In the disassembler, use a .cranges section for linked executables.
* sh64-dis.c (SAVED_MOVI_R, SAVED_MOVI_IMM): Move to head of file
and update for using structure in info->private_data.
(struct sh64_disassemble_info): New.
(is_shmedia_p): Delete.
(crange_qsort_cmpb): New function.
(crange_qsort_cmpl, crange_bsearch_cmpb): New functions.
(crange_bsearch_cmpl, sh64_address_in_cranges): New functions.
(init_sh64_disasm_info, sh64_get_contents_type_disasm): New functions.
(sh64_get_contents_type, sh64_address_is_shmedia): New functions.
(print_insn_shmedia): Correct displaying of address after MOVI/SHORI
pair.  Display addresses for linked executables only.
(print_insn_sh64x_media): Initialize info->private_data by calling
init_sh64_disasm_info.
(print_insn_sh64x): Ditto.  Find out type of contents by calling
sh64_contents_type_disasm.  Display data regions using ".long" and
".byte" similar to unrecognized opcodes.
2000-12-19  Hans-Peter Nilsson  <hpn@cygnus.com>
* sh64-dis.c (is_shmedia_p): Check info->section and look for ISA
information in section flags before considering symbols.  Don't
assume an info->mach setting of bfd_mach_sh5 means SHmedia code.
* configure.in (bfd_sh_arch): Check presence of sh64 insns by
matching $target $canon_targets instead of looking at the
now-removed -DINCLUDE_SHMEDIA in $targ_cflags.
* configure: Regenerate.
2000-11-25  Hans-Peter Nilsson  <hpn@cygnus.com>
* sh64-opc.c (shmedia_creg_table): New.
* sh64-opc.h (shmedia_creg_info): New type.
(shmedia_creg_table): Declare.
* sh64-dis.c (creg_name): New function.
(print_insn_shmedia): Use it.
* disassemble.c (disassembler) [ARCH_sh, INCLUDE_SHMEDIA]: Map
bfd_mach_sh5 to print_insn_sh64 if big-endian and to
print_insn_sh64l if little-endian.
* sh64-dis.c (print_insn_shmedia): Make r unsigned.
(print_insn_sh64l): New.
(print_insn_sh64x): New.
(print_insn_sh64x_media): New.
(print_insn_sh64): Break out code to print_insn_sh64x and
print_insn_sh64x_media.
2000-11-24  Hans-Peter Nilsson  <hpn@cygnus.com>
* sh64-opc.h: New file
* sh64-opc.c: New file
* sh64-dis.c: New file
* Makefile.am: Add sh64 targets.
(HFILES): Add sh64-opc.h.
(CFILES): Add sh64-opc.c and sh64-dis.c.
(ALL_MACHINES): Add sh64 files.
* Makefile.in: Regenerate.
* configure.in: Add support for sh64 to bfd_sh_arch.
* configure: Regenerate.
* disassemble.c [ARCH_all] (INCLUDE_SHMEDIA): Define.
(disassembler) [ARCH_sh, INCLUDE_SHMEDIA]: Map bfd_mach_sh5 to
print_insn_sh64.
* sh-dis.c (print_insn_shx): Handle bfd_mach_sh5 as arch_sh4.
* po/POTFILES.in: Regenerate.
* po/opcodes.pot: Regenerate.
2002-02-08 05:51:04 +00:00
Frank Ch. Eigler
cadaa5224a * opcodes disassembler extension
[includes]
2002-02-04  Frank Ch. Eigler  <fche@redhat.com>

	* dis-asm.h (disassemble_info): New field `insn_sets'.
	(INIT_DISASSEMBLE_INFO): Clear it.

[opcodes]
2002-02-04  Frank Ch. Eigler  <fche@redhat.com>

	* cgen-dis.in (print_insn_@arch@): Support disassemble_info.insn_sets.
2002-02-05 19:40:45 +00:00
Alexandre Oliva
0b3301c329 * sh-opc.h (sh_arg_type): Added A_DISP_PC_ABS. 2002-02-04 12:29:01 +00:00
Alan Modra
ba323545dd Run "make dep-am" 2002-02-01 03:26:35 +00:00
Nick Clifton
3b16e843f2 Add support for OpenRISC 32-bit embedded processor 2002-01-31 17:33:08 +00:00
Daniel Jacobowitz
4867be4168 2002-01-27 Daniel Jacobowitz <drow@mvista.com>
From Steve Ellcey <sje@cup.hp.com>:
        * libtool.m4 (HPUX_IA64_MODE): Set to 32 or 64 based on ABI.
        (lt_cv_deplibs_check_method, lt_cv_file_magic_cmd,
        lt_cv_file_magic_test_file): Set to appropriate values for HP-UX
        IA64.
        * ltcf-c.sh (archive_cmds, hardcode_*): Ditto.
        * ltconfig (shlibpath_*, dynamic_linker, library_names_spec,
        soname_spec, sys_lib_search_path_spec): Ditto.


Various configure scripts regenerated.
2002-01-28 04:59:39 +00:00
Nick Clifton
fdfd5c7a35 Updated French version 2002-01-26 08:52:51 +00:00
Nick Clifton
1ddbd15255 Updated Spanish translation 2002-01-25 14:25:03 +00:00
Alan Modra
c46f0c34a6 Missing ChangeLog entries for 2002-01-22 Makefile updates 2002-01-25 12:01:12 +00:00
Nick Clifton
0e5aca4e54 New Danish translation file. 2002-01-24 15:20:00 +00:00
Nick Clifton
d0de30261d Add Danish translation 2002-01-23 11:48:53 +00:00
Graydon Hoare
9a2e995d8a [ include/opcode/ChangeLog ]
2002-01-22  Graydon Hoare  <graydon@redhat.com>

	* cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure.
	(CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field.

[ opcodes/ChangeLog ]

2002-01-22  Graydon Hoare  <graydon@redhat.com>

	* fr30-asm.c: Regenerate.
	* fr30-desc.c: Likewise.
	* fr30-desc.h: Likewise.
	* fr30-dis.c: Likewise.
	* fr30-ibld.c: Likewise.
	* fr30-opc.c: Likewise.
	* fr30-opc.h: Likewise.
	* m32r-asm.c: Likewise.
	* m32r-desc.c: Likewise.
	* m32r-desc.h: Likewise.
	* m32r-dis.c: Likewise.
	* m32r-ibld.c: Likewise.
	* m32r-opc.c: Likewise.
	* m32r-opc.h: Likewise.
	* m32r-opinst.c: Likewise.
	* openrisc-asm.c: Likewise.
	* openrisc-desc.c: Likewise.
	* openrisc-desc.h: Likewise.
	* openrisc-dis.c: Likewise.
	* openrisc-ibld.c: Likewise.
	* openrisc-opc.c: Likewise.
	* openrisc-opc.h: Likewise.
	* xstormy16-desc.c: Likewise.

[ cgen/ChangeLog ]

2002-01-22  Graydon Hoare  <graydon@redhat.com>

	* desc-cpu.scm (ifld-number-cache): Add.
	(ifld-number): Add.
	(gen-maybe-multi-ifld-of-op): Add.
	(gen-maybe-multi-ifld): Add.
	(gen-multi-ifield-nodes): Add.
	(cgen-desc.c): Add call to gen-multi-ifield-nodes.
2002-01-22 21:45:36 +00:00
Richard Henderson
98c0272052 * alpha-dis.c (print_insn_alpha): Also mask the base opcode for
comparison.
2002-01-22 09:44:09 +00:00
Alan Modra
c0ef99a773 run "make dep-am"; automake
regenerate po/POTFILES.in
2002-01-22 08:58:00 +00:00
Richard Earnshaw
a2fc1b1f19 * arm-opc.h (arm_opcodes): Use generic rule %5?hb instead of %h.
* arm-dis.c (print_insn_arm): Don't handle 'h' case.
2002-01-19 12:27:24 +00:00
Richard Earnshaw
395213c846 2002-01-18 Keith Walker <keith.walker@arm.com>
* arm-opc.h (arm_opcodes): Add bxj instruction.
2002-01-18 17:33:49 +00:00
Nick Clifton
328577adeb Regenerate .pot and .po files 2002-01-17 14:12:08 +00:00
Nick Clifton
af3ae48ddd Import new Turkish translations. 2002-01-16 10:17:48 +00:00
Richard Earnshaw
a660f11eb1 * arm-opc.h (arm_opcodes): Add patterns for VFP instructions.
* arm-dis.c (print_insn_arm): Support new disassembly qualifiers for
VFP bitfields.
2002-01-15 15:41:23 +00:00
Matthew Green
1951c6f7f8 [cgen/ChangeLog]
* cpu/xstormy16.cpu (gr-Rbj-names): Rename this ...
	(gr-Rb-names): ... to this.
	(h-Rb): New hardware peice.
	(h-Rbj): Use gr-Rb-names.
	(Rb): Use h-Rb.

	(holdx): New instruction.

[opcodes/ChangeLog]
	* xstormy16-asm.c: Regenerate.
	* xstormy16-desc.c: Likewise.
	* xstormy16-desc.h: Likewise.
	* xstormy16-dis.c: Likewise.
	* xstormy16-opc.c: Likewise.
	* xstormy16-opc.h: Likewise.

[gas/testsuite/ChangeLog]
	* gas/xstormy16/allinsn.sh (movf, jmp, call, icall): Update.
	* gas/xstormy16/allinsn.d: Regenerate.
	* gas/xstormy16/allinsn.s: Regenerate.

[sid/component/cgen-cpu/xstormy16/ChangeLog]
	* xstormy16.cxx (do_holdx): Define.
	* xstormy16.h (do_holdx): Declare.
2002-01-11 07:24:59 +00:00
Nick Clifton
be2d1673e4 Add spanish translation files 2002-01-07 17:37:59 +00:00
Jeff Law
8ef42b2959 * hppa-dis.c (print_insn_hppa): Handle new 'c' mode completers,
'X', 'M', and 'A'.  No longer emit a space after 'x' or 's'.
        Always emit a space after 'H'.
2001-12-31 23:44:08 +00:00
Matthew Green
1cbbfaf9a2 * ppc-opc.c (PPCVEC): Include PPC_OPCODE_ANY. 2001-12-18 14:07:03 +00:00
Richard Henderson
c2274b2767 * alpha-opc.c (unop): Encode with RB as $sp. 2001-12-18 00:23:00 +00:00
Geoffrey Keating
93fbbb04b8 Index: bfd/ChangeLog
2001-12-07  Geoffrey Keating  <geoffk@redhat.com>
	    Richard Henderson  <rth@redhat.com>
	    Corinna Vinschen  <vinschen@redhat.com>

	* Makefile.am: Add support for xstormy16.
	* archures.c: Add support for xstormy16.
	* config.bfd: Add support for xstormy16.
	* configure.in: Add support for xstormy16.
	* reloc.c: Add support for xstormy16.
	* targets.c: Add support for xstormy16.
	* cpu-xstormy16.c: New file.
	* elf32-xstormy16.c: New file.
	* Makefile.in: Regenerated.
	* bfd-in2.h: Regenerated.
	* configure: Regenerated.
	* libbfd.h: Regenerated.

Index: binutils/ChangeLog
2001-12-07  Geoffrey Keating  <geoffk@redhat.com>

	* readelf.c (guess_is_rela): Add support for stormy16.
	(dump_relocations): Likewise.
	(get_machine_name): Likewise.

Index: gas/ChangeLog
2001-12-07  Geoffrey Keating  <geoffk@redhat.com>
	    Richard Henderson  <rth@redhat.com>

	* configure.in: Add support for xstormy16.
	* configure: Regenerated.
	* Makefile.am: Add support for xstormy16.
	* Makefile.in: Regenerated.
	* config/tc-xstormy16.c: New file.
	* config/tc-xstormy16.h: New file.

Index: gas/testsuite/ChangeLog
2001-12-07  Geoffrey Keating  <geoffk@redhat.com>
	    matthew green  <mrg@redhat.com>

	* gas/xstormy16/allinsn.d: New file.
	* gas/xstormy16/allinsn.exp: New file.
	* gas/xstormy16/allinsn.s: New file.
	* gas/xstormy16/allinsn.sh: New file.
	* gas/xstormy16/gcc.d: New file.
	* gas/xstormy16/gcc.s: New file.
	* gas/xstormy16/gcc.sh: New file.
	* gas/xstormy16/reloc-1.d: New file.
	* gas/xstormy16/reloc-1.s: New file.
	* gas/xstormy16/reloc-2.d: New file.
	* gas/xstormy16/reloc-2.s: New file.

Index: ld/ChangeLog
2001-12-07  Geoffrey Keating  <geoffk@redhat.com>
	    Richard Henderson  <rth@redhat.com>

	* Makefile.am: Add support for xstormy16.
	* configure.tgt: Add support for xstormy16.
	* Makefile.in: Regenerate.
	* emulparams/elf32xstormy16.sh: New file.
	* scripttempl/xstormy16.sc: New file.

Index: opcodes/ChangeLog
2001-12-07  Geoffrey Keating  <geoffk@redhat.com>

	* Makefile.am: Add support for xstormy16.
	* Makefile.in: Regenerate.
	* configure.in: Add support for xstormy16.
	* configure: Regenerate.
	* disassemble.c: Add support for xstormy16.
	* xstormy16-asm.c: New generated file.
	* xstormy16-desc.c: New generated file.
	* xstormy16-desc.h: New generated file.
	* xstormy16-dis.c: New generated file.
	* xstormy16-ibld.c: New generated file.
	* xstormy16-opc.c: New generated file.
	* xstormy16-opc.h: New generated file.

Index: include/ChangeLog
2001-12-07  Geoffrey Keating  <geoffk@redhat.com>

	* dis-asm.h (print_insn_xstormy16): Declare.

Index: include/elf/ChangeLog
2001-12-07  Geoffrey Keating  <geoffk@redhat.com>
	    Richard Henderson  <rth@redhat.com>

	* common.h (EM_XSTORMY16): Define.
	* xstormy16.h: New file.
2001-12-08 03:46:03 +00:00
Richard Henderson
3793abc306 * alpha-opc.c (alpha_opcodes): Add wh64en. 2001-12-06 18:29:22 +00:00
Alexandre Oliva
96f27b6cb5 * d10v-opc.c (d10v_predefined_registers): Remove warnings
introduced in Nov 29's patch.
2001-12-04 12:31:26 +00:00
Alexandre Oliva
373efcb309 * d10v-dis.c (print_operand): Apply REGISTER_MASK to `num' of
unmatched register.
2001-12-04 12:30:55 +00:00
Alexandre Oliva
d126725049 * d10v-dis.c (print_operand): Disregard OPERAND_SP in register
predefined value.
2001-12-04 10:08:19 +00:00
Alexandre Oliva
41852a32f7 * d10v-opc.c (RSRC_NOSP): New macro.
(d10v_operands): Add it.
(d10v_opcodes): Use RSRC_NOSP in post-decrement "st" and "st2w".
2001-12-04 10:06:50 +00:00
Alexandre Oliva
bf9043c5c7 Copyright 2001 2001-11-29 18:08:13 +00:00
Alexandre Oliva
e21c4a1c1b * d10v-opc.c (d10v_predefined_registers): Mark `sp' as OPERAND_SP.
(RSRC_SP): New macro.
(d10v_operands): Add it.
(d10v_opcodes): Adjust "st" and "st2w" to use RSRC_SP.
2001-11-29 18:04:00 +00:00
Nick Clifton
607334a109 Add .cvsignore files to skip .gmo files 2001-11-28 18:57:14 +00:00
Alan Modra
c6843df52b * pdp11-dis.c (print_insn_pdp11): Handle illegal instructions.
Also, break out of the loop as soon as an instruction has been
	printed.
2001-11-23 07:09:48 +00:00
Matthew Green
473d3293c6 * ppc-opc.c (mfvrsave, mtvrsave): New instructions. 2001-11-17 22:34:17 +00:00
Alan Modra
c86380b586 * po/POTFILES.in: Regenerate. 2001-11-15 12:27:07 +00:00
Alan Modra
802a735ed9 binutils/ChangeLog
* doc/binutils.texi (objdump): Document ppc -M options.
gas/ChangeLog
	* config/tc-ppc.c (ppc_insert_operand): Pass (ppc_cpu | ppc_size)
	to operand->insert.
	(md_assemble): Likewise.
gas/testsuite/ChangeLog
	* gas/ppc/booke.d: Modify reloc and target matches for powerpc64.
include/opcode/ChangeLog
	* ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
opcodes/ChangeLog
	* ppc-opc.c (PPC64): Revert 2001-10-12. Do include PPC_OPCODE_PPC.
	(insert_bat, extract_bat, insert_bba, extract_bba,
	insert_bd, extract_bd, insert_bdm, extract_bdm,
	insert_bdp, extract_bdp, valid_bo,
	insert_bo, extract_bo, insert_boe, extract_boe,
	insert_ds, extract_ds, insert_de, extract_de,
	insert_des, extract_des, insert_li, extract_li,
	insert_mbe, extract_mbe, insert_mb6, extract_mb6,
	insert_nb, extract_nb, insert_nsi, extract_nsi,
	insert_ral, insert_ram, insert_ras,
	insert_rbs, extract_rbs, insert_sh6, extract_sh6,
	insert_spr, extract_spr, insert_tbr, extract_tbr): Add dialect param.
	(extract_bd, extract_bdm, extract_bdp,
	extract_ds, extract_des,
	extract_li, extract_nsi): Implement sign extension without conditional.
	(insert_bdm, extract_bdm,
	insert_bdp, extract_bdp, valid_bo): Handle 64 bit branch hints.
	(extract_bdm, extract_bdp): Correct 32 bit validation.
	(AT1_MASK, AT2_MASK): Define.
	(BBOAT_MASK): Define.
	(BBOATCB_MASK, BBOAT2CB_MASK, BBOATBI_MASK): Define.
	(BOFM64, BOFP64, BOTM64, BOTP64): Define.
	(BODNZM64, BODNZP64, BODZM64, BODZP64): Define.
	(PPCCOM32, PPCCOM64): Define.
	(powerpc_opcodes): Modify existing 32 bit insns with branch hints
	and add new patterns to implement 64 bit branches with hints.  Move
	booke instructions so they match before ppc64.
	* ppc-dis.c (powerpc_dialect): Set PPC_OPCODE_64 in dialect for
	64 bit default targets, and parse "32" and "64" in options.
	Formatting fixes.
	(print_insn_powerpc): Pass dialect to operand->extract.
2001-11-15 01:08:53 +00:00
Dave Brolley
1c00926451 2001-11-14 Dave Brolley <brolley@redhat.com>
* cgen-dis.c (count_decodable_bits): New function.
	(add_insn_to_hash_chain): New function.
	(hash_insn_array): Call add_insn_to_hash_chain.
	(hash_insn_list): Call add_insn_to_hash_chain.
2001-11-14 20:07:27 +00:00