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* a29k-dis.c: Replace CONST with const.

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* h8300-dis.c: Likewise.
	* m68k-dis.c: Likewise.
	* or32-dis.c: Likewise.
	* sparc-dis.c: Likewise.
This commit is contained in:
Alan Modra 2002-06-08 07:29:27 +00:00
parent 3f9c735ef4
commit 56da5fedc7
6 changed files with 24 additions and 15 deletions
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10
opcodes/ChangeLog
View file

@ -1,3 +1,11 @@
2002-06-08 Alan Modra <amodra@bigpond.net.au>
* a29k-dis.c: Replace CONST with const.
* h8300-dis.c: Likewise.
* m68k-dis.c: Likewise.
* or32-dis.c: Likewise.
* sparc-dis.c: Likewise.
2002-06-04 Jason Thorpe <thorpej@wasabisystems.com>
* configure.in: Add "sh5*-*" to list of targets which include
@ -301,7 +309,7 @@ Mon Mar 18 21:10:43 CET 2002 Jan Hubicka <jh@suse.cz>
2002-02-20 Tom Rix <trix@redhat.com>
* ppc-opc.c (powerpc_operands): Add WS feild. Use for tlbre, tlbwe.
* ppc-opc.c (powerpc_operands): Add WS field. Use for tlbre, tlbwe.
2002-02-19 Martin Schwidefsky <schwidefsky@de.ibm.com>

4
opcodes/a29k-dis.c
View file

@ -1,5 +1,5 @@
/* Instruction printing code for the AMD 29000
Copyright 1990, 1993, 1994, 1995, 1998, 2000, 2001
Copyright 1990, 1993, 1994, 1995, 1998, 2000, 2001, 2002
Free Software Foundation, Inc.
Contributed by Cygnus Support. Written by Jim Kingdon.
@ -153,7 +153,7 @@ print_insn (memaddr, info)
find_byte_func_type find_byte_func = (find_byte_func_type)info->private_data;
struct a29k_opcode CONST * opcode;
struct a29k_opcode const * opcode;
{
int status =

11
opcodes/h8300-dis.c
View file

@ -1,5 +1,6 @@
/* Disassemble h8300 instructions.
Copyright 1993, 1994, 1996, 1998, 2000, 2001 Free Software Foundation, Inc.
Copyright 1993, 1994, 1996, 1998, 2000, 2001, 2002
Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
@ -69,17 +70,17 @@ bfd_h8_disassemble (addr, info, mode)
int mode;
{
/* Find the first entry in the table for this opcode. */
static CONST char *regnames[] =
static const char *regnames[] =
{
"r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
"r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l"
};
static CONST char *wregnames[] =
static const char *wregnames[] =
{
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
"e0", "e1", "e2", "e3", "e4", "e5", "e6", "e7"
};
static CONST char *lregnames[] =
static const char *lregnames[] =
{
"er0", "er1", "er2", "er3", "er4", "er5", "er6", "er7",
"er0", "er1", "er2", "er3", "er4", "er5", "er6", "er7"
@ -92,7 +93,7 @@ bfd_h8_disassemble (addr, info, mode)
int plen = 0;
static boolean init = 0;
struct h8_opcode *q;
char CONST **pregnames = mode != 0 ? lregnames : wregnames;
char const **pregnames = mode != 0 ? lregnames : wregnames;
int status;
int l;
unsigned char data[20];

4
opcodes/m68k-dis.c
View file

@ -46,7 +46,7 @@ static int
print_insn_arg PARAMS ((const char *, unsigned char *, unsigned char *,
bfd_vma, disassemble_info *));
CONST char * CONST fpcr_names[] = {
const char * const fpcr_names[] = {
"", "%fpiar", "%fpsr", "%fpiar/%fpsr", "%fpcr",
"%fpiar/%fpcr", "%fpsr/%fpcr", "%fpiar/%fpsr/%fpcr"
};
@ -478,7 +478,7 @@ print_insn_arg (d, buffer, p0, addr, info)
register int place = d[1];
register unsigned char *p = p0;
int regno;
register CONST char *regname;
register const char *regname;
register unsigned char *p1;
double flval;
int flt_p;

2
opcodes/or32-dis.c
View file

@ -261,7 +261,7 @@ print_insn (memaddr, info)
/* The four bytes of the instruction. */
unsigned long insn;
find_byte_func_type find_byte_func = (find_byte_func_type)info->private_data;
struct or32_opcode CONST * opcode;
struct or32_opcode const * opcode;
{
int status =

8
opcodes/sparc-dis.c
View file

@ -1,6 +1,6 @@
/* Print SPARC instructions.
Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
2000 Free Software Foundation, Inc.
2000, 2002 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
@ -188,7 +188,7 @@ is_delayed_branch (insn)
for (op = opcode_hash_table[HASH_INSN (insn)]; op; op = op->next)
{
CONST struct sparc_opcode *opcode = op->opcode;
const struct sparc_opcode *opcode = op->opcode;
if ((opcode->match & insn) == opcode->match
&& (opcode->lose & insn) == 0)
return (opcode->flags & F_DELAYED);
@ -272,7 +272,7 @@ print_insn_sparc (memaddr, info)
for (op = opcode_hash_table[HASH_INSN (insn)]; op; op = op->next)
{
CONST struct sparc_opcode *opcode = op->opcode;
const struct sparc_opcode *opcode = op->opcode;
/* If the insn isn't supported by the current architecture, skip it. */
if (! (opcode->architecture & current_arch_mask))
@ -312,7 +312,7 @@ print_insn_sparc (memaddr, info)
(*info->fprintf_func) (stream, opcode->name);
{
register CONST char *s;
register const char *s;
if (opcode->args[0] != ',')
(*info->fprintf_func) (stream, " ");