Check for & reject attempts to use multiple store insns in a single
parallel insn combination. These are illegal per the Blackfin ISA.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The Blackfin ISA supports moving just about anything to/from EMUDAT, so
make sure the assembler accepts these insns too.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Using "Register mismatch" everywhere can be a bit vague, so clarify
why exactly we're barfing on these unsupported insns.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Some extended registers when given to the DBG/DBGCMPLX pseudo insns are
not encoded properly. So fix them, fix the display of them when being
disassembled, and add testcases.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Accept any 8bit char with the high bit set so as to support multibyte
characters. Also use the locale safe regular expressions to match
chars/digits. This brings the Blackfin assembler inline with the
behavior of other assemblers.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Support a few more ASTAT bits with the standard insns that operate on
ASTAT bits directly.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The disassembler has partial (but incomplete/broken) support already for
the pseudo debug insn OUTC, so let's fix it up and finish it. And now
that the disassembler can handle it, make sure our assembler can output
it too.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
There is a pseudo debug insn named ABORT that is commonly used in
simulation, so support it in the assembler too. The disassembler
already supports it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
We don't use the # character in the Blackfin assembly language, so let it
start end-of-line comments like most other assemblers.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* gas/testsuite/gas/arm/attr-cpu-directive.d: Update test for change in canonical
CPU name.
* gas/testsuite/gas/arm/attr-mcpu.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-6.attr: Update tests for change in canonical
CPU name.
* ld/testsuite/ld-arm/attr-merge-7.attr: Likewise.
* ld/testsuite/ld-arm/attr-merge-2.attr: Likewise.
* ld/testsuite/ld-arm/attr-merge-arch-2.attr: Likewise.
* config/tc-arm.c (insns): Change MRC entry to accept APSR_RR instead
of just RR.
2010-09-17 Tejas Belagod <tejas.belagod@arm.com>
* gas/arm/copro.s: Add test for APSR_nzcv as a MRC operand.
* gas/arm/copro.d: Change pc in MRC to disassemble as APSR_nzcv. Also
add disassembly for test added in copro.s
2010-09-17 Tejas Belagod <tejas.belagod@arm.com>
* arm_dis.c (coprocessor_opcodes): Add MRC entry for APSR_nzcv.
* config/tc-mips.c (macro)[M_JAL_1, M_JAL_2]: Handle the JALR
delay slot in the noreorder mode with the o32 ABI.
gas/testsuite/
* gas/mips/jal-svr4pic-noreorder.d: New test case.
* gas/mips/mips1@jal-svr4pic-noreorder.d: New test
subarchitecture.
* gas/mips/r3000@jal-svr4pic-noreorder.d: Likewise.
* gas/mips/jal-svr4pic-noreorder.s: Source for the new test
case.
* gas/mips/mips.exp: Run the new test case.
* config/tc-mips.c (mips_frob_file): Use symbol_same_p to match
symbols.
gas/testsuite/
* gas/mips/elf-rel27.d: New test for HI16/LO16 relocation
pairing.
* gas/mips/elf-rel27.s: Source for the new test.
* gas/mips/mips.exp: Create "mips16" architecture. Adjust
conditions involving negated properties throughout to require
"mips1" as appropriate. Run the new test.
(mips_arch_destroy): New procedure.
* config/tc-ppc.c (ppc_set_cpu): Cast PPC_OPCODE_xxx to ppc_cpu_t
before inverting.
binutils/:
* ppc-dis.c (powerpc_init_dialect): Cast PPC_OPCODE_xxx to
ppc_cpu_t before inverting.
* config/tc-tic6x.h (tic6x_segment_info_type): Add field
func_units_used.
* config/tc-tic6x.c (tic6x_cons_align: Clear func_units_used.
(md_assemble): Clear func_units_used for new execute packet.
Check for duplicate functional units and update func_units_used
for instructions using a functional unit.
gas/testsuite:
* gas/tic6x/resource-func-unit-1.d,
gas/tic6x/resource-func-unit-1.l,
gas/tic6x/resource-func-unit-1.s,
gas/tic6x/resource-func-unit-2.d,
gas/tic6x/resource-func-unit-2.l,
gas/tic6x/resource-func-unit-2.s: New.
* config/tc-ppc.c (md_assemble): Emit APUinfo section for
PPC_OPCODE_E500.
gas/testsuite/
* gas/ppc/e500.s: Add eieio, mbar and lwsync
* gas/ppc/e500.d: Likewise.
include/opcode/
* ppc.h (PPC_OPCODE_E500): Define.
opcodes/
* ppc-dis.c (ppc_opts): Remove PPC_OPCODE_E500MC from e500 and
e500x2. Add PPC_OPCODE_E500 to e500 and e500x2
* ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which
touch floating point regs and are enabled by COM, PPC or PPCCOM.
Treat sync as msync on e500. Treat eieio as mbar 1 on e500.
Treat lwsync as msync on e500.
2010-06-10 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (update_code_flag): New.
(set_code_flag): Use it.
(i386_target_format): Replace set_code_flag with update_code_flag.
2010-06-10 Tristan Gingold <gingold@adacore.com>
* som.c: Can now be compiled on any host.
Include bfd headers instead of system one.
(som_compute_checksum): Parameter is now a pointer to a
som_external_header structure. Adjust.
(struct section_to_type): Field section is now const.
(R_DLT_REL, R_AUX_UNWIND, R_SEC_STMT): Removed conditional
definition.
(R_LONG_PCREL_MODE, R_N0SEL, R_N1SEL, R_LINETAB): Ditto.
(R_LINETAB_ESC, R_LTP_OVERRIDE, R_COMMENT): Ditto.
(som_swap_clock_in, som_swap_clock_out): New functions.
(som_swap_header_in, som_swap_header_out): Likewise.
(som_swap_space_dictionary_in): Likewise.
(som_swap_space_dictionary_out): Likewise.
(som_swap_subspace_dictionary_in): Likewise.
(som_swap_subspace_dictionary_record_out): Likewise.
(som_swap_aux_id_in, som_swap_aux_id_out): Likewise.
(som_swap_string_auxhdr_out): Likewise.
(som_swap_compilation_unit_out): Likewise.
(som_swap_exec_auxhdr_in): Likewise.
(som_swap_exec_auxhdr_out): Likewise.
(som_swap_lst_header_in): Likewise.
(som_object_setup): Adjust parameter type using bfd types.
(setup_sections): Likewise. Ditto for object file types.
Use intermediate variables for external representation and use the
swap functions to convert.
(som_object_p): Ditto. Remove #ifdef/#endif on always defined
macros.
(som_prep_headers): Likewise.
(som_write_symbol_strings): Likewise.
(som_begin_writing): Likewise.
(som_finish_writing): Likewise.
(som_build_and_write_symbol_table): Likewise.
(bfd_section_from_som_symbol): Likewise.
(som_slurp_symbol_table): Likewise.
(som_bfd_print_private_bfd_data): Likewise.
(bfd_som_attach_aux_hdr): Likewise. Clear the padding.
(bfd_som_attach_compilation_unit): Likewise.
(som_bfd_count_ar_symbols): Likewise.
(som_bfd_fill_in_ar_symbols): Likewise.
(som_slurp_armap): Likewise.
(som_bfd_ar_write_symbol_stuff): Likewise.
(som_write_armap): Likewise. Use _bfd_ar_spacepad instead of
sprintf to write header fields.
* som.h: Include bfd headers instead of system one.
(FILE_HDR_SIZE, AUX_HDR_SIZE): Removed.
(struct somdata): Use bfd structures instead of system ones.
(struct som_section_data_struct): Likewise.
(struct som_subspace_dictionary_record): Removed (now in
include/som/internal.h)
gas/
2010-06-10 Tristan Gingold <gingold@adacore.com>
* config/obj-som.h: Includes som/reloc.h
2010-06-10 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (cpu_arch): Add comment.
(i386_target_format): Set cpu_arch_isa_flags and cpu_arch_tune_flags
from the generic entries of cpu_arch[].
value.
(parse_operands): Add support for OP_RRnpctw.
(insns): Update floating-point load/store multiples so the
first register is of type OP_RRnpctw.
* gas/testsuite/gas/arm/vldm-arm.d: New test.
* gas/testsuite/gas/arm/vldm-thumb-bad.d: Likewise.
* gas/testsuite/gas/arm/vldm-thumb-bad.l: Likewise.
* gas/testsuite/gas/arm/vldm.s: Likewise.
* gas/testsuite/gas/arm/vldmw-arm-bad.d: Likewise.
* gas/testsuite/gas/arm/vldmw-bad.l: Likewise.
* gas/testsuite/gad/arm-vldmw-bad.s: Likewise.
* gas/testsuite/gas/arm/vldmw-thumb-bad.d: Likewise.
lsls and not adds.
* gas/testsuite/gas/arm/thumb2_it_auto.d: Update for change in movs encoding.
gas/arm/thumb2_it.d: Likewise.
gas/arm/thumb32.d: Likewise.
writeback when base register is in register list an error, and
correct check.
(do_t_ldmstm): Change warnings.
* gas/arm/thumb2_ldmstm.d: Add new testcases.
* gas/arm/thumb2_ldmstm.s: Likeiwse.
* gas/arm/thumb2_ldmstm_bad.d: Add testcases to check for
UNPREDICTABLE ldm/stm.
* gas/arm/thumb2_ldmstm_bad.l: Likewise.
* gas/arm/thumb2_ldmstm_bad.s: Likewise.
Joseph Myers <joseph@codesourcery.com>
Andrew Stubbs <ams@codesourcery.com>
bfd/
* config.bfd (sh-*-uclinux* | sh[12]-*-uclinux*): Add
bfd_elf32_shl_vec, and FDPIC vectors to targ_selvecs.
* configure.in: Handle FDPIC vectors.
* elf32-sh-relocs.h: Add FDPIC and movi20 relocations.
* elf32-sh.c (DEFAULT_STACK_SIZE): Define.
(SYMBOL_FUNCDESC_LOCAL): Define. Use it instead of
SYMBOL_REFERENCES_LOCAL for function descriptors.
(fdpic_object_p): New.
(sh_reloc_map): Add FDPIC and movi20 relocations.
(sh_elf_info_to_howto, sh_elf_relocate_section): Handle new invalid
range.
(struct elf_sh_plt_info): Add got20 and short_plt. Update all
definitions.
(FDPIC_PLT_ENTRY_SIZE, FDPIC_PLT_LAZY_OFFSET): Define.
(fdpic_sh_plt_entry_be, fdpic_sh_plt_entry_le, fdpic_sh_plts): New.
(FDPIC_SH2A_PLT_ENTRY_SIZE, FDPIC_SH2A_PLT_LAZY_OFFSET): Define.
(fdpic_sh2a_plt_entry_be, fdpic_sh2a_plt_entry_le)
(fdpic_sh2a_short_plt_be, fdpic_sh2a_short_plt_le, fdpic_sh2a_plts):
New.
(get_plt_info): Handle FDPIC.
(MAX_SHORT_PLT): Define.
(get_plt_index, get_plt_offset): Handle short_plt.
(union gotref): New.
(struct elf_sh_link_hash_entry): Add funcdesc, rename tls_type to
got_type and adjust all uses. Add GOT_FUNCDESC.
(struct sh_elf_obj_tdata): Add local_funcdesc. Rename
local_got_tls_type to local_got_type.
(sh_elf_local_got_type): Renamed from sh_elf_local_got_tls_type. All
users changed.
(sh_elf_local_funcdesc): Define.
(struct elf_sh_link_hash_table): Add sfuncdesc, srelfuncdesc, fdpic_p,
and srofixup.
(sh_elf_link_hash_newfunc): Initialize new fields.
(sh_elf_link_hash_table_create): Set fdpic_p.
(sh_elf_omit_section_dynsym): New.
(create_got_section): Create .got.funcdesc, .rela.got.funcdesc
and .rofixup.
(allocate_dynrelocs): Allocate local function descriptors and space
for R_SH_FUNCDESC-related relocations, and for rofixups.
Handle GOT_FUNCDESC. Create fixups. Handle GOT entries which
require function descriptors.
(sh_elf_always_size_sections): Handle PT_GNU_STACK and __stacksize.
(sh_elf_modify_program_headers): New.
(sh_elf_size_dynamic_sections): Allocate function descriptors for
local symbols. Allocate .got.funcdesc contents. Allocate rofixups.
Handle local GOT entries of type GOT_FUNCDESC. Create fixups for
local GOT entries. Ensure that FDPIC libraries always have a PLTGOT
entry in the .dynamic section.
(sh_elf_add_dyn_reloc, sh_elf_got_offset, sh_elf_initialize_funcdesc)
(sh_elf_add_rofixup, sh_elf_osec_to_segment)
(sh_elf_osec_readonly_p, install_movi20_field): New functions.
(sh_elf_relocate_section): Handle new relocations, R_SH_FUNCDESC,
R_SH_GOTFUNCDESC and R_SH_GOTOFFFUNCDESC. Use sh_elf_got_offset
and .got.plt throughout to find _GLOBAL_OFFSET_TABLE_. Add rofixup
read-only section warnings. Handle undefined weak symbols. Generate
fixups for R_SH_DIR32 and GOT entries. Check for cross-segment
relocations and clear EF_SH_PIC. Handle 20-bit relocations.
Always generate R_SH_DIR32 for FDPIC instead of R_SH_RELATIVE.
(sh_elf_gc_sweep_hook): Handle R_SH_FUNCDESC, R_SH_GOTOFF20,
R_SH_GOTFUNCDESC, R_SH_GOTFUNCDESC20, and R_SH_GOTOFFFUNCDESC.
Handle 20-bit relocations.
(sh_elf_copy_indirect_symbol): Copy function descriptor reference
counts.
(sh_elf_check_relocs): Handle new relocations. Make symbols
dynamic for FDPIC relocs. Account for rofixups. Error for FDPIC
symbol mismatches. Allocate a GOT for R_SH_DIR32. Allocate fixups
for R_SH_DIR32.
(sh_elf_copy_private_data): Copy PT_GNU_STACK size.
(sh_elf_merge_private_data): Copy initial flags. Do not clobber
non-mach flags. Set EF_SH_PIC for FDPIC. Reject FDPIC mismatches.
(sh_elf_finish_dynamic_symbol): Do not handle got_funcdesc entries
here. Rename sgot to sgotplt and srel to srelplt. Handle short_plt,
FDPIC descriptors, and got20. Create R_SH_FUNCDESC_VALUE for FDPIC.
Use install_movi20_field. Rename srel to srelgot. Always generate
R_SH_DIR32 for FDPIC instead of R_SH_RELATIVE.
(sh_elf_finish_dynamic_sections): Fill in the GOT pointer in rofixup.
Do not fill in reserved GOT entries for FDPIC. Correct DT_PLTGOT.
Rename sgot to sgotplt. Assert that the right number of rofixups
and dynamic relocations were allocated.
(sh_elf_use_relative_eh_frame, sh_elf_encode_eh_address): New.
(elf_backend_omit_section_dynsym): Use sh_elf_omit_section_dynsym.
(elf_backend_can_make_relative_eh_frame)
(elf_backend_can_make_lsda_relative_eh_frame)
(elf_backend_encode_eh_address): Define.
(TARGET_BIG_SYM, TARGET_BIG_NAME, TARGET_LITTLE_SYM)
(TARGET_LITTLE_NAME, elf_backend_modify_program_headers, elf32_bed):
Redefine for FDPIC vector.
* reloc.c: Add SH FDPIC and movi20 relocations.
* targets.c (_bfd_target_vector): Add FDPIC vectors.
* configure, bfd-in2.h, libbfd.h: Regenerated.
binutils/
* readelf.c (get_machine_flags): Handle EF_SH_PIC and EF_SH_FDPIC.
gas/
* config/tc-sh.c (sh_fdpic): New.
(sh_check_fixup): Handle relocations on movi20.
(parse_exp): Do not reject PIC operators here.
(build_Mytes): Check for unhandled PIC operators here. Use
sh_check_fixup for movi20.
(enum options): Add OPTION_FDPIC.
(md_longopts, md_parse_option, md_show_usage): Add --fdpic.
(sh_fix_adjustable, md_apply_fix): Handle FDPIC and movi20 relocations.
(sh_elf_final_processing): Handle --fdpic.
(sh_uclinux_target_format): New.
(sh_parse_name): Handle FDPIC relocation operators.
* config/tc-sh.h (TARGET_FORMAT): Define specially for TE_UCLINUX.
(sh_uclinux_target_format): Declare for TE_UCLINUX.
* configure.tgt (sh-*-uclinux* | sh[12]-*-uclinux*): Set
em=uclinux.
* doc/c-sh.texi (SH Options): Document --fdpic.
gas/testsuite/
* gas/sh/basic.exp: Run new tests. Handle uClinux like Linux.
* gas/sh/fdpic.d: New file.
* gas/sh/fdpic.s: New file.
* gas/sh/reg-prefix.d: Force big-endian.
* gas/sh/sh2a-pic.d: New file.
* gas/sh/sh2a-pic.s: New file.
* lib/gas-defs.exp (is_elf_format): Include sh*-*-uclinux*.
include/elf/
* sh.h (EF_SH_PIC, EF_SH_FDPIC): Define.
(R_SH_FIRST_INVALID_RELOC_6, R_SH_LAST_INVALID_RELOC_6): New. Adjust
other invalid ranges.
(R_SH_GOT20, R_SH_GOTOFF20, R_SH_GOTFUNCDESC, R_SH_GOTFUNCDESC20)
(R_SH_GOTOFFFUNCDESC, R_SH_GOTOFFFUNCDESC20, R_SH_FUNCDESC)
(R_SH_FUNCDESC_VALUE): New.
ld/
* Makefile.am (ALL_EMULATIONS): Add eshelf_fd.o and eshlelf_fd.o.
(eshelf_fd.c, eshlelf_fd.c): New rules.
* Makefile.in: Regenerate.
* configure.tgt (sh-*-uclinux*): Add shelf_fd and shlelf_fd
emulations.
* emulparams/shelf_fd.sh: New file.
* emulparams/shlelf_fd.sh: New file.
* emulparams/shlelf_linux.sh: Update comment.
ld/testsuite/
* ld-sh/sh.exp: Handle uClinux like Linux.
* lib/ld-lib.exp (is_elf_format): Include sh*-*-uclinux*.
* ld-sh/fdpic-funcdesc-shared.d: New file.
* ld-sh/fdpic-funcdesc-shared.s: New file.
* ld-sh/fdpic-funcdesc-static.d: New file.
* ld-sh/fdpic-funcdesc-static.s: New file.
* ld-sh/fdpic-gotfuncdesc-shared.d: New file.
* ld-sh/fdpic-gotfuncdesc-shared.s: New file.
* ld-sh/fdpic-gotfuncdesc-static.d: New file.
* ld-sh/fdpic-gotfuncdesc-static.s: New file.
* ld-sh/fdpic-gotfuncdesci20-shared.d: New file.
* ld-sh/fdpic-gotfuncdesci20-shared.s: New file.
* ld-sh/fdpic-gotfuncdesci20-static.d: New file.
* ld-sh/fdpic-gotfuncdesci20-static.s: New file.
* ld-sh/fdpic-goti20-shared.d: New file.
* ld-sh/fdpic-goti20-shared.s: New file.
* ld-sh/fdpic-goti20-static.d: New file.
* ld-sh/fdpic-goti20-static.s: New file.
* ld-sh/fdpic-gotofffuncdesc-shared.d: New file.
* ld-sh/fdpic-gotofffuncdesc-shared.s: New file.
* ld-sh/fdpic-gotofffuncdesc-static.d: New file.
* ld-sh/fdpic-gotofffuncdesc-static.s: New file.
* ld-sh/fdpic-gotofffuncdesci20-shared.d: New file.
* ld-sh/fdpic-gotofffuncdesci20-shared.s: New file.
* ld-sh/fdpic-gotofffuncdesci20-static.d: New file.
* ld-sh/fdpic-gotofffuncdesci20-static.s: New file.
* ld-sh/fdpic-gotoffi20-shared.d: New file.
* ld-sh/fdpic-gotoffi20-shared.s: New file.
* ld-sh/fdpic-gotoffi20-static.d: New file.
* ld-sh/fdpic-gotoffi20-static.s: New file.
* ld-sh/fdpic-plt-be.d: New file.
* ld-sh/fdpic-plt-le.d: New file.
* ld-sh/fdpic-plt.s: New file.
* ld-sh/fdpic-plti20-be.d: New file.
* ld-sh/fdpic-plti20-le.d: New file.
* ld-sh/fdpic-stack-default.d: New file.
* ld-sh/fdpic-stack-size.d: New file.
* ld-sh/fdpic-stack.s: New file.
defined weak symbol is in.
* config/tc-arm.c (relax_adr, relax_branch, md_apply_fix): Treat
weak symbols as not known to be in the same section, even if they
are defined.
* gas/arm/weakdef-1.s: New.
* gas/arm/weakdef-1.d: New.
* gas/arm/weakdef-2.s: New.
* gas/arm/weakdef-2.d: New.
* gas/arm/weakdef-2.l: New.
* config/tc-tic6x.h (tic6x_label_list): New.
(tic6x_segment_info_type): Keep a list of labels and a current
frag instead of a boolean for whether labels seen and a count of
instructions.
(tic6x_frag_info, TC_FRAG_TYPE, TC_FRAG_INIT, tic6x_frag_init,
md_do_align, tic6x_do_align, md_end, tic6x_end): New.
* config/tc-tic6x.c (tic6x_frob_label): Put label on list.
(tic6x_cleanup): Correct comment.
(tic6x_free_label_list): New.
(tic6x_cons_align): Free label list and update for
tic6x_segment_info_type changes.
(tic6x_do_align): New.
(md_assemble): Handle list of labels and saved frag for execute
packet. Create machine-dependent frag for new execute packet and
adjust labels accordingly.
(tic6x_adjust_section, tic6x_frag_init, tic6x_end): New.
(md_convert_frag, md_estimate_size_before_relax): Update comments.
gas/testsuite:
* gas/tic6x/align-1-be.d, gas/tic6x/align-1.d,
gas/tic6x/align-1.s, gas/tic6x/align-2.d, gas/tic6x/align-2.s:
New.
gas/
2010-04-21 H.J. Lu <hongjiu.lu@intel.com>
PR gas/11509
* config/tc-i386-intel.c (i386_intel_simplify_register): New.
(i386_intel_simplify): Use i386_is_register and
i386_intel_simplify_register. Set X_md for O_register and
check X_md for O_constant.
(i386_intel_operand): Use i386_is_register.
* config/tc-i386.c (i386_is_register): New.
(x86_cons): Initialize the X_md field. Use i386_is_register.
(parse_register): Use i386_is_register.
(tc_x86_parse_to_dw2regnum): Likewise.
gas/testsuite/
2010-04-21 H.J. Lu <hongjiu.lu@intel.com>
PR gas/11509
* gas/i386/equ.s: Add tests for ".equ symbol, reg + NUM".
* gas/i386/equ.d: Updated.
* config/tc-hppa.c (pa_ip): Do not allow 64-bit add condition
matcher to accept and unconditional 32-bit add instruction.
(pa_build_unwind_subspace): Cope with error conditions not
allowing the start symbol to be set.
* gas/hppa/basic/add2.s: Add test of simple 32-bit instruction.
* gas/hppa/basic/basic.exp (do_add2): Add grep for expected
disassembly.
* config/tc-alpha.c: Includes vms/egps.h on EVAX.
(s_alpha_comm): Used new EGPS macros from egps.h
(RGPS__V_NO_SHIFT, EGPS__V_MASK): New local macros.
(s_alpha_section_word): Add comments. Use new EGPS macros.
Adjust for modified bfd_vms_set_section_flags function.
2010-03-21 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (i386_error): New.
(_i386_insn): Replace err_msg with error.
(operand_size_match): Set error instead of err_msg on failure.
(operand_type_match): Likewise.
(operand_type_register_match): Likewise.
(VEX_check_operands): Likewise.
(match_template): Likewise. Use error instead of err_msg with
as_bad.
that two mapping symbols have the same value.
testsuite/
* gas/arm/mapmisc.s: Add the test case for two mapping
symbols having the same value.
* gas/arm/mapmisc.d: Likewise.
* config/tc-arm.c (do_neon_ld_st_interleave): Reject bad
alignment.
testsuite/
* gas/arm/neon-ldst-align-bad.d: New test.
* gas/arm/neon-ldst-align-bad.l: New test.
* gas/arm/neon-ldst-align-bad.s: New test.
mips_fix_loongson2f_jump): New variables.
(md_longopts): Add New options -mfix-loongson2f-nop/jump,
-mno-fix-loongson2f-nop/jump.
(md_parse_option): Initialize variables via above options.
(options): New enums for the above options.
(md_begin): Initialize nop_insn from LOONGSON2F_NOP_INSN.
(fix_loongson2f, fix_loongson2f_nop, fix_loongson2f_jump):
New functions.
(append_insn): call fix_loongson2f().
(mips_handle_align): Replace the implicit nops.
* config/tc-mips.h (MAX_MEM_FOR_RS_ALIGN_CODE): Modified
for the new mips_handle_align().
* doc/c-mips.texi: Document the new options.
* gas/mips/loongson-2f-2.s: New test of -mfix-loongson2f-nop.
* gas/mips/loongson-2f-2.d: Likewise.
* gas/mips/loongson-2f-3.s: New test of -mfix-loongson2f-jump.
* gas/mips/loongson-2f-3.d: Likewise.
* gas/mips/mips.exp: Run the new tests.
* opcode/mips.h (LOONGSON2F_NOP_INSN): New macro.
* config/tc-arm.c (do_rd_rm_rn): Added warning.
gas/testsuite/
* gas/arm/depr-swp.d: New test case.
* gas/arm/depr-swp.s: New file.
* gas/arm/depr-swp.l: New file.
gas/
* config/tc-arm.c (md_pcrel_from_section): Keep base to zero for
non-local branches (BFD_RELOC_THUMB_PCREL_BRANCH23,
BFD_RELOC_THUMB_PCREL_BLX, BFD_RELOC_ARM_PCREL_BLX,
BFD_RELOC_ARM_PCREL_CALL)
gas/testsuite/
* gas/arm/branch-reloc.s, gas/arm/branch-reloc.d,
gas/arm/branch-reloc.l: New tests and expected results with all
variants of call: ARM/Thumb, local/global, inter/intra-section,
using BL/BLX.
gas/
* config/tc-i386.c (cpu_arch): Change amdfam15 to bdver1.
(i386_align_code): Rename PROCESSOR_AMDFAM15 to PROCESSOR_BDVER1.
* config/tc-i386.h (processor_type): Same.
* doc/c-i386.texi: Change amdfam15 to bdver1.
opcodes/
* i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
to CPU_BDVER1_FLAGS
* i386-init.h: Regenerated.
testsuite/
* gas/i386/i386.exp: Rename amdfam15 test cases to bdver1.
* gas/i386/x86-64-nops-1-amdfam15.d: Renamed test case to
gas/i386/x86-64-nops-1-bdver1.d.
* gas/i386/nops-1-amdfam15.d: Renamed test case to
gas/i386/nops-1-bdver1.d.
* NEWS: Mention new feature.
* config/obj-coff.c (obj_coff_section): Accept digits and use
to override default section alignment power if specified.
* doc/as.texinfo (.section directive): Update documentation.
gas/testsuite/ChangeLog:
* gas/pe/section-align-1.s: New test source file.
* gas/pe/section-align-1.d: Likewise control script.
* gas/pe/section-align-2.s: Likewise ...
* gas/pe/section-align-2.d: ... and likewise.
* gas/pe/pe.exp: Invoke new testcases.
* coff-rs6000.c (xcoff_howto_table): Change size to 0 and bitsize to 1.
(_bfd_xcoff_reloc_type_lookup): Handle BFD_RELOC_NONE.
* coff64-rs6000.c (xcoff64_howto_table): Change size to 0 and
bitsize to 1.
(xcoff64_reloc_type_lookup): Handle BFD_RELOC_NONE.
gas/
* write.h (fix_at_start): Declare.
* write.c (fix_new_internal): Add at_beginning parameter.
Use it instead of REVERSE_SORT_RELOCS. Fix the handling of
seg_fix_tailP for the at_beginning/REVERSE_SORT_RELOCS case.
(fix_new, fix_new_exp): Update accordingly.
(fix_at_start): New function.
* config/tc-ppc.c (md_pseudo_table): Add .ref to the OBJ_XCOFF section.
(ppc_ref): New function, for OBJ_XCOFF.
(md_apply_fix): Handle BFD_RELOC_NONE for OBJ_XCOFF.
* config/te-i386aix.h (REVERSE_SORT_RELOCS): Remove #undef.
gas/testsuite/
* gas/ppc/xcoff-ref-1.s, gas/ppc/xcoff-ref-1.l: New test.
* gas/ppc/aix.exp: Run it.
ld/testsuite/
* ld-powerpc/aix-ref-1-32.od, ld-powerpc/aix-ref-1-64.od,
ld-powerpc/aix-ref-1.s: New tests.
* ld-powerpc/aix52.exp: Run them.
gas/
* config/tc-i386.c (md_assemble): Before accessing the IMM field
check that it's not an XOP insn.
gas/testsuite/
* gas/i386/x86-64-xop.d: Add missing patterns.
* gas/i386/x86-64-xop.s: Same.
* gas/i386/xop.d: Same.
* gas/i386/xop.s: Same.
opcodes/
* i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
* i386-tbl.h: Regenerated.
warning message if a new section is created without setting any
attributes for it.
(md_pseudo_table): Intercept section creation pseudos.
(md_pcrel_from): Replace abort with an error message.
* config/obj-elf.c (obj_elf_section_name): Export this function.
* config/obj-elf.h (obj_elf_section_name): Prototype.
* gas/elf/section0.d: Skip this test for the h8300.
* gas/elf/section1.d: Likewise.
* gas/elf/section6.d: Likewise.
* gas/elf/elf.exp: Skip section2 and section5 tests when the
target is the h8300.
* ld-scrips/sort.exp: Skip these tests when the target is the
h8300.
gas/
* config/tc-arm.c (do_neon_logic): Accept imm value
in the third operand too.
(operand_parse_code): OP_RNDQ_IMVNb renamed to
OP_RNDQ_Ibig.
(parse_operands): OP_NILO case removed, applied renaming.
(insns): Neon shape changed for some logic instructions.
gas/testsuite/
* gas/arm/neon-logic.d: New test case.
* gas/arm/neon-logic.s: New file.
gas/
* config/tc-arm.c (do_neon_ldx_stx): Added
validation for vector load/store insns.
gas/testsuite/
* gas/arm/neon-addressing-bad.d: New test case.
* gas/arm/neon-addressing-bad.s: New file.
* gas/arm/neon-addressing-bad.l: New file.
2009-12-21 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
Richard Earnshaw <richard.earnshaw@arm.com>
* config/tc-arm.c (encode_thumb2_b_bl_offset): New. Refactored
from md_apply_fix.
(md_apply_fix): Fixup range checks for Thumb2 version
of unconditional calls. Call encode_thumb2_b_bl_offset for
unconditional branches / function calls.
* config/tc-mips.c (s_mips_ent): Also set BSF_FUNCTION for
".aent".
gas/testsuite/
* gas/mips/aent.d: New test.
* gas/mips/aent.s: Source for the new test.
* gas/mips/mips.exp: Run it.
* config/tc-arm.c (do_ldstv4): Do not allow r15 as the destination
register.
(do_mrs): Likewise.
(do_mul): Likewise.
* arm-dis.c: Add support for %<>ru and %<>rU formats to enforce
unique register numbers. Extend support for %<>R format to
thumb32 and coprocessor instructions.
* gas/arm/unpredictable.s: Add more unpredictable instructions.
* gas/arm/unpredictable.d: Add expected disassemblies.
* config/tc-i386.c (arch_entry): Add len and skip.
(cpu_arch): Use STRING_COMMA_LEN.
(MESSAGE_TEMPLATE): New.
(show_arch): Likewise.
(md_show_usage): Use show_arch.
2009-10-29 Sebastian Pop <sebastian.pop@amd.com>
* config/tc-i386.c (build_modrm_byte): Do not swap REG and
NDS operands for FMA4.
gas/testsuite/
2009-10-29 Sebastian Pop <sebastian.pop@amd.com>
* gas/i386/fma4.d: Updated patterns.
* gas/i386/x86-64-fma4.d: Same.
opcodes/
2009-10-29 Sebastian Pop <sebastian.pop@amd.com>
* i386-dis.c (OP_VEX_FMA): Removed.
(VexFMA): Removed.
(Vex128FMA): Removed.
(prefix_table): First source operand of FMA4 insns is decoded
with Vex not with VexFMA.
(OP_EX_VexW): Second source operand is decoded with get_vex_imm8
when vex.w is set. Third source operand is decoded with
get_vex_imm8 when vex.w is cleared.
(OP_VEX_FMA): Removed.
* config/tc-mep.c (md_pseudo_table): Remove dwarf2 pseudo
as they are already defined in obj-elf.c
* config/tc-m32c.c (md_pseudo_table): Ditto.
* config/tc-spu.c (md_pseudo_table): Ditto.
* config/tc-avr.c (md_pseudo_table): Ditto.
'defl' in cases where the space between the keyword and the
expression has been scrubbed away.
Do not check whether a symbol is redefined with 'equ' here;
the function equals takes an argument indicating whether
redefinitions are allowed.
Only call LISTING_NEWLINE if needed, and then after the call to
bump_line_counters.
2009-10-07 Vincent Riviere <vincent.riviere@freesbee.fr>
PR gas/3041
* config/tc-m68k.c (tc_gen_reloc): Fix addend for relocations
located in data section an referencing a weak symbol.
gas/testsuite:
2009-10-07 Vincent Riviere <vincent.riviere@freesbee.fr>
PR gas/3041
* gas/m68k/all.exp: Added "p3041data".
* gas/m68k/p3041.d, gas/m68k/p3041.s: Added tests of weak references
from text section to all possible sections.
* gas/m68k/p3041data.d, gas/m68k/p3041data.s: New test. Check weak
references from data section.
* config/tc-ia64.c (parse_operand): Use expression rather than
expression_and_evalute.
(parse_operand_and_eval): New function. Replace all uses of
parse_operand outside of parse_operands with this function.
(parse_operans_maybe_eval): New function. Replace uses of
parse_operand in parse_operands, except for the dummy, with
this function.
2009-09-14 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10637
* config/tc-i386-intel.c (intel_state): Add has_offset.
(i386_intel_simplify): Set intel_state.has_offset to 1 for
O_offset.
(i386_intel_operand): Turn on intel_state.is_mem if
intel_state.has_offset is 0 and the last char is ']'.
gas/testsuite/
2009-09-14 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10637
* gas/i386/disp.s: Add tests for Intel syntax.
* gas/i386/x86-64-disp.s: Likewise.
* gas/i386/disp.d: Updated.
* gas/i386/intelok.d: Likewise.
* gas/i386/x86-64-disp.d: Likewise.
* gas/i386/disp-intel.d: New.
* gas/i386/x86-64-disp-intel.d: Likewise.
* gas/i386/i386.exp: Run disp-intel and x86-64-disp-intel.
2009-09-14 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10636
* config/tc-i386.c (optimize_disp): Set disp32 for 64bit only
if there is an ADDR_PREFIX.
(i386_finalize_displacement): Repor error if signed 32bit
displacement is out of range.
gas/testsuite/
2009-09-14 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10636
* gas/i386/disp.d: New.
* gas/i386/disp.s: Likewise.
* gas/i386/x86-64-disp.d: Likewise.
* gas/i386/x86-64-disp.s: Likewise.
* gas/i386/i386.exp: Run disp and x86-64-disp.
* gas/i386/x86-64-addr32.s: Add high 32bit displacement tests.
* gas/i386/x86-64-addr32.d: Updated.
* gas/i386/x86-64-addr32-intel.d: Likewise.
* gas/i386/x86-64-inval.l: Likewise.
* gas/i386/x86-64-prescott.d: Likewise.
* gas/i386/x86-64-inval.s: Add invalid displacement tests.
* gas/i386/x86-64-prescott.s: Replace 0x90909090 displacement
with 0x909090.
* config/tc-mips.c (MIPS_JALR_HINT_P): Take an expr argument.
Require the target to be a bare symbol on targets with
in-place addends.
(macro_build_jalr): Update accordingly.
(mips_fix_adjustable): Don't reduce R_MIPS_JALRs on targets
with in-place addends.
gas/testsuite/
* gas/mips/jalr2.s, gas/mips/jalr2.d: New test.
* gas/mips/jal-svr4pic.d: Don't expect R_MIPS_JALRs to be reduced.
* gas/mips/jal-xgot.d: Likewise.
* gas/mips/mips-abi32-pic2.d: Likewise.
* gas/mips/mips.exp: Run it.
* config/tc-mmix.c (md_assemble) <case mmix_operands_xyz_opt>:
Allow register operands for SWYM as for TRIP and TRAP. Correct
operand handling and error checking. Never emit
BFD_RELOC_MMIX_REG_OR_BYTE for operands to these insns.
* config/tc-d10v.c: Include dwarf2dbg.h.
(write_long, write_1_short, write_2_short): Call dwarf2_emit_insn.
(d10v_frob_label): New function.
* config/tc-d10v.h (d10v_frob_label): Declare.
(tc_frob_label): Define as d10v_frob_label.
gas/testsuite/
* gas/lns/lns-common-1.s: Use two nops between each .loc.
* gas/lns/lns.exp: Don't exclude d10v.
* config/obj-coff.c (weak_uniquify): Use an_external_name when TE_PE.
* symbols.c (an_external_name): Define when TE_PE.
(S_SET_EXTERNAL): Assign an_external_name when TE_PE.
* tc.h (an_external_name): Declare when TE_PE.
2009-09-07 Tristan Gingold <gingold@adacore.com>
* bfd.m4 (BFD_HAVE_TIME_TYPE_MEMBER,
BFD_HAVE_SYS_STAT_TYPE_MEMBER): Moved to gas/acinclude.m4
* configure.in: Move tests for tm_gmtoff, st_mtim.tv_sec and
st_mtim.tv_nsec to gas/configure.in
(bfd_elf64_ia64_vms_vec): Remove vmsutil.lo
* configure: Regenerate.
* config.in: Regenerate.
* vmsutil.c: Moved to gas/config/te-vms.c
* vmsutil.h: Removed.
* Makefile.am (BFD32_BACKENDS_CFILES): Remove vmsutil.c
(BFD32_BACKENDS): Remove vmsutil.lo
* Makefile.in: Regenerate.
gas/:
2009-09-07 Tristan Gingold <gingold@adacore.com>
* Makefile.am (TARG_ENV_CFILES): New variable. Set to te-vms.c
(POTFILES): Add $(TARG_ENV_CFILES) in definition.
(EXTRA_as_new_SOURCES): Ditto.
* Makefile: Regenerate.
* acinclude.m4 (BFD_HAVE_TIME_TYPE_MEMBER,
BFD_HAVE_SYS_STAT_TYPE_MEMBER): New macro created from bfd/bfd.m4.
* configure.in: Add Tests for tm_gmtoff, st_mtim.tv_sec and
st_mtim.tv_nsec (from bfd/configure.in). Check for time.h and
sys/stat.h headers.
Add te-vms.o in extra_objects if te_file is vms.
* configure: Regenerate.
* config.in: Regenerate.
* config/te-vms.c: New file, from bfd/vmsutil.c
(vms_dwarf2_file_time_name, vms_dwarf2_file_size_name)
(vms_dwarf2_file_name): New functions.
(vms_file_stats_name): Make it static, add a dirname parameter to
locally create the full pathname.
* config/te-vms.h: Add a copyright header.
Declare the above functions.
(DWARF2_FILE_TIME_NAME, DWARF2_FILE_SIZE_NAME, DWARF2_FILE_NAME): Use
the above functions in the definition.
* makefile.vms (OBJS): Add te-vms.obj.
(te-vms.obj): Create a specific target.
* configure.com: Create targ-env.h using a per target value.
Compile te-vms.c for ia64.
(record_thumb_to_arm_glue, bfd_arm_process_before_allocation):
Change member name class to symbol_class.
* bfd/coff-i960.c (coff_i960_relocate_section) Rename variable
class to class_val. Change member name class to symbol_class.
* bfd/coff-rs6000.c (_bfd_xcoff_swap_aux_in)
(_bfd_xcoff_swap_aux_out): Rename arguments class to in_class.
* bfd/coff-stgo32.c (adjust_aux_in_post)
(adjust_aux_out_pre, adjust_aux_out_post): Rename arguments class
to in_class.
* bfd/coff64-rs6000.c (_bfd_xcoff64_swap_aux_in)
(_bfd_xcoff64_swap_aux_out): Rename arguments class to in_class.
* bfd/coffcode.h (coff_pointerize_aux_hook): Rename variable class
to n_sclass.
* bfd/coffgen.c (coff_write_symbol, coff_pointerize_aux): Rename
variables named class to n_sclass. (coff_write_symbols): Rename
variable class to sym_class. (bfd_coff_set_symbol_class): Rename
argument class to symbol_class.
* bfd/cofflink.c (_bfd_coff_link_hash_newfunc)
(coff_link_add_symbols, _bfd_coff_link_input_bfd)
(_bfd_coff_write_global_sym, _bfd_coff_generic_relocate_section):
Update code to use renamed members.
* bfd/coffswap.h (coff_swap_aux_in, coff_swap_aux_out): Rename
argument class to in_class.
* bfd/libcoff-in.h (struct coff_link_hash_entry, struct
coff_debug_merge_type) Renamed members class to symbol_class and
type_class.
* bfd/libcoff.h Regenerated.
* bfd/peXXigen.c: (_bfd_XXi_swap_aux_in, _bfd_XXi_swap_aux_out):
Rename argument class to in_class.
* bfd/pef.c (bfd_pef_parse_imported_symbol): Update code to use
renamed members.
* bfd/pef.h (struct bfd_pef_imported_symbol): Changed name of
member class to symbol_class.
* binutils/ieee.c (ieee_read_cxx_misc, ieee_read_cxx_class)
(ieee_read_reference): Rename variables named class to cxxclass.
* gas/config/tc-arc.c (struct syntax_classes): Rename member class
to s_class. (arc_extinst): Rename variable class to
s_class. Update code to use renamed members.
* gas/config/tc-mips.c (insn_uses_reg): Rename argument class to
regclass.
* gas/config/tc-ppc.c (ppc_csect, ppc_change_csect, ppc_function)
(ppc_tc, ppc_is_toc_sym, ppc_symbol_new_hook, ppc_frob_label)
(ppc_fix_adjustable, md_apply_fix): Update code to use renamed
members.
* gas/config/tc-ppc.h (struct ppc_tc_sy): Change name of member
from class to symbol_class. (OBJ_COPY_SYMBOL_ATTRIBUTES): Update
code to use renamed members.
* gas/config/tc-score.c (s3_adjust_paritybit): Rename argument
class to i_class.
* gas/config/tc-score7.c (s7_adjust_paritybit): Rename argument
class to i_class.
* gprof/corefile.c (core_create_function_syms): Rename variable
class to cxxclass.
* include/coff/ti.h (GET_LNSZ_SIZE, PUT_LNSZ_SIZE): Updated name
of class variable to in_class to match changes in function that
use this macro.
* include/opcode/ia64.h (struct ia64_operand): Renamed member
class to op_class
* ld/emultempl/elf32.em (gld${EMULATION_NAME}_load_symbols)
(gld${EMULATION_NAME}_try_needed): Rename variable class to
link_class
* opcodes/ia64-dis.c (print_insn_ia64): Update code to use renamed
member.
* opcodes/m88k-dis.c (m88kdis): Rename variable class to in_class.
* opcodes/tic80-opc.c (tic80_symbol_to_value)
(tic80_value_to_symbol): Rename argument class to symbol_class.
* config/bfin-parse.y (asm_1): Implement HLT instruction.
Fix comments for DBGA, DBGAH and DBGAL.
* config/tc-bfin.c (bfin_gen_pseudodbg_assert): Change according
to the new encoding of DBGA, DBGAH, and DBGAL.
include/
* opcode/bfin.h (PseudoDbg_Assert): Add bits_grp and mask_grp.
(PseudoDbg_Assert_grp_bits, PseudoDbg_Assert_grp_mask): Define.
(PseudoDbg_Assert_dbgop_bits, PseudoDbg_Assert_dbgop_mask,
PseudoDbg_Assert_dontcare_bits, PseudoDbg_Assert_dontcare_mask):
Adjust accordingly.
(init_PseudoDbg_Assert): Add PseudoDbg_Assert_grp_bits and
PseudoDbg_Assert_grp_mask.
opcodes/
* bfin-dis.c (decode_pseudodbg_assert_0): Change according
to the new encoding of DBGA, DBGAH, and DBGAL.
(_print_insn_bfin): Likewise.
(F_REG_HIGH): Redefine.
(F_REG_NONE): New macro.
(F_REG_LOW): New macro.
(REG_CLASS): Enclose macro argument in parentheses when used.
(REG_EVEN): Likewise.
(IS_H): Use flags.
(IS_HCOMPL): Use flags.
* config/bfin-lex.l (SP.L, SP.H, FP.L, FP.H): Set flags.
(parse_reg): Set flags.
(parse_halfreg): Set flags.
* config/gas/bfin-parse.y (asm_1): Clean up and unify error handling
for load and store insns.
(neg_value): Delete function.
testsuite/
From Bernd Schmidt <bernd.schmidt@analog.com>
* gas/bfin/expected_errors.l, gas/bfin/expected_errors.s:
Check error messages for invalid load/store insns.
* config/tc-bfin.c (bfin_fix_adjustable): Partially revert the
2007-08-23 change; BFD_RELOC_BFIN_GOT is not adjustable.
2007-08-23 Jie Zhang <jie.zhang@analog.com>
* config/tc-bfin.c (bfin_fix_adjustable): Adjust
BFD_RELOC_BFIN_GOT, BFD_RELOC_BFIN_GOT17M4 and
BFD_RELOC_BFIN_FUNCDESC_GOT17M4.
(read_a_source_file): Pass the beginning of the symbol through
the new argument of TC_START_LABEL.
* config/tc-arm.h (TC_START_LABEL): Add a new argument.
* config/tc-bfin.c (bfin_start_label): Only search '(' and '['
from the beginning of the symbol.
* config/tc-bfin.h (TC_START_LABEL): Add the new argument.
* config/tc-d30v.h (TC_START_LABEL): Likewise.
* config/tc-fr30.h (TC_START_LABEL): Likewise.
* config/tc-m32c.h (TC_START_LABEL): Likewise.
* config/tc-m32r.h (TC_START_LABEL): Likewise.
* config/tc-mep.h (TC_START_LABEL): Likewise.
testsuite/
* gas/bfin/stack2.s: Add pop multiple instruction with a label
on the same line.
* gas/bfin/stack2.d: Adjust accordingly.
keyword in c++.
* bfd/aoutx.h (NAME (aout, make_empty_symbol)): Rename variable
new to new_symbol.
* bfd/coffgen.c (coff_make_empty_symbol)
(coff_bfd_make_debug_symbol): Rename variable new to new_symbol.
* bfd/cpu-ia64-opc.c (ext_reg, ins_imms_scaled): Rename variable
new to new_insn.
* bfd/doc/chew.c (newentry, add_intrinsic): Rename variable new to
new_d.
* bfd/ecoff.c (_bfd_ecoff_make_empty_symbol): Rename variable new
to new_symbol.
* bfd/elf32-m68k.c (elf_m68k_get_got_entry_type): Rename argument
new to new_reloc.
* bfd/hash.c (bfd_hash_lookup): Rename variable new to new_string.
* bfd/ieee.c (ieee_make_empty_symbol): Rename variable new to
new_symbol.
* bfd/linker.c (bfd_new_link_order): Rename variable new to
new_lo.
* bfd/mach-o.c (bfd_mach_o_sizeof_headers): Rename variable new to
symbol.
* bfd/oasys.c (oasys_make_empty_symbol): Rename variable new to
new_symbol_type.
* bfd/pdp11.c (NAME (aout, make_empty_symbol)): Rename variable
new to new_symbol_type.
* bfd/plugin.c (bfd_plugin_make_empty_symbol): Rename variable new
to new_symbol.
* bfd/rs6000-core.c (CoreHdr, VmInfo): Rename union member new to
new_dump.
(read_hdr, rs6000coff_core_p)
(rs6000coff_core_file_matches_executable_p)
(rs6000coff_core_file_failing_command)
(rs6000coff_core_file_failing_signal): Updated function to use new
union member name.
* bfd/som.c (som_make_empty_symbol): Rename variable new to
new_symbol_type.
* bfd/syms.c (_bfd_generic_make_empty_symbol): Rename variable new
to new_symbol.
* bfd/tekhex.c (first_phase, tekhex_make_empty_symbol): Rename
variable new to new_symbol.
* binutils/nlmconv.c (main): Rename variable new to new_name.
* gas/config/tc-arm.c (insert_reg_alias): Rename variable new to
new_reg.
* gas/config/tc-dlx.c (parse_operand): Rename variable new to
new_pos.
* gas/config/tc-ia64.c (ia64_gen_real_reloc_type): Rename variable
new to newr.
* gas/config/tc-mcore.c (parse_exp, parse_imm): Rename variable
new to new_pointer.
* gas/config/tc-microblaze.c (parse_exp, parse_imm, check_got):
Change name from new to new_pointer.
* gas/config/tc-or32.c (parse_operand): Rename variable new to
new_pointer.
* gas/config/tc-pdp11.c (md_assemble): Rename variable new to
new_pointer.
* gas/config/tc-pj.c (alias): Change argument new to new_name.
* gas/config/tc-score.c (s3_build_score_ops_hsh): Rename variable
new to new_opcode. (s3_build_dependency_insn_hsh) Rename variable
new to new_i2n. (s3_convert): Rename variables old and new to
r_old and r_new.
* gas/config/tc-score7.c (s7_build_score_ops_hsh): Rename variable
new to new_opcode. (s7_build_dependency_insn_hsh): Rename variable
new to new_i2d. (s7_b32_relax_to_b16, s7_convert_frag): Rename
variables old and new to r_old and r_new.
* gas/config/tc-sh.c (parse_exp): Rename variable new to
new_pointer.
* gas/config/tc-sh64.c (shmedia_parse_exp): Rename variable new to
new_pointer.
* gas/config/tc-tic4x.c (tic4x_operand_parse): Rename variable new
to new_pointer.
* gas/config/tc-z8k.c (parse_exp): Rename variable new to
new_pointer.
* gas/listing.c (listing_newline): Rename variable new to new_i.
* ld/ldexp.c (exp_intop, exp_bigintop, exp_relop, exp_binop)
(exp_trinop, exp_unop, exp_nameop, exp_assop): Rename variable new
to new_e.
* ld/ldfile.c (ldfile_add_library_path): Rename variable new to
new_dirs. (ldfile_add_arch): Rename variable new to new_arch.
* ld/ldlang.c (new_statement, lang_final, lang_add_wild)
(lang_target, lang_add_fill, lang_add_data, lang_add_assignment)
(lang_add_insert): Rename variable new to new_stmt. (new_afile):
Added missing cast. (lang_memory_region_lookup): Rename variable
new to new_region. (init_os): Rename variable new to
new_userdata. (lang_add_section): Rename variable new to
new_section. (ldlang_add_undef): Rename variable new to
new_undef. (realsymbol): Rename variable new to new_name.
* opcodes/z8kgen.c (internal, gas): Rename variable new to new_op.
Updated sources to avoid using the identifier name "template",
which is a keyword in c++.
* bfd/elf32-arm.c (struct stub_def): Rename member template to
template_sequence. (arm_build_one_stub,
find_stub_size_and_template, arm_size_one_stub, arm_map_one_stub):
Rename variable template to template_sequence.
* bfd/elfxx-ia64.c (elfNN_ia64_relax_br, elfNN_ia64_relax_brl):
Rename variable template to template_val.
* gas/config/tc-arm.c (struct asm_cond, struct asm_psr, struct
asm_barrier_opt): Change member template to
template_name. (md_begin): Update code to reflect new member
names.
* gas/config/tc-i386.c (struct templates, struct _i386_insn)
(match_template, cpu_flags_match, match_reg_size, match_mem_size)
(operand_size_match, md_begin, i386_print_statistics, pi)
(build_vex_prefix, md_assemble, parse_insn, optimize_imm)
(optimize_disp): Updated code to use new names. (parse_insn):
Added casts.
* gas/config/tc-ia64.c (dot_template, emit_one_bundle): Updated
code to use new names.
* gas/config/tc-score.c (struct s3_asm_opcode): Renamed member
template to template_name. (s3_parse_16_32_inst, s3_parse_48_inst,
s3_do_macro_ldst_label, s3_build_score_ops_hsh): Update code to
use new names.
* gas/config/tc-score7.c (struct s7_asm_opcode): Renamed member
template to template_name. (s7_parse_16_32_inst,
s7_do_macro_ldst_label, s7_build_score_ops_hsh): Update code to
use new names.
* gas/config/tc-tic30.c (md_begin, struct tic30_insn)
(md_assemble): Update code to use new names.
* gas/config/tc-tic54x.c (struct _tic54x_insn, md_begin)
(optimize_insn, tic54x_parse_insn, next_line_shows_parallel):
Update code to use new names.
* include/opcode/tic30.h (template): Rename type template to
insn_template. Updated code to use new name.
* include/opcode/tic54x.h (template): Rename type template to
insn_template.
* opcodes/cris-dis.c (bytes_to_skip): Update code to use new name.
* opcodes/i386-dis.c (putop): Update code to use new name.
* opcodes/i386-gen.c (process_i386_opcodes): Update code to use
new name.
* opcodes/i386-opc.h (struct template): Rename struct template to
insn_template. Update code accordingly.
* opcodes/i386-tbl.h (i386_optab): Update type to use new name.
* opcodes/ia64-dis.c (print_insn_ia64): Rename variable template
to template_val.
* opcodes/tic30-dis.c (struct instruction, get_tic30_instruction):
Update code to use new name.
* opcodes/tic54x-dis.c (has_lkaddr, get_insn_size)
(print_parallel_instruction, print_insn_tic54x, tic54x_get_insn):
Update code to use new name.
* opcodes/tic54x-opc.c (tic54x_unknown_opcode, tic54x_optab):
Update type to new name.
* config/tc-xtensa.c (config_max_slots): New global variable.
(md_begin): Set config_max_slots.
(total_frag_text_expansion): Use config_max_slots instead of
MAX_SLOTS.
(xg_init_vinsn): Likewise.
(xg_clear_vinsn): Likewise.
(xg_free_vinsn): Likewise.
* config/tc-xtensa.h (xtensa_frag_data): Rename unused field fr_prev
to no_transform_end.
* config/tc-xtensa.c (xtensa_mark_difference_of_two_symbols): Set
and use no_transform_end.
* config/tc-xtensa.c (xtensa_create_xproperty_segments): Use
sizeof instead of hard-coded value.
(add_xt_block_frags): Remove unused local variable.
(frag_flags_to_number): Change return type to flagword. Remove
unused local variable.
* config/tc-arm.c (marked_pr_dependency, mapstate): Delete global
variables.
(mapping_state): Use the section's mapstate.
(mapping_state_2): Likewise. Skip special sections.
(s_arm_unwind_fnend): Use the section's marked_pr_dependency.
(arm_elf_change_section): Do not set deleted globals.
* config/tc-arm.h (struct arm_segment_info_type): Document
marked_pr_dependency.
gas/testsuite/
* gas/arm/mapping2.s: Test code after .ident.
* config/tc-mips.c (MIPS_JALR_HINT_P): New define. For IRIX, it is
true for new abi. For non-IRIX targets, it is always true.
(macro_build_jalr): If MIPS_JALR_HINT_P, emit BFD_RELOC_MIPS_JALR.
