* config/m68k-parse.h (enum m68k_register): Add ACR[4-7], RGPIOBAR.
* config/tc-m68k.c (mcf5206_ctrl): Fix whitespace. (mcf52223_ctrl): Remove non-existent registers. (mcf54418): Define. (mcf54455): Remove MBAR. (m68k_cpus): Add lines for MCF5441x family. (m68k_ip, init_table): Handle RGPIOBAR, ACR[4-7]. * m68k-dis.c (print_insn_arg): Handle RGPIOBAR, ACR[4-7] and MBAR[01].
This commit is contained in:
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3ab904c416
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0d999f3337
5 changed files with 58 additions and 8 deletions
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@ -1,3 +1,13 @@
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2009-11-10 Maxim Kuvyrkov <maxim@codesourcery.com>
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* config/m68k-parse.h (enum m68k_register): Add ACR[4-7], RGPIOBAR.
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* config/tc-m68k.c (mcf5206_ctrl): Fix whitespace.
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(mcf52223_ctrl): Remove non-existent registers.
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(mcf54418): Define.
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(mcf54455): Remove MBAR.
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(m68k_cpus): Add lines for MCF5441x family.
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(m68k_ip, init_table): Handle RGPIOBAR, ACR[4-7].
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2009-11-06 H.J. Lu <hongjiu.lu@intel.com>
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* doc/c-i386.texi: Move .lwp.
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@ -127,9 +127,11 @@ enum m68k_register
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PCR3U0, PCR3L0, PCR3U1, PCR3L1,/* mcfv4e added these. */
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MBAR0, MBAR1, /* mcfv4e added these. */
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ACR0, ACR1, ACR2, ACR3, /* mcf5200 added these. */
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ACR4, ACR5, ACR6, ACR7, /* mcf54418 added these. */
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FLASHBAR, RAMBAR, /* mcf528x added these. */
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MBAR2, /* mcf5249 added this. */
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MBAR,
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RGPIOBAR, /* mcf54418 added this. */
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ASID, /* m5475. */
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CAC, /* fido added this. */
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MBO,
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@ -186,7 +186,7 @@ static const enum m68k_register mcf51_ctrl[] = {
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0
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};
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static const enum m68k_register mcf5206_ctrl[] = {
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CACR, ACR0, ACR1, VBR, RAMBAR0, RAMBAR_ALT, MBAR,
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CACR, ACR0, ACR1, VBR, RAMBAR0, RAMBAR_ALT, MBAR,
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0
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};
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static const enum m68k_register mcf5208_ctrl[] = {
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@ -210,7 +210,7 @@ static const enum m68k_register mcf5221x_ctrl[] = {
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0
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};
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static const enum m68k_register mcf52223_ctrl[] = {
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VBR, CACR, ACR0, ACR1, FLASHBAR, RAMBAR, RAMBAR1,
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VBR, FLASHBAR, RAMBAR, RAMBAR1,
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0
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};
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static const enum m68k_register mcf52235_ctrl[] = {
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@ -302,13 +302,22 @@ static const enum m68k_register mcf5407_ctrl[] = {
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MBAR1 /* MBAR */, RAMBAR /* RAMBAR1 */,
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0
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};
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static const enum m68k_register mcf54455_ctrl[] = {
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CACR, ASID, ACR0, ACR1, ACR2, ACR3, MMUBAR,
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VBR, PC, RAMBAR1, MBAR,
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static const enum m68k_register mcf54418_ctrl[] = {
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CACR, ASID, ACR0, ACR1, ACR2, ACR3, ACR4, ACR5, ACR6, ACR7, MMUBAR, RGPIOBAR,
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VBR, PC, RAMBAR1,
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/* Legacy names */
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TC /* ASID */, BUSCR /* MMUBAR */,
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ITT0 /* ACR0 */, ITT1 /* ACR1 */, DTT0 /* ACR2 */, DTT1 /* ACR3 */,
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MBAR1 /* MBAR */, RAMBAR /* RAMBAR1 */,
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RAMBAR /* RAMBAR1 */,
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0
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};
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static const enum m68k_register mcf54455_ctrl[] = {
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CACR, ASID, ACR0, ACR1, ACR2, ACR3, MMUBAR,
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VBR, PC, RAMBAR1,
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/* Legacy names */
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TC /* ASID */, BUSCR /* MMUBAR */,
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ITT0 /* ACR0 */, ITT1 /* ACR1 */, DTT0 /* ACR2 */, DTT1 /* ACR3 */,
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RAMBAR /* RAMBAR1 */,
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0
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};
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static const enum m68k_register mcf5475_ctrl[] = {
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@ -693,6 +702,12 @@ static const struct m68k_cpu m68k_cpus[] =
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{mcfisa_a|mcfisa_b|mcfhwdiv|mcfmac, mcf5407_ctrl, "5407",0},
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{mcfisa_a|mcfisa_c|mcfhwdiv|mcfemac|mcfusp, mcf54418_ctrl, "54410", -1},
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{mcfisa_a|mcfisa_c|mcfhwdiv|mcfemac|mcfusp, mcf54418_ctrl, "54415", -1},
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{mcfisa_a|mcfisa_c|mcfhwdiv|mcfemac|mcfusp, mcf54418_ctrl, "54416", -1},
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{mcfisa_a|mcfisa_c|mcfhwdiv|mcfemac|mcfusp, mcf54418_ctrl, "54417", -1},
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{mcfisa_a|mcfisa_c|mcfhwdiv|mcfemac|mcfusp, mcf54418_ctrl, "54418", 0},
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{mcfisa_a|mcfisa_c|mcfhwdiv|mcfemac|mcfusp, mcf54455_ctrl, "54450", -1},
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{mcfisa_a|mcfisa_c|mcfhwdiv|mcfemac|mcfusp, mcf54455_ctrl, "54451", -1},
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{mcfisa_a|mcfisa_c|mcfhwdiv|mcfemac|mcfusp, mcf54455_ctrl, "54452", -1},
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@ -3330,6 +3345,15 @@ m68k_ip (char *instring)
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case MMUBAR:
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tmpreg = 0x008;
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break;
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case RGPIOBAR:
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tmpreg = 0x009;
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break;
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case ACR4:
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case ACR5:
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case ACR6:
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case ACR7:
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tmpreg = 0x00c + (opP->reg - ACR4);
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break;
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case USP:
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tmpreg = 0x800;
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@ -4125,6 +4149,10 @@ static const struct init_entry init_table[] =
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{ "acr1", ACR1 }, /* Access Control Unit 1. */
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{ "acr2", ACR2 }, /* Access Control Unit 2. */
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{ "acr3", ACR3 }, /* Access Control Unit 3. */
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{ "acr4", ACR4 }, /* Access Control Unit 4. */
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{ "acr5", ACR5 }, /* Access Control Unit 5. */
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{ "acr6", ACR6 }, /* Access Control Unit 6. */
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{ "acr7", ACR7 }, /* Access Control Unit 7. */
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{ "tc", TC }, /* MMU Translation Control Register. */
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{ "tcr", TC },
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@ -4170,6 +4198,8 @@ static const struct init_entry init_table[] =
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{ "mbar2", MBAR2 }, /* mcf5249 registers. */
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{ "rgpiobar", RGPIOBAR }, /* mcf54418 registers. */
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{ "cac", CAC }, /* fido registers. */
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{ "mbb", MBO }, /* fido registers (obsolete). */
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{ "mbo", MBO }, /* fido registers. */
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@ -1,3 +1,7 @@
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2009-11-10 Maxim Kuvyrkov <maxim@codesourcery.com>
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* m68k-dis.c (print_insn_arg): Handle RGPIOBAR, ACR[4-7] and MBAR[01].
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2009-11-06 Sebastian Pop <sebastian.pop@amd.com>
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* i386-dis.c (reg_table): Add XOP_8F_TABLE (XOP_09) to
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@ -707,14 +707,18 @@ print_insn_arg (const char *d,
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{"%sfc", 0x000}, {"%dfc", 0x001}, {"%cacr", 0x002},
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{"%tc", 0x003}, {"%itt0",0x004}, {"%itt1", 0x005},
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{"%dtt0",0x006}, {"%dtt1",0x007}, {"%buscr",0x008},
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{"%rgpiobar", 0x009}, {"%acr4",0x00c},
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{"%acr5",0x00d}, {"%acr6",0x00e}, {"%acr7", 0x00f},
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{"%usp", 0x800}, {"%vbr", 0x801}, {"%caar", 0x802},
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{"%msp", 0x803}, {"%isp", 0x804},
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{"%pc", 0x80f},
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/* Reg c04 is sometimes called flashbar or rambar.
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Rec c05 is also sometimes called rambar. */
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Reg c05 is also sometimes called rambar. */
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{"%rambar0", 0xc04}, {"%rambar1", 0xc05},
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{"%mbar", 0xc0f},
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/* reg c0e is sometimes called mbar2 or secmbar.
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reg c0f is sometimes called mbar. */
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{"%mbar0", 0xc0e}, {"%mbar1", 0xc0f},
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/* Should we be calling this psr like we do in case 'Y'? */
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{"%mmusr",0x805},
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