gas/
* config/tc-arm.c (do_t_nop): Correct check for Thumb-2 NOP. gas/testsuite/ * gas/arm/thumb-nop.d, gas/arm/thumb-nop.s: New test. * gas/arm/relax_branch_align.d: Expect a default NOP instruction. * gas/arm/vfp1_t2.d, gas/arm/vfp1xD_t2.d: Specify a CPU with Thumb-2. ld/testsuite/ * ld-arm/arm-elf.exp (armelftests): Assemble Cortex-A8 tests with -mcpu=cortex-a8.
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5e6718e49c
commit
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10 changed files with 43 additions and 9 deletions
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@ -1,3 +1,7 @@
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2010-01-13 Daniel Jacobowitz <dan@codesourcery.com>
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* config/tc-arm.c (do_t_nop): Correct check for Thumb-2 NOP.
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2010-01-13 Nick Clifton <nickc@redhat.com>
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* config/tc-h8300.c (h8300_elf_section): New function - issue a
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@ -10623,7 +10623,7 @@ do_t_nop (void)
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{
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/* PR9722: Check for Thumb2 availability before
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generating a thumb2 nop instruction. */
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if (ARM_CPU_HAS_FEATURE (cpu_variant, arm_arch_t2))
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if (ARM_CPU_HAS_FEATURE (selected_cpu, arm_ext_v6t2))
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{
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inst.instruction = THUMB_OP16 (inst.instruction);
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inst.instruction |= inst.operands[0].imm << 4;
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@ -1,3 +1,10 @@
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2010-01-13 Daniel Jacobowitz <dan@codesourcery.com>
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* gas/arm/thumb-nop.d, gas/arm/thumb-nop.s: New test.
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* gas/arm/relax_branch_align.d: Expect a default NOP instruction.
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* gas/arm/vfp1_t2.d, gas/arm/vfp1xD_t2.d: Specify a CPU with
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Thumb-2.
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2010-01-13 Nick Clifton <nickc@redhat.com>
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* gas/elf/section0.d: Skip this test for the h8300.
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.*: +file format .*arm.*
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Disassembly of section .text:
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0+000 <[^>]+> bf00 nop
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0+000 <[^>]+> 46c0 nop ; \(mov r8, r8\)
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0+002 <[^>]+> f000 8080 beq.w 0+106 <[^>]*>
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0+006 <[^>]+> bf00 nop
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0+006 <[^>]+> 46c0 nop ; \(mov r8, r8\)
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#...
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0+100 <[^>]+> bf00 nop
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0+100 <[^>]+> 46c0 nop ; \(mov r8, r8\)
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0+102 <[^>]+> f47f af80 bne.w 0+006 <[^>]*>
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0+106 <[^>]+> bf00 nop
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0+106 <[^>]+> 46c0 nop ; \(mov r8, r8\)
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11
gas/testsuite/gas/arm/thumb-nop.d
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11
gas/testsuite/gas/arm/thumb-nop.d
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# name: Thumb NOP
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# objdump: -dr --prefix-addresses --show-raw-insn
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#
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# Both explicit nop and padding should not use Thumb-2 NOP for the
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# default CPU.
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.*: +file format .*arm.*
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Disassembly of section \.text:
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0+000 <[^>]+> 46c0 nop ; \(mov r8, r8\)
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0+002 <[^>]+> 46c0 nop ; \(mov r8, r8\)
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5
gas/testsuite/gas/arm/thumb-nop.s
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5
gas/testsuite/gas/arm/thumb-nop.s
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.text
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.code 16
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.p2align 2
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.foo:
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nop
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#objdump: -dr --prefix-addresses --show-raw-insn
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#name: Thumb-2 VFP Double-precision instructions
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#as: -mfpu=vfp
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#as: -mfpu=vfp -mcpu=arm1156t2f-s
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# Test the ARM VFP Double Precision instructions
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#objdump: -dr --prefix-addresses --show-raw-insn
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#name: Thumb-2 VFP Single-precision instructions
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#as: -mfpu=vfpxd
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#as: -mfpu=vfpxd -mcpu=arm1156t2f-s
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# Test the ARM VFP Single Precision instructions
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@ -1,3 +1,8 @@
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2010-01-13 Daniel Jacobowitz <dan@codesourcery.com>
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* ld-arm/arm-elf.exp (armelftests): Assemble Cortex-A8 tests with
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-mcpu=cortex-a8.
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2010-01-13 Nick Clifton <nickc@redhat.com>
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* ld-scrips/sort.exp: Skip these tests when the target is the
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@ -207,11 +207,13 @@ set armelftests {
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{{objdump -dr cortex-a8-fix-blx-rel-thumb.d}}
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"cortex-a8-fix-blx-rel-thumb"}
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{"Cortex-A8 erratum fix, relocate bl.w and far call"
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"-EL -Ttext=0x00 --fix-cortex-a8 --defsym far_fn1=0x80000000 --defsym far_fn2=0x80000004 --defsym far_fn=0x7fff0000 --defsym _start=0" "-EL" {cortex-a8-far-1.s cortex-a8-far-2.s}
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"-EL -Ttext=0x00 --fix-cortex-a8 --defsym far_fn1=0x80000000 --defsym far_fn2=0x80000004 --defsym far_fn=0x7fff0000 --defsym _start=0"
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"-EL -mcpu=cortex-a8" {cortex-a8-far-1.s cortex-a8-far-2.s}
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{{objdump -dr cortex-a8-far.d}}
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"cortex-a8-far"}
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{"Cortex-A8 erratum fix, headers"
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"-EL --fix-cortex-a8 -T cortex-a8-fix-hdr.t" "-EL" {cortex-a8-fix-hdr.s}
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"-EL --fix-cortex-a8 -T cortex-a8-fix-hdr.t"
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"-EL -mcpu=cortex-a8" {cortex-a8-fix-hdr.s}
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{{objdump -dr cortex-a8-fix-hdr.d}}
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"cortex-a8-fix-hdr"}
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{"Unwinding and -gc-sections" "-gc-sections" "" {gc-unwind.s}
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