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[opcodes]

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* rx-decode.opc (rx_decode_opcode) (mvtipl): Add.
	(mvtcp, mvfcp, opecp): Remove.
	* rx-decode.c: Regenerate.
	* rx-dis.c (cpen): Remove.

[gas]
	* config/rx-parse.y (MVTIPL): Update bit pattern.
	(cpen): Remove.

[include/opcode]
	* rx.h (rx_decode_opcode) (mvtipl): Add.
	(mvtcp, mvfcp, opecp): Remove.
This commit is contained in:
DJ Delorie 2009-11-05 00:38:45 +00:00
parent f0b666055b
commit 0d734b5d06
7 changed files with 24 additions and 16 deletions
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5
gas/ChangeLog
View file

@ -1,3 +1,8 @@
2009-11-04 DJ Delorie <dj@redhat.com>
* config/rx-parse.y (MVTIPL): Update bit pattern.
(cpen): Remove.
2009-11-04 Daniel Jacobowitz <dan@codesourcery.com>
Maxim Kuvyrkov <maxim@codesourcery.com>

4
gas/config/rx-parse.y
View file

@ -532,7 +532,7 @@ statement :
/* ---------------------------------------------------------------------- */
| MVTIPL '#' EXPR
{ B2 (0x7f, 0x98); FE ($3, 13, 3); }
{ B3 (0x75, 0x70, 0x00); FE ($3, 20, 4); }
/* ---------------------------------------------------------------------- */
@ -939,7 +939,7 @@ token_table[] =
{ "pc", CREG, 1 },
{ "usp", CREG, 2 },
{ "fpsw", CREG, 3 },
{ "cpen", CREG, 4 },
/* reserved */
/* reserved */
/* reserved */
{ "wr", CREG, 7 },

5
include/opcode/ChangeLog
View file

@ -1,3 +1,8 @@
2009-11-04 DJ Delorie <dj@redhat.com>
* rx.h (rx_decode_opcode) (mvtipl): Add.
(mvtcp, mvfcp, opecp): Remove.
2009-11-02 Paul Brook <paul@codesourcery.com>
* arm.h (FPU_VFP_EXT_V3xD, FPU_VFP_EXT_FP16, FPU_NEON_EXT_FMA,

5
include/opcode/rx.h
View file

@ -139,10 +139,7 @@ typedef enum
RXO_clrpsw, /* flag index in d */
RXO_setpsw, /* flag index in d */
RXO_mvtcp, /* cop# in s2, cop[d] = s */
RXO_mvfcp, /* cop# in s2, d = cop[s] */
RXO_opecp, /* cop# in s2, do cop[s] */
RXO_mvtipl, /* new IPL in s */
RXO_rtfi,
RXO_rte,

7
opcodes/ChangeLog
View file

@ -1,3 +1,10 @@
2009-11-04 DJ Delorie <dj@redhat.com>
* rx-decode.opc (rx_decode_opcode) (mvtipl): Add.
(mvtcp, mvfcp, opecp): Remove.
* rx-decode.c: Regenerate.
* rx-dis.c (cpen): Remove.
2009-11-03 Doug Evans <dje@sebabeach.org>
* m32c-desc.c: Regenerate.

12
opcodes/rx-decode.opc
View file

@ -920,6 +920,9 @@ rx_decode_opcode (unsigned long pc AU,
/** 0111 1111 1010 rdst setpsw %0 */
ID(setpsw); DF(rdst);
/** 0111 0101 0111 0000 0000 immm mvtipl #%1 */
ID(mvtipl); SC(immm);
/** 0111 1110 111 crdst popc %0 */
ID(mov); OP(1, RX_Operand_Postinc, 0, 0); DR(crdst + 16);
@ -935,15 +938,6 @@ rx_decode_opcode (unsigned long pc AU,
/** 1111 1101 0110 101s rsrc rdst mvfc %1, %0 */
ID(mov); SR((s*16+rsrc) + 16); DR(rdst);
/*?* 1111 1101 1111 1010 01cp rsrc mvtcp #%2, %1, #%0 */
ID(mvtcp); S2C(cp); SR(rsrc); DC (IMM (WSIZE));
/*?* 1111 1101 1111 1011 01cp rdst mvfcp #%2, %0, #%1 */
ID(mvfcp); S2C(cp); DR(rdst); SC (IMM (WSIZE));
/*?* 1111 1101 1111 1001 01cp 0000 opecp #%2, #%1 */
ID(opecp); S2C(cp); SC (IMM (WSIZE));
/*----------------------------------------------------------------------*/
/* INTERRUPTS */

2
opcodes/rx-dis.c
View file

@ -63,7 +63,7 @@ static char const * register_names[] =
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
/* control register */
"psw", "pc", "usp", "fpsw", "cpen", "", "", "wr",
"psw", "pc", "usp", "fpsw", "", "", "", "wr",
"bpsw", "bpc", "isp", "fintv", "intb", "", "", "",
"pbp", "pben", "", "", "", "", "", "",
"bbpsw", "bbpc", "", "", "", "", "", ""