1998-04-29 01:44:23 +00:00
|
|
|
Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
|
|
|
|
|
1998-04-26 22:03:55 +00:00
|
|
|
Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
|
|
|
|
* config.in: Ditto.
|
|
|
|
|
|
|
|
|
|
Sun Apr 26 15:19:55 1998 Tom Tromey <tromey@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* acconfig.h: New file.
|
|
|
|
|
* configure.in: Reverted change of Apr 24; use sinclude again.
|
|
|
|
|
|
1998-04-24 20:39:48 +00:00
|
|
|
Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
|
|
|
|
* config.in: Ditto.
|
|
|
|
|
|
|
|
|
|
Fri Apr 24 11:19:07 1998 Tom Tromey <tromey@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure.in: Don't call sinclude.
|
|
|
|
|
|
1998-04-14 00:59:30 +00:00
|
|
|
Tue Apr 14 10:03:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
1998-04-24 20:39:48 +00:00
|
|
|
* mn10300_sim.h: Declare all functions in op_utils.c using
|
|
|
|
|
INLINE_SIM_MAIN.
|
|
|
|
|
* op_utils.c: Ditto.
|
|
|
|
|
* sim-main.c: New file. Include op_utils.c.
|
|
|
|
|
|
1998-04-14 00:59:30 +00:00
|
|
|
* mn10300.igen (mov, cmp): Use new igen operators `!' and `=' to
|
|
|
|
|
differentiate between MOV/CMP immediate/register instructions.
|
|
|
|
|
|
|
|
|
|
* configure.in (SIM_AC_OPTION_INLINE): Add and enable.
|
|
|
|
|
* configure: Regenerate.
|
|
|
|
|
|
1998-04-04 12:33:11 +00:00
|
|
|
Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
|
|
|
|
|
|
|
|
|
start-sanitize-am30
|
|
|
|
|
Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (hw): Delete variable, moved to SIM_DESC.
|
|
|
|
|
(sim_open): Delete calls to hw_tree_create, hw_tree_finish.
|
|
|
|
|
Handled by sim-module.
|
|
|
|
|
(sim_open): Do not anotate tree with trace properties, handled by
|
|
|
|
|
sim-hw.c
|
|
|
|
|
(sim_open): Call sim_hw_parse instead of hw_tree_parse.
|
|
|
|
|
|
|
|
|
|
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
|
|
|
|
|
|
|
|
|
end-sanitize-am30
|
1998-03-27 03:10:53 +00:00
|
|
|
start-sanitize-am30
|
|
|
|
|
Thu Mar 26 20:46:18 1998 Stu Grossman <grossman@bhuna.cygnus.co.uk>
|
|
|
|
|
|
|
|
|
|
* dv-mn103cpu.c (deliver_mn103cpu_interrupt): Save the entire PC
|
|
|
|
|
on the stack when delivering interrupts (not just the lower
|
|
|
|
|
half)...
|
|
|
|
|
* mn10300.igen (mov (Di,Am),Dn): Fix decode. Registers were
|
|
|
|
|
specified in the wrong order.
|
|
|
|
|
|
|
|
|
|
end-sanitize-am30
|
|
|
|
|
start-sanitize-am30
|
1998-03-26 14:00:18 +00:00
|
|
|
Fri Mar 27 00:56:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* dv-mn103cpu.c (deliver_mn103cpu_interrupt): Stop loss of
|
|
|
|
|
succeeding interrupts, clear pending_handler when the handler
|
|
|
|
|
isn't re-scheduled.
|
|
|
|
|
|
1998-03-27 03:10:53 +00:00
|
|
|
end-sanitize-am30
|
1998-03-26 10:18:35 +00:00
|
|
|
Thu Mar 26 10:11:01 1998 Stu Grossman <grossman@bhuna.cygnus.co.uk>
|
|
|
|
|
|
|
|
|
|
* Makefile.in (tmp-igen): Prefix all usage of move-if-change
|
|
|
|
|
script with $(SHELL) to make NT native builds happy.
|
|
|
|
|
* configure: Regenerate because of change to ../common/aclocal.m4.
|
|
|
|
|
|
1998-03-26 01:13:38 +00:00
|
|
|
Thu Mar 26 11:22:31 1998 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure.in: Make --enable-sim-common the default.
|
|
|
|
|
* configure: Re-generate.
|
|
|
|
|
|
|
|
|
|
* sim-main.h (CIA_GET, CIA_SET): Save/restore current instruction
|
|
|
|
|
address into Sate.regs[REG_PC] instead of common struct.
|
|
|
|
|
|
1998-03-25 22:43:19 +00:00
|
|
|
Wed Mar 25 17:42:00 1998 Joyce Janczyn <janczyn@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* mn10300.igen (cmp imm8,An): Do not sign extend imm8 value.
|
|
|
|
|
|
1998-03-25 17:10:01 +00:00
|
|
|
Wed Mar 25 12:08:00 1998 Joyce Janczyn <janczyn@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* simops.c (OP_F0FD): Initialise variable 'sp'.
|
|
|
|
|
|
1998-03-27 03:10:53 +00:00
|
|
|
start-sanitize-am30
|
1998-03-25 14:52:44 +00:00
|
|
|
Thu Mar 26 00:21:32 1998 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* dv-mn103int.c (decode_group): A group register every 4 bytes not
|
|
|
|
|
8.
|
|
|
|
|
(write_icr): Rewrite equation updating request field.
|
|
|
|
|
(read_iagr): Fix check that interrupt is still pending.
|
|
|
|
|
|
1998-03-27 03:10:53 +00:00
|
|
|
end-sanitize-am30
|
|
|
|
|
start-sanitize-am30
|
1998-03-25 05:37:42 +00:00
|
|
|
Wed Mar 25 16:14:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (sim_open): Tidy up device creation.
|
|
|
|
|
|
|
|
|
|
* dv-mn103int.c (mn103int_port_event): Drive NMI with non-zero
|
|
|
|
|
value.
|
|
|
|
|
(mn103int_io_read_buffer): Convert absolute address to register
|
|
|
|
|
block offsets.
|
|
|
|
|
(read_icr, write_icr): Convert block offset into group offset.
|
|
|
|
|
|
1998-03-27 03:10:53 +00:00
|
|
|
end-sanitize-am30
|
1998-03-25 04:15:38 +00:00
|
|
|
Wed Mar 25 15:08:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (sim_open): Create second 1mb memory region at
|
|
|
|
|
0x40000000.
|
|
|
|
|
(sim_open): Create a device tree.
|
|
|
|
|
(sim-hw.h): Include.
|
1998-03-27 03:10:53 +00:00
|
|
|
start-sanitize-am30
|
1998-03-25 04:15:38 +00:00
|
|
|
(do_interrupt): Delete, needs to use dv-mn103cpu.c
|
|
|
|
|
|
|
|
|
|
* dv-mn103int.c, dv-mn103cpu.c: New files.
|
1998-03-27 03:10:53 +00:00
|
|
|
end-sanitize-am30
|
1998-03-25 04:15:38 +00:00
|
|
|
|
1998-03-25 04:07:31 +00:00
|
|
|
Wed Mar 25 08:47:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* mn10300_sim.h (EXTRACT_PSW_LM, INSERT_PSW_LM, PSW_IE, PSW_LM):
|
|
|
|
|
Define.
|
|
|
|
|
(SP): Define.
|
|
|
|
|
|
1998-03-25 01:41:33 +00:00
|
|
|
Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
|
|
|
|
|
1998-03-25 00:08:52 +00:00
|
|
|
Wed Mar 25 10:24:48 1998 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (sim-options.h): Include.
|
|
|
|
|
(sim_kind, myname): Declare when not using common framework.
|
|
|
|
|
|
|
|
|
|
* mn10300_sim.h (do_syscall, generic*): Provide prototypes for
|
|
|
|
|
functions found in op_utils.c
|
|
|
|
|
|
|
|
|
|
* mn10300.igen (add): Discard unused variables.
|
|
|
|
|
|
|
|
|
|
* configure, config.in: Re-generate with autoconf 2.12.1.
|
|
|
|
|
|
1998-03-24 20:30:03 +00:00
|
|
|
Tue Mar 24 15:27:00 1998 Joyce Janczyn <janczyn@cygnus.com>
|
|
|
|
|
|
|
|
|
|
Add support for --enable-sim-common option.
|
|
|
|
|
* Makefile.in (WITHOUT_COMMON_OBJS): Files included if
|
|
|
|
|
! --enable-sim-common
|
|
|
|
|
(WITH_COMMON_OBJS): Files included if --enable-sim-common.
|
|
|
|
|
(MN10300_OBJS,MN10300_INTERP_DEP): New variables.
|
|
|
|
|
(SIM_OBJS): Rewrite.
|
|
|
|
|
({WITHOUT,WITH}_COMMON_RUN_OBJS,SIM_RUN_OBJS): New variables.
|
|
|
|
|
(SIM_EXTRA_CFLAGS): New variable.
|
|
|
|
|
(clean-extra): Clean up igen files.
|
|
|
|
|
(../igen/igen,clean-igen,tmp-igen): New rules.
|
|
|
|
|
* configure.in: Add support for common framework via
|
|
|
|
|
--enable-sim-common.
|
|
|
|
|
* configure: Regenerate.
|
|
|
|
|
* interp.c: #include sim-main if WITH_COMMON, not mn10300_sim.h.
|
|
|
|
|
(hash,dispatch,sim_size): Don't compile if ! WITH_COMMON.
|
|
|
|
|
(init_system,sim_write,compare_simops): Likewise.
|
|
|
|
|
(sim_set_profile,sim_set_profile_size): Likewise.
|
|
|
|
|
(sim_stop,sim_resume,sim_trace,sim_info): Likewise.
|
|
|
|
|
(sim_set_callbacks,sim_stop_reason,sim_read,sim_load): Likewise.
|
|
|
|
|
(enum interrupt_type): New enum.
|
|
|
|
|
(interrupt_names): New global.
|
|
|
|
|
(do_interrupt): New function.
|
|
|
|
|
(sim_open): Define differently if WITH_COMMON.
|
|
|
|
|
(sim_close,sim_create_inferior,sim_do_command): Likewise.
|
|
|
|
|
* mn10300_sim.h ({load,store}_{byte,half,word}): Define versions
|
|
|
|
|
for WITH_COMMON.
|
|
|
|
|
* mn10300.igen: New file.
|
|
|
|
|
* mn10300.dc: New file.
|
|
|
|
|
* op_utils.c: New file.
|
|
|
|
|
* sim-main.h: New file.
|
|
|
|
|
|
|
|
|
|
Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
|
|
|
|
|
|
|
|
|
Fri Feb 27 18:36:04 1998 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
|
|
|
|
* simops.c (inc): Fix typo.
|
|
|
|
|
|
1998-02-25 08:58:23 +00:00
|
|
|
Wed Feb 25 01:59:29 1998 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
|
|
|
|
* simops.c (signed multiply instructions): Cast input operands to
|
|
|
|
|
signed32 before casting them to signed64 so that the sign bit
|
|
|
|
|
is propagated properly.
|
|
|
|
|
|
1998-02-24 05:07:11 +00:00
|
|
|
Mon Feb 23 20:23:19 1998 Mark Alexander <marka@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* Makefile.in: Last change was bad. Define NL_TARGET
|
|
|
|
|
so that targ-vals.h will be used instead of syscall.h.
|
|
|
|
|
* simops.c: Use targ-vals.h instead of syscall.h.
|
|
|
|
|
(OP_F020): Disable unsupported system calls.
|
|
|
|
|
|
1998-02-23 17:51:23 +00:00
|
|
|
Mon Feb 23 09:44:38 1998 Mark Alexander <marka@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* Makefile.in: Get header files from libgloss/mn10300/sys.
|
|
|
|
|
|
1998-02-22 22:59:43 +00:00
|
|
|
Sun Feb 22 16:02:24 1998 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
|
|
|
|
* simops.c: Include sim-types.h.
|
|
|
|
|
|
|
|
|
|
Wed Feb 18 13:07:08 1998 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
|
|
|
|
* simops.c (multiply instructions): Cast input operands to a
|
|
|
|
|
signed64/unsigned64 type as appropriate.
|
|
|
|
|
|
1998-02-17 04:06:38 +00:00
|
|
|
Tue Feb 17 12:47:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (sim_store_register, sim_fetch_register): Pass in
|
|
|
|
|
length parameter. Return -1.
|
|
|
|
|
|
|
|
|
|
Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
|
|
|
|
|
1998-01-31 14:07:23 +00:00
|
|
|
Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
|
|
|
|
|
1998-01-20 06:37:00 +00:00
|
|
|
Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
|
|
|
|
|
|
|
|
|
Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
|
|
|
|
* config.in: Ditto.
|
|
|
|
|
|
|
|
|
|
Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
|
|
|
|
|
|
|
|
|
Tue Nov 11 10:38:52 1997 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
|
|
|
|
* simops.c (call:16 call:32): Stack adjustment is determined solely
|
|
|
|
|
by the imm8 field.
|
|
|
|
|
|
1997-10-22 05:26:27 +00:00
|
|
|
Wed Oct 22 14:43:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
1997-10-25 05:04:25 +00:00
|
|
|
* interp.c (sim_load): Pass lma_p and sim_write args to
|
1997-10-22 05:26:27 +00:00
|
|
|
sim_load_file.
|
|
|
|
|
|
1997-10-21 16:07:53 +00:00
|
|
|
Tue Oct 21 10:12:03 1997 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
|
|
|
|
* simops.c: Correctly handle register restores for "ret" and "retf"
|
|
|
|
|
instructions.
|
|
|
|
|
|
|
|
|
|
Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
|
|
|
|
|
|
|
|
|
Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
|
|
|
|
|
1997-09-23 01:25:26 +00:00
|
|
|
Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
|
|
|
|
|
1997-09-22 02:49:57 +00:00
|
|
|
Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
|
|
|
|
|
1997-09-22 00:24:46 +00:00
|
|
|
Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
|
|
|
|
|
|
|
|
|
Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
|
|
|
|
|
1997-09-05 00:42:05 +00:00
|
|
|
Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
|
|
|
|
|
1997-08-27 22:43:18 +00:00
|
|
|
Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
|
|
|
|
* config.in: Ditto.
|
|
|
|
|
|
1997-08-26 02:05:18 +00:00
|
|
|
Tue Aug 26 10:41:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (sim_kill): Delete.
|
1997-08-27 04:44:41 +00:00
|
|
|
(sim_create_inferior): Add ABFD argument.
|
|
|
|
|
(sim_load): Move setting of PC from here.
|
|
|
|
|
(sim_create_inferior): To here.
|
1997-08-26 02:05:18 +00:00
|
|
|
|
1997-08-25 23:14:25 +00:00
|
|
|
Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
|
|
|
|
* config.in: Ditto.
|
|
|
|
|
|
|
|
|
|
Mon Aug 25 16:14:44 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (sim_open): Add ABFD argument.
|
|
|
|
|
|
|
|
|
|
Tue Jun 24 13:46:20 1997 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
|
|
|
|
* interp.c (sim_resume): Clear State.exited.
|
|
|
|
|
(sim_stop_reason): If State.exited is nonzero, then indicate that
|
|
|
|
|
the simulator exited instead of stopped.
|
|
|
|
|
* mn10300_sim.h (struct _state): Add exited field.
|
|
|
|
|
* simops.c (syscall): Set State.exited for SYS_exit.
|
|
|
|
|
|
1997-06-12 04:14:42 +00:00
|
|
|
Wed Jun 11 22:07:56 1997 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
|
|
|
|
* simops.c: Fix thinko in last change.
|
|
|
|
|
|
1997-06-10 18:32:40 +00:00
|
|
|
Tue Jun 10 12:31:32 1997 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
1997-06-10 22:59:13 +00:00
|
|
|
* simops.c: "call" stores the callee saved registers into the
|
|
|
|
|
stack! Update the stack pointer properly when done with
|
|
|
|
|
register saves.
|
|
|
|
|
|
1997-06-10 18:32:40 +00:00
|
|
|
* simops.c: Fix return address computation for "call" instructions.
|
|
|
|
|
|
|
|
|
|
Thu May 22 01:43:11 1997 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
|
|
|
|
* interp.c (sim_open): Fix typo.
|
|
|
|
|
|
1997-05-22 05:28:34 +00:00
|
|
|
Wed May 21 23:27:58 1997 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
|
|
|
|
* interp.c (sim_resume): Add missing case in big switch
|
|
|
|
|
statement (for extb instruction).
|
|
|
|
|
|
* interp.c: Replace all references to load_mem and store_mem
with references to load_byte, load_half, load_3_byte, load_word
and store_byte, store_half, store_3_byte, store_word.
(INLINE): Delete definition.
(load_mem_big): Likewise.
(max_mem): Make it global.
(dispatch): Make this function inline.
(load_mem, store_mem): Delete functions.
* mn10300_sim.h (INLINE): Define.
(RLW): Delete unused definition.
(load_mem, store_mem): Delete declarations.
(load_mem_big): New definition.
(load_byte, load_half, load_3_byte, load_word): New functions.
(store_byte, store_half, store_3_byte, store_word): New functions.
* simops.c: Replace all references to load_mem and store_mem
with references to load_byte, load_half, load_3_byte, load_word
and store_byte, store_half, store_3_byte, store_word.
1997-05-20 23:53:47 +00:00
|
|
|
Tue May 20 17:51:30 1997 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
|
|
|
|
* interp.c: Replace all references to load_mem and store_mem
|
|
|
|
|
with references to load_byte, load_half, load_3_byte, load_word
|
|
|
|
|
and store_byte, store_half, store_3_byte, store_word.
|
|
|
|
|
(INLINE): Delete definition.
|
|
|
|
|
(load_mem_big): Likewise.
|
|
|
|
|
(max_mem): Make it global.
|
|
|
|
|
(dispatch): Make this function inline.
|
|
|
|
|
(load_mem, store_mem): Delete functions.
|
|
|
|
|
* mn10300_sim.h (INLINE): Define.
|
|
|
|
|
(RLW): Delete unused definition.
|
|
|
|
|
(load_mem, store_mem): Delete declarations.
|
|
|
|
|
(load_mem_big): New definition.
|
|
|
|
|
(load_byte, load_half, load_3_byte, load_word): New functions.
|
|
|
|
|
(store_byte, store_half, store_3_byte, store_word): New functions.
|
|
|
|
|
* simops.c: Replace all references to load_mem and store_mem
|
|
|
|
|
with references to load_byte, load_half, load_3_byte, load_word
|
|
|
|
|
and store_byte, store_half, store_3_byte, store_word.
|
|
|
|
|
|
|
|
|
|
Tue May 20 10:21:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (sim_open): Add callback to arguments.
|
|
|
|
|
(sim_set_callbacks): Delete SIM_DESC argument.
|
|
|
|
|
|
1997-05-19 19:55:31 +00:00
|
|
|
Mon May 19 13:54:22 1997 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
|
|
|
|
* interp.c (dispatch): Make this an inline function.
|
|
|
|
|
|
|
|
|
|
* simops.c (syscall): Use callback->write regardless of
|
|
|
|
|
what file descriptor we're writing too.
|
|
|
|
|
|
1997-05-18 22:57:49 +00:00
|
|
|
Sun May 18 16:46:31 1997 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
|
|
|
|
* interp.c (load_mem_big): Remove function. It's now a macro
|
|
|
|
|
defined elsewhere.
|
|
|
|
|
(compare_simops): New function.
|
|
|
|
|
(sim_open): Sort the Simops table before inserting entries
|
|
|
|
|
into the hash table.
|
|
|
|
|
* mn10300_sim.h: Remove unused #defines.
|
|
|
|
|
(load_mem_big): Define.
|
|
|
|
|
|
1997-05-16 22:37:02 +00:00
|
|
|
Fri May 16 16:36:17 1997 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
|
|
|
|
* interp.c (load_mem): If we get a load from an out of range
|
|
|
|
|
address, abort.
|
|
|
|
|
(store_mem): Likewise for stores.
|
|
|
|
|
(max_mem): New variable.
|
|
|
|
|
|
1997-05-06 19:27:22 +00:00
|
|
|
Tue May 6 13:24:36 1997 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
1997-05-06 19:42:17 +00:00
|
|
|
* mn10300_sim.h: Fix ordering of bits in the PSW.
|
|
|
|
|
|
1997-05-06 19:27:22 +00:00
|
|
|
* interp.c: Improve hashing routine to avoid long list
|
|
|
|
|
traversals for common instructions. Add HASH_STAT support.
|
|
|
|
|
Rewrite opcode dispatch code using a big switch instead of
|
|
|
|
|
cascaded if/else statements. Avoid useless calls to load_mem.
|
|
|
|
|
|
1997-05-06 00:35:42 +00:00
|
|
|
Mon May 5 18:07:48 1997 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
|
|
|
|
* mn10300_sim.h (struct _state): Add space for mdrq register.
|
|
|
|
|
(REG_MDRQ): Define.
|
|
|
|
|
* simops.c: Don't abort for trap. Add support for the extended
|
|
|
|
|
instructions, "getx", "putx", "mulq", "mulqu", "sat16", "sat24",
|
|
|
|
|
and "bsch".
|
|
|
|
|
|
|
|
|
|
Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
|
|
|
|
|
1997-04-18 12:24:52 +00:00
|
|
|
Fri Apr 18 14:04:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (sim_stop): Add stub function.
|
|
|
|
|
|
1997-04-17 10:27:47 +00:00
|
|
|
Thu Apr 17 03:26:59 1997 Doug Evans <dje@canuck.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* Makefile.in (SIM_OBJS): Add sim-load.o.
|
|
|
|
|
* interp.c (sim_kind, myname): New static locals.
|
|
|
|
|
(sim_open): Set sim_kind, myname. Ignore -E arg.
|
|
|
|
|
(sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
|
|
|
|
|
load file into simulator. Set start address from bfd.
|
|
|
|
|
(sim_create_inferior): Return SIM_RC. Delete arg start_address.
|
|
|
|
|
|
1997-04-17 06:05:19 +00:00
|
|
|
Wed Apr 16 19:30:44 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* simops.c (OP_F020): SYS_execv, SYS_time, SYS_times, SYS_utime
|
|
|
|
|
only include if implemented by host.
|
|
|
|
|
(OP_F020): Typecast arg passed to time function;
|
|
|
|
|
|
|
|
|
|
Mon Apr 7 23:57:49 1997 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
|
|
|
|
* simops.c (syscall): Handle new mn10300 calling conventions.
|
|
|
|
|
|
1997-04-07 05:58:59 +00:00
|
|
|
Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
|
|
|
|
* config.in: Ditto.
|
|
|
|
|
|
1997-04-05 01:03:01 +00:00
|
|
|
Fri Apr 4 20:02:37 1997 Ian Lance Taylor <ian@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* Makefile.in: Change mn10300-opc.o to m10300-opc.o, to match
|
|
|
|
|
corresponding change in opcodes directory.
|
|
|
|
|
|
1997-04-02 23:17:50 +00:00
|
|
|
Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
|
|
|
|
|
|
1997-04-02 23:39:50 +00:00
|
|
|
* interp.c (sim_open): New arg `kind'.
|
|
|
|
|
|
1997-04-02 23:17:50 +00:00
|
|
|
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
|
|
|
|
|
1997-04-02 05:04:25 +00:00
|
|
|
Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
|
|
|
|
|
|
|
|
|
Thu Mar 20 11:58:02 1997 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
|
|
|
|
* simops.c: Fix register extraction for a two "movbu" variants.
|
|
|
|
|
Somewhat simplify "sub" instructions.
|
|
|
|
|
Correctly sign extend operands for "mul". Put the correct
|
|
|
|
|
half of the result in MDR for "mul" and "mulu".
|
|
|
|
|
Implement remaining instructions.
|
|
|
|
|
Tweak opcode for "syscall".
|
|
|
|
|
|
|
|
|
|
Tue Mar 18 14:21:21 1997 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
|
|
|
|
* simops.c: Do syscall emulation in "syscall" instruction. Add
|
|
|
|
|
dummy "trap" instruction.
|
|
|
|
|
|
1997-03-18 14:28:34 +00:00
|
|
|
Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
|
|
|
|
|
1997-03-17 15:29:29 +00:00
|
|
|
Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure: Re-generate.
|
|
|
|
|
|
1997-03-14 16:21:57 +00:00
|
|
|
Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerate to track ../common/aclocal.m4 changes.
|
|
|
|
|
|
1997-03-13 20:55:26 +00:00
|
|
|
Thu Mar 13 12:54:45 1997 Doug Evans <dje@canuck.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (sim_open): New SIM_DESC result. Argument is now
|
|
|
|
|
in argv form.
|
|
|
|
|
(other sim_*): New SIM_DESC argument.
|
|
|
|
|
|
1997-03-12 22:05:49 +00:00
|
|
|
Wed Mar 12 15:04:00 1997 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
1997-03-12 22:20:13 +00:00
|
|
|
* simops.c: Fix carry bit computation for "add" instructions.
|
|
|
|
|
|
1997-03-12 22:05:49 +00:00
|
|
|
* simops.c: Fix typos in bset insns. Fix arguments to store_mem
|
|
|
|
|
for bset imm8,(d8,an) and bclr imm8,(d8,an).
|
|
|
|
|
|
|
|
|
|
Wed Mar 5 15:00:10 1997 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
|
|
|
|
* simops.c: Fix register references when computing Z and N bits
|
|
|
|
|
for lsr imm8,dn.
|
|
|
|
|
|
|
|
|
|
Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* Makefile.in (@COMMON_MAKEFILE_FRAG): Use
|
|
|
|
|
COMMON_{PRE,POST}_CONFIG_FRAG instead.
|
|
|
|
|
* configure.in: sinclude ../common/aclocal.m4.
|
|
|
|
|
* configure: Regenerated.
|
|
|
|
|
|
1997-01-24 17:48:35 +00:00
|
|
|
Fri Jan 24 10:47:25 1997 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
|
|
|
|
* interp.c (init_system): Allocate 2^19 bytes of space for the
|
|
|
|
|
simulator.
|
|
|
|
|
|
1997-01-23 22:09:52 +00:00
|
|
|
Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
|
|
|
|
|
|
|
|
|
|
* configure configure.in Makefile.in: Update to new configure
|
|
|
|
|
scheme which is more compatible with WinGDB builds.
|
|
|
|
|
* configure.in: Improve comment on how to run autoconf.
|
|
|
|
|
* configure: Re-run autoconf to get new ../common/aclocal.m4.
|
|
|
|
|
* Makefile.in: Use autoconf substitution to install common
|
|
|
|
|
makefile fragment.
|
|
|
|
|
|
1997-01-21 22:03:39 +00:00
|
|
|
Tue Jan 21 15:03:04 1997 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
|
|
|
|
* simops.c: Undo last change to "rol" and "ror", original code
|
|
|
|
|
was correct!
|
|
|
|
|
|
1997-01-16 18:28:46 +00:00
|
|
|
Thu Jan 16 11:28:14 1997 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
|
|
|
|
* simops.c: Fix "rol" and "ror".
|
|
|
|
|
|
|
|
|
|
Wed Jan 15 06:45:58 1997 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
|
|
|
|
* simops.c: Fix typo in last change.
|
|
|
|
|
|
1997-01-13 20:28:37 +00:00
|
|
|
Mon Jan 13 13:22:35 1997 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
|
|
|
|
* simops.c: Use REG macros in few places not using them yet.
|
|
|
|
|
|
1997-01-06 23:25:53 +00:00
|
|
|
Mon Jan 6 16:21:19 1997 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
|
|
|
|
* mn10300_sim.h (struct _state): Fix number of registers!
|
|
|
|
|
|
1996-12-31 23:26:11 +00:00
|
|
|
Tue Dec 31 16:20:41 1996 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
|
|
|
|
* mn10300_sim.h (struct _state): Put all registers into a single
|
|
|
|
|
array to make gdb implementation easier.
|
|
|
|
|
(REG_*): Add definitions for all registers in the state array.
|
|
|
|
|
(SEXT32, SEXT40, SEXT44, SEXT60): Remove unused macros.
|
|
|
|
|
* simops.c: Related changes.
|
|
|
|
|
|
1996-12-18 17:15:21 +00:00
|
|
|
Wed Dec 18 10:10:45 1996 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
|
|
|
|
* interp.c (sim_resume): Handle 0xff as a single byte insn.
|
|
|
|
|
|
|
|
|
|
* simops.c: Fix overflow computation for "add" and "inc"
|
|
|
|
|
instructions.
|
|
|
|
|
|
1996-12-16 17:08:10 +00:00
|
|
|
Mon Dec 16 10:03:52 1996 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
1996-12-16 22:31:37 +00:00
|
|
|
* simops.c: Handle "break" instruction.
|
|
|
|
|
|
1996-12-16 17:08:10 +00:00
|
|
|
* simops.c: Fix restoring the PC for "ret" and "retf" instructions.
|
|
|
|
|
|
|
|
|
|
Wed Dec 11 09:53:10 1996 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
|
|
|
|
* gencode.c (write_opcodes): Also write out the format of the
|
|
|
|
|
opcode.
|
|
|
|
|
* mn10300_sim.h (simops): Add "format" field.
|
|
|
|
|
* interp.c (sim_resume): Deal with endianness issues here.
|
|
|
|
|
|
1996-12-10 22:10:07 +00:00
|
|
|
Tue Dec 10 15:05:37 1996 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
|
|
|
|
* simops.c (REG0_4): Define.
|
|
|
|
|
Use REG0_4 for indexed loads/stores.
|
|
|
|
|
|
1996-12-07 16:54:57 +00:00
|
|
|
Sat Dec 7 09:50:28 1996 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
|
|
|
|
* simops.c (REG0_16): Fix typo.
|
|
|
|
|
|
1996-12-06 21:19:37 +00:00
|
|
|
Fri Dec 6 14:13:34 1996 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
1996-12-06 21:49:27 +00:00
|
|
|
* simops.c: Call abort for any instruction that's not currently
|
|
|
|
|
simulated.
|
|
|
|
|
|
1996-12-06 21:47:21 +00:00
|
|
|
* simops.c: Define accessor macros to extract register
|
|
|
|
|
values from instructions. Use them consistently.
|
|
|
|
|
|
1996-12-06 21:33:48 +00:00
|
|
|
* interp.c: Delete unused global variable "OP".
|
|
|
|
|
(sim_resume): Remove unused variable "opcode".
|
|
|
|
|
* simops.c: Fix some uninitialized variable problems, add
|
|
|
|
|
parens to fix various -Wall warnings.
|
|
|
|
|
|
1996-12-06 21:19:37 +00:00
|
|
|
* gencode.c (write_header): Add "insn" and "extension" arguments
|
|
|
|
|
to the OP_* declarations.
|
|
|
|
|
(write_template): Similarly for function templates.
|
|
|
|
|
* interp.c (insn, extension): Remove global variables. Instead
|
|
|
|
|
pass them as arguments to the OP_* functions.
|
|
|
|
|
* mn10300_sim.h: Remove decls for "insn" and "extension".
|
|
|
|
|
* simops.c (OP_*): Accept "insn" and "extension" as arguments
|
|
|
|
|
instead of using globals.
|
|
|
|
|
|
1996-12-06 05:30:24 +00:00
|
|
|
Thu Dec 5 22:26:31 1996 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
1996-12-06 07:57:21 +00:00
|
|
|
* simops.c: Fix typos in "mov am,(d16,an)" and "mov am,(d32,an)"
|
|
|
|
|
|
1996-12-06 05:30:24 +00:00
|
|
|
* simops.c: Fix thinkos in last change to "inc dn".
|
|
|
|
|
|
1996-12-04 18:02:00 +00:00
|
|
|
Wed Dec 4 10:57:53 1996 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
|
|
|
|
* simops.c: "add imm,sp" does not effect the condition codes.
|
|
|
|
|
"inc dn" does effect the condition codes.
|
|
|
|
|
|
1996-12-04 05:00:49 +00:00
|
|
|
Tue Dec 3 17:37:45 1996 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
|
|
|
|
* simops.c: Treat both operands as signed values for
|
|
|
|
|
"div" instruction.
|
|
|
|
|
|
|
|
|
|
* simops.c: Fix simulation of division instructions.
|
|
|
|
|
Fix typos/thinkos in several "cmp" and "sub" instructions.
|
|
|
|
|
|
1996-12-02 19:35:55 +00:00
|
|
|
Mon Dec 2 12:31:40 1996 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
1996-12-04 05:00:49 +00:00
|
|
|
* simops.c: Fix carry bit handling in "sub" and "cmp"
|
|
|
|
|
instructions.
|
|
|
|
|
|
1996-12-02 19:35:55 +00:00
|
|
|
* simops.c: Fix "mov imm8,an" and "mov imm16,dn".
|
|
|
|
|
|
1996-12-01 23:10:04 +00:00
|
|
|
Sun Dec 1 16:05:42 1996 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
1996-12-02 08:35:20 +00:00
|
|
|
* simops.c: Fix overflow computation for many instructions.
|
|
|
|
|
|
1996-12-06 07:57:21 +00:00
|
|
|
* simops.c: Fix "mov dm, an", "movbu dm, (an)", and "movhu dm, (an)".
|
1996-12-02 07:38:10 +00:00
|
|
|
|
1996-12-02 04:23:37 +00:00
|
|
|
* simops.c: Fix "mov am, dn".
|
|
|
|
|
|
1996-12-01 23:10:04 +00:00
|
|
|
* simops.c: Fix more bugs in "add imm,an" and
|
|
|
|
|
"add imm,dn".
|
|
|
|
|
|
1996-11-27 16:25:03 +00:00
|
|
|
Wed Nov 27 09:20:42 1996 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
1996-11-27 23:20:24 +00:00
|
|
|
* simops.c: Fix bugs in "movm" and "add imm,an".
|
|
|
|
|
|
1996-11-27 18:36:54 +00:00
|
|
|
* simops.c: Don't lose the upper 24 bits of the return
|
|
|
|
|
pointer in "call" and "calls" instructions. Rough cut
|
|
|
|
|
at emulated system calls.
|
|
|
|
|
|
1996-11-27 17:56:10 +00:00
|
|
|
* simops.c: Implement the remaining 5, 6 and 7 byte instructions.
|
|
|
|
|
|
1996-11-27 17:19:44 +00:00
|
|
|
* simops.c: Implement remaining 4 byte instructions.
|
|
|
|
|
|
|
|
|
|
* simops.c: Implement remaining 3 byte instructions.
|
1996-11-27 16:51:30 +00:00
|
|
|
|
1996-11-27 16:25:03 +00:00
|
|
|
* simops.c: Implement remaining 2 byte instructions. Call
|
|
|
|
|
abort for instructions we're not implementing now.
|
|
|
|
|
|
1996-11-26 22:58:24 +00:00
|
|
|
Tue Nov 26 15:43:41 1996 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
1996-11-27 07:20:36 +00:00
|
|
|
* simops.c: Implement lots of random instructions.
|
|
|
|
|
|
1996-11-27 05:29:49 +00:00
|
|
|
* simops.c: Implement "movm" and "bCC" insns.
|
|
|
|
|
|
1996-11-27 00:53:25 +00:00
|
|
|
* mn10300_sim.h (_state): Add another register (MDR).
|
|
|
|
|
(REG_MDR): Define.
|
|
|
|
|
* simops.c: Implement "cmp", "calls", "rets", "jmp" and
|
|
|
|
|
a few additional random insns.
|
|
|
|
|
|
1996-11-26 22:58:24 +00:00
|
|
|
* mn10300_sim.h (PSW_*): Define for CC status tracking.
|
|
|
|
|
(REG_D0, REG_A0, REG_SP): Define.
|
|
|
|
|
* simops.c: Implement "add", "addc" and a few other random
|
|
|
|
|
instructions.
|
1996-11-26 20:40:19 +00:00
|
|
|
|
|
|
|
|
* gencode.c, interp.c: Snapshot current simulator code.
|
|
|
|
|
|
1996-11-25 19:52:08 +00:00
|
|
|
Mon Nov 25 12:46:38 1996 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
|
|
|
|
* Makefile.in, config.in, configure, configure.in: New files.
|
|
|
|
|
* gencode.c, interp.c, mn10300_sim.h, simops.c: New files.
|
|
|
|
|
|
