* gencode.c (write_header): Add "insn" and "extension" arguments
to the OP_* declarations.
(write_template): Similarly for function templates.
* interp.c (insn, extension): Remove global variables. Instead
pass them as arguments to the OP_* functions.
* mn10300_sim.h: Remove decls for "insn" and "extension".
* simops.c (OP_*): Accept "insn" and "extension" as arguments
instead of using globals.
Starting to clean things up.
This commit is contained in:
Jeff Law
parent
1bcfe5fa30
commit
d252301029
5 changed files with 701 additions and 250 deletions
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@ -1,3 +1,14 @@
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Fri Dec 6 14:13:34 1996 Jeffrey A Law (law@cygnus.com)
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* gencode.c (write_header): Add "insn" and "extension" arguments
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to the OP_* declarations.
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(write_template): Similarly for function templates.
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* interp.c (insn, extension): Remove global variables. Instead
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pass them as arguments to the OP_* functions.
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* mn10300_sim.h: Remove decls for "insn" and "extension".
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* simops.c (OP_*): Accept "insn" and "extension" as arguments
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instead of using globals.
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Thu Dec 5 22:26:31 1996 Jeffrey A Law (law@cygnus.com)
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* simops.c: Fix typos in "mov am,(d16,an)" and "mov am,(d32,an)"
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@ -28,7 +28,7 @@ write_header ()
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struct mn10300_opcode *opcode;
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for (opcode = (struct mn10300_opcode *)mn10300_opcodes; opcode->name; opcode++)
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printf("void OP_%X PARAMS ((void));\t\t/* %s */\n",
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printf("void OP_%X PARAMS ((unsigned long, unsigned long));\t\t/* %s */\n",
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opcode->opcode, opcode->name);
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}
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@ -47,7 +47,7 @@ write_template ()
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for (opcode = (struct mn10300_opcode *)mn10300_opcodes; opcode->name; opcode++)
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{
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printf("/* %s */\nvoid\nOP_%X ()\n{\n", opcode->name, opcode->opcode);
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printf("/* %s */\nvoid\nOP_%X ()\n unsigned long insn, extension;\n{\n", opcode->name, opcode->opcode);
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/* count operands */
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j = 0;
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@ -17,10 +17,9 @@ int mn10300_debug;
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uint32 OP[4];
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static struct hash_entry *lookup_hash PARAMS ((uint32 ins));
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static struct hash_entry *lookup_hash PARAMS ((uint32 ins, int));
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static long hash PARAMS ((long));
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static void init_system PARAMS ((void));
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#define MAX_HASH 63
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struct hash_entry
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@ -34,22 +33,83 @@ struct hash_entry
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struct hash_entry hash_table[MAX_HASH+1];
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/* This probably doesn't do a very good job at bucket filling, but
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it's simple... */
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static INLINE long
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hash(insn)
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long insn;
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{
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/* XXX */
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/* These are one byte insns. */
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if ((insn & 0xffffff00) == 0)
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{
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if ((insn & 0xf0) == 0x00
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|| (insn & 0xf0) == 0x40)
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return (insn & 0xf3) & 0x3f;
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if ((insn & 0xf0) == 0x10
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|| (insn & 0xf0) == 0x30
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|| (insn & 0xf0) == 0x50)
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return (insn & 0xfc) & 0x3f;
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if ((insn & 0xf0) == 0x60
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|| (insn & 0xf0) == 0x70
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|| (insn & 0xf0) == 0x80
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|| (insn & 0xf0) == 0x90
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|| (insn & 0xf0) == 0xa0
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|| (insn & 0xf0) == 0xb0
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|| (insn & 0xf0) == 0xe0)
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return (insn & 0xf0) & 0x3f;
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return (insn & 0xff) & 0x3f;
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}
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/* These are two byte insns */
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if ((insn & 0xffff0000) == 0)
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{
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if ((insn & 0xf000) == 0x2000
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|| (insn & 0xf000) == 0x5000)
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return ((insn & 0xfc00) >> 8) & 0x3f;
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if ((insn & 0xf000) == 0x4000)
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return ((insn & 0xf300) >> 8) & 0x3f;
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if ((insn & 0xf000) == 0x8000
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|| (insn & 0xf000) == 0x9000
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|| (insn & 0xf000) == 0xa000
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|| (insn & 0xf000) == 0xb000)
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return ((insn & 0xf000) >> 8) & 0x3f;
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return ((insn & 0xff00) >> 8) & 0x3f;
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}
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/* These are three byte insns. */
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if ((insn & 0xff000000) == 0)
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{
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if ((insn & 0xf00000) == 0x000000)
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return ((insn & 0xf30000) >> 16) & 0x3f;
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if ((insn & 0xf00000) == 0x200000
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|| (insn & 0xf00000) == 0x300000)
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return ((insn & 0xfc0000) >> 16) & 0x3f;
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return ((insn & 0xff0000) >> 16) & 0x3f;
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}
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/* These are four byte or larger insns. */
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return ((insn & 0xff000000) >> 24) & 0x3f;
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}
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static struct hash_entry *
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lookup_hash (ins)
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lookup_hash (ins, length)
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uint32 ins;
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int length;
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{
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struct hash_entry *h;
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h = &hash_table[hash(ins)];
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while ((ins & h->mask) != h->opcode)
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while ((ins & h->mask) != h->opcode
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|| (length != h->ops->length))
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{
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if (h->next == NULL)
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{
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@ -119,6 +179,28 @@ put_word (addr, data)
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}
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uint32
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load_mem_big (addr, len)
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SIM_ADDR addr;
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int len;
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{
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uint8 *p = addr + State.mem;
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switch (len)
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{
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case 1:
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return p[0];
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case 2:
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return p[0] << 8 | p[1];
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case 3:
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return p[0] << 16 | p[1] << 8 | p[2];
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case 4:
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return p[0] << 24 | p[1] << 16 | p[2] << 8 | p[3];
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default:
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abort ();
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}
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}
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uint32
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load_mem (addr, len)
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SIM_ADDR addr;
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@ -132,6 +214,8 @@ load_mem (addr, len)
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return p[0];
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case 2:
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return p[1] << 8 | p[0];
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case 3:
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return p[2] << 16 | p[1] << 8 | p[0];
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case 4:
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return p[3] << 24 | p[2] << 16 | p[1] << 8 | p[0];
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default:
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@ -270,7 +354,7 @@ sim_resume (step, siggnal)
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{
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uint32 inst, opcode;
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reg_t oldpc;
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struct interrupt_generator *intgen;
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struct hash_entry *h;
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if (step)
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State.exception = SIGTRAP;
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@ -279,15 +363,137 @@ sim_resume (step, siggnal)
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do
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{
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/* Fetch the current instruction. */
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inst = RLW (PC);
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oldpc = PC;
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opcode = (inst & 0x07e0) >> 5;
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unsigned long insn, extension;
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/* Decode the opcode field. */
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if ((opcode & 0x30) == 0
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|| (opcode & 0x38) == 0x10)
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/* Fetch the current instruction. */
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inst = load_mem_big (PC, 1);
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oldpc = PC;
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/* These are one byte insns. */
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if ((inst & 0xf3) == 0x00
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|| (inst & 0xf0) == 0x10
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|| (inst & 0xfc) == 0x3c
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|| (inst & 0xf3) == 0x41
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|| (inst & 0xf3) == 0x40
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|| (inst & 0xfc) == 0x50
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|| (inst & 0xfc) == 0x54
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|| (inst & 0xf0) == 0x60
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|| (inst & 0xf0) == 0x70
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|| ((inst & 0xf0) == 0x80
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&& (inst & 0x0c) >> 2 != (inst & 0x03))
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|| ((inst & 0xf0) == 0x90
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&& (inst & 0x0c) >> 2 != (inst & 0x03))
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|| ((inst & 0xf0) == 0xa0
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&& (inst & 0x0c) >> 2 != (inst & 0x03))
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|| ((inst & 0xf0) == 0xb0
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&& (inst & 0x0c) >> 2 != (inst & 0x03))
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|| (inst & 0xff) == 0xcb
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|| (inst & 0xfc) == 0xd0
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|| (inst & 0xfc) == 0xd4
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|| (inst & 0xfc) == 0xd8
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|| (inst & 0xf0) == 0xe0)
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{
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insn = inst;
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h = lookup_hash (insn, 1);
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extension = 0;
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(h->ops->func)(insn, extension);
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PC += 1;
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}
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/* These are two byte insns. */
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else if ((inst & 0xf0) == 0x80
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|| (inst & 0xf0) == 0x90
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|| (inst & 0xf0) == 0xa0
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|| (inst & 0xf0) == 0xb0
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|| (inst & 0xfc) == 0x20
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|| (inst & 0xfc) == 0x28
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|| (inst & 0xf3) == 0x43
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|| (inst & 0xf3) == 0x42
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|| (inst & 0xfc) == 0x58
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|| (inst & 0xfc) == 0x5c
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|| ((inst & 0xf0) == 0xc0
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&& (inst & 0xff) != 0xcb
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&& (inst & 0xff) != 0xcc
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&& (inst & 0xff) != 0xcd)
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|| (inst & 0xff) == 0xf0
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|| (inst & 0xff) == 0xf1
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|| (inst & 0xff) == 0xf2
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|| (inst & 0xff) == 0xf3
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|| (inst & 0xff) == 0xf4
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|| (inst & 0xff) == 0xf5
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|| (inst & 0xff) == 0xf6)
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{
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insn = load_mem_big (PC, 2);
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h = lookup_hash (insn, 2);
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extension = 0;
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(h->ops->func)(insn, extension);
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PC += 2;
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}
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/* These are three byte insns. */
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else if ((inst & 0xff) == 0xf8
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|| (inst & 0xff) == 0xcc
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|| (inst & 0xff) == 0xf9
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|| (inst & 0xf3) == 0x01
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|| (inst & 0xf3) == 0x02
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|| (inst & 0xf3) == 0x03
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|| (inst & 0xfc) == 0x24
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|| (inst & 0xfc) == 0x2c
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|| (inst & 0xfc) == 0x30
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|| (inst & 0xfc) == 0x34
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|| (inst & 0xfc) == 0x38
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|| (inst & 0xff) == 0xde
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|| (inst & 0xff) == 0xdf
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|| (inst & 0xff) == 0xcc)
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{
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insn = load_mem_big (PC, 3);
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h = lookup_hash (insn, 3);
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extension = 0;
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(h->ops->func)(insn, extension);
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PC += 3;
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}
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/* These are four byte insns. */
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else if ((inst & 0xff) == 0xfa
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|| (inst & 0xff) == 0xfb)
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{
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insn = load_mem_big (PC, 4);
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h = lookup_hash (insn, 4);
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extension = 0;
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(h->ops->func)();
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PC += 4;
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}
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/* These are five byte insns. */
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else if ((inst & 0xff) == 0xcd
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|| (inst & 0xff) == 0xdc)
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{
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insn = load_mem_big (PC, 4);
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h = lookup_hash (insn, 5);
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extension = load_mem_big (PC + 4, 1);
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(h->ops->func)(insn, extension);
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PC += 5;
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}
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/* These are six byte insns. */
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else if ((inst & 0xff) == 0xfd
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|| (inst & 0xff) == 0xfc)
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{
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insn = load_mem_big (PC, 4);
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h = lookup_hash (insn, 6);
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extension = load_mem_big (PC + 4, 2);
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(h->ops->func)(insn, extension);
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PC += 6;
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}
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/* Else its a seven byte insns (in theory). */
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else
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{
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insn = load_mem_big (PC, 4);
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h = lookup_hash (insn, 7);
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extension = load_mem_big (PC + 4, 3);
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(h->ops->func)(insn, extension);
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PC += 7;
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}
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}
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while (!State.exception);
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@ -59,7 +59,7 @@ struct simops
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struct _state
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{
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reg_t regs[10]; /* registers, d0-d3, a0-a3, sp, mdr */
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reg_t regs[12]; /* registers, d0-d3, a0-a3, sp, mdr, lar, lir */
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reg_t sregs[8]; /* system registers, including psw */
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reg_t pc;
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uint8 *mem; /* main memory */
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@ -68,7 +68,6 @@ struct _state
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extern uint32 OP[4];
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extern struct simops Simops[];
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extern unsigned long insn, extension;
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#define PC (State.pc)
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@ -82,6 +81,8 @@ extern unsigned long insn, extension;
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#define REG_A0 4
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#define REG_SP 8
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#define REG_MDR 9
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#define REG_LAR 10
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#define REG_LIR 11
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#define SEXT3(x) ((((x)&0x7)^(~0x3))+0x4)
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