1996-12-06 21:19:37 +00:00
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Fri Dec 6 14:13:34 1996 Jeffrey A Law (law@cygnus.com)
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1996-12-06 21:33:48 +00:00
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* interp.c: Delete unused global variable "OP".
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(sim_resume): Remove unused variable "opcode".
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* simops.c: Fix some uninitialized variable problems, add
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parens to fix various -Wall warnings.
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1996-12-06 21:19:37 +00:00
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* gencode.c (write_header): Add "insn" and "extension" arguments
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to the OP_* declarations.
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(write_template): Similarly for function templates.
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* interp.c (insn, extension): Remove global variables. Instead
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pass them as arguments to the OP_* functions.
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* mn10300_sim.h: Remove decls for "insn" and "extension".
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* simops.c (OP_*): Accept "insn" and "extension" as arguments
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instead of using globals.
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1996-12-06 05:30:24 +00:00
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Thu Dec 5 22:26:31 1996 Jeffrey A Law (law@cygnus.com)
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1996-12-06 07:57:21 +00:00
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* simops.c: Fix typos in "mov am,(d16,an)" and "mov am,(d32,an)"
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1996-12-06 05:30:24 +00:00
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* simops.c: Fix thinkos in last change to "inc dn".
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1996-12-04 18:02:00 +00:00
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Wed Dec 4 10:57:53 1996 Jeffrey A Law (law@cygnus.com)
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* simops.c: "add imm,sp" does not effect the condition codes.
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"inc dn" does effect the condition codes.
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1996-12-04 05:00:49 +00:00
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Tue Dec 3 17:37:45 1996 Jeffrey A Law (law@cygnus.com)
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* simops.c: Treat both operands as signed values for
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"div" instruction.
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* simops.c: Fix simulation of division instructions.
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Fix typos/thinkos in several "cmp" and "sub" instructions.
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1996-12-02 19:35:55 +00:00
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Mon Dec 2 12:31:40 1996 Jeffrey A Law (law@cygnus.com)
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1996-12-04 05:00:49 +00:00
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* simops.c: Fix carry bit handling in "sub" and "cmp"
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instructions.
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1996-12-02 19:35:55 +00:00
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* simops.c: Fix "mov imm8,an" and "mov imm16,dn".
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1996-12-01 23:10:04 +00:00
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Sun Dec 1 16:05:42 1996 Jeffrey A Law (law@cygnus.com)
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1996-12-02 08:35:20 +00:00
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* simops.c: Fix overflow computation for many instructions.
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1996-12-06 07:57:21 +00:00
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* simops.c: Fix "mov dm, an", "movbu dm, (an)", and "movhu dm, (an)".
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1996-12-02 07:38:10 +00:00
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1996-12-02 04:23:37 +00:00
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* simops.c: Fix "mov am, dn".
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1996-12-01 23:10:04 +00:00
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* simops.c: Fix more bugs in "add imm,an" and
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"add imm,dn".
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1996-11-27 16:25:03 +00:00
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Wed Nov 27 09:20:42 1996 Jeffrey A Law (law@cygnus.com)
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1996-11-27 23:20:24 +00:00
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* simops.c: Fix bugs in "movm" and "add imm,an".
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1996-11-27 18:36:54 +00:00
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* simops.c: Don't lose the upper 24 bits of the return
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pointer in "call" and "calls" instructions. Rough cut
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at emulated system calls.
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1996-11-27 17:56:10 +00:00
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* simops.c: Implement the remaining 5, 6 and 7 byte instructions.
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1996-11-27 17:19:44 +00:00
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* simops.c: Implement remaining 4 byte instructions.
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* simops.c: Implement remaining 3 byte instructions.
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1996-11-27 16:51:30 +00:00
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1996-11-27 16:25:03 +00:00
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* simops.c: Implement remaining 2 byte instructions. Call
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abort for instructions we're not implementing now.
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1996-11-26 22:58:24 +00:00
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Tue Nov 26 15:43:41 1996 Jeffrey A Law (law@cygnus.com)
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1996-11-27 07:20:36 +00:00
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* simops.c: Implement lots of random instructions.
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1996-11-27 05:29:49 +00:00
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* simops.c: Implement "movm" and "bCC" insns.
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1996-11-27 00:53:25 +00:00
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* mn10300_sim.h (_state): Add another register (MDR).
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(REG_MDR): Define.
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* simops.c: Implement "cmp", "calls", "rets", "jmp" and
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a few additional random insns.
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1996-11-26 22:58:24 +00:00
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* mn10300_sim.h (PSW_*): Define for CC status tracking.
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(REG_D0, REG_A0, REG_SP): Define.
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* simops.c: Implement "add", "addc" and a few other random
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instructions.
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1996-11-26 20:40:19 +00:00
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* gencode.c, interp.c: Snapshot current simulator code.
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1996-11-25 19:52:08 +00:00
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Mon Nov 25 12:46:38 1996 Jeffrey A Law (law@cygnus.com)
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* Makefile.in, config.in, configure, configure.in: New files.
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* gencode.c, interp.c, mn10300_sim.h, simops.c: New files.
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