1998-02-01 03:29:48 +00:00
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Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
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* sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
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size.
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* interp.c (SD, CPU): Define.
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(mips_option_handler): Set flags in each CPU.
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(interrupt_event): Assume CPU 0 is the one being iterrupted.
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(sim_close): Do not clear STATE, deleted anyway.
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(sim_write, sim_read): Assume CPU zero's vm should be used for
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data transfers.
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(sim_create_inferior): Set the PC for all processors.
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(sim_monitor, store_word, load_word, mips16_entry): Add cpu
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argument.
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(mips16_entry): Pass correct nr of args to store_word, load_word.
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(ColdReset): Cold reset all cpu's.
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(signal_exception): Pass cpu to sim_monitor & mips16_entry.
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(sim_monitor, load_memory, store_memory, signal_exception): Use
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`CPU' instead of STATE_CPU.
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* sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
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SD or CPU_.
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* sim-main.h (signal_exception): Add sim_cpu arg.
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(SignalException*): Pass both SD and CPU to signal_exception.
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* interp.c (signal_exception): Update.
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* sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
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Ditto
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(sync_operation, prefetch, cache_op, store_memory, load_memory,
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address_translation): Ditto
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(decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
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start-sanitize-vr5400
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* mdmx.igen (get_scale): Pass CPU_ to semantic_illegal instead of
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`sd'.
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(ByteAlign): Use StoreFPR, pass args in correct order.
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end-sanitize-vr5400
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start-sanitize-r5900
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Sun Feb 1 10:59:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
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* configure.in (sim_igen_filter): For r5900, configure as SMP.
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end-sanitize-r5900
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1998-01-31 14:07:23 +00:00
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Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
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* configure: Regenerated to track ../common/aclocal.m4 changes.
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1998-01-31 06:23:41 +00:00
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Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
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1998-01-31 06:56:13 +00:00
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start-sanitize-r5900
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* configure.in (sim_igen_filter): For r5900, use igen.
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* configure: Re-generate.
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end-sanitize-r5900
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1998-01-31 06:23:41 +00:00
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* interp.c (sim_engine_run): Add `nr_cpus' argument.
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* mips.igen (model): Map processor names onto BFD name.
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* sim-main.h (CPU_CIA): Delete.
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(SET_CIA, GET_CIA): Define
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1998-01-21 22:08:37 +00:00
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Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
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* sim-main.h (GPR_SET): Define, used by igen when zeroing a
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regiser.
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* configure.in (default_endian): Configure a big-endian simulator
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by default.
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* configure: Re-generate.
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1998-01-20 06:37:00 +00:00
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Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
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* configure: Regenerated to track ../common/aclocal.m4 changes.
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1998-01-05 23:43:30 +00:00
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Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
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* interp.c (sim_monitor): Handle Densan monitor outbyte
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and inbyte functions.
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1997-12-29 16:03:23 +00:00
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1997-12-29 Felix Lee <flee@cygnus.com>
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* interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
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Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
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* Makefile.in (tmp-igen): Arrange for $zero to always be
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reset to zero after every instruction.
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1997-12-15 12:33:59 +00:00
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Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* configure: Regenerated to track ../common/aclocal.m4 changes.
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* config.in: Ditto.
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1997-12-12 19:24:34 +00:00
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start-sanitize-vr5400
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1997-12-13 04:23:31 +00:00
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Sat Dec 13 15:18:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* vr5400.igen (Low32Bits, High32Bits): Sign extend extracted 32
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bit values.
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end-sanitize-vr5400
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start-sanitize-vr5400
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1997-12-12 19:24:34 +00:00
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Fri Dec 12 12:26:07 1997 Jeffrey A Law (law@cygnus.com)
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* configure.in (sim_igen_filter): Multi-sim vr5000 - vr5000 or
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vr5400 with the vr5000 as the default.
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end-sanitize-vr5400
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1997-12-11 00:11:04 +00:00
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Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
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* mips.igen (MSUB): Fix to work like MADD.
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* gencode.c (MSUB): Similarly.
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1997-12-09 04:01:06 +00:00
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start-sanitize-vr5400
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Tue Dec 9 12:02:12 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* configure.in (sim_igen_filter): Multi-sim vr5400 - vr5000 or
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vr5400.
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end-sanitize-vr5400
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1997-12-04 17:26:06 +00:00
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Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
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* configure: Regenerated to track ../common/aclocal.m4 changes.
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1997-11-26 11:47:36 +00:00
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Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* mips.igen (LWC1): Correct assembler - lwc1 not swc1.
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start-sanitize-vr5400
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1997-11-26 12:07:27 +00:00
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* mdmx.igen (value_vr): Correct sim_io_eprintf format argument.
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1997-12-03 22:54:44 +00:00
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(value_cc, store_cc): Implement.
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1997-11-26 12:07:27 +00:00
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1997-11-26 11:47:36 +00:00
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* sim-main.h: Add 8*3*8 bit accumulator.
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* vr5400.igen: Move mdmx instructins from here
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* mdmx.igen: To here - new file. Add/fix missing instructions.
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* mips.igen: Include mdmx.igen.
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1997-12-03 22:54:44 +00:00
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* Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
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1997-11-26 11:47:36 +00:00
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1997-12-09 04:01:06 +00:00
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end-sanitize-vr5400
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1997-11-25 21:47:16 +00:00
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Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* sim-main.h (sim-fpu.h): Include.
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* interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
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Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
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using host independant sim_fpu module.
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1997-11-20 09:17:06 +00:00
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Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
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1997-11-20 09:50:36 +00:00
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* interp.c (signal_exception): Report internal errors with SIGABRT
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not SIGQUIT.
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1997-11-20 09:17:06 +00:00
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1997-11-20 09:50:36 +00:00
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* sim-main.h (C0_CONFIG): New register.
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(signal.h): No longer include.
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* interp.c (decode_coproc): Allow access C0_CONFIG to register.
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1997-11-20 09:17:06 +00:00
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1997-11-18 23:40:40 +00:00
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Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
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* Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
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1997-11-14 08:27:38 +00:00
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Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* mips.igen: Tag vr5000 instructions.
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(ANDI): Was missing mipsIV model, fix assembler syntax.
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(do_c_cond_fmt): New function.
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(C.cond.fmt): Handle mips I-III which do not support CC field
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separatly.
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(bc1): Handle mips IV which do not have a delaed FCC separatly.
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(SDR): Mask paddr when BigEndianMem, not the converse as specified
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in IV3.2 spec.
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(DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
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vr5000 which saves LO in a GPR separatly.
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* configure.in (enable-sim-igen): For vr5000, select vr5000
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specific instructions.
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* configure: Re-generate.
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Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* Makefile.in (SIM_OBJS): Add sim-fpu module.
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* interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
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fmt_uninterpreted_64 bit cases to switch. Convert to
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fmt_formatted,
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* sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
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* mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
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as specified in IV3.2 spec.
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(MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
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Fix IGEN version of MFC0, MTC0, SWC1, LWC1, SDC1, LDC1, LWXC1,
SWXC1MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1, MULT, MULTU, BEQZ, ...MTHI,
MFHI instructions.
Trace nullified instruction.
1997-11-11 07:50:13 +00:00
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Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* mips.igen: Delay slot branches add OFFSET to NIA not CIA.
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(MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
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(start-sanitize-r5900):
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(LWXC1, SWXC1): Delete from r5900 instruction set.
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(end-sanitize-r5900):
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(MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
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1997-11-11 12:31:24 +00:00
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PENDING_FILL versions of instructions. Simplify.
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Fix IGEN version of MFC0, MTC0, SWC1, LWC1, SDC1, LDC1, LWXC1,
SWXC1MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1, MULT, MULTU, BEQZ, ...MTHI,
MFHI instructions.
Trace nullified instruction.
1997-11-11 07:50:13 +00:00
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(X): New function.
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(MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
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instructions.
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1997-11-11 12:31:24 +00:00
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(BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
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a signed value.
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Fix IGEN version of MFC0, MTC0, SWC1, LWC1, SDC1, LDC1, LWXC1,
SWXC1MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1, MULT, MULTU, BEQZ, ...MTHI,
MFHI instructions.
Trace nullified instruction.
1997-11-11 07:50:13 +00:00
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(MTHI, MFHI): Disable code checking HI-LO.
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* sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
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global.
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(NULLIFY_NEXT_INSTRUCTION): Call dotrace.
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1997-11-06 09:16:16 +00:00
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Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
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1997-11-06 14:24:57 +00:00
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* gencode.c (build_mips16_operands): Replace IPC with cia.
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* interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
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value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
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IPC to `cia'.
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(UndefinedResult): Replace function with macro/function
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combination.
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(sim_engine_run): Don't save PC in IPC.
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* sim-main.h (IPC): Delete.
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start-sanitize-vr5400
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* vr5400.igen (vr): Add missing cia argument to value_fpr.
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(do_select): Rename function select.
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end-sanitize-vr5400
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1997-11-06 09:16:16 +00:00
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* interp.c (signal_exception, store_word, load_word,
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address_translation, load_memory, store_memory, cache_op,
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prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
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1997-11-06 14:24:57 +00:00
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cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
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current instruction address - cia - argument.
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1997-11-06 09:16:16 +00:00
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(sim_read, sim_write): Call address_translation directly.
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(sim_engine_run): Rename variable vaddr to cia.
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1997-11-06 14:24:57 +00:00
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(signal_exception): Pass cia to sim_monitor
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1997-11-06 09:16:16 +00:00
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* sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
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Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
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COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
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* sim-main.h (SignalExceptionSimulatorFault): Delete definition.
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* interp.c (sim_open): Replace SignalExceptionSimulatorFault with
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SIM_ASSERT.
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* interp.c (signal_exception): Pass restart address to
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sim_engine_restart.
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* Makefile.in (semantics.o, engine.o, support.o, itable.o,
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idecode.o): Add dependency.
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* sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
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Delete definitions
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(DELAY_SLOT): Update NIA not PC with branch address.
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(NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
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* mips.igen: Use CIA not PC in branch calculations.
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(illegal): Call SignalException.
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(BEQ, ADDIU): Fix assembler.
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1997-11-05 08:17:26 +00:00
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Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
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|
1997-11-05 09:43:34 +00:00
|
|
|
* m16.igen (JALX): Was missing.
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|
|
* configure.in (enable-sim-igen): New configuration option.
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|
|
* configure: Re-generate.
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|
1997-11-05 08:17:26 +00:00
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|
|
* sim-main.h (MAX_INSNS, INSN_NAME): Define.
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|
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|
|
* interp.c (load_memory, store_memory): Delete parameter RAW.
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|
|
|
|
(sim_read, sim_write): Use sim_core_{read,write}_buffer directly
|
|
|
|
|
bypassing {load,store}_memory.
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|
|
* sim-main.h (ByteSwapMem): Delete definition.
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|
|
* Makefile.in (SIM_OBJS): Add sim-memopt module.
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|
* interp.c (sim_do_command, sim_commands): Delete mips specific
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|
|
commands. Handled by module sim-options.
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|
* sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
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|
(WITH_MODULO_MEMORY): Define.
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|
* interp.c (sim_info): Delete code printing memory size.
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|
* interp.c (mips_size): Nee sim_size, delete function.
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|
(power2): Delete.
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|
(monitor, monitor_base, monitor_size): Delete global variables.
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|
|
(sim_open, sim_close): Delete code creating monitor and other
|
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|
|
|
memory regions. Use sim-memopts module, via sim_do_commandf, to
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|
|
manage memory regions.
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|
(load_memory, store_memory): Use sim-core for memory model.
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|
* interp.c (address_translation): Delete all memory map code
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|
except line forcing 32 bit addresses.
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|
1997-11-05 01:08:12 +00:00
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Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
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|
* sim-main.h (WITH_TRACE): Delete definition. Enables common
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|
trace options.
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* interp.c (logfh, logfile): Delete globals.
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|
|
(sim_open, sim_close): Delete code opening & closing log file.
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|
(mips_option_handler): Delete -l and -n options.
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|
(OPTION mips_options): Ditto.
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|
|
* interp.c (OPTION mips_options): Rename option trace to dinero.
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|
|
(mips_option_handler): Update.
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|
1997-11-05 00:08:14 +00:00
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|
|
Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
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|
|
* interp.c (fetch_str): New function.
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|
|
(sim_monitor): Rewrite using sim_read & sim_write.
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|
|
(sim_open): Check magic number.
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|
|
(sim_open): Write monitor vectors into memory using sim_write.
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|
|
(MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
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|
|
(sim_read, sim_write): Simplify - transfer data one byte at a
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|
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|
|
time.
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|
|
(load_memory, store_memory): Clarify meaning of parameter RAW.
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|
|
* sim-main.h (isHOST): Defete definition.
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|
|
(isTARGET): Mark as depreciated.
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|
|
(address_translation): Delete parameter HOST.
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|
|
* interp.c (address_translation): Delete parameter HOST.
|
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|
|
1997-10-29 19:42:49 +00:00
|
|
|
start-sanitize-tx49
|
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|
|
Wed Oct 29 14:21:32 1997 Gavin Koch <gavin@cygnus.com>
|
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|
|
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|
|
* gencode.c: Add tx49 configury and insns.
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|
|
* configure.in: Add tx49 configury.
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|
|
* configure: Update.
|
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|
end-sanitize-tx49
|
1997-10-29 04:02:30 +00:00
|
|
|
Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
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|
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|
|
* mips.igen:
|
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|
|
* Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
|
|
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|
|
(tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
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|
|
1997-10-28 07:10:36 +00:00
|
|
|
Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
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|
|
|
|
|
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|
|
* mips.igen: Add model filter field to records.
|
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|
|
1997-10-27 07:55:24 +00:00
|
|
|
Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
|
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|
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|
|
interp.c (sim_engine_run): Do not compile function sim_engine_run
|
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|
|
|
when WITH_IGEN == 1.
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|
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|
|
|
|
* configure.in (sim_igen_flags, sim_m16_flags): Set according to
|
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|
|
|
target architecture.
|
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|
|
|
|
|
Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
|
|
|
|
|
igen. Replace with configuration variables sim_igen_flags /
|
|
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|
|
sim_m16_flags.
|
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|
|
|
start-sanitize-r5900
|
1997-11-25 22:02:59 +00:00
|
|
|
* r5900.igen: New file. Copy r5900 insns here.
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|
end-sanitize-r5900
|
1997-10-27 07:55:24 +00:00
|
|
|
start-sanitize-vr5400
|
1997-11-25 21:47:16 +00:00
|
|
|
* vr5400.igen: New file.
|
1997-12-12 19:24:34 +00:00
|
|
|
end-sanitize-vr5400
|
1997-10-27 07:55:24 +00:00
|
|
|
* m16.igen: New file. Copy mips16 insns here.
|
|
|
|
|
* mips.igen: From here.
|
|
|
|
|
|
1997-10-27 06:42:13 +00:00
|
|
|
Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
start-sanitize-vr5400
|
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|
|
|
* mips.igen: Tag all mipsIV instructions with vr5400 model.
|
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|
|
|
|
|
|
|
|
* configure.in: Add mips64vr5400 target.
|
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|
|
* configure: Re-generate.
|
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|
|
|
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|
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|
end-sanitize-vr5400
|
|
|
|
|
* Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
|
|
|
|
|
to top.
|
|
|
|
|
(tmp-igen, tmp-m16): Pass -I srcdir to igen.
|
|
|
|
|
|
1997-10-25 20:53:46 +00:00
|
|
|
Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* gencode.c (build_instruction): Follow sim_write's lead in using
|
|
|
|
|
BigEndianMem instead of !ByteSwapMem.
|
|
|
|
|
|
1997-10-24 07:54:21 +00:00
|
|
|
Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure.in (sim_gen): Dependent on target, select type of
|
|
|
|
|
generator. Always select old style generator.
|
|
|
|
|
|
|
|
|
|
configure: Re-generate.
|
|
|
|
|
|
|
|
|
|
Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
|
|
|
|
|
targets.
|
|
|
|
|
(SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
|
|
|
|
|
SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
|
|
|
|
|
IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
|
|
|
|
|
(SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
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|
|
|
|
SIM_@sim_gen@_*, set by autoconf.
|
|
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|
|
|
1997-10-24 06:43:51 +00:00
|
|
|
Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
|
|
|
|
|
|
|
|
|
|
* interp.c (ColdReset): Remove #ifdef HASFPU, check
|
|
|
|
|
CURRENT_FLOATING_POINT instead.
|
|
|
|
|
|
|
|
|
|
* interp.c (ifetch32): New function. Fetch 32 bit instruction.
|
|
|
|
|
(address_translation): Raise exception InstructionFetch when
|
|
|
|
|
translation fails and isINSTRUCTION.
|
|
|
|
|
|
|
|
|
|
* interp.c (sim_open, sim_write, sim_monitor, store_word,
|
|
|
|
|
sim_engine_run): Change type of of vaddr and paddr to
|
|
|
|
|
address_word.
|
|
|
|
|
(address_translation, prefetch, load_memory, store_memory,
|
|
|
|
|
cache_op): Change type of vAddr and pAddr to address_word.
|
|
|
|
|
|
|
|
|
|
* gencode.c (build_instruction): Change type of vaddr and paddr to
|
|
|
|
|
address_word.
|
|
|
|
|
|
1997-10-21 07:57:33 +00:00
|
|
|
Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
|
|
|
|
|
macro to obtain result of ALU op.
|
|
|
|
|
|
1997-10-21 07:40:00 +00:00
|
|
|
Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (sim_info): Call profile_print.
|
|
|
|
|
|
1997-10-21 03:41:21 +00:00
|
|
|
Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* Makefile.in (SIM_OBJS): Add sim-profile.o module.
|
|
|
|
|
|
|
|
|
|
* sim-main.h (WITH_PROFILE): Do not define, defined in
|
|
|
|
|
common/sim-config.h. Use sim-profile module.
|
|
|
|
|
(simPROFILE): Delete defintion.
|
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|
|
|
|
|
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|
|
* interp.c (PROFILE): Delete definition.
|
|
|
|
|
(mips_option_handler): Delete 'p', 'y' and 'x' profile options.
|
|
|
|
|
(sim_close): Delete code writing profile histogram.
|
|
|
|
|
(mips_set_profile, mips_set_profile_size, writeout16, writeout32):
|
|
|
|
|
Delete.
|
|
|
|
|
(sim_engine_run): Delete code profiling the PC.
|
|
|
|
|
|
1997-10-20 06:28:53 +00:00
|
|
|
Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
|
|
|
|
|
|
|
|
|
|
* interp.c (sim_monitor): Make register pointers of type
|
|
|
|
|
unsigned_word*.
|
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|
|
|
|
|
|
|
|
* sim-main.h: Make registers of type unsigned_word not
|
|
|
|
|
signed_word.
|
|
|
|
|
|
1997-10-16 03:50:48 +00:00
|
|
|
Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
start-sanitize-r5900
|
|
|
|
|
* sim-main.h (BYTES_IN_MMI_REGS, ..., SUB_REG_FETCH, ..., GPR_SB,
|
|
|
|
|
...): Move to sim-main.h
|
|
|
|
|
|
|
|
|
|
end-sanitize-r5900
|
|
|
|
|
* interp.c (sync_operation): Rename from SyncOperation, make
|
|
|
|
|
global, add SD argument.
|
|
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|
|
(prefetch): Rename from Prefetch, make global, add SD argument.
|
|
|
|
|
(decode_coproc): Make global.
|
|
|
|
|
|
|
|
|
|
* sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
|
|
|
|
|
|
|
|
|
|
* gencode.c (build_instruction): Generate DecodeCoproc not
|
|
|
|
|
decode_coproc calls.
|
|
|
|
|
|
|
|
|
|
* interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
|
|
|
|
|
(SizeFGR): Move to sim-main.h
|
|
|
|
|
(simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
|
|
|
|
|
simSIGINT, simJALDELAYSLOT): Move to sim-main.h
|
|
|
|
|
(FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
|
|
|
|
|
sim-main.h.
|
|
|
|
|
(FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
|
|
|
|
|
FP_RM_TOMINF, GETRM): Move to sim-main.h.
|
|
|
|
|
(Uncached, CachedNoncoherent, CachedCoherent, Cached,
|
|
|
|
|
isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
|
|
|
|
|
(UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
|
|
|
|
|
BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
|
|
|
|
|
|
|
|
|
|
* sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
|
|
|
|
|
exception.
|
|
|
|
|
(sim-alu.h): Include.
|
|
|
|
|
(NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
|
|
|
|
|
(sim_cia): Typedef to instruction_address.
|
|
|
|
|
|
1997-10-16 03:39:13 +00:00
|
|
|
Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* Makefile.in (interp.o): Rename generated file engine.c to
|
|
|
|
|
oengine.c.
|
|
|
|
|
|
|
|
|
|
* interp.c: Update.
|
|
|
|
|
|
1997-10-16 03:29:47 +00:00
|
|
|
Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* gencode.c (build_instruction): Use FPR_STATE not fpr_state.
|
|
|
|
|
|
1997-10-16 03:23:16 +00:00
|
|
|
Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* gencode.c (build_instruction): For "FPSQRT", output correct
|
|
|
|
|
number of arguments to Recip.
|
|
|
|
|
|
1997-10-14 09:26:03 +00:00
|
|
|
Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* Makefile.in (interp.o): Depends on sim-main.h
|
|
|
|
|
|
|
|
|
|
* interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
|
|
|
|
|
|
|
|
|
|
* sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
|
|
|
|
|
ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
|
|
|
|
|
(REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
|
|
|
|
|
STATE, DSSTATE): Define
|
|
|
|
|
(GPR, FGRIDX, ..): Define.
|
|
|
|
|
|
|
|
|
|
* interp.c (registers, register_widths, fpr_state, ipc, dspc,
|
|
|
|
|
pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
|
|
|
|
|
(GPR, FGRIDX, ...): Delete macros.
|
|
|
|
|
|
|
|
|
|
* interp.c: Update names to match defines from sim-main.h
|
|
|
|
|
|
1997-10-14 07:27:31 +00:00
|
|
|
Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (sim_monitor): Add SD argument.
|
|
|
|
|
(sim_warning): Delete. Replace calls with calls to
|
|
|
|
|
sim_io_eprintf.
|
|
|
|
|
(sim_error): Delete. Replace calls with sim_io_error.
|
|
|
|
|
(open_trace, writeout32, writeout16, getnum): Add SD argument.
|
|
|
|
|
(mips_set_profile): Rename from sim_set_profile. Add SD argument.
|
|
|
|
|
(mips_set_profile_size): Rename from sim_set_profile_size. Add SD
|
|
|
|
|
argument.
|
|
|
|
|
(mips_size): Rename from sim_size. Add SD argument.
|
|
|
|
|
|
|
|
|
|
* interp.c (simulator): Delete global variable.
|
|
|
|
|
(callback): Delete global variable.
|
|
|
|
|
(mips_option_handler, sim_open, sim_write, sim_read,
|
|
|
|
|
sim_store_register, sim_fetch_register, sim_info, sim_do_command,
|
|
|
|
|
sim_size,sim_monitor): Use sim_io_* not callback->*.
|
|
|
|
|
(sim_open): ZALLOC simulator struct.
|
|
|
|
|
(PROFILE): Do not define.
|
|
|
|
|
|
|
|
|
|
Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (sim_open), support.h: Replace CHECKSIM macro found in
|
|
|
|
|
support.h with corresponding code.
|
|
|
|
|
|
|
|
|
|
* sim-main.h (word64, uword64), support.h: Move definition to
|
|
|
|
|
sim-main.h.
|
|
|
|
|
(WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
|
|
|
|
|
|
|
|
|
|
* support.h: Delete
|
|
|
|
|
* Makefile.in: Update dependencies
|
|
|
|
|
* interp.c: Do not include.
|
|
|
|
|
|
|
|
|
|
Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (address_translation, load_memory, store_memory,
|
|
|
|
|
cache_op): Rename to from AddressTranslation et.al., make global,
|
|
|
|
|
add SD argument
|
|
|
|
|
|
|
|
|
|
* sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
|
|
|
|
|
CacheOp): Define.
|
|
|
|
|
|
|
|
|
|
* interp.c (SignalException): Rename to signal_exception, make
|
|
|
|
|
global.
|
|
|
|
|
|
|
|
|
|
* interp.c (Interrupt, ...): Move definitions to sim-main.h.
|
|
|
|
|
|
|
|
|
|
* sim-main.h (SignalException, SignalExceptionInterrupt,
|
|
|
|
|
SignalExceptionInstructionFetch, SignalExceptionAddressStore,
|
|
|
|
|
SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
|
|
|
|
|
SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
|
|
|
|
|
Define.
|
|
|
|
|
|
|
|
|
|
* interp.c, support.h: Use.
|
|
|
|
|
|
|
|
|
|
Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
|
|
|
|
|
to value_fpr / store_fpr. Add SD argument.
|
|
|
|
|
(NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
|
|
|
|
|
Multiply, Divide, Recip, SquareRoot, Convert): Make global.
|
|
|
|
|
|
|
|
|
|
* sim-main.h (ValueFPR, StoreFPR): Define.
|
|
|
|
|
|
|
|
|
|
Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (sim_engine_run): Check consistency between configure
|
|
|
|
|
WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
|
|
|
|
|
and HASFPU.
|
|
|
|
|
|
|
|
|
|
* configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
|
|
|
|
|
(mips_fpu): Configure WITH_FLOATING_POINT.
|
|
|
|
|
(mips_endian): Configure WITH_TARGET_ENDIAN.
|
|
|
|
|
* configure: Update.
|
|
|
|
|
|
|
|
|
|
Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
|
|
|
|
|
1997-09-30 03:45:51 +00:00
|
|
|
start-sanitize-r5900
|
|
|
|
|
Mon Aug 25 19:11:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (MAX_REG): Allow up-to 128 registers.
|
|
|
|
|
(LO1, HI1): Define value that matches REGISTER_NAMES in gdb.
|
|
|
|
|
(REGISTER_SA): Ditto.
|
|
|
|
|
(sim_open): Initialize register_widths for r5900 specific
|
|
|
|
|
registers.
|
|
|
|
|
(sim_fetch_register, sim_store_register): Check for request of
|
|
|
|
|
r5900 specific SA register. Check for request for hi 64 bits of
|
|
|
|
|
r5900 specific registers.
|
|
|
|
|
|
|
|
|
|
end-sanitize-r5900
|
1997-09-29 21:46:32 +00:00
|
|
|
Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerated.
|
|
|
|
|
|
1997-09-26 20:56:55 +00:00
|
|
|
Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
|
|
|
|
|
|
1997-09-25 04:23:24 +00:00
|
|
|
Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
1997-09-26 20:56:55 +00:00
|
|
|
* gencode.c (print_igen_insn_models): Assume certain architectures
|
|
|
|
|
include all mips* instructions.
|
|
|
|
|
(print_igen_insn_format): Use data_size==-1 as marker for MIPS16
|
|
|
|
|
instruction.
|
|
|
|
|
|
1997-09-25 04:23:24 +00:00
|
|
|
* Makefile.in (tmp.igen): Add target. Generate igen input from
|
|
|
|
|
gencode file.
|
|
|
|
|
|
|
|
|
|
* gencode.c (FEATURE_IGEN): Define.
|
|
|
|
|
(main): Add --igen option. Generate output in igen format.
|
|
|
|
|
(process_instructions): Format output according to igen option.
|
|
|
|
|
(print_igen_insn_format): New function.
|
|
|
|
|
(print_igen_insn_models): New function.
|
|
|
|
|
(process_instructions): Only issue warnings and ignore
|
|
|
|
|
instructions when no FEATURE_IGEN.
|
|
|
|
|
|
1997-09-25 04:13:50 +00:00
|
|
|
Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
|
|
|
|
|
MIPS targets.
|
|
|
|
|
|
1997-09-23 01:25:26 +00:00
|
|
|
Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
|
|
|
|
|
|
|
|
|
Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
|
|
|
|
|
SIM_RESERVED_BITS): Delete, moved to common.
|
|
|
|
|
(SIM_EXTRA_CFLAGS): Update.
|
|
|
|
|
|
1997-09-22 02:49:57 +00:00
|
|
|
Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
1997-09-22 09:40:57 +00:00
|
|
|
* configure.in: Configure non-strict memory alignment.
|
1997-09-22 02:49:57 +00:00
|
|
|
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
|
|
|
|
|
1997-09-22 00:24:46 +00:00
|
|
|
Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
|
|
|
|
|
|
|
|
|
Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* gencode.c (SDBBP,DERET): Added (3900) insns.
|
|
|
|
|
(RFE): Turn on for 3900.
|
|
|
|
|
* interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
|
|
|
|
|
(dsstate): Made global.
|
|
|
|
|
(SUBTARGET_R3900): Added.
|
|
|
|
|
(CANCELDELAYSLOT): New.
|
|
|
|
|
(SignalException): Ignore SystemCall rather than ignore and
|
|
|
|
|
terminate. Add DebugBreakPoint handling.
|
|
|
|
|
(decode_coproc): New insns RFE, DERET; and new registers Debug
|
|
|
|
|
and DEPC protected by SUBTARGET_R3900.
|
|
|
|
|
(sim_engine_run): Use CANCELDELAYSLOT rather than clearing
|
|
|
|
|
bits explicitly.
|
|
|
|
|
* Makefile.in,configure.in: Add mips subtarget option.
|
|
|
|
|
* configure: Update.
|
|
|
|
|
|
1997-09-19 13:39:55 +00:00
|
|
|
Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* gencode.c: Add r3900 (tx39).
|
|
|
|
|
|
|
|
|
|
start-sanitize-tx19
|
|
|
|
|
* gencode.c: Fix some configuration problems by improving
|
|
|
|
|
the relationship between tx19 and tx39.
|
|
|
|
|
end-sanitize-tx19
|
|
|
|
|
|
1997-09-16 20:01:00 +00:00
|
|
|
Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* gencode.c (build_instruction): Don't need to subtract 4 for
|
|
|
|
|
JALR, just 2.
|
|
|
|
|
|
1997-09-16 15:36:18 +00:00
|
|
|
Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c: Correct some HASFPU problems.
|
|
|
|
|
|
1997-09-15 08:25:04 +00:00
|
|
|
Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
|
|
|
|
|
1997-09-12 02:29:04 +00:00
|
|
|
Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (mips_options): Fix samples option short form, should
|
|
|
|
|
be `x'.
|
|
|
|
|
|
1997-09-10 23:50:32 +00:00
|
|
|
Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (sim_info): Enable info code. Was just returning.
|
|
|
|
|
|
1997-09-09 10:38:39 +00:00
|
|
|
Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (decode_coproc): Clarify warning about unsuported MTC0,
|
|
|
|
|
MFC0.
|
|
|
|
|
|
1997-09-09 07:02:02 +00:00
|
|
|
Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* gencode.c (build_instruction): Use SIGNED64 for 64 bit
|
|
|
|
|
constants.
|
|
|
|
|
(build_instruction): Ditto for LL.
|
|
|
|
|
|
1997-09-07 20:33:22 +00:00
|
|
|
start-sanitize-tx19
|
|
|
|
|
Sun Sep 7 16:05:46 1997 Gavin Koch <gavin@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* mips/configure.in, mips/gencode: Add tx19/r1900.
|
|
|
|
|
|
|
|
|
|
end-sanitize-tx19
|
1997-09-05 00:42:05 +00:00
|
|
|
Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
|
|
|
|
|
1997-09-01 09:47:03 +00:00
|
|
|
start-sanitize-r5900
|
|
|
|
|
Mon Sep 1 18:43:30 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* gencode.c (build_instruction): For "pabsw" and "pabsh", check
|
|
|
|
|
for overflow due to ABS of MININT, set result to MAXINT.
|
|
|
|
|
(build_instruction): For "psrlvw", signextend bit 31.
|
|
|
|
|
|
|
|
|
|
end-sanitize-r5900
|
1997-08-27 22:43:18 +00:00
|
|
|
Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
|
|
|
|
* config.in: Ditto.
|
|
|
|
|
|
1997-08-27 04:44:41 +00:00
|
|
|
Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (sim_open): Add call to sim_analyze_program, update
|
|
|
|
|
call to sim_config.
|
|
|
|
|
|
1997-08-26 02:05:18 +00:00
|
|
|
Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (sim_kill): Delete.
|
1997-08-27 04:44:41 +00:00
|
|
|
(sim_create_inferior): Add ABFD argument. Set PC from same.
|
|
|
|
|
(sim_load): Move code initializing trap handlers from here.
|
|
|
|
|
(sim_open): To here.
|
|
|
|
|
(sim_load): Delete, use sim-hload.c.
|
|
|
|
|
|
|
|
|
|
* Makefile.in (SIM_OBJS): Add sim-hload.o module.
|
1997-08-26 02:05:18 +00:00
|
|
|
|
1997-08-25 23:14:25 +00:00
|
|
|
Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
|
|
|
|
* config.in: Ditto.
|
|
|
|
|
|
|
|
|
|
Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (sim_open): Add ABFD argument.
|
|
|
|
|
(sim_load): Move call to sim_config from here.
|
|
|
|
|
(sim_open): To here. Check return status.
|
|
|
|
|
|
|
|
|
|
start-sanitize-r5900
|
|
|
|
|
* gencode.c (build_instruction): Do not define x8000000000000000,
|
|
|
|
|
x7FFFFFFFFFFFFFFF, or xFFFFFFFF80000000.
|
|
|
|
|
|
|
|
|
|
end-sanitize-r5900
|
|
|
|
|
start-sanitize-r5900
|
|
|
|
|
Mon Jul 28 19:49:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* gencode.c (build_instruction): For "pdivw", "pdivbw" and
|
|
|
|
|
"pdivuw" check for overflow due to signed divide by -1.
|
|
|
|
|
|
|
|
|
|
end-sanitize-r5900
|
1997-07-25 19:10:05 +00:00
|
|
|
Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* gencode.c (build_instruction): Two arg MADD should
|
|
|
|
|
not assign result to $0.
|
|
|
|
|
|
1997-07-11 03:07:29 +00:00
|
|
|
start-sanitize-r5900
|
|
|
|
|
Thu Jul 10 11:58:48 1997 Andrew Cagney <cagney@critters.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* gencode.c (build_instruction): For "ppac5" use unsigned
|
|
|
|
|
arrithmetic so that the sign bit doesn't smear when right shifted.
|
|
|
|
|
(build_instruction): For "pdiv" perform sign extension when
|
|
|
|
|
storing results in HI and LO.
|
|
|
|
|
(build_instructions): For "pdiv" and "pdivbw" check for
|
|
|
|
|
divide-by-zero.
|
|
|
|
|
(build_instruction): For "pmfhl.slw" update hi part of dest
|
|
|
|
|
register as well as low part.
|
|
|
|
|
(build_instruction): For "pmfhl" portably handle long long values.
|
|
|
|
|
(build_instruction): For "pmfhl.sh" correctly negative values.
|
|
|
|
|
Store half words 2 and three in the correct place.
|
|
|
|
|
(build_instruction): For "psllvw", sign extend value after shift.
|
|
|
|
|
|
|
|
|
|
end-sanitize-r5900
|
|
|
|
|
Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
|
|
|
|
|
|
|
|
|
|
* sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
|
|
|
|
|
* sim/mips/configure.in: Regenerate.
|
|
|
|
|
|
|
|
|
|
Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
|
|
|
|
|
signed8, unsigned8 et.al. types.
|
|
|
|
|
|
|
|
|
|
start-sanitize-r5900
|
|
|
|
|
* gencode.c (build_instruction): For PMULTU* do not sign extend
|
|
|
|
|
registers. Make generated code easier to debug.
|
|
|
|
|
|
|
|
|
|
end-sanitize-r5900
|
|
|
|
|
* interp.c (SUB_REG_FETCH): Handle both little and big endian
|
|
|
|
|
hosts when selecting subreg.
|
|
|
|
|
|
|
|
|
|
start-sanitize-r5900
|
|
|
|
|
Tue Jul 8 18:07:20 1997 Andrew Cagney <cagney@andros.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* gencode.c (type_for_data_len): For 32bit operations concerned
|
|
|
|
|
with overflow, perform op using 64bits.
|
|
|
|
|
(build_instruction): For PADD, always compute operation using type
|
|
|
|
|
returned by type_for_data_len.
|
|
|
|
|
(build_instruction): For PSUBU, when overflow, saturate to zero as
|
|
|
|
|
actually underflow.
|
|
|
|
|
|
|
|
|
|
end-sanitize-r5900
|
1997-07-02 17:57:56 +00:00
|
|
|
Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
|
|
|
|
|
|
1997-07-02 18:29:16 +00:00
|
|
|
start-sanitize-r5900
|
1997-07-02 18:41:22 +00:00
|
|
|
* gencode.c (build_instruction): Handle "pext5" according to
|
|
|
|
|
version 1.95 of the r5900 ISA.
|
|
|
|
|
|
1997-07-02 18:29:16 +00:00
|
|
|
* gencode.c (build_instruction): Handle "ppac5" according to
|
|
|
|
|
version 1.95 of the r5900 ISA.
|
|
|
|
|
|
1997-07-11 03:07:29 +00:00
|
|
|
end-sanitize-r5900
|
1997-07-02 18:13:00 +00:00
|
|
|
* interp.c (sim_engine_run): Reset the ZERO register to zero
|
|
|
|
|
regardless of FEATURE_WARN_ZERO.
|
1997-07-02 17:57:56 +00:00
|
|
|
* gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
|
|
|
|
|
|
|
|
|
|
Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (decode_coproc): Implement MTC0 N, CAUSE.
|
|
|
|
|
(SignalException): For BreakPoints ignore any mode bits and just
|
|
|
|
|
save the PC.
|
|
|
|
|
(SignalException): Always set the CAUSE register.
|
|
|
|
|
|
1997-06-03 23:03:50 +00:00
|
|
|
Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (SignalException): Clear the simDELAYSLOT flag when an
|
|
|
|
|
exception has been taken.
|
|
|
|
|
|
|
|
|
|
* interp.c: Implement the ERET and mt/f sr instructions.
|
|
|
|
|
|
1997-07-02 17:57:56 +00:00
|
|
|
start-sanitize-r5900
|
1997-06-03 23:03:50 +00:00
|
|
|
Mon Jun 2 23:28:19 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* gencode.c (build_instruction): For paddu, extract unsigned
|
|
|
|
|
sub-fields.
|
|
|
|
|
|
|
|
|
|
* gencode.c (build_instruction): Saturate padds instead of padd
|
|
|
|
|
instructions.
|
|
|
|
|
|
|
|
|
|
end-sanitize-r5900
|
|
|
|
|
Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (SignalException): Don't bother restarting an
|
|
|
|
|
interrupt.
|
|
|
|
|
|
|
|
|
|
Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (SignalException): Really take an interrupt.
|
|
|
|
|
(interrupt_event): Only deliver interrupts when enabled.
|
|
|
|
|
|
|
|
|
|
Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (sim_info): Only print info when verbose.
|
|
|
|
|
(sim_info) Use sim_io_printf for output.
|
|
|
|
|
|
1997-05-27 06:48:20 +00:00
|
|
|
Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (CoProcPresent): Add UNUSED attribute - not used by all
|
|
|
|
|
mips architectures.
|
|
|
|
|
|
|
|
|
|
Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (sim_do_command): Check for common commands if a
|
|
|
|
|
simulator specific command fails.
|
|
|
|
|
|
1997-05-22 13:30:01 +00:00
|
|
|
Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
|
|
|
|
|
and simBE when DEBUG is defined.
|
|
|
|
|
|
1997-05-21 06:54:13 +00:00
|
|
|
Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (interrupt_event): New function. Pass exception event
|
|
|
|
|
onto exception handler.
|
|
|
|
|
|
|
|
|
|
* configure.in: Check for stdlib.h.
|
|
|
|
|
* configure: Regenerate.
|
|
|
|
|
|
|
|
|
|
* gencode.c (build_instruction): Add UNUSED attribute to tempS
|
|
|
|
|
variable declaration.
|
|
|
|
|
(build_instruction): Initialize memval1.
|
|
|
|
|
(build_instruction): Add UNUSED attribute to byte, bigend,
|
|
|
|
|
reverse.
|
|
|
|
|
(build_operands): Ditto.
|
|
|
|
|
|
|
|
|
|
* interp.c: Fix GCC warnings.
|
|
|
|
|
(sim_get_quit_code): Delete.
|
|
|
|
|
|
|
|
|
|
* configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
|
|
|
|
|
* Makefile.in: Ditto.
|
|
|
|
|
* configure: Re-generate.
|
|
|
|
|
|
|
|
|
|
* Makefile.in (SIM_OBJS): Add sim-watch.o module.
|
|
|
|
|
|
|
|
|
|
Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (mips_option_handler): New function parse argumes using
|
|
|
|
|
sim-options.
|
|
|
|
|
(myname): Replace with STATE_MY_NAME.
|
|
|
|
|
(sim_open): Delete check for host endianness - performed by
|
|
|
|
|
sim_config.
|
|
|
|
|
(simHOSTBE, simBE): Delete, replaced by sim-endian flags.
|
|
|
|
|
(sim_open): Move much of the initialization from here.
|
|
|
|
|
(sim_load): To here. After the image has been loaded and
|
|
|
|
|
endianness set.
|
|
|
|
|
(sim_open): Move ColdReset from here.
|
|
|
|
|
(sim_create_inferior): To here.
|
|
|
|
|
(sim_open): Make FP check less dependant on host endianness.
|
|
|
|
|
|
|
|
|
|
* Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
|
|
|
|
|
run.
|
|
|
|
|
* interp.c (sim_set_callbacks): Delete.
|
|
|
|
|
|
|
|
|
|
* interp.c (membank, membank_base, membank_size): Replace with
|
|
|
|
|
STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
|
|
|
|
|
(sim_open): Remove call to callback->init. gdb/run do this.
|
|
|
|
|
|
|
|
|
|
* interp.c: Update
|
|
|
|
|
|
|
|
|
|
* sim-main.h (SIM_HAVE_FLATMEM): Define.
|
|
|
|
|
|
|
|
|
|
* interp.c (big_endian_p): Delete, replaced by
|
|
|
|
|
current_target_byte_order.
|
|
|
|
|
|
|
|
|
|
Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (host_read_long, host_read_word, host_swap_word,
|
|
|
|
|
host_swap_long): Delete. Using common sim-endian.
|
|
|
|
|
(sim_fetch_register, sim_store_register): Use H2T.
|
|
|
|
|
(pipeline_ticks): Delete. Handled by sim-events.
|
|
|
|
|
(sim_info): Update.
|
|
|
|
|
(sim_engine_run): Update.
|
|
|
|
|
|
|
|
|
|
Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (sim_stop_reason): Move code determining simEXCEPTION
|
|
|
|
|
reason from here.
|
|
|
|
|
(SignalException): To here. Signal using sim_engine_halt.
|
|
|
|
|
(sim_stop_reason): Delete, moved to common.
|
|
|
|
|
|
|
|
|
|
Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (sim_open): Add callback argument.
|
|
|
|
|
(sim_set_callbacks): Delete SIM_DESC argument.
|
|
|
|
|
(sim_size): Ditto.
|
|
|
|
|
|
1997-05-19 13:30:30 +00:00
|
|
|
Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* Makefile.in (SIM_OBJS): Add common modules.
|
|
|
|
|
|
|
|
|
|
* interp.c (sim_set_callbacks): Also set SD callback.
|
|
|
|
|
(set_endianness, xfer_*, swap_*): Delete.
|
|
|
|
|
(host_read_word, host_read_long, host_swap_word, host_swap_long):
|
|
|
|
|
Change to functions using sim-endian macros.
|
|
|
|
|
(control_c, sim_stop): Delete, use common version.
|
|
|
|
|
(simulate): Convert into.
|
|
|
|
|
(sim_engine_run): This function.
|
|
|
|
|
(sim_resume): Delete.
|
|
|
|
|
|
|
|
|
|
* interp.c (simulation): New variable - the simulator object.
|
|
|
|
|
(sim_kind): Delete global - merged into simulation.
|
|
|
|
|
(sim_load): Cleanup. Move PC assignment from here.
|
|
|
|
|
(sim_create_inferior): To here.
|
|
|
|
|
|
|
|
|
|
* sim-main.h: New file.
|
|
|
|
|
* interp.c (sim-main.h): Include.
|
|
|
|
|
|
|
|
|
|
Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
|
|
|
|
|
1997-04-24 00:42:50 +00:00
|
|
|
Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* tconfig.in (SIM_HAVE_BIENDIAN): Define.
|
|
|
|
|
|
1997-04-21 21:26:17 +00:00
|
|
|
Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* gencode.c (build_instruction): DIV instructions: check
|
|
|
|
|
for division by zero and integer overflow before using
|
|
|
|
|
host's division operation.
|
|
|
|
|
|
1997-04-17 10:23:48 +00:00
|
|
|
Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* Makefile.in (SIM_OBJS): Add sim-load.o.
|
|
|
|
|
* interp.c: #include bfd.h.
|
|
|
|
|
(target_byte_order): Delete.
|
|
|
|
|
(sim_kind, myname, big_endian_p): New static locals.
|
|
|
|
|
(sim_open): Set sim_kind, myname. Move call to set_endianness to
|
|
|
|
|
after argument parsing. Recognize -E arg, set endianness accordingly.
|
|
|
|
|
(sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
|
|
|
|
|
load file into simulator. Set PC from bfd.
|
|
|
|
|
(sim_create_inferior): Return SIM_RC. Delete arg start_address.
|
|
|
|
|
(set_endianness): Use big_endian_p instead of target_byte_order.
|
|
|
|
|
|
1997-04-17 06:05:19 +00:00
|
|
|
Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (sim_size): Delete prototype - conflicts with
|
|
|
|
|
definition in remote-sim.h. Correct definition.
|
|
|
|
|
|
|
|
|
|
Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
|
|
|
|
* config.in: Ditto.
|
|
|
|
|
|
1997-04-02 23:17:50 +00:00
|
|
|
Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
|
|
|
|
|
|
1997-04-02 23:39:50 +00:00
|
|
|
* interp.c (sim_open): New arg `kind'.
|
|
|
|
|
|
1997-04-02 23:17:50 +00:00
|
|
|
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
|
|
|
|
|
1997-04-02 05:04:25 +00:00
|
|
|
Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
|
|
|
|
|
|
|
|
|
Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (sim_open): Set optind to 0 before calling getopt.
|
|
|
|
|
|
|
|
|
|
Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
|
|
|
|
|
1997-03-17 16:02:13 +00:00
|
|
|
Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c : Replace uses of pr_addr with pr_uword64
|
|
|
|
|
where the bit length is always 64 independent of SIM_ADDR.
|
|
|
|
|
(pr_uword64) : added.
|
|
|
|
|
|
1997-03-17 15:29:29 +00:00
|
|
|
Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure: Re-generate.
|
|
|
|
|
|
1997-03-14 16:21:57 +00:00
|
|
|
Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerate to track ../common/aclocal.m4 changes.
|
|
|
|
|
|
1997-03-13 20:55:26 +00:00
|
|
|
Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (sim_open): New SIM_DESC result. Argument is now
|
|
|
|
|
in argv form.
|
|
|
|
|
(other sim_*): New SIM_DESC argument.
|
|
|
|
|
|
|
|
|
|
start-sanitize-r5900
|
|
|
|
|
Wed Feb 26 18:32:21 1997 Gavin Koch <gavin@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* gencode.c (POP_AND,POP_OR,POP_NOR,POP_XOR):
|
|
|
|
|
Change values to avoid overloading DOUBLEWORD which is tested
|
|
|
|
|
for all insns.
|
|
|
|
|
* gencode.c: reinstate "offending code".
|
|
|
|
|
|
1997-06-03 23:03:50 +00:00
|
|
|
end-sanitize-r5900
|
1997-03-13 20:55:26 +00:00
|
|
|
Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c: Fix printing of addresses for non-64-bit targets.
|
|
|
|
|
(pr_addr): Add function to print address based on size.
|
|
|
|
|
start-sanitize-r5900
|
|
|
|
|
* gencode.c: #ifdef out offending code until a permanent fix
|
|
|
|
|
can be added. Code is causing build errors for non-5900 mips targets.
|
|
|
|
|
end-sanitize-r5900
|
|
|
|
|
|
|
|
|
|
start-sanitize-r5900
|
|
|
|
|
Thu Feb 20 10:40:24 1997 Gavin Koch <gavin@cetus.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* gencode.c (process_instructions): Correct test for ISA dependent
|
|
|
|
|
architecture bits in isa field of MIPS_DECODE.
|
|
|
|
|
|
|
|
|
|
end-sanitize-r5900
|
1997-02-19 22:44:02 +00:00
|
|
|
Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
|
|
|
|
|
|
1997-02-18 22:15:04 +00:00
|
|
|
start-sanitize-r5900
|
1997-03-13 20:55:26 +00:00
|
|
|
Tue Feb 18 17:03:47 1997 Gavin Koch <gavin@cygnus.com>
|
1997-02-18 22:15:04 +00:00
|
|
|
|
|
|
|
|
* gencode.c (MIPS_DECODE): Correct instruction feature flags for
|
|
|
|
|
PMADDUW.
|
|
|
|
|
|
|
|
|
|
end-sanitize-r5900
|
|
|
|
|
Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* gencode.c (build_mips16_operands): Correct computation of base
|
|
|
|
|
address for extended PC relative instruction.
|
|
|
|
|
|
1997-02-11 13:26:34 +00:00
|
|
|
start-sanitize-r5900
|
|
|
|
|
Fri Feb 7 11:12:44 1997 Gavin Koch <gavin@cygnus.com>
|
1997-02-18 22:15:04 +00:00
|
|
|
|
|
|
|
|
* Makefile.in, configure, configure.in, gencode.c,
|
|
|
|
|
interp.c, support.h: add r5900.
|
|
|
|
|
|
1997-02-11 13:26:34 +00:00
|
|
|
end-sanitize-r5900
|
1997-02-06 22:19:05 +00:00
|
|
|
Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (mips16_entry): Add support for floating point cases.
|
|
|
|
|
(SignalException): Pass floating point cases to mips16_entry.
|
|
|
|
|
(ValueFPR): Don't restrict fmt_single and fmt_word to even
|
|
|
|
|
registers.
|
|
|
|
|
(StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
|
|
|
|
|
or fmt_word.
|
|
|
|
|
(COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
|
|
|
|
|
and then set the state to fmt_uninterpreted.
|
|
|
|
|
(COP_SW): Temporarily set the state to fmt_word while calling
|
|
|
|
|
ValueFPR.
|
|
|
|
|
|
1997-02-04 21:48:54 +00:00
|
|
|
Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* gencode.c (build_instruction): The high order may be set in the
|
|
|
|
|
comparison flags at any ISA level, not just ISA 4.
|
|
|
|
|
|
1997-02-04 21:42:27 +00:00
|
|
|
Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* Makefile.in (@COMMON_MAKEFILE_FRAG): Use
|
|
|
|
|
COMMON_{PRE,POST}_CONFIG_FRAG instead.
|
|
|
|
|
* configure.in: sinclude ../common/aclocal.m4.
|
|
|
|
|
* configure: Regenerated.
|
|
|
|
|
|
1997-01-31 16:12:09 +00:00
|
|
|
Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* configure: Rebuild after change to aclocal.m4.
|
|
|
|
|
|
1997-01-23 22:09:52 +00:00
|
|
|
Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
|
|
|
|
|
|
|
|
|
|
* configure configure.in Makefile.in: Update to new configure
|
|
|
|
|
scheme which is more compatible with WinGDB builds.
|
|
|
|
|
* configure.in: Improve comment on how to run autoconf.
|
|
|
|
|
* configure: Re-run autoconf to get new ../common/aclocal.m4.
|
|
|
|
|
* Makefile.in: Use autoconf substitution to install common
|
|
|
|
|
makefile fragment.
|
|
|
|
|
|
|
|
|
|
Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* gencode.c (build_instruction): Use BigEndianCPU instead of
|
|
|
|
|
ByteSwapMem.
|
|
|
|
|
|
1997-01-03 06:28:21 +00:00
|
|
|
Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (sim_monitor): Make output to stdout visible in
|
|
|
|
|
wingdb's I/O log window.
|
|
|
|
|
|
1996-12-31 15:05:46 +00:00
|
|
|
Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* support.h: Undo previous change to SIGTRAP
|
|
|
|
|
and SIGQUIT values.
|
|
|
|
|
|
1996-12-30 22:37:30 +00:00
|
|
|
Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (store_word, load_word): New static functions.
|
|
|
|
|
(mips16_entry): New static function.
|
|
|
|
|
(SignalException): Look for mips16 entry and exit instructions.
|
|
|
|
|
(simulate): Use the correct index when setting fpr_state after
|
|
|
|
|
doing a pending move.
|
|
|
|
|
|
1996-12-29 17:47:25 +00:00
|
|
|
Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c: Fix byte-swapping code throughout to work on
|
|
|
|
|
both little- and big-endian hosts.
|
|
|
|
|
|
1996-12-29 17:20:47 +00:00
|
|
|
Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* support.h: Make definitions of SIGTRAP and SIGQUIT consistent
|
|
|
|
|
with gdb/config/i386/xm-windows.h.
|
|
|
|
|
|
1996-12-28 06:51:58 +00:00
|
|
|
Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* gencode.c (build_instruction): Work around MSVC++ code gen bug
|
|
|
|
|
that messes up arithmetic shifts.
|
|
|
|
|
|
1996-12-20 19:05:28 +00:00
|
|
|
Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
|
|
|
|
|
|
|
|
|
|
* support.h: Use _WIN32 instead of __WIN32__. Also add defs for
|
|
|
|
|
SIGTRAP and SIGQUIT for _WIN32.
|
|
|
|
|
|
1996-12-19 19:08:46 +00:00
|
|
|
Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* gencode.c (build_instruction) [MUL]: Cast operands to word64, to
|
|
|
|
|
force a 64 bit multiplication.
|
|
|
|
|
(build_instruction) [OR]: In mips16 mode, don't do anything if the
|
|
|
|
|
destination register is 0, since that is the default mips16 nop
|
|
|
|
|
instruction.
|
|
|
|
|
|
1996-12-16 20:01:15 +00:00
|
|
|
Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
|
|
|
|
|
|
1996-12-16 21:47:23 +00:00
|
|
|
* gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
|
|
|
|
|
(build_endian_shift): Don't check proc64.
|
|
|
|
|
(build_instruction): Always set memval to uword64. Cast op2 to
|
|
|
|
|
uword64 when shifting it left in memory instructions. Always use
|
|
|
|
|
the same code for stores--don't special case proc64.
|
|
|
|
|
|
1996-12-16 20:01:15 +00:00
|
|
|
* gencode.c (build_mips16_operands): Fix base PC value for PC
|
|
|
|
|
relative operands.
|
|
|
|
|
(build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
|
|
|
|
|
jal instruction.
|
|
|
|
|
* interp.c (simJALDELAYSLOT): Define.
|
|
|
|
|
(JALDELAYSLOT): Define.
|
|
|
|
|
(INDELAYSLOT, INJALDELAYSLOT): Define.
|
|
|
|
|
(simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
|
|
|
|
|
|
1996-12-25 06:14:26 +00:00
|
|
|
Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
|
|
|
|
|
|
|
|
|
|
* interp.c (sim_open): add flush_cache as a PMON routine
|
|
|
|
|
(sim_monitor): handle flush_cache by ignoring it
|
|
|
|
|
|
1996-12-16 20:01:15 +00:00
|
|
|
Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* gencode.c (build_instruction): Use !ByteSwapMem instead of
|
|
|
|
|
BigEndianMem.
|
|
|
|
|
* interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
|
|
|
|
|
(BigEndianMem): Rename to ByteSwapMem and change sense.
|
|
|
|
|
(BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
|
|
|
|
|
BigEndianMem references to !ByteSwapMem.
|
|
|
|
|
(set_endianness): New function, with prototype.
|
|
|
|
|
(sim_open): Call set_endianness.
|
|
|
|
|
(sim_info): Use simBE instead of BigEndianMem.
|
|
|
|
|
(xfer_direct_word, xfer_direct_long, swap_direct_word,
|
|
|
|
|
swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
|
|
|
|
|
xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
|
|
|
|
|
ifdefs, keeping the prototype declaration.
|
|
|
|
|
(swap_word): Rewrite correctly.
|
|
|
|
|
(ColdReset): Delete references to CONFIG. Delete endianness related
|
|
|
|
|
code; moved to set_endianness.
|
|
|
|
|
|
1996-12-10 19:39:55 +00:00
|
|
|
Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
|
|
|
|
|
* interp.c (CHECKHILO): Define away.
|
|
|
|
|
(simSIGINT): New macro.
|
|
|
|
|
(membank_size): Increase from 1MB to 2MB.
|
|
|
|
|
(control_c): New function.
|
|
|
|
|
(sim_resume): Rename parameter signal to signal_number. Add local
|
|
|
|
|
variable prev. Call signal before and after simulate.
|
|
|
|
|
(sim_stop_reason): Add simSIGINT support.
|
|
|
|
|
(sim_warning, sim_error, dotrace, SignalException): Define as stdarg
|
|
|
|
|
functions always.
|
|
|
|
|
(sim_warning): Delete call to SignalException. Do call printf_filtered
|
|
|
|
|
if logfh is NULL.
|
|
|
|
|
(AddressTranslation): Add #ifdef DEBUG around debugging message and
|
|
|
|
|
a call to sim_warning.
|
|
|
|
|
|
|
|
|
|
Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
|
|
|
|
|
16 bit instructions.
|
|
|
|
|
|
Add support for mips16 (16 bit MIPS implementation):
* gencode.c (inst_type): Add mips16 instruction encoding types.
(GETDATASIZEINSN): Define.
(MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
mtlo.
(MIPS16_DECODE): New table, for mips16 instructions.
(bitmap_val): New static function.
(struct mips16_op): Define.
(mips16_op_table): New table, for mips16 operands.
(build_mips16_operands): New static function.
(process_instructions): If PC is odd, decode a mips16
instruction. Break out instruction handling into new
build_instruction function.
(build_instruction): New static function, broken out of
process_instructions. Check modifiers rather than flags for SHIFT
bit count and m[ft]{hi,lo} direction.
(usage): Pass program name to fprintf.
(main): Remove unused variable this_option_optind. Change
``*loptarg++'' to ``loptarg++''.
(my_strtoul): Parenthesize && within ||.
* interp.c (sim_trace): If tracefh is NULL, set it to stderr.
(LoadMemory): Accept a halfword pAddr if vAddr is odd.
(simulate): If PC is odd, fetch a 16 bit instruction, and
increment PC by 2 rather than 4.
* configure.in: Add case for mips16*-*-*.
* configure: Rebuild.
1996-11-26 18:12:44 +00:00
|
|
|
Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
|
|
|
|
|
|
|
|
|
|
Add support for mips16 (16 bit MIPS implementation):
|
|
|
|
|
* gencode.c (inst_type): Add mips16 instruction encoding types.
|
|
|
|
|
(GETDATASIZEINSN): Define.
|
|
|
|
|
(MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
|
|
|
|
|
jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
|
|
|
|
|
mtlo.
|
|
|
|
|
(MIPS16_DECODE): New table, for mips16 instructions.
|
|
|
|
|
(bitmap_val): New static function.
|
|
|
|
|
(struct mips16_op): Define.
|
|
|
|
|
(mips16_op_table): New table, for mips16 operands.
|
|
|
|
|
(build_mips16_operands): New static function.
|
|
|
|
|
(process_instructions): If PC is odd, decode a mips16
|
|
|
|
|
instruction. Break out instruction handling into new
|
|
|
|
|
build_instruction function.
|
|
|
|
|
(build_instruction): New static function, broken out of
|
|
|
|
|
process_instructions. Check modifiers rather than flags for SHIFT
|
|
|
|
|
bit count and m[ft]{hi,lo} direction.
|
|
|
|
|
(usage): Pass program name to fprintf.
|
|
|
|
|
(main): Remove unused variable this_option_optind. Change
|
|
|
|
|
``*loptarg++'' to ``loptarg++''.
|
|
|
|
|
(my_strtoul): Parenthesize && within ||.
|
1996-11-27 16:01:34 +00:00
|
|
|
* interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
|
Add support for mips16 (16 bit MIPS implementation):
* gencode.c (inst_type): Add mips16 instruction encoding types.
(GETDATASIZEINSN): Define.
(MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
mtlo.
(MIPS16_DECODE): New table, for mips16 instructions.
(bitmap_val): New static function.
(struct mips16_op): Define.
(mips16_op_table): New table, for mips16 operands.
(build_mips16_operands): New static function.
(process_instructions): If PC is odd, decode a mips16
instruction. Break out instruction handling into new
build_instruction function.
(build_instruction): New static function, broken out of
process_instructions. Check modifiers rather than flags for SHIFT
bit count and m[ft]{hi,lo} direction.
(usage): Pass program name to fprintf.
(main): Remove unused variable this_option_optind. Change
``*loptarg++'' to ``loptarg++''.
(my_strtoul): Parenthesize && within ||.
* interp.c (sim_trace): If tracefh is NULL, set it to stderr.
(LoadMemory): Accept a halfword pAddr if vAddr is odd.
(simulate): If PC is odd, fetch a 16 bit instruction, and
increment PC by 2 rather than 4.
* configure.in: Add case for mips16*-*-*.
* configure: Rebuild.
1996-11-26 18:12:44 +00:00
|
|
|
(simulate): If PC is odd, fetch a 16 bit instruction, and
|
|
|
|
|
increment PC by 2 rather than 4.
|
|
|
|
|
* configure.in: Add case for mips16*-*-*.
|
|
|
|
|
* configure: Rebuild.
|
|
|
|
|
|
|
|
|
|
Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c: Allow -t to enable tracing in standalone simulator.
|
|
|
|
|
Fix garbage output in trace file and error messages.
|
|
|
|
|
|
1996-11-20 10:00:42 +00:00
|
|
|
Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
|
|
|
|
|
|
|
|
|
|
* Makefile.in: Delete stuff moved to ../common/Make-common.in.
|
|
|
|
|
(SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
|
|
|
|
|
* configure.in: Simplify using macros in ../common/aclocal.m4.
|
|
|
|
|
* configure: Regenerated.
|
|
|
|
|
* tconfig.in: New file.
|
|
|
|
|
|
|
|
|
|
Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c: Fix bugs in 64-bit port.
|
|
|
|
|
Use ansi function declarations for msvc compiler.
|
|
|
|
|
Initialize and test file pointer in trace code.
|
|
|
|
|
Prevent duplicate definition of LAST_EMED_REGNUM.
|
|
|
|
|
|
|
|
|
|
Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* interp.c (xfer_big_long): Prevent unwanted sign extension.
|
|
|
|
|
|
|
|
|
|
Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
|
|
|
|
|
|
|
|
|
|
* interp.c (SignalException): Check for explicit terminating
|
|
|
|
|
breakpoint value.
|
|
|
|
|
* gencode.c: Pass instruction value through SignalException()
|
|
|
|
|
calls for Trap, Breakpoint and Syscall.
|
|
|
|
|
|
|
|
|
|
Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
|
|
|
|
|
|
|
|
|
|
* interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
|
|
|
|
|
only used on those hosts that provide it.
|
|
|
|
|
* configure.in: Add sqrt() to list of functions to be checked for.
|
|
|
|
|
* config.in: Re-generated.
|
|
|
|
|
* configure: Re-generated.
|
|
|
|
|
|
|
|
|
|
Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
|
|
|
|
|
|
|
|
|
|
* gencode.c (process_instructions): Call build_endian_shift when
|
|
|
|
|
expanding STORE RIGHT, to fix swr.
|
|
|
|
|
* support.h (SIGNEXTEND): If the sign bit is not set, explicitly
|
|
|
|
|
clear the high bits.
|
|
|
|
|
* interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
|
|
|
|
|
Fix float to int conversions to produce signed values.
|
|
|
|
|
|
1996-09-19 19:35:09 +00:00
|
|
|
Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
|
|
|
|
|
|
1996-09-20 03:07:43 +00:00
|
|
|
* gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
|
|
|
|
|
(process_instructions): Correct handling of nor instruction.
|
|
|
|
|
Correct shift count for 32 bit shift instructions. Correct sign
|
|
|
|
|
extension for arithmetic shifts to not shift the number of bits in
|
|
|
|
|
the type. Fix 64 bit multiply high word calculation. Fix 32 bit
|
|
|
|
|
unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
|
|
|
|
|
Fix madd.
|
1996-09-19 22:52:26 +00:00
|
|
|
* interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
|
|
|
|
|
It's OK to have a mult follow a mult. What's not OK is to have a
|
|
|
|
|
mult follow an mfhi.
|
1996-09-20 03:07:43 +00:00
|
|
|
(Convert): Comment out incorrect rounding code.
|
1996-09-19 19:35:09 +00:00
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1996-09-16 10:47:20 +00:00
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Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
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* interp.c (sim_monitor): Improved monitor printf
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simulation. Tidied up simulator warnings, and added "--log" option
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for directing warning message output.
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* gencode.c: Use sim_warning() rather than WARNING macro.
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Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
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* Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
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getopt1.o, rather than on gencode.c. Link objects together.
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Don't link against -liberty.
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(gencode.o, getopt.o, getopt1.o): New targets.
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* gencode.c: Include <ctype.h> and "ansidecl.h".
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(AND): Undefine after including "ansidecl.h".
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(ULONG_MAX): Define if not defined.
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(OP_*): Don't define macros; now defined in opcode/mips.h.
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(main): Call my_strtoul rather than strtoul.
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(my_strtoul): New static function.
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Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
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* gencode.c (process_instructions): Generate word64 and uword64
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instead of `long long' and `unsigned long long' data types.
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* interp.c: #include sysdep.h to get signals, and define default
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for SIGBUS.
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* (Convert): Work around for Visual-C++ compiler bug with type
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conversion.
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* support.h: Make things compile under Visual-C++ by using
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__int64 instead of `long long'. Change many refs to long long
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into word64/uword64 typedefs.
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1996-06-26 03:26:09 +00:00
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Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
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* Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
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INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
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(docdir): Removed.
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* configure.in (AC_PREREQ): autoconf 2.5 or higher.
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(AC_PROG_INSTALL): Added.
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(AC_PROG_CC): Moved to before configure.host call.
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* configure: Rebuilt.
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Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
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* configure.in: Define @SIMCONF@ depending on mips target.
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* configure: Rebuild.
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* Makefile.in (run): Add @SIMCONF@ to control simulator
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construction.
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* gencode.c: Change LOADDRMASK to 64bit memory model only.
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* interp.c: Remove some debugging, provide more detailed error
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messages, update memory accesses to use LOADDRMASK.
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1996-06-03 15:58:45 +00:00
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Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
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* configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
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AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
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stamp-h.
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* configure: Rebuild.
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* config.in: New file, generated by autoheader.
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* interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
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and <strings.h> if they exist. Replace #ifdef sun with #ifdef
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HAVE_ANINT and HAVE_AINT, as appropriate.
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* Makefile.in (run): Use @LIBS@ rather than -lm.
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(interp.o): Depend upon config.h.
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(Makefile): Just rebuild Makefile.
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(clean): Remove stamp-h.
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(mostlyclean): Make the same as clean, not as distclean.
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(config.h, stamp-h): New targets.
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Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
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* interp.c (ColdReset): Fix boolean test. Make all simulator
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globals static.
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Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
* interp.c (xfer_direct_word, xfer_direct_long,
swap_direct_word, swap_direct_long, xfer_big_word,
xfer_big_long, xfer_little_word, xfer_little_long,
swap_word,swap_long): Added.
* interp.c (ColdReset): Provide function indirection to
host<->simulated_target transfer routines.
* interp.c (sim_store_register, sim_fetch_register): Updated to
make use of indirected transfer routines.
1996-05-08 14:22:12 +00:00
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Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
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* interp.c (xfer_direct_word, xfer_direct_long,
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swap_direct_word, swap_direct_long, xfer_big_word,
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xfer_big_long, xfer_little_word, xfer_little_long,
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swap_word,swap_long): Added.
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* interp.c (ColdReset): Provide function indirection to
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host<->simulated_target transfer routines.
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* interp.c (sim_store_register, sim_fetch_register): Updated to
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make use of indirected transfer routines.
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Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
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* gencode.c (process_instructions): Ensure FP ABS instruction
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recognised.
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* interp.c (AbsoluteValue): Add routine. Also provide simple PMON
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system call support.
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1996-04-10 08:53:24 +00:00
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Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
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* interp.c (sim_do_command): Complain if callback structure not
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initialised.
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1996-03-28 14:08:51 +00:00
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Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
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* interp.c (Convert): Provide round-to-nearest and round-to-zero
|
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support for Sun hosts.
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* Makefile.in (gencode): Ensure the host compiler and libraries
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|
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|
used for cross-hosted build.
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1996-03-27 14:46:27 +00:00
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Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
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* interp.c, gencode.c: Some more (TODO) tidying.
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Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
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* gencode.c, interp.c: Replaced explicit long long references with
|
|
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|
|
WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
|
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|
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* support.h (SET64LO, SET64HI): Macros added.
|
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|
1996-02-21 17:18:42 +00:00
|
|
|
Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
|
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|
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|
|
|
* configure: Regenerate with autoconf 2.7.
|
|
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|
Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
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|
|
* interp.c (LoadMemory): Enclose text following #endif in /* */.
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|
|
* support.h: Remove superfluous "1" from #if.
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|
|
* support.h (CHECKSIM): Remove stray 'a' at end of line.
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|
Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
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|
* interp.c (StoreFPR): Control UndefinedResult() call on
|
|
|
|
|
WARN_RESULT manifest.
|
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|
1995-12-01 16:42:44 +00:00
|
|
|
Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
|
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|
|
|
|
|
|
|
* gencode.c: Tidied instruction decoding, and added FP instruction
|
|
|
|
|
support.
|
|
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|
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|
|
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|
|
* interp.c: Added dineroIII, and BSD profiling support. Also
|
|
|
|
|
run-time FP handling.
|
|
|
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|
|
Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
|
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|
|
* Changelog, Makefile.in, README.Cygnus, configure, configure.in,
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|
|
|
|
gencode.c, interp.c, support.h: created.
|
