* interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
This commit is contained in:
Felix Lee
parent
14bf95ea71
commit
76ef416550
2 changed files with 287 additions and 287 deletions
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@ -1,3 +1,12 @@
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1997-12-29 Felix Lee <flee@cygnus.com>
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* interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
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Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
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* Makefile.in (tmp-igen): Arrange for $zero to always be
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reset to zero after every instruction.
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Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* configure: Regenerated to track ../common/aclocal.m4 changes.
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@ -2141,27 +2141,23 @@ NaN(op,fmt)
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FP_formats fmt;
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{
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int boolean = 0;
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/* Check if (((E - bias) == (E_max + 1)) && (fraction != 0)). We
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know that the exponent field is biased... we we cheat and avoid
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removing the bias value. */
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switch (fmt) {
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case fmt_single:
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boolean = ((FP_S_be(op) == 0xFF) && (FP_S_f(op) != 0));
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/* We could use "FP_S_fb(1,op)" to ascertain whether we are
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dealing with a SNaN or QNaN */
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break;
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case fmt_double:
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boolean = ((FP_D_be(op) == 0x7FF) && (FP_D_f(op) != 0));
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/* We could use "FP_S_fb(1,op)" to ascertain whether we are
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dealing with a SNaN or QNaN */
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break;
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case fmt_word:
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boolean = (op == FPQNaN_WORD);
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break;
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{
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sim_fpu wop;
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sim_fpu_32to (&wop, op);
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boolean = sim_fpu_is_nan (&wop);
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break;
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}
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case fmt_double:
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case fmt_long:
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boolean = (op == FPQNaN_LONG);
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break;
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{
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sim_fpu wop;
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sim_fpu_64to (&wop, op);
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boolean = sim_fpu_is_nan (&wop);
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break;
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}
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default:
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fprintf (stderr, "Bad switch\n");
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abort ();
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@ -2185,16 +2181,21 @@ Infinity(op,fmt)
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printf("DBG: Infinity: format %s 0x%s\n",DOFMT(fmt),pr_addr(op));
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#endif /* DEBUG */
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/* Check if (((E - bias) == (E_max + 1)) && (fraction == 0)). We
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know that the exponent field is biased... we we cheat and avoid
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removing the bias value. */
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switch (fmt) {
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case fmt_single:
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boolean = ((FP_S_be(op) == 0xFF) && (FP_S_f(op) == 0));
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break;
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{
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sim_fpu wop;
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sim_fpu_32to (&wop, op);
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boolean = sim_fpu_is_infinity (&wop);
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break;
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}
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case fmt_double:
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boolean = ((FP_D_be(op) == 0x7FF) && (FP_D_f(op) == 0));
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break;
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{
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sim_fpu wop;
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sim_fpu_64to (&wop, op);
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boolean = sim_fpu_is_infinity (&wop);
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break;
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}
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default:
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printf("DBG: TODO: unrecognised format (%s) for Infinity check\n",DOFMT(fmt));
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break;
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@ -2225,14 +2226,22 @@ Less(op1,op2,fmt)
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switch (fmt) {
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case fmt_single:
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{
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unsigned int wop1 = (unsigned int)op1;
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unsigned int wop2 = (unsigned int)op2;
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boolean = (*(float *)&wop1 < *(float *)&wop2);
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sim_fpu wop1;
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sim_fpu wop2;
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sim_fpu_32to (&wop1, op1);
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sim_fpu_32to (&wop2, op2);
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boolean = sim_fpu_is_lt (&wop1, &wop2);
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break;
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}
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break;
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case fmt_double:
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boolean = (*(double *)&op1 < *(double *)&op2);
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break;
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{
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sim_fpu wop1;
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sim_fpu wop2;
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sim_fpu_64to (&wop1, op1);
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sim_fpu_64to (&wop2, op2);
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boolean = sim_fpu_is_lt (&wop1, &wop2);
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break;
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}
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default:
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fprintf (stderr, "Bad switch\n");
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abort ();
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@ -2262,11 +2271,23 @@ Equal(op1,op2,fmt)
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/* The format type should already have been checked: */
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switch (fmt) {
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case fmt_single:
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boolean = ((op1 & 0xFFFFFFFF) == (op2 & 0xFFFFFFFF));
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break;
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{
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sim_fpu wop1;
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sim_fpu wop2;
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sim_fpu_32to (&wop1, op1);
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sim_fpu_32to (&wop2, op2);
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boolean = sim_fpu_is_eq (&wop1, &wop2);
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break;
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}
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case fmt_double:
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boolean = (op1 == op2);
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break;
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{
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sim_fpu wop1;
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sim_fpu wop2;
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sim_fpu_64to (&wop1, op1);
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sim_fpu_64to (&wop2, op2);
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boolean = sim_fpu_is_eq (&wop1, &wop2);
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break;
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}
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default:
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fprintf (stderr, "Bad switch\n");
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abort ();
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@ -2294,15 +2315,23 @@ AbsoluteValue(op,fmt)
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switch (fmt) {
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case fmt_single:
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{
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unsigned int wop = (unsigned int)op;
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float tmp = ((float)fabs((double)*(float *)&wop));
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result = (uword64)*(unsigned int *)&tmp;
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sim_fpu wop;
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unsigned32 ans;
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sim_fpu_32to (&wop, op);
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sim_fpu_abs (&wop, &wop);
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sim_fpu_to32 (&ans, &wop);
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result = ans;
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break;
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}
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break;
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case fmt_double:
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{
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double tmp = (fabs(*(double *)&op));
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result = *(uword64 *)&tmp;
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sim_fpu wop;
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unsigned64 ans;
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sim_fpu_64to (&wop, op);
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sim_fpu_abs (&wop, &wop);
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sim_fpu_to64 (&ans, &wop);
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result = ans;
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break;
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}
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default:
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fprintf (stderr, "Bad switch\n");
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@ -2327,17 +2356,24 @@ Negate(op,fmt)
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switch (fmt) {
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case fmt_single:
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{
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unsigned int wop = (unsigned int)op;
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float tmp = ((float)0.0 - *(float *)&wop);
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result = (uword64)*(unsigned int *)&tmp;
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sim_fpu wop;
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unsigned32 ans;
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sim_fpu_32to (&wop, op);
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sim_fpu_neg (&wop, &wop);
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sim_fpu_to32 (&ans, &wop);
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result = ans;
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break;
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}
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break;
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case fmt_double:
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{
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double tmp = ((double)0.0 - *(double *)&op);
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result = *(uword64 *)&tmp;
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sim_fpu wop;
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unsigned64 ans;
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sim_fpu_64to (&wop, op);
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sim_fpu_neg (&wop, &wop);
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sim_fpu_to64 (&ans, &wop);
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result = ans;
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break;
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}
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break;
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default:
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fprintf (stderr, "Bad switch\n");
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abort ();
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@ -2365,18 +2401,30 @@ Add(op1,op2,fmt)
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switch (fmt) {
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case fmt_single:
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{
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unsigned int wop1 = (unsigned int)op1;
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unsigned int wop2 = (unsigned int)op2;
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float tmp = (*(float *)&wop1 + *(float *)&wop2);
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result = (uword64)*(unsigned int *)&tmp;
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sim_fpu wop1;
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sim_fpu wop2;
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sim_fpu ans;
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unsigned32 res;
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sim_fpu_32to (&wop1, op1);
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sim_fpu_32to (&wop2, op2);
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sim_fpu_add (&ans, &wop1, &wop2);
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sim_fpu_to32 (&res, &ans);
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result = res;
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break;
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}
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break;
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case fmt_double:
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{
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double tmp = (*(double *)&op1 + *(double *)&op2);
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result = *(uword64 *)&tmp;
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sim_fpu wop1;
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sim_fpu wop2;
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sim_fpu ans;
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unsigned64 res;
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sim_fpu_64to (&wop1, op1);
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sim_fpu_64to (&wop2, op2);
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sim_fpu_add (&ans, &wop1, &wop2);
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sim_fpu_to64 (&res, &ans);
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result = res;
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break;
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}
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break;
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default:
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fprintf (stderr, "Bad switch\n");
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abort ();
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@ -2408,16 +2456,28 @@ Sub(op1,op2,fmt)
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switch (fmt) {
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case fmt_single:
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{
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unsigned int wop1 = (unsigned int)op1;
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unsigned int wop2 = (unsigned int)op2;
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float tmp = (*(float *)&wop1 - *(float *)&wop2);
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result = (uword64)*(unsigned int *)&tmp;
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sim_fpu wop1;
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sim_fpu wop2;
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sim_fpu ans;
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unsigned32 res;
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sim_fpu_32to (&wop1, op1);
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sim_fpu_32to (&wop2, op2);
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sim_fpu_sub (&ans, &wop1, &wop2);
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sim_fpu_to32 (&res, &ans);
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result = res;
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}
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break;
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case fmt_double:
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{
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double tmp = (*(double *)&op1 - *(double *)&op2);
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result = *(uword64 *)&tmp;
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sim_fpu wop1;
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sim_fpu wop2;
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sim_fpu ans;
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unsigned64 res;
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sim_fpu_64to (&wop1, op1);
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sim_fpu_64to (&wop2, op2);
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sim_fpu_sub (&ans, &wop1, &wop2);
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sim_fpu_to64 (&res, &ans);
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result = res;
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}
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break;
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default:
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@ -2451,18 +2511,30 @@ Multiply(op1,op2,fmt)
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switch (fmt) {
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case fmt_single:
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{
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unsigned int wop1 = (unsigned int)op1;
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unsigned int wop2 = (unsigned int)op2;
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float tmp = (*(float *)&wop1 * *(float *)&wop2);
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result = (uword64)*(unsigned int *)&tmp;
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sim_fpu wop1;
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sim_fpu wop2;
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sim_fpu ans;
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unsigned32 res;
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sim_fpu_32to (&wop1, op1);
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sim_fpu_32to (&wop2, op2);
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sim_fpu_mul (&ans, &wop1, &wop2);
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sim_fpu_to32 (&res, &ans);
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result = res;
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break;
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}
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break;
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case fmt_double:
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{
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double tmp = (*(double *)&op1 * *(double *)&op2);
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result = *(uword64 *)&tmp;
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sim_fpu wop1;
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sim_fpu wop2;
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sim_fpu ans;
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unsigned64 res;
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sim_fpu_64to (&wop1, op1);
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sim_fpu_64to (&wop2, op2);
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sim_fpu_mul (&ans, &wop1, &wop2);
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sim_fpu_to64 (&res, &ans);
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result = res;
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break;
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}
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break;
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default:
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fprintf (stderr, "Bad switch\n");
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abort ();
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@ -2494,18 +2566,30 @@ Divide(op1,op2,fmt)
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switch (fmt) {
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case fmt_single:
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{
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unsigned int wop1 = (unsigned int)op1;
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unsigned int wop2 = (unsigned int)op2;
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float tmp = (*(float *)&wop1 / *(float *)&wop2);
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result = (uword64)*(unsigned int *)&tmp;
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sim_fpu wop1;
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sim_fpu wop2;
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sim_fpu ans;
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unsigned32 res;
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sim_fpu_32to (&wop1, op1);
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sim_fpu_32to (&wop2, op2);
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sim_fpu_div (&ans, &wop1, &wop2);
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sim_fpu_to32 (&res, &ans);
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result = res;
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break;
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}
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break;
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case fmt_double:
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{
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double tmp = (*(double *)&op1 / *(double *)&op2);
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result = *(uword64 *)&tmp;
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sim_fpu wop1;
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sim_fpu wop2;
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sim_fpu ans;
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unsigned64 res;
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sim_fpu_64to (&wop1, op1);
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sim_fpu_64to (&wop2, op2);
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sim_fpu_div (&ans, &wop1, &wop2);
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sim_fpu_to64 (&res, &ans);
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result = res;
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break;
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}
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break;
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default:
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fprintf (stderr, "Bad switch\n");
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abort ();
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@ -2536,17 +2620,26 @@ Recip(op,fmt)
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switch (fmt) {
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case fmt_single:
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{
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unsigned int wop = (unsigned int)op;
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float tmp = ((float)1.0 / *(float *)&wop);
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result = (uword64)*(unsigned int *)&tmp;
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sim_fpu wop;
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sim_fpu ans;
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unsigned32 res;
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sim_fpu_32to (&wop, op);
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sim_fpu_inv (&ans, &wop);
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sim_fpu_to32 (&res, &ans);
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result = res;
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break;
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}
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break;
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case fmt_double:
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{
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double tmp = ((double)1.0 / *(double *)&op);
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result = *(uword64 *)&tmp;
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sim_fpu wop;
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sim_fpu ans;
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unsigned64 res;
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sim_fpu_64to (&wop, op);
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sim_fpu_inv (&ans, &wop);
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sim_fpu_to64 (&res, &ans);
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result = res;
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break;
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}
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break;
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default:
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fprintf (stderr, "Bad switch\n");
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abort ();
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@ -2577,27 +2670,26 @@ SquareRoot(op,fmt)
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switch (fmt) {
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case fmt_single:
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{
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unsigned int wop = (unsigned int)op;
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#ifdef HAVE_SQRT
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float tmp = ((float)sqrt((double)*(float *)&wop));
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result = (uword64)*(unsigned int *)&tmp;
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#else
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/* TODO: Provide square-root */
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result = (uword64)0;
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#endif
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sim_fpu wop;
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sim_fpu ans;
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unsigned32 res;
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sim_fpu_32to (&wop, op);
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sim_fpu_sqrt (&ans, &wop);
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sim_fpu_to32 (&res, &ans);
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result = res;
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break;
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}
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break;
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case fmt_double:
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{
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#ifdef HAVE_SQRT
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double tmp = (sqrt(*(double *)&op));
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result = *(uword64 *)&tmp;
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#else
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/* TODO: Provide square-root */
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result = (uword64)0;
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#endif
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sim_fpu wop;
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sim_fpu ans;
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unsigned64 res;
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sim_fpu_64to (&wop, op);
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sim_fpu_sqrt (&ans, &wop);
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sim_fpu_to64 (&res, &ans);
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result = res;
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break;
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}
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break;
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default:
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fprintf (stderr, "Bad switch\n");
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abort ();
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@ -2619,205 +2711,104 @@ convert(sd,cia,rm,op,from,to)
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FP_formats from;
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FP_formats to;
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{
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uword64 result = 0;
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sim_fpu wop;
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sim_fpu_round round;
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unsigned32 result32;
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unsigned64 result64;
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#ifdef DEBUG
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printf("DBG: Convert: mode %s : op 0x%s : from %s : to %s : (PC = 0x%s)\n",RMMODE(rm),pr_addr(op),DOFMT(from),DOFMT(to),pr_addr(IPC));
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#endif /* DEBUG */
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/* The value "op" is converted to the destination format, rounding
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using mode "rm". When the destination is a fixed-point format,
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then a source value of Infinity, NaN or one which would round to
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an integer outside the fixed point range then an IEEE Invalid
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switch (rm)
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{
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case FP_RM_NEAREST:
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/* Round result to nearest representable value. When two
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representable values are equally near, round to the value
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that has a least significant bit of zero (i.e. is even). */
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round = sim_fpu_round_near;
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break;
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case FP_RM_TOZERO:
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||||
/* Round result to the value closest to, and not greater in
|
||||
magnitude than, the result. */
|
||||
round = sim_fpu_round_zero;
|
||||
break;
|
||||
case FP_RM_TOPINF:
|
||||
/* Round result to the value closest to, and not less than,
|
||||
the result. */
|
||||
round = sim_fpu_round_up;
|
||||
break;
|
||||
|
||||
case FP_RM_TOMINF:
|
||||
/* Round result to the value closest to, and not greater than,
|
||||
the result. */
|
||||
round = sim_fpu_round_down;
|
||||
break;
|
||||
default:
|
||||
round = 0;
|
||||
fprintf (stderr, "Bad switch\n");
|
||||
abort ();
|
||||
}
|
||||
|
||||
/* Convert the input to sim_fpu internal format */
|
||||
switch (from)
|
||||
{
|
||||
case fmt_double:
|
||||
sim_fpu_64to (&wop, op);
|
||||
break;
|
||||
case fmt_single:
|
||||
sim_fpu_32to (&wop, op);
|
||||
break;
|
||||
case fmt_word:
|
||||
sim_fpu_i32to (&wop, op, round);
|
||||
break;
|
||||
case fmt_long:
|
||||
sim_fpu_i64to (&wop, op, round);
|
||||
break;
|
||||
default:
|
||||
fprintf (stderr, "Bad switch\n");
|
||||
abort ();
|
||||
}
|
||||
|
||||
/* Convert sim_fpu format into the output */
|
||||
/* The value WOP is converted to the destination format, rounding
|
||||
using mode RM. When the destination is a fixed-point format, then
|
||||
a source value of Infinity, NaN or one which would round to an
|
||||
integer outside the fixed point range then an IEEE Invalid
|
||||
Operation condition is raised. */
|
||||
switch (to) {
|
||||
case fmt_single:
|
||||
switch (to)
|
||||
{
|
||||
float tmp;
|
||||
switch (from) {
|
||||
case fmt_double:
|
||||
tmp = (float)(*(double *)&op);
|
||||
break;
|
||||
|
||||
case fmt_word:
|
||||
tmp = (float)((int)(op & 0xFFFFFFFF));
|
||||
break;
|
||||
|
||||
case fmt_long:
|
||||
tmp = (float)((word64)op);
|
||||
break;
|
||||
default:
|
||||
fprintf (stderr, "Bad switch\n");
|
||||
abort ();
|
||||
}
|
||||
|
||||
#if 0
|
||||
/* FIXME: This code is incorrect. The rounding mode does not
|
||||
round to integral values; it rounds to the nearest
|
||||
representable value in the format. */
|
||||
|
||||
switch (rm) {
|
||||
case FP_RM_NEAREST:
|
||||
/* Round result to nearest representable value. When two
|
||||
representable values are equally near, round to the value
|
||||
that has a least significant bit of zero (i.e. is even). */
|
||||
#ifdef HAVE_ANINT
|
||||
tmp = (float)anint((double)tmp);
|
||||
#else
|
||||
/* TODO: Provide round-to-nearest */
|
||||
#endif
|
||||
break;
|
||||
|
||||
case FP_RM_TOZERO:
|
||||
/* Round result to the value closest to, and not greater in
|
||||
magnitude than, the result. */
|
||||
#ifdef HAVE_AINT
|
||||
tmp = (float)aint((double)tmp);
|
||||
#else
|
||||
/* TODO: Provide round-to-zero */
|
||||
#endif
|
||||
break;
|
||||
|
||||
case FP_RM_TOPINF:
|
||||
/* Round result to the value closest to, and not less than,
|
||||
the result. */
|
||||
tmp = (float)ceil((double)tmp);
|
||||
break;
|
||||
|
||||
case FP_RM_TOMINF:
|
||||
/* Round result to the value closest to, and not greater than,
|
||||
the result. */
|
||||
tmp = (float)floor((double)tmp);
|
||||
break;
|
||||
}
|
||||
#endif /* 0 */
|
||||
|
||||
result = (uword64)*(unsigned int *)&tmp;
|
||||
case fmt_single:
|
||||
sim_fpu_round_32 (&wop, round, 0);
|
||||
sim_fpu_to32 (&result32, &wop);
|
||||
result64 = result32;
|
||||
break;
|
||||
case fmt_double:
|
||||
sim_fpu_round_64 (&wop, round, 0);
|
||||
sim_fpu_to64 (&result64, &wop);
|
||||
break;
|
||||
case fmt_word:
|
||||
sim_fpu_to32i (&result32, &wop, round);
|
||||
result64 = result32;
|
||||
break;
|
||||
case fmt_long:
|
||||
sim_fpu_to64i (&result64, &wop, round);
|
||||
break;
|
||||
default:
|
||||
result64 = 0;
|
||||
fprintf (stderr, "Bad switch\n");
|
||||
abort ();
|
||||
}
|
||||
break;
|
||||
|
||||
case fmt_double:
|
||||
{
|
||||
double tmp;
|
||||
word64 xxx;
|
||||
|
||||
switch (from) {
|
||||
case fmt_single:
|
||||
{
|
||||
unsigned int wop = (unsigned int)op;
|
||||
tmp = (double)(*(float *)&wop);
|
||||
}
|
||||
break;
|
||||
|
||||
case fmt_word:
|
||||
xxx = SIGNEXTEND((op & 0xFFFFFFFF),32);
|
||||
tmp = (double)xxx;
|
||||
break;
|
||||
|
||||
case fmt_long:
|
||||
tmp = (double)((word64)op);
|
||||
break;
|
||||
|
||||
default:
|
||||
fprintf (stderr, "Bad switch\n");
|
||||
abort ();
|
||||
}
|
||||
|
||||
#if 0
|
||||
/* FIXME: This code is incorrect. The rounding mode does not
|
||||
round to integral values; it rounds to the nearest
|
||||
representable value in the format. */
|
||||
|
||||
switch (rm) {
|
||||
case FP_RM_NEAREST:
|
||||
#ifdef HAVE_ANINT
|
||||
tmp = anint(*(double *)&tmp);
|
||||
#else
|
||||
/* TODO: Provide round-to-nearest */
|
||||
#endif
|
||||
break;
|
||||
|
||||
case FP_RM_TOZERO:
|
||||
#ifdef HAVE_AINT
|
||||
tmp = aint(*(double *)&tmp);
|
||||
#else
|
||||
/* TODO: Provide round-to-zero */
|
||||
#endif
|
||||
break;
|
||||
|
||||
case FP_RM_TOPINF:
|
||||
tmp = ceil(*(double *)&tmp);
|
||||
break;
|
||||
|
||||
case FP_RM_TOMINF:
|
||||
tmp = floor(*(double *)&tmp);
|
||||
break;
|
||||
}
|
||||
#endif /* 0 */
|
||||
|
||||
result = *(uword64 *)&tmp;
|
||||
}
|
||||
break;
|
||||
|
||||
case fmt_word:
|
||||
case fmt_long:
|
||||
if (Infinity(op,from) || NaN(op,from) || (1 == 0/*TODO: check range */)) {
|
||||
printf("DBG: TODO: update FCSR\n");
|
||||
SignalExceptionFPE ();
|
||||
} else {
|
||||
if (to == fmt_word) {
|
||||
int tmp = 0;
|
||||
switch (from) {
|
||||
case fmt_single:
|
||||
{
|
||||
unsigned int wop = (unsigned int)op;
|
||||
tmp = (int)*((float *)&wop);
|
||||
}
|
||||
break;
|
||||
case fmt_double:
|
||||
tmp = (int)*((double *)&op);
|
||||
|
||||
#ifdef DEBUG
|
||||
printf("DBG: from double %.30f (0x%s) to word: 0x%08X\n",*((double *)&op),pr_addr(op),tmp);
|
||||
#endif /* DEBUG */
|
||||
break;
|
||||
default:
|
||||
fprintf (stderr, "Bad switch\n");
|
||||
abort ();
|
||||
}
|
||||
result = (uword64)tmp;
|
||||
} else { /* fmt_long */
|
||||
word64 tmp = 0;
|
||||
switch (from) {
|
||||
case fmt_single:
|
||||
{
|
||||
unsigned int wop = (unsigned int)op;
|
||||
tmp = (word64)*((float *)&wop);
|
||||
}
|
||||
break;
|
||||
case fmt_double:
|
||||
tmp = (word64)*((double *)&op);
|
||||
break;
|
||||
default:
|
||||
fprintf (stderr, "Bad switch\n");
|
||||
abort ();
|
||||
}
|
||||
result = (uword64)tmp;
|
||||
}
|
||||
}
|
||||
break;
|
||||
default:
|
||||
fprintf (stderr, "Bad switch\n");
|
||||
abort ();
|
||||
}
|
||||
|
||||
#ifdef DEBUG
|
||||
printf("DBG: Convert: returning 0x%s (to format = %s)\n",pr_addr(result),DOFMT(to));
|
||||
printf("DBG: Convert: returning 0x%s (to format = %s)\n",pr_addr(result64),DOFMT(to));
|
||||
#endif /* DEBUG */
|
||||
|
||||
return(result);
|
||||
return(result64);
|
||||
}
|
||||
#endif /* HASFPU */
|
||||
|
||||
|
||||
/*-- co-processor support routines ------------------------------------------*/
|
||||
|
||||
static int UNUSED
|
||||
|
|
@ -3272,7 +3263,7 @@ sim_engine_run (sd, next_cpu_nr, siggnal)
|
|||
#if (WITH_TARGET_WORD_BITSIZE != GPRLEN)
|
||||
#error "Mismatch between configure WITH_TARGET_WORD_BITSIZE and gencode GPRLEN"
|
||||
#endif
|
||||
#if (WITH_FLOATING_POINT == HARD_FLOATING_POINT != defined (HASFPU))
|
||||
#if ((WITH_FLOATING_POINT == HARD_FLOATING_POINT) != defined (HASFPU))
|
||||
#error "Mismatch between configure WITH_FLOATING_POINT and gencode HASFPU"
|
||||
#endif
|
||||
|
||||
|
|
|
|||
Loading…
Reference in a new issue