* mips.igen: Tag vr5000 instructions.
(ANDI): Was missing mipsIV model, fix assembler syntax. (do_c_cond_fmt): New function. (C.cond.fmt): Handle mips I-III which do not support CC field separatly. (bc1): Handle mips IV which do not have a delaed FCC separatly. (SDR): Mask paddr when BigEndianMem, not the converse as specified in IV3.2 spec. (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle vr5000 which saves LO in a GPR separatly. * configure.in (enable-sim-igen): For vr5000, select vr5000 specific instructions. * configure: Re-generate.
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@ -1,3 +1,34 @@
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Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* mips.igen: Tag vr5000 instructions.
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(ANDI): Was missing mipsIV model, fix assembler syntax.
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(do_c_cond_fmt): New function.
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(C.cond.fmt): Handle mips I-III which do not support CC field
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separatly.
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(bc1): Handle mips IV which do not have a delaed FCC separatly.
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(SDR): Mask paddr when BigEndianMem, not the converse as specified
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in IV3.2 spec.
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(DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
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vr5000 which saves LO in a GPR separatly.
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* configure.in (enable-sim-igen): For vr5000, select vr5000
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specific instructions.
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* configure: Re-generate.
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Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* Makefile.in (SIM_OBJS): Add sim-fpu module.
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* interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
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fmt_uninterpreted_64 bit cases to switch. Convert to
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fmt_formatted,
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* sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
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* mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
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as specified in IV3.2 spec.
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(MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
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Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* mips.igen: Delay slot branches add OFFSET to NIA not CIA.
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@ -121,8 +121,12 @@ case "${target}" in
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mips64vr54*-*-*) sim_default_gen=IGEN
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sim_use_gen=IGEN
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sim_igen_machine="vr5400"
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#sim_igen_machine="vr5000,vr5400 -G gen-muli-sim"
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;;
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# end-sanitize-vr5400
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mips64vr5*-*-*) sim_default_gen=IGEN
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sim_igen_machine="vr5000"
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;;
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mips16*-*-*) sim_default_gen=M16
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;;
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mips32*-*-*) sim_default_gen=IGEN
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