a new address, so as not to reuse a previous, non-related reloc.
* gas/arm/arm-it-auto.d, gas/arm/bl-local-v4t.d,
gas/arm/blx-local.d, gas/arm/thumb-w-good.d: Update expected
results.
gas/
* config/tc-i386.c (cpu_arch): Change amdfam15 to bdver1.
(i386_align_code): Rename PROCESSOR_AMDFAM15 to PROCESSOR_BDVER1.
* config/tc-i386.h (processor_type): Same.
* doc/c-i386.texi: Change amdfam15 to bdver1.
opcodes/
* i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
to CPU_BDVER1_FLAGS
* i386-init.h: Regenerated.
testsuite/
* gas/i386/i386.exp: Rename amdfam15 test cases to bdver1.
* gas/i386/x86-64-nops-1-amdfam15.d: Renamed test case to
gas/i386/x86-64-nops-1-bdver1.d.
* gas/i386/nops-1-amdfam15.d: Renamed test case to
gas/i386/nops-1-bdver1.d.
* gas/arm/dis-data.d: Update test name. Do not expect
.word output.
* gas/arm/dis-data2.d, gas/arm/dis-data2.s,
gas/arm/dis-data3.d, gas/arm/dis-data3.s: New tests.
opcodes/
* opcodes/arm-dis.c (struct arm_private_data): New.
(print_insn_coprocessor, print_insn_arm): Update to use struct
arm_private_data.
(is_mapping_symbol, get_map_sym_type): New functions.
(get_sym_code_type): Check the symbol's section. Do not check
mapping symbols.
(print_insn): Default to disassembling ARM mode code. Check
for mapping symbols separately from other symbols. Use
struct arm_private_data.
* objdump.c (only): Replace with linked list.
(only_size, only_used): Replace with only_list.
(process_section_p): Set seen field on matches sections.
(add_only): New function.
(free_only_list): New function.
(disassemble_section): Check only_list.
(main): Use add_only and free_only_list.
* gas/pe/aligncomm-c.d: Dump all sections.
* ld-sh/refdbg-0-dso.d: Dump all sections.
* NEWS: Mention new feature.
* config/obj-coff.c (obj_coff_section): Accept digits and use
to override default section alignment power if specified.
* doc/as.texinfo (.section directive): Update documentation.
gas/testsuite/ChangeLog:
* gas/pe/section-align-1.s: New test source file.
* gas/pe/section-align-1.d: Likewise control script.
* gas/pe/section-align-2.s: Likewise ...
* gas/pe/section-align-2.d: ... and likewise.
* gas/pe/pe.exp: Invoke new testcases.
* coff-rs6000.c (xcoff_howto_table): Change size to 0 and bitsize to 1.
(_bfd_xcoff_reloc_type_lookup): Handle BFD_RELOC_NONE.
* coff64-rs6000.c (xcoff64_howto_table): Change size to 0 and
bitsize to 1.
(xcoff64_reloc_type_lookup): Handle BFD_RELOC_NONE.
gas/
* write.h (fix_at_start): Declare.
* write.c (fix_new_internal): Add at_beginning parameter.
Use it instead of REVERSE_SORT_RELOCS. Fix the handling of
seg_fix_tailP for the at_beginning/REVERSE_SORT_RELOCS case.
(fix_new, fix_new_exp): Update accordingly.
(fix_at_start): New function.
* config/tc-ppc.c (md_pseudo_table): Add .ref to the OBJ_XCOFF section.
(ppc_ref): New function, for OBJ_XCOFF.
(md_apply_fix): Handle BFD_RELOC_NONE for OBJ_XCOFF.
* config/te-i386aix.h (REVERSE_SORT_RELOCS): Remove #undef.
gas/testsuite/
* gas/ppc/xcoff-ref-1.s, gas/ppc/xcoff-ref-1.l: New test.
* gas/ppc/aix.exp: Run it.
ld/testsuite/
* ld-powerpc/aix-ref-1-32.od, ld-powerpc/aix-ref-1-64.od,
ld-powerpc/aix-ref-1.s: New tests.
* ld-powerpc/aix52.exp: Run them.
gas/
* config/tc-i386.c (md_assemble): Before accessing the IMM field
check that it's not an XOP insn.
gas/testsuite/
* gas/i386/x86-64-xop.d: Add missing patterns.
* gas/i386/x86-64-xop.s: Same.
* gas/i386/xop.d: Same.
* gas/i386/xop.s: Same.
opcodes/
* i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
* i386-tbl.h: Regenerated.
warning message if a new section is created without setting any
attributes for it.
(md_pseudo_table): Intercept section creation pseudos.
(md_pcrel_from): Replace abort with an error message.
* config/obj-elf.c (obj_elf_section_name): Export this function.
* config/obj-elf.h (obj_elf_section_name): Prototype.
* gas/elf/section0.d: Skip this test for the h8300.
* gas/elf/section1.d: Likewise.
* gas/elf/section6.d: Likewise.
* gas/elf/elf.exp: Skip section2 and section5 tests when the
target is the h8300.
* ld-scrips/sort.exp: Skip these tests when the target is the
h8300.
gas/
* config/tc-arm.c (do_neon_logic): Accept imm value
in the third operand too.
(operand_parse_code): OP_RNDQ_IMVNb renamed to
OP_RNDQ_Ibig.
(parse_operands): OP_NILO case removed, applied renaming.
(insns): Neon shape changed for some logic instructions.
gas/testsuite/
* gas/arm/neon-logic.d: New test case.
* gas/arm/neon-logic.s: New file.
gas/
* config/tc-arm.c (do_neon_ldx_stx): Added
validation for vector load/store insns.
gas/testsuite/
* gas/arm/neon-addressing-bad.d: New test case.
* gas/arm/neon-addressing-bad.s: New file.
* gas/arm/neon-addressing-bad.l: New file.
2009-12-21 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
Richard Earnshaw <richard.earnshaw@arm.com>
* config/tc-arm.c (encode_thumb2_b_bl_offset): New. Refactored
from md_apply_fix.
(md_apply_fix): Fixup range checks for Thumb2 version
of unconditional calls. Call encode_thumb2_b_bl_offset for
unconditional branches / function calls.
* config/tc-mips.c (s_mips_ent): Also set BSF_FUNCTION for
".aent".
gas/testsuite/
* gas/mips/aent.d: New test.
* gas/mips/aent.s: Source for the new test.
* gas/mips/mips.exp: Run it.
* config/tc-arm.c (do_ldstv4): Do not allow r15 as the destination
register.
(do_mrs): Likewise.
(do_mul): Likewise.
* arm-dis.c: Add support for %<>ru and %<>rU formats to enforce
unique register numbers. Extend support for %<>R format to
thumb32 and coprocessor instructions.
* gas/arm/unpredictable.s: Add more unpredictable instructions.
* gas/arm/unpredictable.d: Add expected disassemblies.
* arm-dis.c (arm_opcodes): Specify %R in cases where using r15
results in unpredictable behaviour.
(print_insn_arm): Handle %R.
* gas/arm/unpredictable.s: New test case - checks the disassembly
of instructions with unpredictable behaviour.
* gas/arm/unpredictable.d: New file - expected disassembly.
gas/testsuite/
* gas/i386/fma4.d: Add test cases.
* gas/i386/fma4.s: Add test cases.
* gas/i386/x86-64-fma4.d: Add test cases.
* gas/i386/x86-64-fma4.s: Add test cases.
opcodes/
* i386-dis.c (get_vex_imm8): Extend logic to apply in all
cases, to avoid fetching ahead for the immediate bytes when
OP_E_memory has already been called. Fix indentation.
* config/tc-i386.c (arch_entry): Add len and skip.
(cpu_arch): Use STRING_COMMA_LEN.
(MESSAGE_TEMPLATE): New.
(show_arch): Likewise.
(md_show_usage): Use show_arch.
Sebastian Pop <sebastian.pop@amd.com>
gas/testsuite/
* gas/i386/x86-64-fma4.d: Add new patterns.
* gas/i386/x86-64-fma4.s: Same.
* gas/i386/x86-64-xop.d: Adjusted.
opcodes/
* i386-dis.c (get_vex_imm8): Increase bytes_before_imm when
decoding the second source operand from the immediate byte.
(OP_EX_VexW): Pass an extra integer to identify the second
and third source arguments.
* gas/arm/arch4t-eabi.d: Restore previous expected dissambly of
instructions using Immediate Offset addressing with an offset of
zero.
* gas/arm/arch4t.d: Likewise.
* gas/arm/arm7t.d: Likewise.
* gas/arm/xscale.d: Likewise.
* gas/arm/wince-inst.d: Remove 'p' suffix from cmp, cmn, teq and
tst instructions.
PR binutils/10924
* arm-dis.c (print_insn_arm): Do not print an offset of zero when
decoding Immediaate Offset addressing.
PR binutils/10924
* gas/arm/arch4t-eabi.d: Update expected disassembly.
* gas/arm/arch4t.d: Likewise.
* gas/arm/archv6t2.d: Likewise.
* gas/arm/arm7t.d: Likewise.
* gas/arm/inst.d: Likewise.
* gas/arm/xscale.d: Likewise.
PR binutils/10924
* arm-dis.c (arm_opcodes): Add patterns to match undefined LDRB
instruction variants. Add pattern for MRS variant that was being
confused with CMP.
(arm_decode_shift): Place error message in a comment.
(print_insn_arm): Note that writing back to the PC is
unpredictable.
Only print 'p' variants of cmp/cmn/teq/tst instructions if
decoding for pre-V6 architectures.
* opcodes/i386-dis.c (reg_table): Add XOP_8F_TABLE (XOP_09) to
reg_table[REG_8F][1]: for XOP instructions, ModRM.reg first points to
B.mm in the RXB.mmmmm byte, and so when B is set, we still should use
the xop_table.
(get_valid_dis386): Removed unused condition (from cut/n/paste) for
XOP instructions.
* gas/testsuite/gas/i386/x86-64-lwp.s: Updated to also contain
patterns with r[8-15] registers.
* gas/testsuite/gas/i386/x86-64-lwp.d: Same.
2009-10-29 Sebastian Pop <sebastian.pop@amd.com>
* config/tc-i386.c (build_modrm_byte): Do not swap REG and
NDS operands for FMA4.
gas/testsuite/
2009-10-29 Sebastian Pop <sebastian.pop@amd.com>
* gas/i386/fma4.d: Updated patterns.
* gas/i386/x86-64-fma4.d: Same.
opcodes/
2009-10-29 Sebastian Pop <sebastian.pop@amd.com>
* i386-dis.c (OP_VEX_FMA): Removed.
(VexFMA): Removed.
(Vex128FMA): Removed.
(prefix_table): First source operand of FMA4 insns is decoded
with Vex not with VexFMA.
(OP_EX_VexW): Second source operand is decoded with get_vex_imm8
when vex.w is set. Third source operand is decoded with
get_vex_imm8 when vex.w is cleared.
(OP_VEX_FMA): Removed.
* config/tc-mep.c (md_pseudo_table): Remove dwarf2 pseudo
as they are already defined in obj-elf.c
* config/tc-m32c.c (md_pseudo_table): Ditto.
* config/tc-spu.c (md_pseudo_table): Ditto.
* config/tc-avr.c (md_pseudo_table): Ditto.
* expr.c (resolve_expression): Only add "left" value to O_symbol
expression when the symbol is undefined and different from the
original symbol. Simplify negative logic.
* gas/i386/intelpic.d: Correct.
'defl' in cases where the space between the keyword and the
expression has been scrubbed away.
Do not check whether a symbol is redefined with 'equ' here;
the function equals takes an argument indicating whether
redefinitions are allowed.
Only call LISTING_NEWLINE if needed, and then after the call to
bump_line_counters.
match the order elsewhere. Add -mfix-vr4120/-mno-fix-vr4120 and
-mfix-vr4130/-mno-fix-vr4130.
* doc/c-mips.texi (MIPS Opts): Correct -no-mfix-vr4120 to
-mno-fix-vr4120 and -no-mfix-vr4130 to -mno-fix-vr4130.
gas/
* macro.c: Delete unnecessary function declarations.
(buffer_and_nest): Support multiple labels per line for
LABELS_WITHOUT_COLONS targets if the labels do have colons.
(free_macro): Move so that we don't need forward declaration.
* read.c (read_a_source_file): Take a copy of macro expansion line
before we trim labels.
* listing.c (listing_newline): Adjust stdin line save for
input_line_pointer still at start of line.
gas/testsuite/
* gas/macros/dot.s: Don't start macro invocations is first column.
* gas/macros/dot.l: Update.
* gas/macros/macros.exp: Run dot test on more targets.
2009-10-07 Vincent Riviere <vincent.riviere@freesbee.fr>
PR gas/3041
* config/tc-m68k.c (tc_gen_reloc): Fix addend for relocations
located in data section an referencing a weak symbol.
gas/testsuite:
2009-10-07 Vincent Riviere <vincent.riviere@freesbee.fr>
PR gas/3041
* gas/m68k/all.exp: Added "p3041data".
* gas/m68k/p3041.d, gas/m68k/p3041.s: Added tests of weak references
from text section to all possible sections.
* gas/m68k/p3041data.d, gas/m68k/p3041data.s: New test. Check weak
references from data section.
* config/tc-ia64.c (parse_operand): Use expression rather than
expression_and_evalute.
(parse_operand_and_eval): New function. Replace all uses of
parse_operand outside of parse_operands with this function.
(parse_operans_maybe_eval): New function. Replace uses of
parse_operand in parse_operands, except for the dummy, with
this function.
* gas/mips/eret-2.d: Likewise.
* gas/mips/eret-3.d: Likewise.
* gas/mips/eret-1.s: Reformat for readability. Add a label
at the beginning.
* gas/mips/eret-2.s: Add a label at the beginning.
2009-09-14 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10637
* config/tc-i386-intel.c (intel_state): Add has_offset.
(i386_intel_simplify): Set intel_state.has_offset to 1 for
O_offset.
(i386_intel_operand): Turn on intel_state.is_mem if
intel_state.has_offset is 0 and the last char is ']'.
gas/testsuite/
2009-09-14 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10637
* gas/i386/disp.s: Add tests for Intel syntax.
* gas/i386/x86-64-disp.s: Likewise.
* gas/i386/disp.d: Updated.
* gas/i386/intelok.d: Likewise.
* gas/i386/x86-64-disp.d: Likewise.
* gas/i386/disp-intel.d: New.
* gas/i386/x86-64-disp-intel.d: Likewise.
* gas/i386/i386.exp: Run disp-intel and x86-64-disp-intel.
2009-09-14 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10636
* config/tc-i386.c (optimize_disp): Set disp32 for 64bit only
if there is an ADDR_PREFIX.
(i386_finalize_displacement): Repor error if signed 32bit
displacement is out of range.
gas/testsuite/
2009-09-14 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10636
* gas/i386/disp.d: New.
* gas/i386/disp.s: Likewise.
* gas/i386/x86-64-disp.d: Likewise.
* gas/i386/x86-64-disp.s: Likewise.
* gas/i386/i386.exp: Run disp and x86-64-disp.
* gas/i386/x86-64-addr32.s: Add high 32bit displacement tests.
* gas/i386/x86-64-addr32.d: Updated.
* gas/i386/x86-64-addr32-intel.d: Likewise.
* gas/i386/x86-64-inval.l: Likewise.
* gas/i386/x86-64-prescott.d: Likewise.
* gas/i386/x86-64-inval.s: Add invalid displacement tests.
* gas/i386/x86-64-prescott.s: Replace 0x90909090 displacement
with 0x909090.
* config/tc-mips.c (MIPS_JALR_HINT_P): Take an expr argument.
Require the target to be a bare symbol on targets with
in-place addends.
(macro_build_jalr): Update accordingly.
(mips_fix_adjustable): Don't reduce R_MIPS_JALRs on targets
with in-place addends.
gas/testsuite/
* gas/mips/jalr2.s, gas/mips/jalr2.d: New test.
* gas/mips/jal-svr4pic.d: Don't expect R_MIPS_JALRs to be reduced.
* gas/mips/jal-xgot.d: Likewise.
* gas/mips/mips-abi32-pic2.d: Likewise.
* gas/mips/mips.exp: Run it.
* config/tc-mmix.c (md_assemble) <case mmix_operands_xyz_opt>:
Allow register operands for SWYM as for TRIP and TRAP. Correct
operand handling and error checking. Never emit
BFD_RELOC_MMIX_REG_OR_BYTE for operands to these insns.
* config/tc-d10v.c: Include dwarf2dbg.h.
(write_long, write_1_short, write_2_short): Call dwarf2_emit_insn.
(d10v_frob_label): New function.
* config/tc-d10v.h (d10v_frob_label): Declare.
(tc_frob_label): Define as d10v_frob_label.
gas/testsuite/
* gas/lns/lns-common-1.s: Use two nops between each .loc.
* gas/lns/lns.exp: Don't exclude d10v.
* config/obj-coff.c (weak_uniquify): Use an_external_name when TE_PE.
* symbols.c (an_external_name): Define when TE_PE.
(S_SET_EXTERNAL): Assign an_external_name when TE_PE.
* tc.h (an_external_name): Declare when TE_PE.
2009-09-07 Tristan Gingold <gingold@adacore.com>
* bfd.m4 (BFD_HAVE_TIME_TYPE_MEMBER,
BFD_HAVE_SYS_STAT_TYPE_MEMBER): Moved to gas/acinclude.m4
* configure.in: Move tests for tm_gmtoff, st_mtim.tv_sec and
st_mtim.tv_nsec to gas/configure.in
(bfd_elf64_ia64_vms_vec): Remove vmsutil.lo
* configure: Regenerate.
* config.in: Regenerate.
* vmsutil.c: Moved to gas/config/te-vms.c
* vmsutil.h: Removed.
* Makefile.am (BFD32_BACKENDS_CFILES): Remove vmsutil.c
(BFD32_BACKENDS): Remove vmsutil.lo
* Makefile.in: Regenerate.
gas/:
2009-09-07 Tristan Gingold <gingold@adacore.com>
* Makefile.am (TARG_ENV_CFILES): New variable. Set to te-vms.c
(POTFILES): Add $(TARG_ENV_CFILES) in definition.
(EXTRA_as_new_SOURCES): Ditto.
* Makefile: Regenerate.
* acinclude.m4 (BFD_HAVE_TIME_TYPE_MEMBER,
BFD_HAVE_SYS_STAT_TYPE_MEMBER): New macro created from bfd/bfd.m4.
* configure.in: Add Tests for tm_gmtoff, st_mtim.tv_sec and
st_mtim.tv_nsec (from bfd/configure.in). Check for time.h and
sys/stat.h headers.
Add te-vms.o in extra_objects if te_file is vms.
* configure: Regenerate.
* config.in: Regenerate.
* config/te-vms.c: New file, from bfd/vmsutil.c
(vms_dwarf2_file_time_name, vms_dwarf2_file_size_name)
(vms_dwarf2_file_name): New functions.
(vms_file_stats_name): Make it static, add a dirname parameter to
locally create the full pathname.
* config/te-vms.h: Add a copyright header.
Declare the above functions.
(DWARF2_FILE_TIME_NAME, DWARF2_FILE_SIZE_NAME, DWARF2_FILE_NAME): Use
the above functions in the definition.
* makefile.vms (OBJS): Add te-vms.obj.
(te-vms.obj): Create a specific target.
* configure.com: Create targ-env.h using a per target value.
Compile te-vms.c for ia64.
* doc/as.texinfo: Document that Blackfin GAS does not
accept SYMBOL = VALUE.
ld/testsuite/
* ld-elf/sec64k.exp: Use ".set" instead of "=" for bfin-*-*.
(record_thumb_to_arm_glue, bfd_arm_process_before_allocation):
Change member name class to symbol_class.
* bfd/coff-i960.c (coff_i960_relocate_section) Rename variable
class to class_val. Change member name class to symbol_class.
* bfd/coff-rs6000.c (_bfd_xcoff_swap_aux_in)
(_bfd_xcoff_swap_aux_out): Rename arguments class to in_class.
* bfd/coff-stgo32.c (adjust_aux_in_post)
(adjust_aux_out_pre, adjust_aux_out_post): Rename arguments class
to in_class.
* bfd/coff64-rs6000.c (_bfd_xcoff64_swap_aux_in)
(_bfd_xcoff64_swap_aux_out): Rename arguments class to in_class.
* bfd/coffcode.h (coff_pointerize_aux_hook): Rename variable class
to n_sclass.
* bfd/coffgen.c (coff_write_symbol, coff_pointerize_aux): Rename
variables named class to n_sclass. (coff_write_symbols): Rename
variable class to sym_class. (bfd_coff_set_symbol_class): Rename
argument class to symbol_class.
* bfd/cofflink.c (_bfd_coff_link_hash_newfunc)
(coff_link_add_symbols, _bfd_coff_link_input_bfd)
(_bfd_coff_write_global_sym, _bfd_coff_generic_relocate_section):
Update code to use renamed members.
* bfd/coffswap.h (coff_swap_aux_in, coff_swap_aux_out): Rename
argument class to in_class.
* bfd/libcoff-in.h (struct coff_link_hash_entry, struct
coff_debug_merge_type) Renamed members class to symbol_class and
type_class.
* bfd/libcoff.h Regenerated.
* bfd/peXXigen.c: (_bfd_XXi_swap_aux_in, _bfd_XXi_swap_aux_out):
Rename argument class to in_class.
* bfd/pef.c (bfd_pef_parse_imported_symbol): Update code to use
renamed members.
* bfd/pef.h (struct bfd_pef_imported_symbol): Changed name of
member class to symbol_class.
* binutils/ieee.c (ieee_read_cxx_misc, ieee_read_cxx_class)
(ieee_read_reference): Rename variables named class to cxxclass.
* gas/config/tc-arc.c (struct syntax_classes): Rename member class
to s_class. (arc_extinst): Rename variable class to
s_class. Update code to use renamed members.
* gas/config/tc-mips.c (insn_uses_reg): Rename argument class to
regclass.
* gas/config/tc-ppc.c (ppc_csect, ppc_change_csect, ppc_function)
(ppc_tc, ppc_is_toc_sym, ppc_symbol_new_hook, ppc_frob_label)
(ppc_fix_adjustable, md_apply_fix): Update code to use renamed
members.
* gas/config/tc-ppc.h (struct ppc_tc_sy): Change name of member
from class to symbol_class. (OBJ_COPY_SYMBOL_ATTRIBUTES): Update
code to use renamed members.
* gas/config/tc-score.c (s3_adjust_paritybit): Rename argument
class to i_class.
* gas/config/tc-score7.c (s7_adjust_paritybit): Rename argument
class to i_class.
* gprof/corefile.c (core_create_function_syms): Rename variable
class to cxxclass.
* include/coff/ti.h (GET_LNSZ_SIZE, PUT_LNSZ_SIZE): Updated name
of class variable to in_class to match changes in function that
use this macro.
* include/opcode/ia64.h (struct ia64_operand): Renamed member
class to op_class
* ld/emultempl/elf32.em (gld${EMULATION_NAME}_load_symbols)
(gld${EMULATION_NAME}_try_needed): Rename variable class to
link_class
* opcodes/ia64-dis.c (print_insn_ia64): Update code to use renamed
member.
* opcodes/m88k-dis.c (m88kdis): Rename variable class to in_class.
* opcodes/tic80-opc.c (tic80_symbol_to_value)
(tic80_value_to_symbol): Rename argument class to symbol_class.
* config/bfin-parse.y (asm_1): Implement HLT instruction.
Fix comments for DBGA, DBGAH and DBGAL.
* config/tc-bfin.c (bfin_gen_pseudodbg_assert): Change according
to the new encoding of DBGA, DBGAH, and DBGAL.
include/
* opcode/bfin.h (PseudoDbg_Assert): Add bits_grp and mask_grp.
(PseudoDbg_Assert_grp_bits, PseudoDbg_Assert_grp_mask): Define.
(PseudoDbg_Assert_dbgop_bits, PseudoDbg_Assert_dbgop_mask,
PseudoDbg_Assert_dontcare_bits, PseudoDbg_Assert_dontcare_mask):
Adjust accordingly.
(init_PseudoDbg_Assert): Add PseudoDbg_Assert_grp_bits and
PseudoDbg_Assert_grp_mask.
opcodes/
* bfin-dis.c (decode_pseudodbg_assert_0): Change according
to the new encoding of DBGA, DBGAH, and DBGAL.
(_print_insn_bfin): Likewise.
the prerequisite. Add $(srcdir)/config/bfin-aux.h to the
prerequisite.
(bfin-defs.h, $(srcdir)/config/bfin-defs.h): Rename to ...
(bfin-parse.h, $(srcdir)/config/bfin-parse.h): ... these.
(bfin-lex.o): Add bfin-parse.h and $(srcdir)/config/bfin-defs.h
to the prerequisite.
* Makefile.in: Regenerate.
(F_REG_HIGH): Redefine.
(F_REG_NONE): New macro.
(F_REG_LOW): New macro.
(REG_CLASS): Enclose macro argument in parentheses when used.
(REG_EVEN): Likewise.
(IS_H): Use flags.
(IS_HCOMPL): Use flags.
* config/bfin-lex.l (SP.L, SP.H, FP.L, FP.H): Set flags.
(parse_reg): Set flags.
(parse_halfreg): Set flags.
* config/gas/bfin-parse.y (asm_1): Clean up and unify error handling
for load and store insns.
(neg_value): Delete function.
testsuite/
From Bernd Schmidt <bernd.schmidt@analog.com>
* gas/bfin/expected_errors.l, gas/bfin/expected_errors.s:
Check error messages for invalid load/store insns.
binutils/:
* Makefile.am (arparse.o, arlex.o, sysroff.o, defparse.o)
(deflex.o, nlmheaders.o, rcparse.o, mcparse.o): Supply correct
source file name for generated files which may be in $(srcdir).
* Makefile.in: Regenerate.
gas/:
* Makefile.am (m68k-parse.o, bfin-lex.o, itbl-lex.o, itbl-parse.o):
Supply correct source file name for generated files which may be
in $(srcdir).
* Makefile.in: Regenerate.
ld/:
* Makefile.am (ldgram.o, ldlex.o, deffilep.o): Supply correct
source file name for generated files which may be in $(srcdir).
* Makefile.in: Regenerate.
* config/tc-bfin.c (bfin_fix_adjustable): Partially revert the
2007-08-23 change; BFD_RELOC_BFIN_GOT is not adjustable.
2007-08-23 Jie Zhang <jie.zhang@analog.com>
* config/tc-bfin.c (bfin_fix_adjustable): Adjust
BFD_RELOC_BFIN_GOT, BFD_RELOC_BFIN_GOT17M4 and
BFD_RELOC_BFIN_FUNCDESC_GOT17M4.
(read_a_source_file): Pass the beginning of the symbol through
the new argument of TC_START_LABEL.
* config/tc-arm.h (TC_START_LABEL): Add a new argument.
* config/tc-bfin.c (bfin_start_label): Only search '(' and '['
from the beginning of the symbol.
* config/tc-bfin.h (TC_START_LABEL): Add the new argument.
* config/tc-d30v.h (TC_START_LABEL): Likewise.
* config/tc-fr30.h (TC_START_LABEL): Likewise.
* config/tc-m32c.h (TC_START_LABEL): Likewise.
* config/tc-m32r.h (TC_START_LABEL): Likewise.
* config/tc-mep.h (TC_START_LABEL): Likewise.
testsuite/
* gas/bfin/stack2.s: Add pop multiple instruction with a label
on the same line.
* gas/bfin/stack2.d: Adjust accordingly.
keyword in c++.
* bfd/aoutx.h (NAME (aout, make_empty_symbol)): Rename variable
new to new_symbol.
* bfd/coffgen.c (coff_make_empty_symbol)
(coff_bfd_make_debug_symbol): Rename variable new to new_symbol.
* bfd/cpu-ia64-opc.c (ext_reg, ins_imms_scaled): Rename variable
new to new_insn.
* bfd/doc/chew.c (newentry, add_intrinsic): Rename variable new to
new_d.
* bfd/ecoff.c (_bfd_ecoff_make_empty_symbol): Rename variable new
to new_symbol.
* bfd/elf32-m68k.c (elf_m68k_get_got_entry_type): Rename argument
new to new_reloc.
* bfd/hash.c (bfd_hash_lookup): Rename variable new to new_string.
* bfd/ieee.c (ieee_make_empty_symbol): Rename variable new to
new_symbol.
* bfd/linker.c (bfd_new_link_order): Rename variable new to
new_lo.
* bfd/mach-o.c (bfd_mach_o_sizeof_headers): Rename variable new to
symbol.
* bfd/oasys.c (oasys_make_empty_symbol): Rename variable new to
new_symbol_type.
* bfd/pdp11.c (NAME (aout, make_empty_symbol)): Rename variable
new to new_symbol_type.
* bfd/plugin.c (bfd_plugin_make_empty_symbol): Rename variable new
to new_symbol.
* bfd/rs6000-core.c (CoreHdr, VmInfo): Rename union member new to
new_dump.
(read_hdr, rs6000coff_core_p)
(rs6000coff_core_file_matches_executable_p)
(rs6000coff_core_file_failing_command)
(rs6000coff_core_file_failing_signal): Updated function to use new
union member name.
* bfd/som.c (som_make_empty_symbol): Rename variable new to
new_symbol_type.
* bfd/syms.c (_bfd_generic_make_empty_symbol): Rename variable new
to new_symbol.
* bfd/tekhex.c (first_phase, tekhex_make_empty_symbol): Rename
variable new to new_symbol.
* binutils/nlmconv.c (main): Rename variable new to new_name.
* gas/config/tc-arm.c (insert_reg_alias): Rename variable new to
new_reg.
* gas/config/tc-dlx.c (parse_operand): Rename variable new to
new_pos.
* gas/config/tc-ia64.c (ia64_gen_real_reloc_type): Rename variable
new to newr.
* gas/config/tc-mcore.c (parse_exp, parse_imm): Rename variable
new to new_pointer.
* gas/config/tc-microblaze.c (parse_exp, parse_imm, check_got):
Change name from new to new_pointer.
* gas/config/tc-or32.c (parse_operand): Rename variable new to
new_pointer.
* gas/config/tc-pdp11.c (md_assemble): Rename variable new to
new_pointer.
* gas/config/tc-pj.c (alias): Change argument new to new_name.
* gas/config/tc-score.c (s3_build_score_ops_hsh): Rename variable
new to new_opcode. (s3_build_dependency_insn_hsh) Rename variable
new to new_i2n. (s3_convert): Rename variables old and new to
r_old and r_new.
* gas/config/tc-score7.c (s7_build_score_ops_hsh): Rename variable
new to new_opcode. (s7_build_dependency_insn_hsh): Rename variable
new to new_i2d. (s7_b32_relax_to_b16, s7_convert_frag): Rename
variables old and new to r_old and r_new.
* gas/config/tc-sh.c (parse_exp): Rename variable new to
new_pointer.
* gas/config/tc-sh64.c (shmedia_parse_exp): Rename variable new to
new_pointer.
* gas/config/tc-tic4x.c (tic4x_operand_parse): Rename variable new
to new_pointer.
* gas/config/tc-z8k.c (parse_exp): Rename variable new to
new_pointer.
* gas/listing.c (listing_newline): Rename variable new to new_i.
* ld/ldexp.c (exp_intop, exp_bigintop, exp_relop, exp_binop)
(exp_trinop, exp_unop, exp_nameop, exp_assop): Rename variable new
to new_e.
* ld/ldfile.c (ldfile_add_library_path): Rename variable new to
new_dirs. (ldfile_add_arch): Rename variable new to new_arch.
* ld/ldlang.c (new_statement, lang_final, lang_add_wild)
(lang_target, lang_add_fill, lang_add_data, lang_add_assignment)
(lang_add_insert): Rename variable new to new_stmt. (new_afile):
Added missing cast. (lang_memory_region_lookup): Rename variable
new to new_region. (init_os): Rename variable new to
new_userdata. (lang_add_section): Rename variable new to
new_section. (ldlang_add_undef): Rename variable new to
new_undef. (realsymbol): Rename variable new to new_name.
* opcodes/z8kgen.c (internal, gas): Rename variable new to new_op.
Updated sources to avoid using the identifier name "template",
which is a keyword in c++.
* bfd/elf32-arm.c (struct stub_def): Rename member template to
template_sequence. (arm_build_one_stub,
find_stub_size_and_template, arm_size_one_stub, arm_map_one_stub):
Rename variable template to template_sequence.
* bfd/elfxx-ia64.c (elfNN_ia64_relax_br, elfNN_ia64_relax_brl):
Rename variable template to template_val.
* gas/config/tc-arm.c (struct asm_cond, struct asm_psr, struct
asm_barrier_opt): Change member template to
template_name. (md_begin): Update code to reflect new member
names.
* gas/config/tc-i386.c (struct templates, struct _i386_insn)
(match_template, cpu_flags_match, match_reg_size, match_mem_size)
(operand_size_match, md_begin, i386_print_statistics, pi)
(build_vex_prefix, md_assemble, parse_insn, optimize_imm)
(optimize_disp): Updated code to use new names. (parse_insn):
Added casts.
* gas/config/tc-ia64.c (dot_template, emit_one_bundle): Updated
code to use new names.
* gas/config/tc-score.c (struct s3_asm_opcode): Renamed member
template to template_name. (s3_parse_16_32_inst, s3_parse_48_inst,
s3_do_macro_ldst_label, s3_build_score_ops_hsh): Update code to
use new names.
* gas/config/tc-score7.c (struct s7_asm_opcode): Renamed member
template to template_name. (s7_parse_16_32_inst,
s7_do_macro_ldst_label, s7_build_score_ops_hsh): Update code to
use new names.
* gas/config/tc-tic30.c (md_begin, struct tic30_insn)
(md_assemble): Update code to use new names.
* gas/config/tc-tic54x.c (struct _tic54x_insn, md_begin)
(optimize_insn, tic54x_parse_insn, next_line_shows_parallel):
Update code to use new names.
* include/opcode/tic30.h (template): Rename type template to
insn_template. Updated code to use new name.
* include/opcode/tic54x.h (template): Rename type template to
insn_template.
* opcodes/cris-dis.c (bytes_to_skip): Update code to use new name.
* opcodes/i386-dis.c (putop): Update code to use new name.
* opcodes/i386-gen.c (process_i386_opcodes): Update code to use
new name.
* opcodes/i386-opc.h (struct template): Rename struct template to
insn_template. Update code accordingly.
* opcodes/i386-tbl.h (i386_optab): Update type to use new name.
* opcodes/ia64-dis.c (print_insn_ia64): Rename variable template
to template_val.
* opcodes/tic30-dis.c (struct instruction, get_tic30_instruction):
Update code to use new name.
* opcodes/tic54x-dis.c (has_lkaddr, get_insn_size)
(print_parallel_instruction, print_insn_tic54x, tic54x_get_insn):
Update code to use new name.
* opcodes/tic54x-opc.c (tic54x_unknown_opcode, tic54x_optab):
Update type to new name.
ld/:
* Makefile.am (bin_PROGRAMS): Renamed from ...
(noinst_PROGRAMS): ... this.
(transform): Override, including the renaming of ld-new to ld.
(install-exec-local): Installation of ld in $(bindir) not needed
here any more.
(AM_CPPFLAGS): Renamed from ...
(INCLUDES): ... this.
(MAINTAINERCLEANFILES): Add ld.1.
* Makefile.in: Regenerate.
gold/:
* Makefile.am (AM_CPPFLAGS): Renamed from ...
(INCLUDES): ... this.
* testsuite/Makefile.am (AUTOMAKE_OPTIONS): Add -Wno-portability.
(AM_CPPFLAGS): Renamed from ...
(INCLUDE): ... this.
* Makefile.in, testsuite/Makefile.in: Regenerate.
bfd/:
* Makefile.am (libbfd_la_LDFLAGS): Initialize early, to allow
appending.
[INSTALL_LIBBFD] (bfdlib_LTLIBRARIES, bfdinclude_HEADERS): Set
only in this condition.
[!INSTALL_LIBBFD] (noinst_LTLIBRARIES, libbfd_la_LDFLAGS): New,
to build but not install libbfd.la in this condition.
(install-bfdlibLTLIBRARIES, uninstall-bfdlibLTLIBRARIES)
(install_libbfd, install_libbfd): Remove.
* Makefile.in: Regenerate.
binutils/:
* Makefile.am (AM_CPPFLAGS): Renamed from ...
(INCLUDES): ... this.
(bin2c$(EXEEXT_FOR_BUILD): Adjust rule.
(installcheck-local): Renamed from ...
(installcheck): ... this.
* Makefile.in: Regenerate.
gas/:
* Makefile.am (YFLAGS): Remove, not needed any more.
(AM_CPPFLAGS): Renamed from ...
(INCLUDES): ... this.
* Makefile.in: Regenerate.
gprof/:
* Makefile.am (AM_CPPFLAGS): Renamed from ...
(INCLUDES): ... this.
* Makefile.in: Regenerate.
opcodes/:
* Makefile.am (libopcodes_la_LDFLAGS): Initialize early.
[INSTALL_LIBBFD] (bfdlib_LTLIBRARIES): Set only in this condition.
[INSTALL_LIBBFD] (bfdinclude_DATA): New.
[!INSTALL_LIBBFD] (noinst_LTLIBRARIES): New.
[!INSTALL_LIBBFD] (libopcodes_la_LDFLAGS): Ensure libopcodes.la
is built shared even if it is not to be installed.
(install-bfdlibLTLIBRARIES,uninstall-bfdlibLTLIBRARIES)
(install_libopcodes, uninstall_libopcodes): Remove.
(AM_CPPFLAGS): Renamed from ...
(INCLUDES): ... this.
* Makefile.in: Regenerate.
* config/tc-xtensa.c (config_max_slots): New global variable.
(md_begin): Set config_max_slots.
(total_frag_text_expansion): Use config_max_slots instead of
MAX_SLOTS.
(xg_init_vinsn): Likewise.
(xg_clear_vinsn): Likewise.
(xg_free_vinsn): Likewise.
* config/tc-xtensa.h (xtensa_frag_data): Rename unused field fr_prev
to no_transform_end.
* config/tc-xtensa.c (xtensa_mark_difference_of_two_symbols): Set
and use no_transform_end.
* config/tc-xtensa.c (xtensa_create_xproperty_segments): Use
sizeof instead of hard-coded value.
(add_xt_block_frags): Remove unused local variable.
(frag_flags_to_number): Change return type to flagword. Remove
unused local variable.
