H.J. Lu
a179a9fdaa
Reformat vex_w_table.
...
2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (vex_w_table): Reformat.
2009-12-15 22:20:50 +00:00
H.J. Lu
53aa04a0be
Add VEX_W_382X_P_2_M_0.
...
2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (VEX_W_382X_P_2_M_0): New.
(vex_w_table): Add VEX_W_382X_P_2_M_0.
(mod_table): Use VEX_W_382X_P_2_M_0.
2009-12-15 22:13:05 +00:00
H.J. Lu
efdb52b70e
Reformat vex_w_table.
...
2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (vex_w_table): Reformat.
2009-12-15 21:37:51 +00:00
H.J. Lu
9e30b8e093
Add USE_VEX_W_TABLE, VEX_W_TABLE and VEX_W_XXX.
...
2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (USE_VEX_W_TABLE): New.
(VEX_W_TABLE): Likewise.
(VEX_W_XXX): Likewise.
(vex_w_table): Likewise.
(prefix_table): Use VEX_W_XXX.
(vex_table): Likewise.
(vex_len_table): Likewise.
(mod_table): Likewise.
(get_valid_dis386): Handle USE_VEX_W_TABLE.
* i386-opc.tbl: Add VexW0 to AVX instructions where the VEX.W bit
isn't used.
* i386-tbl.h: Regenerated.
2009-12-15 18:56:09 +00:00
H.J. Lu
e3c58833bf
Define VEX128 and VEX256.
...
gas/
2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (build_vex_prefix): Use VEX256.
opcodes/
2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.h (VEX128): New.
(VEX256): Likewise.
2009-12-15 16:36:59 +00:00
H.J. Lu
4c807e7262
Reformat vex_len_table.
...
2009-12-14 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (vex_len_table): Reformat.
2009-12-15 01:42:57 +00:00
H.J. Lu
976f1fde11
Rename MOD_VEX_51 to MOD_VEX_50.
...
2009-12-14 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (MOD_VEX_51): Renamed to ...
(MOD_VEX_50): This.
(vex_table): Updated.
(mod_table): Likewise.
2009-12-14 20:22:16 +00:00
Nick Clifton
ab8e2090b6
PR binutils/10924
...
* arm-dis.c (arm_opcodes): Specify %R in cases where using r15
results in unpredictable behaviour.
(print_insn_arm): Handle %R.
* gas/arm/unpredictable.s: New test case - checks the disassembly
of instructions with unpredictable behaviour.
* gas/arm/unpredictable.d: New file - expected disassembly.
2009-12-14 16:38:23 +00:00
H.J. Lu
759a05ce24
Set vex.w to 0 for VEX C5 prefix.
...
2009-12-11 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (get_valid_dis386): Set vex.w to 0 for VEX C5
prefix.
(print_insn): Don't set vex.w here.
2009-12-12 01:17:41 +00:00
H.J. Lu
5639ff8726
2009-12-11 H.J. Lu <hongjiu.lu@intel.com>
...
* i386-dis.c (print_insn): Set vex.w to 0.
2009-12-12 00:13:11 +00:00
Sebastian Pop
02e647f941
2009-12-11 Quentin Neill <quentin.neill@amd.com>
...
gas/testsuite/
* gas/i386/fma4.d: Add test cases.
* gas/i386/fma4.s: Add test cases.
* gas/i386/x86-64-fma4.d: Add test cases.
* gas/i386/x86-64-fma4.s: Add test cases.
opcodes/
* i386-dis.c (get_vex_imm8): Extend logic to apply in all
cases, to avoid fetching ahead for the immediate bytes when
OP_E_memory has already been called. Fix indentation.
2009-12-11 20:38:51 +00:00
Nick Clifton
91d6fa6a03
Add -Wshadow to the gcc command line options used when compiling the binutils.
...
Fix up all warnings generated by the addition of this switch.
2009-12-11 13:42:17 +00:00
Nick Clifton
07a28fab11
PR 10924
...
* arm-dis.c (print_insn_arm): Mark insns that use the PC in
post-indexed addressing as unpredictable.
2009-12-09 08:38:04 +00:00
H.J. Lu
eacc9c891d
Support fxsave64 and fxrstor64.
...
gas/testsuite/
2009-12-03 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run x86-64-fxsave and x86-64-fxsave-intel.
* gas/i386/rex.d: Updated for fxsave64.
* gas/i386/x86-64-fxsave-intel.d: New.
* gas/i386/x86-64-fxsave.d: Likewise.
* gas/i386/x86-64-fxsave.s: Likewise.
opcodes/
2009-12-03 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (FXSAVE_Fixup): New.
(FXSAVE): Likewise.
(mod_table): Use FXSAVE on fxsave and fxrstor.
* i386-opc.tbl: Add fxsave64 and fxrstor64.
* i386-tbl.h: Regenerated.
2009-12-04 07:51:41 +00:00
Nick Clifton
03ee1b7f8e
PR gas/11013
...
* arm-dis.c (thumb32_opc): Adjust disassembly of QADD, QDADD, QSUB
and QDSUB.
* gas/arm/arch7em.d: Update expected disassembly.
* gas/arm/thumb32.d: Likewise.
* config/tc-arm.c (do_t_simd2): New function.
(insns): Use do_t_simd2 for QADD, QDADD, QSUB and QDSUB.
2009-12-02 20:26:30 +00:00
Nick Clifton
ee9fd255b7
PR gas/11030
...
* m68k-opc.c (m68k_opcodes): Allow the STLDSR instruction on the
Coldfire ISA A+.
2009-11-30 14:45:30 +00:00
Sebastian Pop
ccc5981b93
2009-11-17 Quentin Neill <quentin.neill@amd.com>
...
Sebastian Pop <sebastian.pop@amd.com>
gas/testsuite/
* gas/i386/x86-64-fma4.d: Add new patterns.
* gas/i386/x86-64-fma4.s: Same.
* gas/i386/x86-64-xop.d: Adjusted.
opcodes/
* i386-dis.c (get_vex_imm8): Increase bytes_before_imm when
decoding the second source operand from the immediate byte.
(OP_EX_VexW): Pass an extra integer to identify the second
and third source arguments.
2009-11-25 15:15:30 +00:00
H.J. Lu
18d0c96eb9
Allow lock on cmpxch16b.
...
gas/testsuite/
2009-11-19 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/lock-1.s: Add cmpxchg16b test.
* gas/i386/lock-1-intel.d: Updated.
* gas/i386/lock-1.d: Likewise.
opcodes/
2009-11-19 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Add IsLockable to cmpxch16b.
* i386-tbl.h: Regenerated.
2009-11-19 15:26:42 +00:00
Nick Clifton
945ee43039
PR binutils/10924
...
* gas/arm/arch4t-eabi.d: Restore previous expected dissambly of
instructions using Immediate Offset addressing with an offset of
zero.
* gas/arm/arch4t.d: Likewise.
* gas/arm/arm7t.d: Likewise.
* gas/arm/xscale.d: Likewise.
* gas/arm/wince-inst.d: Remove 'p' suffix from cmp, cmn, teq and
tst instructions.
PR binutils/10924
* arm-dis.c (print_insn_arm): Do not print an offset of zero when
decoding Immediaate Offset addressing.
2009-11-19 14:07:11 +00:00
Sebastian Pop
41effecb2d
2009-11-18 Sebastian Pop <sebastian.pop@amd.com>
...
opcodes/
PR binutils/10973
* i386-dis.c (get_vex_imm8): Do not increment codep.
Avoid incrementing bytes_before_imm when OP_E_memory
has already forwarded the codep pointer.
(OP_EX_VexW): Increment codep to skip mod/rm byte.
gas/testsuite/
* gas/i386/x86-64-xop.d: Update patterns.
2009-11-19 07:08:39 +00:00
Sebastian Pop
f0ae4a24b0
2009-11-18 Sebastian Pop <sebastian.pop@amd.com>
...
gas/
* config/tc-i386.c (cpu_arch): Remove cvt16.
(md_show_usage): Same.
* doc/c-i386.texi: Same.
gas/testsuite/
* gas/i386/cvt16.d: Removed.
* gas/i386/cvt16.s: Removed.
* gas/i386/x86-64-cvt16.d: Removed.
* gas/i386/x86-64-cvt16.s: Removed.
* gas/i386/i386.exp: Remove cvt16 and x86-64-cvt16 tests.
opcodes/
* i386-dis.c (VEX_LEN_XOP_08_A0): Removed.
(VEX_LEN_XOP_08_A1): Removed.
(xop_table): Remove entries for VEX_LEN_XOP_08_A0 and
VEX_LEN_XOP_08_A1.
(vex_len_table): Same.
* i386-gen.c (CPU_CVT16_FLAGS): Removed.
(cpu_flags): Remove field for CpuCVT16.
* i386-opc.h (CpuCVT16): Removed.
(i386_cpu_flags): Remove bitfield cpucvt16.
(i386-opc.tbl): Remove CVT16 instructions.
* i386-init.h: Regenerated.
* i386-tbl.h: Regenerated.
2009-11-18 20:28:59 +00:00
Sebastian Pop
5dd85c9970
2009-11-17 Sebastian Pop <sebastian.pop@amd.com>
...
Quentin Neill <quentin.neill@amd.com>
gas/
* config/tc-i386.c (cpu_arch): Added .xop and .cvt16.
(build_vex_prefix): Handle xop08.
(md_assemble): Don't special case the constant 3 for insns using MODRM.
(build_modrm_byte): Handle vex2sources.
(md_show_usage): Add xop and cvt16.
* doc/c-i386.texi: Document fma4, xop, and cvt16.
gas/testsuite/
* gas/i386/i386.exp: Run xop and cvt16 in 32-bit mode.
Run x86-64-xop and x86-64-cvt16 in 64-bit mode.
* gas/i386/lwp.d: Update name of the testcase.
* gas/i386/x86-64-xop.d: New.
* gas/i386/x86-64-xop.s: New.
* gas/i386/xop.d: New.
* gas/i386/xop.s: New.
* gas/i386/cvt16.d: New.
* gas/i386/cvt16.s: New.
opcodes/
* i386-dis.c (OP_Vex_2src_1): New.
(OP_Vex_2src_2): New.
(Vex_2src_1): New.
(Vex_2src_2): New.
(XOP_08): Added.
(VEX_LEN_XOP_08_A0): Added.
(VEX_LEN_XOP_08_A1): Added.
(VEX_LEN_XOP_09_80): Added.
(VEX_LEN_XOP_09_81): Added.
(xop_table): Added an entry for XOP_08. Handle xop instructions.
(vex_len_table): Added entries for VEX_LEN_XOP_08_A0,
VEX_LEN_XOP_08_A1, VEX_LEN_XOP_09_80, VEX_LEN_XOP_09_81.
(get_valid_dis386): Handle XOP_08.
(OP_Vex_2src): New.
* i386-gen.c (cpu_flag_init): Add CPU_XOP_FLAGS and CPU_CVT16_FLAGS.
(cpu_flags): Add CpuXOP and CpuCVT16.
(opcode_modifiers): Add XOP08, Vex2Sources.
* i386-opc.h (CpuXOP): Added.
(CpuCVT16): Added.
(i386_cpu_flags): Add cpuxop and cpucvt16.
(XOP08): Added.
(Vex2Sources): Added.
(i386_opcode_modifier): Add xop08, vex2sources.
* i386-opc.tbl: Add entries for XOP and CVT16 instructions.
* i386-init.h: Regenerated.
* i386-tbl.h: Regenerated.
2009-11-18 04:04:17 +00:00
Nick Clifton
aefd8a406c
* gas/arm/vfma1.d: Only run on ELF based targets.
...
PR binutils/10924
* gas/arm/arch4t-eabi.d: Update expected disassembly.
* gas/arm/arch4t.d: Likewise.
* gas/arm/archv6t2.d: Likewise.
* gas/arm/arm7t.d: Likewise.
* gas/arm/inst.d: Likewise.
* gas/arm/xscale.d: Likewise.
PR binutils/10924
* arm-dis.c (arm_opcodes): Add patterns to match undefined LDRB
instruction variants. Add pattern for MRS variant that was being
confused with CMP.
(arm_decode_shift): Place error message in a comment.
(print_insn_arm): Note that writing back to the PC is
unpredictable.
Only print 'p' variants of cmp/cmn/teq/tst instructions if
decoding for pre-V6 architectures.
2009-11-17 17:20:26 +00:00
Ramana Radhakrishnan
0bb027fd62
2009-11-17 Edward Nevill <edward.nevill@arm.com>
...
* arm-dis.c (print_insn_thumb32): Handle undefined instruction.
2009-11-17 10:43:09 +00:00
Doug Evans
c7e770a030
opcodes/
...
* Makefile.am (stamp-xc16x): Use ../cpu/xc16x.cpu instead of
../cgen/cpu.
* Makefile.in: Regenerate.
cgen/
* cpu/xc16x.cpu: Delete, use copy in ../cpu.
* cpu/xc16x.opc: Ditto.
2009-11-14 20:04:58 +00:00
H.J. Lu
8b3f93e7a1
2009-11-13 H.J. Lu <hongjiu.lu@intel.com>
...
* i386-dis.c (OP_E_extended): Removed.
2009-11-14 07:22:05 +00:00
H.J. Lu
2a70cca486
Check rex_ignored.
...
gas/testsuite/
2009-11-13 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/rex.s: Add a test for VEX insn.
* gas/i386/rex.d: Updated.
opcodes/
2009-11-13 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (print_insn): Check rex_ignored.
2009-11-13 23:13:48 +00:00
H.J. Lu
f16cd0d502
Rewrite prefix processing.
...
gas/testsuite/
2009-11-13 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run long-1, long-1-intel, x86-64-long-1,
and x86-64-long-1-intel.
* gas/i386/long-1-intel.d: New.
* gas/i386/long-1.d: Likewise.
* gas/i386/long-1.s: Likewise.
* gas/i386/x86-64-long-1-intel.d: Likewise.
* gas/i386/x86-64-long-1.d: Likewise.
* gas/i386/x86-64-long-1.s: Likewise.
* gas/i386/jump16.d: Updated for prefix processing.
* gas/i386/naked.d: Likewise.
* gas/i386/nops-1-core2.d: Likewise.
* gas/i386/nops-1-i686.d: Likewise.
* gas/i386/nops-3-i686.d: Likewise.
* gas/i386/nops-4-i686.d: Likewise.
* gas/i386/nops-5-i686.d: Likewise.
* gas/i386/nops-5.d: Likewise.
* gas/i386/prefix.d: Likewise.
* gas/i386/rep.d: Likewise.
* gas/i386/string-ok.d: Likewise.
* gas/i386/x86-64-addr32-intel.d: Likewise.
* gas/i386/x86-64-addr32.d: Likewise.
* gas/i386/x86-64-cbw-intel.d: Likewise.
* gas/i386/x86-64-cbw.d: Likewise.
* gas/i386/x86-64-io-intel.d: Likewise.
* gas/i386/x86-64-io-suffix.d: Likewise.
* gas/i386/x86-64-io.d: Likewise.
* gas/i386/x86-64-lwp.d: Likewise.
* gas/i386/x86-64-nops-1-core2.d: Likewise.
* gas/i386/x86-64-nops-1-nocona.d: Likewise.
* gas/i386/x86-64-nops-1.d: Likewise.
* gas/i386/x86-64-nops-2.d: Likewise.
* gas/i386/x86-64-nops-3.d: Likewise.
* gas/i386/x86-64-nops-4-core2.d: Likewise.
* gas/i386/x86-64-nops-4.d: Likewise.
* gas/i386/x86-64-nops-5-k8.d: Likewise.
* gas/i386/x86-64-nops-5.d: Likewise.
* gas/i386/x86-64-rep.d: Likewise.
* gas/i386/x86-64-stack-intel.d: Likewise.
* gas/i386/x86-64-stack-suffix.d: Likewise.
* gas/i386/x86-64-stack.d: Likewise.
ld/testsuite/
2009-11-13 H.J. Lu <hongjiu.lu@intel.com>
* ld-x86-64/tlsbin.dd: Updated for prefix processing.
* ld-x86-64/tlsgdesc.dd: Likewise.
* ld-x86-64/tlsld1.dd: Likewise.
* ld-x86-64/tlspic.dd: Likewise.
opcodes/
2009-11-13 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (ckprefix): Updated to return 0 if number of
prefixes > 14 and record the last position for each prefix.
(lock_prefix): Removed.
(data_prefix): Likewise.
(addr_prefix): Likewise.
(repz_prefix): Likewise.
(repnz_prefix): Likewise.
(last_lock_prefix): New.
(last_repz_prefix): Likewise.
(last_repnz_prefix): Likewise.
(last_data_prefix): Likewise.
(last_addr_prefix): Likewise.
(last_rex_prefix): Likewise.
(last_seg_prefix): Likewise.
(MAX_CODE_LENGTH): Likewise.
(ADDR16_PREFIX): Likewise.
(ADDR32_PREFIX): Likewise.
(DATA16_PREFIX): Likewise.
(DATA32_PREFIX): Likewise.
(REP_PREFIX): Likewise.
(seg_prefix): Likewise.
(all_prefixes): Change size to MAX_CODE_LENGTH - 1.
(prefix_name): Handle ADDR16_PREFIX, ADDR32_PREFIX,
DATA16_PREFIX, DATA32_PREFIX and REP_PREFIX.
(get_valid_dis386): Updated.
(OP_C): Likewise.
(OP_Monitor): Likewise.
(REP_Fixup): Likewise.
(print_insn): Display all prefixes.
(putop): Set PREFIX_DATA on used_prefixes only if it is used.
(intel_operand_size): Likewise.
(OP_E_register): Likewise.
(OP_G): Likewise.
(OP_REG): Likewise.
(OP_IMREG): Likewise.
(OP_I): Likewise.
(OP_I64): Likewise.
(OP_sI): Likewise.
(CRC32_Fixup): Likewise.
(MOVBE_Fixup): Likewise.
(OP_E_memory): Set REFIX_DATA on used_prefixes when it is used
in 16bit mode.
(OP_J): Set REX_W used if it is used. Set PREFIX_DATA on
used_prefixes only if it is used.
2009-11-13 20:42:10 +00:00
H.J. Lu
20efc68957
2009-11-12 H.J. Lu <hongjiu.lu@intel.com>
...
* i386-opc.tbl: Remove IsLockable from add, adc, and, dec, inc,
or, sbb, sub, xor and xchg with register only operands.
* i386-tbl.h: Regenerated.
2009-11-12 19:15:18 +00:00
H.J. Lu
c32fa91d70
gas/
...
2009-11-12 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (LOCKREP_PREFIX): Removed.
(REP_PREFIX): New.
(LOCK_PREFIX): Likewise.
(PREFIX_GROUP): Likewise.
(REX_PREFIX): Updated.
(MAX_PREFIXES): Likewise.
(add_prefix): Updated. Return enum PREFIX_GROUP.
(md_assemble): Check for lock without a lockable instruction.
(parse_insn): Updated.
(output_insn): Likewise.
gas/testsuite/
2009-11-12 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run lock-1, lock-1-intel, lockbad-1,
x86-64-lock-1, x86-64-lock-1-intel and x86-64-lockbad-1.
* gas/i386/lock-1-intel.d: New.
* gas/i386/lock-1.d: Likewise.
* gas/i386/lock-1.s: Likewise.
* gas/i386/lockbad-1.l: Likewise.
* gas/i386/lockbad-1.s: Likewise.
* gas/i386/x86-64-lock-1-intel.d: Likewise.
* gas/i386/x86-64-lock-1.d: Likewise.
* gas/i386/x86-64-lock-1.s: Likewise.
* gas/i386/x86-64-lockbad-1.l: Likewise.
* gas/i386/x86-64-lockbad-1.s: Likewise.
opcodes/
2009-11-12 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Add IsLockable.
* i386-opc.h (IsLockable): New.
(i386_opcode_modifier): Add islockable.
* i386-opc.tbl: Add IsLockable to add, adc, and, btc, btr,
bts, cmpxchg, cmpxch8b, dec, inc, neg, not, or, sbb, sub,
xor, xadd and xchg.
* i386-tbl.h: Regenerated.
2009-11-12 18:57:14 +00:00
Daniel Jacobowitz
79862e4574
gas/testsuite/
...
* gas/arm/copro.d, gas/arm/fp-save.d, gas/arm/float.d,
gas/arm/fpa-mem.d: Update for removed generic coprocessor instructions
and expanded PC-relative offsets.
opcodes/
* arm-dis.c (coprocessor_opcodes): Use %A instead of %C. Remove
generic coprocessor instructions for FPA loads and stores.
(print_insn_coprocessor): Remove %C support. Display address for
PC-relative offsets in %A.
2009-11-12 14:49:45 +00:00
H.J. Lu
f310f33d50
gas/testsuite/
...
2009-11-11 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/prefix.d: Swap order of ADDR and REP prefixes.
* gas/i386/rep.d: Likewise.
* gas/i386/x86-64-rep.d: Likewise.
opcodes/
2009-11-11 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (all_prefixes): New.
(ckprefix): Set all_prefixes.
(print_insn): Print all_prefixes instead of lock_prefix,
repz_prefix, repnz_prefix, addr_prefix and data_prefix.
2009-11-12 02:13:06 +00:00
Nick Clifton
c1e2689731
PR binutils/10924
...
* arm-dis.c (UNPREDICTABLE_INSTRUCTION): New macro.
(print_insn_arm): Extend %s format control code to check for
unpredictable addressing modes. Add support for %S format control
code which suppresses this check.
(W_BIT, I_BIT, U_BIT, P_BIT): New macros.
(WRITEBACK_BIT_SET, IMMEDIATE_BIT_SET, NEGATIVE_BIT_SET,
PRE_BIT_SET): New macros.
(print_insn_coprocessor): Use the new macros instead of magic
constants.
(print_arm_address): Likewise.
(pirnt_insn_arm): Likewise.
(print_insn_thumb32): Likewise.
2009-11-11 09:44:45 +00:00
Nick Clifton
41327c9d6d
Updated Indonesian translation.
2009-11-11 09:36:08 +00:00
Maxim Kuvyrkov
0d999f3337
* config/m68k-parse.h (enum m68k_register): Add ACR[4-7], RGPIOBAR.
...
* config/tc-m68k.c (mcf5206_ctrl): Fix whitespace.
(mcf52223_ctrl): Remove non-existent registers.
(mcf54418): Define.
(mcf54455): Remove MBAR.
(m68k_cpus): Add lines for MCF5441x family.
(m68k_ip, init_table): Handle RGPIOBAR, ACR[4-7].
* m68k-dis.c (print_insn_arg): Handle RGPIOBAR, ACR[4-7] and MBAR[01].
2009-11-10 18:05:24 +00:00
Sebastian Pop
c48244a521
2009-11-06 Sebastian Pop <sebastian.pop@amd.com>
...
* opcodes/i386-dis.c (reg_table): Add XOP_8F_TABLE (XOP_09) to
reg_table[REG_8F][1]: for XOP instructions, ModRM.reg first points to
B.mm in the RXB.mmmmm byte, and so when B is set, we still should use
the xop_table.
(get_valid_dis386): Removed unused condition (from cut/n/paste) for
XOP instructions.
* gas/testsuite/gas/i386/x86-64-lwp.s: Updated to also contain
patterns with r[8-15] registers.
* gas/testsuite/gas/i386/x86-64-lwp.d: Same.
2009-11-06 23:17:26 +00:00
Sebastian Pop
f88c9eb030
2009-11-05 Sebastian Pop <sebastian.pop@amd.com>
...
Quentin Neill <quentin.neill@amd.com>
* gas/config/tc-i386.c (cpu_arch): Add CPU_LWP_FLAGS.
(build_vex_prefix): Handle xop09 and xop0a.
(build_modrm_byte): Handle vexlwp.
(md_show_usage): Add lwp.
* gas/doc/c-i386.texi (i386-LWP): New section.
* gas/testsuite/gas/i386/i386.exp: Run x86-64-lwp in 64-bit mode,
run lwp in 32-bit mode.
* gas/testsuite/gas/i386/x86-64-lwp.d: New.
* gas/testsuite/gas/i386/x86-64-lwp.s: New.
* gas/testsuite/gas/i386/lwp.d: New.
* gas/testsuite/gas/i386/lwp.s: New.
* opcodes/i386-dis.c (OP_LWPCB_E): New.
(OP_LWP_E): New.
(OP_LWP_I): New.
(USE_XOP_8F_TABLE): New.
(XOP_8F_TABLE): New.
(REG_XOP_LWPCB): New.
(REG_XOP_LWP): New.
(XOP_09): New.
(XOP_0A): New.
(reg_table): Redirect REG_8F to XOP_8F_TABLE.
Add entries for REG_XOP_LWPCB and REG_XOP_LWP.
(xop_table): New.
(get_valid_dis386): Handle USE_XOP_8F_TABLE.
Use the offsets VEX_0F, VEX_0F38, and VEX_0F3A instead of their values
to access to the vex_table.
(OP_LWPCB_E): New.
(OP_LWP_E): New.
(OP_LWP_I): New.
* opcodes/i386-gen.c (cpu_flag_init): Add CPU_LWP_FLAGS, CpuLWP.
(cpu_flags): Add CpuLWP.
(opcode_modifiers): Add VexLWP, XOP09, and XOP0A.
* opcodes/i386-opc.h (CpuLWP): New.
(i386_cpu_flags): Add bit cpulwp.
(VexLWP): New.
(XOP09): New.
(XOP0A): New.
(i386_opcode_modifier): Add vexlwp, xop09, and xop0a.
* opcodes/i386-opc.tbl (llwpcb): Added.
(lwpval): Added.
(lwpins): Added.
2009-11-05 23:40:05 +00:00
DJ Delorie
946ef19679
[opcodes]
...
* rx-decode.opc (rx_decode_opcode) (mvtipl): Add.
(mvtcp, mvfcp, opecp): Remove.
* rx-decode.c: Regenerate.
* rx-dis.c (cpen): Remove.
[gas]
* config/rx-parse.y (MVTIPL): Update bit pattern.
(cpen): Remove.
[include/opcode]
* rx.h (rx_decode_opcode) (mvtipl): Add.
(mvtcp, mvfcp, opecp): Remove.
2009-11-05 02:31:40 +00:00
DJ Delorie
0d734b5d06
[opcodes]
...
* rx-decode.opc (rx_decode_opcode) (mvtipl): Add.
(mvtcp, mvfcp, opecp): Remove.
* rx-decode.c: Regenerate.
* rx-dis.c (cpen): Remove.
[gas]
* config/rx-parse.y (MVTIPL): Update bit pattern.
(cpen): Remove.
[include/opcode]
* rx.h (rx_decode_opcode) (mvtipl): Add.
(mvtcp, mvfcp, opecp): Remove.
2009-11-05 00:38:45 +00:00
Doug Evans
d51b88d344
* m32c-desc.c: Regenerate.
...
* mep-desc.c: Regenerate.
2009-11-04 06:18:27 +00:00
Paul Brook
62f3b8c867
2009-11-02 Paul Brook <paul@codesourcery.com>
...
ld/testsuite/
* ld-arm/arm-elf.exp: Add new attr-merge-vfp tests.
* ld-arm/attr-merge-vfp-1.d: New test.
* ld-arm/attr-merge-vfp-1r.d: New test.
* ld-arm/attr-merge-vfp-2.d: New test.
* ld-arm/attr-merge-vfp-2r.d: New test.
* ld-arm/attr-merge-vfp-3.d: New test.
* ld-arm/attr-merge-vfp-3r.d: New test.
* ld-arm/attr-merge-vfp-4.d: New test.
* ld-arm/attr-merge-vfp-4r.d: New test.
* ld-arm/attr-merge-vfp-5.d: New test.
* ld-arm/attr-merge-vfp-5r.d: New test.
* ld-arm/attr-merge-vfp-2.s: New test.
* ld-arm/attr-merge-vfp-3.s: New test.
* ld-arm/attr-merge-vfp-3-d16.s: New test.
* ld-arm/attr-merge-vfp-4.s: New test.
* ld-arm/attr-merge-vfp-4-d16.s: New test.
gas/
* doc/c-arm.texi: Document new -mfpu options.
* config/tc-arm.c (fpu_vfp_ext_v3xd, fpu_vfp_fp16, fpu_neon_ext_fma,
fpu_vfp_ext_fma): New.
(NEON_ENC_TAB): Add vfma, vfms, vfnma and vfnms.
(do_vfp_nsyn_fma_fms, do_neon_fmac): New functions.
(insns): Move double precision load/store. Split out double
precision VFPv3 instrucitons. Add VFPv4 instructions.
(arm_fpus): Add VFPv3-FP16, VFPv3xD and VFPv4 variants.
(aeabi_set_public_attributes): Set VFPv4 variants
gas/testsuite/
* gas/arm/attr-mfpu-vfpv4.d: New test.
* gas/arm/attr-mfpu-vfpv4-d16.d: New test.
* gas/arm/neon-fma-cov.d: New test.
* gas/arm/neon-fma-cov.s: New test.
* gas/arm/vfp-fma-inc.s: New test.
* gas/arm/vfp-fma-arm.d: New test.
* gas/arm/vfp-fma-arm.s: New test.
* gas/arm/vfp-fma-thumb.d: New test.
* gas/arm/vfp-fma-thumb.s: New test.
* gas/arm/vfma1.d: New test.
* gas/arm/vfma1.s: New test.
* gas/arm/vfpv3xd.d: New test.
* gas/arm/vfpv3xd.s: New test.
include/opcode/
* arm.h (FPU_VFP_EXT_V3xD, FPU_VFP_EXT_FP16, FPU_NEON_EXT_FMA,
FPU_VFP_EXT_FMA, FPU_VFP_V3xD, FPU_VFP_V4D16, FPU_VFP_V4): Define.
(FPU_ARCH_VFP_V3D16_FP16, FPU_ARCH_VFP_V3_FP16, FPU_ARCH_VFP_V3xD,
FPU_ARCH_VFP_V3xD_FP16, FPU_ARCH_VFP_V4, FPU_ARCH_VFP_V4D16,
FPU_ARCH_NEON_VFP_V4): Define.
binutils/
* readelf.c (arm_attr_tag_VFP_arch): Add VFPv4 and VFPv4-D16.
bfd/
* elf32-arm.c (elf32_arm_merge_eabi_attributes): Handle VFPv4
attributes.
opcodes/
* arm-dis.c (coprocessor_opcodes): Update to use new feature flags.
Add VFPv4 instructions.
2009-11-02 13:44:05 +00:00
H.J. Lu
206c2556c2
gas/
...
2009-10-29 Sebastian Pop <sebastian.pop@amd.com>
* config/tc-i386.c (build_modrm_byte): Do not swap REG and
NDS operands for FMA4.
gas/testsuite/
2009-10-29 Sebastian Pop <sebastian.pop@amd.com>
* gas/i386/fma4.d: Updated patterns.
* gas/i386/x86-64-fma4.d: Same.
opcodes/
2009-10-29 Sebastian Pop <sebastian.pop@amd.com>
* i386-dis.c (OP_VEX_FMA): Removed.
(VexFMA): Removed.
(Vex128FMA): Removed.
(prefix_table): First source operand of FMA4 insns is decoded
with Vex not with VexFMA.
(OP_EX_VexW): Second source operand is decoded with get_vex_imm8
when vex.w is set. Third source operand is decoded with
get_vex_imm8 when vex.w is cleared.
(OP_VEX_FMA): Removed.
2009-10-29 22:22:59 +00:00
Alan Modra
a2b2318d99
* Makefile.am (HFILES): Remove cgen-ops.h and cgen-types.h.
2009-10-27 01:49:26 +00:00
Doug Evans
ac1e9eca70
cpu/
...
* m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
cgen-ops.h -> cgen/basic-ops.h.
include/opcode/
* cgen-bitset.h: Delete, moved to ../cgen/bitset.h.
* cgen.h: Update. Improve multi-inclusion macro name.
include/cgen/
* basic-modes.h: New file. Moved here from opcodes/cgen-types.h.
* basic-ops.h: New file. Moved here from opcodes/cgen-ops.h.
* bitset.h: New file. Moved here from ../opcode/cgen-bitset.h.
Update license to GPL v3.
opcodes/
* cgen-ops.h: Delete, moved to ../include/cgen/basic-ops.h.
* cgen-types.h: Delete, moved to ../include/cgen/basic-modes.h.
* cgen-bitset.c: Update.
* fr30-desc.h: Regenerate.
* frv-desc.h: Regenerate.
* ip2k-desc.h: Regenerate.
* iq2000-desc.h: Regenerate.
* lm32-desc.h: Regenerate.
* m32c-desc.h: Regenerate.
* m32c-opc.h: Regenerate.
* m32r-desc.h: Regenerate.
* mep-desc.h: Regenerate.
* mt-desc.h: Regenerate.
* openrisc-desc.h: Regenerate.
* xc16x-desc.h: Regenerate.
* xstormy16-desc.h: Regenerate.
2009-10-24 00:17:08 +00:00
DJ Delorie
f282425ecd
* rx-decode.opc (decode_opcode): Fix flags for MUL, SUNTIL, and SWHILE.
...
* rx-decode.c: Regenerated.
2009-10-23 01:11:53 +00:00
H.J. Lu
4b06377fcc
gas/
...
2009-10-20 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10775
* doc/c-i386.texi: Mention movabs.
gas/testsuite/
2009-10-20 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10775
* gas/i386/immed64.d: Updated.
* gas/i386/l1om.d: Likewise.
* gas/i386/x86-64-disp-intel.d: Likewise.
* gas/i386/x86-64-disp.d: Likewise.
* gas/i386/x86_64.d: Likewise.
opcodes/
2009-10-20 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10775
* i386-dis.c: Document LB, LS and LV macros.
(dis386): Use mov%LB, mov%LS and mov%LV on mov instruction
with the 64-bit displacement or immediate operand.
(putop): Handle LB, LS and LV macros.
2009-10-20 22:18:19 +00:00
Doug Evans
cedb97b6d0
* lm32-opinst.c: Regenerate.
...
* m32c-desc.c: Regenerate.
* m32r-opinst.c: Regenerate.
* openrisc-ibld.c: Regenerate.
* xc16x-desc.c: Regenerate.
* xc16x-desc.h: Regenerate.
2009-10-19 05:09:44 +00:00
Doug Evans
d1119f7a8c
* Makefile.am (CGEN_CPUS): Add iq2000, lm32.
...
(FR30_DEPS, FRV_DEPS, IQ2000_DEPS): Move so all cgen *_DEPS are
sorted alphabetically.
(stamp-fr30, stamp-frv, stamp-iq2000, stamp-xc16x): Move so all cgen
stamp-* rules are sorted alphabetically.
* Makefile.in: Regenerate.
2009-10-17 17:38:09 +00:00
H.J. Lu
52a6c1fedd
2009-10-16 H.J. Lu <hongjiu.lu@intel.com>
...
* i386-opc.h: Use enum instead of nested macros.
2009-10-16 15:50:52 +00:00
H.J. Lu
3873ba1230
2009-10-16 H.J. Lu <hongjiu.lu@intel.com>
...
* i386-dis.c: Simplify enums.
2009-10-16 14:47:08 +00:00
H.J. Lu
51e7da1b40
2009-10-15 H.J. Lu <hongjiu.lu@intel.com>
...
Ineiev <ineiev@gmail.com>
PR binutils/10767
* i386-dis.c: Use enum instead of nested macros.
2009-10-15 22:50:09 +00:00
H.J. Lu
c39846ed0a
2009-10-15 H.J. Lu <hongjiu.lu@intel.com>
...
* i386-dis.c (MAX_BYTEMODE): Removed.
2009-10-15 22:26:55 +00:00
Alan Modra
6a327e170e
PR 969
...
* m68k-opc.c (m68k_opcodes): Correct mask for macl and msacl.
2009-10-14 11:30:20 +00:00
H.J. Lu
55b126d49c
2009-10-13 H.J. Lu <hongjiu.lu@intel.com>
...
* i386-dis.c (print_insn): Always clear need_vex, need_vex_reg
and vex_w_done.
2009-10-13 18:44:19 +00:00
Michael Eager
ef29941507
* opcodes/microblaze-dis.c: Add include for microblaze-dis.h,
...
eliminate local extern decls.
* opcodes/microblaze-dis.h: New.
2009-10-07 15:40:17 +00:00
Nick Clifton
245caaea22
Updated Finnish translation
2009-10-06 15:44:40 +00:00
Nick Clifton
49293ef70b
* opc2c.c: Include "libiberty.h" and <errno.h>.
...
(orig_filename): Constify.
(dump_lines): Fix line number directive.
(main): Set orig_filename to basename of input file. Use
xstrerror.
* Makefile.am (rx-dis.lo): Remove explicit dependencies.
($(srcdir)/rx-decode.c): Use @MAINT@. Use $(EXEEXT_FOR_BUILD)
instead of $(EXEEXT).
(opc2c$(EXEEXT_FOR_BUILD)): Renamed from opc2c$(EXEEXT) and use
$(LINK_FOR_BUILD). Link with libiberty.
(MOSTLYCLEANFILES): Add opc2c$(EXEEXT_FOR_BUILD).
(MAINTAINERCLEANFILES): Add $(srcdir)/rx-decode.c.
* Makefile.in: Regenerated.
* rx-decode.c: Regenerated.
2009-10-05 13:14:55 +00:00
H.J. Lu
caeec88ad4
Revert the last change.
2009-10-03 17:00:16 +00:00
H.J. Lu
ac845c8691
2009-10-03 H.J. Lu <hongjiu.lu@intel.com>
...
* Makefile.am ($(srcdir)/rx-decode.c): Add @MAINT@.
(rx-dis.lo): Remove a space.
(pc2c$(EXEEXT)): Remove a space. Use $(LINK_FOR_BUILD) instead
of gcc.
(MAINTAINERCLEANFILES): Add $(srcdir)/rx-decode.c.
* Makefile.in: Regenerated.
2009-10-03 14:36:34 +00:00
Alan Modra
8977d4b219
* arm-dis.c (print_insn): Check symtab_size not *symtab.
2009-10-03 00:39:53 +00:00
H.J. Lu
f98fa53424
2009-10-02 H.J. Lu <hongjiu.lu@intel.com>
...
* i386-opc.tbl: Drop Disp64 on jump and loop instructions.
* i386-tbl.h: Regenerated.
2009-10-02 19:03:40 +00:00
Alan Modra
e0c483d688
typo fix
2009-10-02 15:35:01 +00:00
Peter Bergner
9fe54b1ca1
gas/
...
* config/tc-ppc.c (md_show_usage): Document -m476.
* doc/c-ppc.texi (PowerPC-Opts): Document -m476.
gas/testsuite/
* gas/ppc/476.s: New test.
* gas/ppc/476.d: Likewise.
* gas/ppc/ppc.exp: Run the 476 test.
include/opcode/
* ppc.h (PPC_OPCODE_476): Define.
opcodes/
* ppc-dis.c (ppc_opts): Add "476" entry.
* ppc-opc.c (PPC476): Define.
(powerpc_opcodes): Update mnemonics where required for 476.
2009-10-02 14:42:42 +00:00
Peter Bergner
634b50f2a6
gas/
...
* config/tc-ppc.c (md_show_usage): Rename "ppca2" to "a2".
* doc/c-ppc.texi (PowerPC-Opts): Likewise.
gas/testsuite/
* gas/ppc/a2.d: Rename "ppca2" to "a2".
include/opcode/
* ppc.h (PPC_OPCODE_A2): Rename from PPC_OPCODE_PPCA2.
opcodes/
* ppc-opc.c (PPCA2): Use renamed mask PPC_OPCODE_A2.
* ppc-dis.c (ppc_opts): Likewise.
Rename "ppca2" to "a2".
2009-10-01 19:24:48 +00:00
M R Swami Reddy
4ded9dda7c
2009-10-01 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
...
* crx-dis.c (match_opcode): Truncate mcode to 32-bit.
2009-10-01 08:19:55 +00:00
Nick Clifton
c7927a3c0e
bfd
...
* Makefile.am (ALL_MACHINES): Add cpu-rx.lo.
(ALL_MACHINES_CFILES): Add cpu-rx.c.
(BFD32_BACKENDS): Add elf32-rx.lo.
(BFD32_BACKENDS_CFILES): Add elf32-rx.c.
* archures.c (bfd_architecture): Add bfd_arch_rx and bfd_mach_rx.
Export bfd_rx_arch.
(bfd_archures_list): Add bfd_rx_arch.
* config.bfd: Add entry for rx-*-elf.
* configure.in: Add entries for bfd_elf32_rx_le_vec and
bfd_elf32_rx_be_vec.
* reloc.c: Add RX relocations.
* targets.c: Add RX target vectors.
* Makefile.in: Regenerate.
* bfd-in2.h: Regenerate.
* configure: Regenerate.
* libbfd.h: Regenerate.
* cpu-rx.c: New file.
* elf32-rx.c: New file.
binutils
* readelf.c: Add support for RX target.
* MAINTAINERS: Add DJ and NickC as maintainers for RX.
gas
* Makefile.am: Add RX target.
* configure.in: Likewise.
* configure.tgt: Likewise.
* read.c (do_repeat_with_expander): New function.
* read.h: Provide a prototype for do_repeat_with_expander.
* doc/Makefile.am: Add RX target documentation.
* doc/all.texi: Likewise.
* doc/as.texinfo: Likewise.
* Makefile.in: Regenerate.
* NEWS: Mention support for RX architecture.
* configure: Regenerate.
* doc/Makefile.in: Regenerate.
* config/rx-defs.h: New file.
* config/rx-parse.y: New file.
* config/tc-rx.h: New file.
* config/tc-rx.c: New file.
* doc/c-rx.texi: New file.
gas/testsuite
* gas/rx: New directory.
* gas/rx/*: New set of test cases.
* gas/elf/section2.e-rx: New expected output file.
* gas/all/gas.exp: Add support for RX target.
* gas/elf/elf.exp: Likewise.
* gas/lns/lns.exp: Likewise.
* gas/macros/macros.exp: Likewise.
include
* dis-asm.h: Add prototype for print_insn_rx.
include/elf
* rx.h: New file.
include/opcode
* rx.h: New file.
ld
* Makefile.am: Add rules to build RX emulation.
* configure.tgt: Likewise.
* NEWS: Mention support for RX architecture.
* Makefile.in: Regenerate.
* emulparams/elf32rx.sh: New file.
* emultempl/rxelf.em: New file.
opcodes
* Makefile.am: Add RX files.
* configure.in: Add support for RX target.
* disassemble.c: Likewise.
* Makefile.in: Regenerate.
* configure: Regenerate.
* opc2c.c: New file.
* rx-decode.c: New file.
* rx-decode.opc: New file.
* rx-dis.c: New file.
2009-09-29 14:17:19 +00:00
Peter Bergner
8765b55692
opcodes/
...
* ppc-opc.c (powerpc_opcodes): Remove support for the the "lxsdux",
"lxvd2ux", "lxvw4ux", "stxsdux", "stxvd2ux" and "stxvw4ux" opcodes.
gas/testsuite/
* gas/ppc/vsx.s ("lxsdux", "lxvd2ux", "lxvw4ux", "stxsdux",
"stxvd2ux", "stxvw4ux"): Remove tests.
* gas/ppc/vsx.d: Likewise.
* gas/ppc/power7.s: Likewise.
* gas/ppc/power7.d: Likewise.
2009-09-29 13:19:10 +00:00
Michael Eager
fe2d172ccb
2009-09-25 Michael Eager <eager@eagercon.com>
...
* microblaze-dis.c (get_insn_microblaze, microblaze_get_target_address,
microblaze_decode_insn): Add declarations.
(get_delay_slots_microblaze): Remove.
2009-09-25 19:59:51 +00:00
Nick Clifton
21d799b5c4
Update soruces to make alpha, arc and arm targets compile cleanly
...
with -Wc++-compat:
* config/tc-alpha.c: Add casts.
(extended_bfd_reloc_code_real_type): New type. Used to avoid
enumeration conversion warnings.
(struct alpha_fixup, void assemble_insn, assemble_insn)
(assemble_tokens): Use new type.
* ecoff.c: Add casts. (mark_stabs): Use enumeration names.
* config/obj-elf.c: Add cast
* config/tc-arc.c: Add casts.
* config/obj-aout.h (text_section,data_section,bss_section):
Make extern.
* config/obj-elf.c: Add cast.
* config/tc-arm.c: Add casts.
(X, TxCE, TxCE, TxC3, TxC3w, TxCM_, TxCM, TUE, TUF, CE, CL, cCE)
(cCL, C3E, xCM_, nUF, nCE_tag): Change input format to avoid the
need for keywords as arguments.
* ecoff.c: Add casts.
* ecofflink.c: Add casts.
* elf64-alpha.c: Add casts.
(struct alpha_elf_got_entry, struct alpha_elf_reloc_entry): Move
to top level.
(SKIP_HOWTO): Use enum name.
* elf32-arm.c: Add casts.
(elf32_arm_vxworks_bed): Update code to avoid multiple
declarations.
(struct map_stub): Move to top level.
* arc-dis.c Fix casts.
* arc-ext.c: Add casts.
* arm-dis.c (enum opcode_sentinel_enum): Gave name to anonymous
enum.
* emultempl/armelf.em: Add casts.
2009-09-25 19:13:27 +00:00
H.J. Lu
2bf05e5730
gas/
...
2009-09-24 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (build_vex_prefix): Check vex == 2 instead
of vex256.
opcodes/
2009-09-24 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Remove Vex256.
(set_bitfield): Handle XXX=V.
* i386-opc.h (Vex): Update comments.
(Vex256): Removed.
(VexNDS): Updated.
(i386_opcode_modifier): Change vex to 2 bits. Remove vex256.
* i386-opc.tbl: Replace "Vex|Vex256" with Vex=2.
* i386-tbl.h: Regenerated.
2009-09-24 16:37:09 +00:00
Nick Clifton
8a00d39205
Updated French and Vietnamese translations.
2009-09-23 10:09:19 +00:00
Ben Elliston
e0d602ecff
gas/
...
* config/tc-ppc.c (md_show_usage): Document -mpcca2.
* doc/c-ppc.texi (PowerPC-Opts): Document -mppca2.
gas/testsuite/
* gas/ppc/a2.s: New.
* gas/ppc/a2.d: Likewise.
* gas/ppc/ppc.exp: Run the a2 dump test.
include/opcode/
* ppc.h (PPC_OPCODE_PPCA2): New.
opcodes/
* ppc-dis.c (ppc_opts): Add "ppca2" entry.
* ppc-opc.c (powerpc_opcodes): Add eratilx, eratsx, eratsx.,
eratre, wchkall, eratwe, ldawx., mdfcrx., mfdcr. mtdcrx., icswx,
icswx., mtdcr., dci, wclrone, wclrall, wclr, erativax, tlbsrx.,
ici mnemonics.
(ERAT_T): New operand.
(XWC_MASK): New mask.
(XOPL2): New macro.
(PPCA2): Define.
2009-09-21 10:29:07 +00:00
Nick Clifton
ca58b19f00
Updated Spanish and Vietnamese translations
2009-09-18 07:54:47 +00:00
H.J. Lu
0520304376
2009-09-15 H.J. Lu <hongjiu.lu@intel.com>
...
* i386-dis.c (OP_E_memory): Don't print '-' in Intel mode if
disp == -disp.
2009-09-15 17:53:40 +00:00
Nick Clifton
df58f7b0bf
Updated German, Dutch and Finnish translations.
2009-09-14 12:24:29 +00:00
Nick Clifton
1e9cc1c27b
* po/bfd.pot: Updated by the Translation project.
...
* po/binutils.pot: Updated by the Translation project.
* po/gold.pot: Updated by the Translation project.
* po/gold.pot: Updated by the Translation project.
* po/gprof.pot: Updated by the Translation project.
* po/sv.po: Updated Swedish translation.
* po/ld.pot: Updated by the Translation project.
* po/fi.po: Updated Finnish translation.
* po/ld.pot: Updated by the Translation project.
* po/fi.po: Updated Finnish translation.
Updated sources to compile cleanly with -Wc++-compat:
* basic_blocks.c: Add casts.
* cg_dfn.c: Add cast.
* corefile.c: Add casts.
* gmon_io.c: Add casts.
* hist.c: Add cast.
* source.c: Add cast.
* sym_ids.c (struct match): Moved to top level.
Updated soruces in ld/* to compile cleanly with -Wc++-compat:
* ld.h (enum endian_enum,enum symbolic_enum,enum dynamic_list_enum): Move to top level.
* ldcref.c: Add casts.
* ldctor.c: Add casts.
* ldexp.c
* ldexp.h (enum node_tree_enum,enum phase_enum): Move to top level.
* ldlang.c: Add casts. (lang_insert_orphan): Use enum name instead of integer.
* ldlang.h (enum statement_enum): Move to top level.
* ldmain.c: Add casts.
* ldwrite.c: Add casts.
* lexsup.c: Add casts. (enum control_enum): Move to top level.
* mri.c: Add casts. (mri_draw_tree): Use enum name instead of integer.
Updated sources to compile cleanly with -Wc++-compat:
* basic_blocks.c: Add casts.
* cg_dfn.c: Add cast.
* corefile.c: Add casts.
* gmon_io.c: Add casts.
* hist.c: Add cast.
* source.c: Add cast.
* sym_ids.c (struct match): Moved to top level.
* as.c (main): Call dwarf2_init.
* config/obj-elf.c (struct group_list): New field.
(build_group_lists): Use hash lookup.
(free_section_idx): New function.
(elf_frob_file): Adjust.
* dwarf2dbg.c (all_segs_hash, last_seg_ptr): New variables.
(get_line_subseg): Adjust.
(dwarf2_init): New function.
* dwarf2dbg.h (dwarf2_init): New declaration.
2009-09-11 15:27:38 +00:00
Andreas Krebbel
c8676ae452
2009-09-10 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
...
* s390-dis.c (print_insn_s390): Avoid 'long long'.
2009-09-10 09:04:06 +00:00
Andreas Krebbel
7330f9c3a4
2009-09-10 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
...
* s390-dis.c (s390_extract_operand): Remove the shift for pcrel operands.
(print_insn_s390): Signextend and shift pcrel operands before printing.
2009-09-10 08:47:20 +00:00
H.J. Lu
9daa0d29f5
2009-09-09 H.J. Lu <hongjiu.lu@intel.com>
...
* i386-dis.c (vex_len_table): Change VEX_LEN_AE_R_X_M0 to
VEX_LEN_AE_R_X_M_0 in comments.
2009-09-09 17:25:31 +00:00
DJ Delorie
495c5f871e
* cpu/mep.opc (mep_cgen_insn_supported_asm): Change the test to a
...
preprocessor macro, not an enum.
2009-09-08 23:51:11 +00:00
Andreas Schwab
84c7196942
* z8kgen.c (struct op): Replace unused flavor with id.
...
(opt): Remove extra xorb entry.
(func): Use id field as fallback.
(sub): Return new string, caller changed.
(internal): Allocate end marker. Assign unique id before sorting.
(gas): Likewise. Fix loop end condition.
* z8k-opc.h: Regenerate.
2009-09-08 09:47:52 +00:00
Alan Modra
bdc7fcfe59
* ppc-opc.c (powerpc_macros <extrdi>): Allow n+b of 64.
2009-09-08 09:00:47 +00:00
Alan Modra
815c0482cb
* z8kgen.c (func): Fix thinko last patch.
2009-09-07 13:01:35 +00:00
Alan Modra
eae14d64d1
* z8kgen.c (func): Stabilize qsort of identically named entries.
...
* z8k-opc.h: Regenerate.
2009-09-07 12:11:20 +00:00
Tristan Gingold
23f938f12a
bfd
...
2009-09-07 Tristan Gingold <gingold@adacore.com>
* po/SRC-POTFILES.in: Regenerate.
* po/bfd.pot: Regenerate.
binutils
2009-09-07 Tristan Gingold <gingold@adacore.com>
* po/binutils.pot: Regenerate.
gas
2009-09-07 Tristan Gingold <gingold@adacore.com>
* po/POTFILES.in: Regenerate.
* po/gas.pot: Regenerate.
gprof
2009-09-07 Tristan Gingold <gingold@adacore.com>
* po/gprof.pot: Regenerate.
ld
2009-09-07 Tristan Gingold <gingold@adacore.com>
* po/ld.pot: Regenerate.
opcodes
2009-09-07 Tristan Gingold <gingold@adacore.com>
* po/opcodes.pot: Regenerate.
2009-09-07 11:29:56 +00:00
Alan Modra
2eee559322
* configure.in (BUILD_LIBS, BUILD_LIB_DEPS): Define and subst.
...
* configure: Regenerate.
* Makefile.am (LIBIBERTY, BUILD_LIBIBERTY, BUILD_LIBINTL): Delete.
(BUILD_LIBS, BUILD_LIB_DEPS): Define. Use..
(i386-gen, ia64-gen, z8kgen): ..here.
* Makefile.in: Regenerate.
2009-09-07 10:54:25 +00:00
Tristan Gingold
ae794f602d
2009-09-07 Tristan Gingold <gingold@adacore.com>
...
* z8k-opc.h: Regenerate.
2009-09-07 08:14:09 +00:00
Nick Clifton
96d56e9f91
* bfd/coff-arm.c (coff_arm_relocate_section)
...
(record_thumb_to_arm_glue, bfd_arm_process_before_allocation):
Change member name class to symbol_class.
* bfd/coff-i960.c (coff_i960_relocate_section) Rename variable
class to class_val. Change member name class to symbol_class.
* bfd/coff-rs6000.c (_bfd_xcoff_swap_aux_in)
(_bfd_xcoff_swap_aux_out): Rename arguments class to in_class.
* bfd/coff-stgo32.c (adjust_aux_in_post)
(adjust_aux_out_pre, adjust_aux_out_post): Rename arguments class
to in_class.
* bfd/coff64-rs6000.c (_bfd_xcoff64_swap_aux_in)
(_bfd_xcoff64_swap_aux_out): Rename arguments class to in_class.
* bfd/coffcode.h (coff_pointerize_aux_hook): Rename variable class
to n_sclass.
* bfd/coffgen.c (coff_write_symbol, coff_pointerize_aux): Rename
variables named class to n_sclass. (coff_write_symbols): Rename
variable class to sym_class. (bfd_coff_set_symbol_class): Rename
argument class to symbol_class.
* bfd/cofflink.c (_bfd_coff_link_hash_newfunc)
(coff_link_add_symbols, _bfd_coff_link_input_bfd)
(_bfd_coff_write_global_sym, _bfd_coff_generic_relocate_section):
Update code to use renamed members.
* bfd/coffswap.h (coff_swap_aux_in, coff_swap_aux_out): Rename
argument class to in_class.
* bfd/libcoff-in.h (struct coff_link_hash_entry, struct
coff_debug_merge_type) Renamed members class to symbol_class and
type_class.
* bfd/libcoff.h Regenerated.
* bfd/peXXigen.c: (_bfd_XXi_swap_aux_in, _bfd_XXi_swap_aux_out):
Rename argument class to in_class.
* bfd/pef.c (bfd_pef_parse_imported_symbol): Update code to use
renamed members.
* bfd/pef.h (struct bfd_pef_imported_symbol): Changed name of
member class to symbol_class.
* binutils/ieee.c (ieee_read_cxx_misc, ieee_read_cxx_class)
(ieee_read_reference): Rename variables named class to cxxclass.
* gas/config/tc-arc.c (struct syntax_classes): Rename member class
to s_class. (arc_extinst): Rename variable class to
s_class. Update code to use renamed members.
* gas/config/tc-mips.c (insn_uses_reg): Rename argument class to
regclass.
* gas/config/tc-ppc.c (ppc_csect, ppc_change_csect, ppc_function)
(ppc_tc, ppc_is_toc_sym, ppc_symbol_new_hook, ppc_frob_label)
(ppc_fix_adjustable, md_apply_fix): Update code to use renamed
members.
* gas/config/tc-ppc.h (struct ppc_tc_sy): Change name of member
from class to symbol_class. (OBJ_COPY_SYMBOL_ATTRIBUTES): Update
code to use renamed members.
* gas/config/tc-score.c (s3_adjust_paritybit): Rename argument
class to i_class.
* gas/config/tc-score7.c (s7_adjust_paritybit): Rename argument
class to i_class.
* gprof/corefile.c (core_create_function_syms): Rename variable
class to cxxclass.
* include/coff/ti.h (GET_LNSZ_SIZE, PUT_LNSZ_SIZE): Updated name
of class variable to in_class to match changes in function that
use this macro.
* include/opcode/ia64.h (struct ia64_operand): Renamed member
class to op_class
* ld/emultempl/elf32.em (gld${EMULATION_NAME}_load_symbols)
(gld${EMULATION_NAME}_try_needed): Rename variable class to
link_class
* opcodes/ia64-dis.c (print_insn_ia64): Update code to use renamed
member.
* opcodes/m88k-dis.c (m88kdis): Rename variable class to in_class.
* opcodes/tic80-opc.c (tic80_symbol_to_value)
(tic80_value_to_symbol): Rename argument class to symbol_class.
2009-09-05 07:56:26 +00:00
Jie Zhang
66a6900a09
gas/
...
* config/bfin-parse.y (asm_1): Implement HLT instruction.
Fix comments for DBGA, DBGAH and DBGAL.
* config/tc-bfin.c (bfin_gen_pseudodbg_assert): Change according
to the new encoding of DBGA, DBGAH, and DBGAL.
include/
* opcode/bfin.h (PseudoDbg_Assert): Add bits_grp and mask_grp.
(PseudoDbg_Assert_grp_bits, PseudoDbg_Assert_grp_mask): Define.
(PseudoDbg_Assert_dbgop_bits, PseudoDbg_Assert_dbgop_mask,
PseudoDbg_Assert_dontcare_bits, PseudoDbg_Assert_dontcare_mask):
Adjust accordingly.
(init_PseudoDbg_Assert): Add PseudoDbg_Assert_grp_bits and
PseudoDbg_Assert_grp_mask.
opcodes/
* bfin-dis.c (decode_pseudodbg_assert_0): Change according
to the new encoding of DBGA, DBGAH, and DBGAL.
(_print_insn_bfin): Likewise.
2009-09-04 04:29:42 +00:00
Jie Zhang
ad15c38ee6
gas/
...
* config/bfin-parse.y: Remove trailing whitespace.
(ccstat): Indent.
* config/tc-bfin.c (struct bfin_reg_entry): Remove.
(bfin_reg_info[]): Remove.
opcodes/
* bfin-dis.c (_print_insn_bfin): Don't declare.
(print_insn_bfin): Don't declare.
(dregs_pair): Remove.
(ignore_bits): Remove.
(ccstat): Remove.
2009-09-03 17:42:53 +00:00
Jie Zhang
c958a8a8fb
gas/
...
* config/bfin-defs.h (IS_GENREG): Define.
(IS_DAGREG): Define.
(IS_SYSREG): Define.
* config/bfin-parse.y (asm_1): Check illegal register move
instructions.
gas/testsuite/
* gas/bfin/expected_move_errors.s,
gas/bfin/expected_move_errors.l: Add "LC1 = I0;".
* gas/bfin/move.s, gas/bfin/move.d: Remove "CYCLES = A0.W".
opcodes/
* bfin-dis.c (IS_DREG): Define.
(IS_PREG): Define.
(IS_AREG): Define.
(IS_GENREG): Define.
(IS_DAGREG): Define.
(IS_SYSREG): Define.
(decode_REGMV_0): Check illegal register move instructions.
2009-09-03 16:17:36 +00:00
Dave Korn
3df5879c31
* Makefile.am (BUILD_LIBINTL): New variable.
...
(i386-gen$(EXEEXT_FOR_BUILD)): Use it.
(ia64-gen$(EXEEXT_FOR_BUILD)): And here.
(z8kgen$(EXEEXT_FOR_BUILD)): And here.
* Makefile.in: Regenerate.
2009-09-03 04:47:46 +00:00
Alan Modra
aa820537ea
update copyright dates
2009-09-02 07:25:43 +00:00
DJ Delorie
0531605226
[cgen]
...
* cpu/mep.opc (parse_signed16_range): Mark as potentially unused.
(parse_unsigned16_range): Likewise.
(mep_cgen_insn_supported_asm): Make BSR12 check dependent on VLIW
isa.
[opcodes]
* mep-asm.c: Regenerate.
* mep-desc.c: Regenerate.
* mep-opc.c: Regenerate.
2009-09-02 02:10:36 +00:00
Tristan Gingold
e06ae0d430
2009-09-01 Tristan Gingold <gingold@adacore.com>
...
* makefile.vms: Ported to Itanium VMS. Remove useless targets and
dependencies. Remove unused FORMAT variable.
* configure.com: New file to create build.com DCL script for
Itanium VMS or Alpha VMS.
2009-09-01 13:16:53 +00:00
Nick Clifton
d3ce72d070
Updated sources to avoid using the identifier name "new", which is a
...
keyword in c++.
* bfd/aoutx.h (NAME (aout, make_empty_symbol)): Rename variable
new to new_symbol.
* bfd/coffgen.c (coff_make_empty_symbol)
(coff_bfd_make_debug_symbol): Rename variable new to new_symbol.
* bfd/cpu-ia64-opc.c (ext_reg, ins_imms_scaled): Rename variable
new to new_insn.
* bfd/doc/chew.c (newentry, add_intrinsic): Rename variable new to
new_d.
* bfd/ecoff.c (_bfd_ecoff_make_empty_symbol): Rename variable new
to new_symbol.
* bfd/elf32-m68k.c (elf_m68k_get_got_entry_type): Rename argument
new to new_reloc.
* bfd/hash.c (bfd_hash_lookup): Rename variable new to new_string.
* bfd/ieee.c (ieee_make_empty_symbol): Rename variable new to
new_symbol.
* bfd/linker.c (bfd_new_link_order): Rename variable new to
new_lo.
* bfd/mach-o.c (bfd_mach_o_sizeof_headers): Rename variable new to
symbol.
* bfd/oasys.c (oasys_make_empty_symbol): Rename variable new to
new_symbol_type.
* bfd/pdp11.c (NAME (aout, make_empty_symbol)): Rename variable
new to new_symbol_type.
* bfd/plugin.c (bfd_plugin_make_empty_symbol): Rename variable new
to new_symbol.
* bfd/rs6000-core.c (CoreHdr, VmInfo): Rename union member new to
new_dump.
(read_hdr, rs6000coff_core_p)
(rs6000coff_core_file_matches_executable_p)
(rs6000coff_core_file_failing_command)
(rs6000coff_core_file_failing_signal): Updated function to use new
union member name.
* bfd/som.c (som_make_empty_symbol): Rename variable new to
new_symbol_type.
* bfd/syms.c (_bfd_generic_make_empty_symbol): Rename variable new
to new_symbol.
* bfd/tekhex.c (first_phase, tekhex_make_empty_symbol): Rename
variable new to new_symbol.
* binutils/nlmconv.c (main): Rename variable new to new_name.
* gas/config/tc-arm.c (insert_reg_alias): Rename variable new to
new_reg.
* gas/config/tc-dlx.c (parse_operand): Rename variable new to
new_pos.
* gas/config/tc-ia64.c (ia64_gen_real_reloc_type): Rename variable
new to newr.
* gas/config/tc-mcore.c (parse_exp, parse_imm): Rename variable
new to new_pointer.
* gas/config/tc-microblaze.c (parse_exp, parse_imm, check_got):
Change name from new to new_pointer.
* gas/config/tc-or32.c (parse_operand): Rename variable new to
new_pointer.
* gas/config/tc-pdp11.c (md_assemble): Rename variable new to
new_pointer.
* gas/config/tc-pj.c (alias): Change argument new to new_name.
* gas/config/tc-score.c (s3_build_score_ops_hsh): Rename variable
new to new_opcode. (s3_build_dependency_insn_hsh) Rename variable
new to new_i2n. (s3_convert): Rename variables old and new to
r_old and r_new.
* gas/config/tc-score7.c (s7_build_score_ops_hsh): Rename variable
new to new_opcode. (s7_build_dependency_insn_hsh): Rename variable
new to new_i2d. (s7_b32_relax_to_b16, s7_convert_frag): Rename
variables old and new to r_old and r_new.
* gas/config/tc-sh.c (parse_exp): Rename variable new to
new_pointer.
* gas/config/tc-sh64.c (shmedia_parse_exp): Rename variable new to
new_pointer.
* gas/config/tc-tic4x.c (tic4x_operand_parse): Rename variable new
to new_pointer.
* gas/config/tc-z8k.c (parse_exp): Rename variable new to
new_pointer.
* gas/listing.c (listing_newline): Rename variable new to new_i.
* ld/ldexp.c (exp_intop, exp_bigintop, exp_relop, exp_binop)
(exp_trinop, exp_unop, exp_nameop, exp_assop): Rename variable new
to new_e.
* ld/ldfile.c (ldfile_add_library_path): Rename variable new to
new_dirs. (ldfile_add_arch): Rename variable new to new_arch.
* ld/ldlang.c (new_statement, lang_final, lang_add_wild)
(lang_target, lang_add_fill, lang_add_data, lang_add_assignment)
(lang_add_insert): Rename variable new to new_stmt. (new_afile):
Added missing cast. (lang_memory_region_lookup): Rename variable
new to new_region. (init_os): Rename variable new to
new_userdata. (lang_add_section): Rename variable new to
new_section. (ldlang_add_undef): Rename variable new to
new_undef. (realsymbol): Rename variable new to new_name.
* opcodes/z8kgen.c (internal, gas): Rename variable new to new_op.
Updated sources to avoid using the identifier name "template",
which is a keyword in c++.
* bfd/elf32-arm.c (struct stub_def): Rename member template to
template_sequence. (arm_build_one_stub,
find_stub_size_and_template, arm_size_one_stub, arm_map_one_stub):
Rename variable template to template_sequence.
* bfd/elfxx-ia64.c (elfNN_ia64_relax_br, elfNN_ia64_relax_brl):
Rename variable template to template_val.
* gas/config/tc-arm.c (struct asm_cond, struct asm_psr, struct
asm_barrier_opt): Change member template to
template_name. (md_begin): Update code to reflect new member
names.
* gas/config/tc-i386.c (struct templates, struct _i386_insn)
(match_template, cpu_flags_match, match_reg_size, match_mem_size)
(operand_size_match, md_begin, i386_print_statistics, pi)
(build_vex_prefix, md_assemble, parse_insn, optimize_imm)
(optimize_disp): Updated code to use new names. (parse_insn):
Added casts.
* gas/config/tc-ia64.c (dot_template, emit_one_bundle): Updated
code to use new names.
* gas/config/tc-score.c (struct s3_asm_opcode): Renamed member
template to template_name. (s3_parse_16_32_inst, s3_parse_48_inst,
s3_do_macro_ldst_label, s3_build_score_ops_hsh): Update code to
use new names.
* gas/config/tc-score7.c (struct s7_asm_opcode): Renamed member
template to template_name. (s7_parse_16_32_inst,
s7_do_macro_ldst_label, s7_build_score_ops_hsh): Update code to
use new names.
* gas/config/tc-tic30.c (md_begin, struct tic30_insn)
(md_assemble): Update code to use new names.
* gas/config/tc-tic54x.c (struct _tic54x_insn, md_begin)
(optimize_insn, tic54x_parse_insn, next_line_shows_parallel):
Update code to use new names.
* include/opcode/tic30.h (template): Rename type template to
insn_template. Updated code to use new name.
* include/opcode/tic54x.h (template): Rename type template to
insn_template.
* opcodes/cris-dis.c (bytes_to_skip): Update code to use new name.
* opcodes/i386-dis.c (putop): Update code to use new name.
* opcodes/i386-gen.c (process_i386_opcodes): Update code to use
new name.
* opcodes/i386-opc.h (struct template): Rename struct template to
insn_template. Update code accordingly.
* opcodes/i386-tbl.h (i386_optab): Update type to use new name.
* opcodes/ia64-dis.c (print_insn_ia64): Rename variable template
to template_val.
* opcodes/tic30-dis.c (struct instruction, get_tic30_instruction):
Update code to use new name.
* opcodes/tic54x-dis.c (has_lkaddr, get_insn_size)
(print_parallel_instruction, print_insn_tic54x, tic54x_get_insn):
Update code to use new name.
* opcodes/tic54x-opc.c (tic54x_unknown_opcode, tic54x_optab):
Update type to new name.
2009-08-29 22:11:02 +00:00
H.J. Lu
791f39718a
binutils/
...
2009-08-28 H.J. Lu <hongjiu.lu@intel.com>
* Makefile.am (sysinfo$(EXEEXT_FOR_BUILD)): Replace
CFLAGS/LDFLAGS with CFLAGS_FOR_BUILD/LDFLAGS_FOR_BUILD.
(syslex.o): Likewise.
(sysinfo.o): Likewise.
(bin2c$(EXEEXT_FOR_BUILD)): Likewise.
* Makefile.in: Regenerated.
opcodes/
2009-08-28 H.J. Lu <hongjiu.lu@intel.com>
* Makefile.am (COMPILE_FOR_BUILD): Remove BUILD_CPPFLAGS.
Replace BUILD_CFLAGS with CFLAGS_FOR_BUILD.
(LINK_FOR_BUILD): Replace BUILD_CFLAGS/BUILD_LDFLAGS with
CFLAGS_FOR_BUILD/LDFLAGS_FOR_BUILD.
* Makefile.in: Regenerated.
2009-08-29 00:41:25 +00:00
Ralf Wildenhues
573e8a1cd2
Do not create $(bfdlibdir) and $(bfdincludedir) if !INSTALL_LIBBFD.
...
opcodes/:
* Makefile.am (bfdlibdir, bfdincludedir): Move definition ...
[INSTALL_LIBBFD]: ... here, ...
[INSTALL_LIBBFD]: ... and empty overrides here.
[!INSTALL_LIBBFD]: (rpath_bfdlibdir): New variable.
[!INSTALL_LIBBFD] (libbfd_la_LDFLAGS): Use it.
* Makefile.in: Regenerate.
* configure: Regenerate.
bfd/:
* acinclude.m4 (AM_INSTALL_LIBBFD): Call AM_SUBST_NOTMAKE for
bfdlibdir and bfdincludedir.
* Makefile.am (bfdlibdir, bfdincludedir): Move definition ...
[INSTALL_LIBBFD]: ... here, ...
[INSTALL_LIBBFD]: ... and empty overrides here.
[!INSTALL_LIBBFD]: (rpath_bfdlibdir): New variable.
[!INSTALL_LIBBFD] (libbfd_la_LDFLAGS): Use it.
* Makefile.in: Regenerate.
* configure: Regenerate.
bfd/doc/:
* Makefile.in: Regenerate.
2009-08-27 05:24:43 +00:00
Nick Clifton
f7922329bf
* m68k-dis.c (print_insn_arg): Add movecr register names for
...
coldfire v4e families.
2009-08-26 13:16:29 +00:00
Ralf Wildenhues
ff13a42d5c
Build cleanups in opcodes: cross-compilation and generators.
...
opcodes/:
* Makefile.am (SUBDIRS): Build '.' before 'po'.
(COMPILE_FOR_BUILD, LINK_FOR_BUILD, BUILD_LIBIBERTY)
(MOSTLYCLEANFILES, MAINTAINERCLEANFILES): New variables.
(i386-gen$(EXEEXT_FOR_BUILD)): Renamed from i386-gen, rewrite
using *BUILD variables, depend upon $(BUILD_LIBIBERTY).
(i386-gen.o): New rule.
($(srcdir)/i386-init.h): Adjust.
(i386-opc.lo): Depend on $(srcdir)/i386-tbl.h.
(ia64-gen$(EXEEXT_FOR_BUILD)): Rename from ia64-gen, adjust likewise.
(ia64-gen.o): New rule.
(ia64_asmtab_deps): New variable.
($(srcdir)/ia64-asmtab.c): Use it; adjust likewise.
(ia64-opc.lo): Depend on $(srcdir)/ia64-asmtab.c.
(s390-mkopc$(EXEEXT_FOR_BUILD)): Rename from s390-mkopc, adjust
likewise.
(s390-opc.tab): Adjust.
(z8kgen$(EXEEXT_FOR_BUILD), z8kgen.o, $(srcdir)/z8k-opc.h): New
rules.
(z8k-dis.lo): Depend on $(srcdir)/z8k-opc.h.
* Makefile.in: Regenerate.
* z8kgen.c (gas): Avoid '/*' in comment.
* z8k-opc.h (func): Regenerate.
2009-08-25 03:13:44 +00:00
Ralf Wildenhues
6f01793dbb
More build fixes in opcodes
...
opcodes/:
* Makefile.am (TARGET_LIBOPCODES_CFILES): New variable, taken
from $(CFILES), sorted, with dis-buf.c, dis-init.c, disassemble.c,
i386-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-f.c, ia64-opc-i.c,
ia64-opc-m.c, ia64-opc-d.c, ia64-gen.c, ia64-asmtab.c removed, and
msp430-dis.c added.
(LIBOPCODES_CFILES): New variable, adding to
TARGET_LIBOPCODES_CFILES also non-target library sources.
(CFILES): Factorize based on $(LIBOPCODES_CFILES), adding generator
files.
(ALL_MACHINES): Factorize based on $(TARGET_LIBOPCODES_CFILES).
(EXTRA_libopcodes_la_SOURCES): Use $(LIBOPCODES_CFILES).
* Makefile.in: Regenerate.
* po/POTFILES.in: Regenerate.
2009-08-24 19:05:01 +00:00
Ralf Wildenhues
14ec8efdb1
Cleanups in binutils makefiles.
...
ld/:
* Makefile.am (bin_PROGRAMS): Renamed from ...
(noinst_PROGRAMS): ... this.
(transform): Override, including the renaming of ld-new to ld.
(install-exec-local): Installation of ld in $(bindir) not needed
here any more.
(AM_CPPFLAGS): Renamed from ...
(INCLUDES): ... this.
(MAINTAINERCLEANFILES): Add ld.1.
* Makefile.in: Regenerate.
gold/:
* Makefile.am (AM_CPPFLAGS): Renamed from ...
(INCLUDES): ... this.
* testsuite/Makefile.am (AUTOMAKE_OPTIONS): Add -Wno-portability.
(AM_CPPFLAGS): Renamed from ...
(INCLUDE): ... this.
* Makefile.in, testsuite/Makefile.in: Regenerate.
bfd/:
* Makefile.am (libbfd_la_LDFLAGS): Initialize early, to allow
appending.
[INSTALL_LIBBFD] (bfdlib_LTLIBRARIES, bfdinclude_HEADERS): Set
only in this condition.
[!INSTALL_LIBBFD] (noinst_LTLIBRARIES, libbfd_la_LDFLAGS): New,
to build but not install libbfd.la in this condition.
(install-bfdlibLTLIBRARIES, uninstall-bfdlibLTLIBRARIES)
(install_libbfd, install_libbfd): Remove.
* Makefile.in: Regenerate.
binutils/:
* Makefile.am (AM_CPPFLAGS): Renamed from ...
(INCLUDES): ... this.
(bin2c$(EXEEXT_FOR_BUILD): Adjust rule.
(installcheck-local): Renamed from ...
(installcheck): ... this.
* Makefile.in: Regenerate.
gas/:
* Makefile.am (YFLAGS): Remove, not needed any more.
(AM_CPPFLAGS): Renamed from ...
(INCLUDES): ... this.
* Makefile.in: Regenerate.
gprof/:
* Makefile.am (AM_CPPFLAGS): Renamed from ...
(INCLUDES): ... this.
* Makefile.in: Regenerate.
opcodes/:
* Makefile.am (libopcodes_la_LDFLAGS): Initialize early.
[INSTALL_LIBBFD] (bfdlib_LTLIBRARIES): Set only in this condition.
[INSTALL_LIBBFD] (bfdinclude_DATA): New.
[!INSTALL_LIBBFD] (noinst_LTLIBRARIES): New.
[!INSTALL_LIBBFD] (libopcodes_la_LDFLAGS): Ensure libopcodes.la
is built shared even if it is not to be installed.
(install-bfdlibLTLIBRARIES,uninstall-bfdlibLTLIBRARIES)
(install_libopcodes, uninstall_libopcodes): Remove.
(AM_CPPFLAGS): Renamed from ...
(INCLUDES): ... this.
* Makefile.in: Regenerate.
2009-08-22 19:02:57 +00:00
Ralf Wildenhues
758227f0c5
dependency tracking in opcodes
...
opcodes/:
* Makefile.am (AUTOMAKE_OPTIONS): Remove 1.9 and cygnus, add
1.11, foreign, no-dist.
(MKDEP, m32c_opc_h): Remove variables.
(disassemble.lo): Rewrite using automake-style dependency
tracking rules; only list the dependency upon the primary source
file, but no included headers.
(m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo)
(i386-gen.o, ia64-gen.o): Remove dependency statements.
(EXTRA_libopcodes_la_SOURCES): New variable, list $(CFILES) to
ensure all dependency fragments are included in the Makefile.
(s390-opc.lo): Depend on s390-opc.tab.
(DEP, DEP1, dep.sed, dep, dep-in, dep-am): Remove rules.
(mkdep section): Remove.
* Makefile.in: Regenerate.
* po/POTFILES.in: Regenerate.
2009-08-22 18:44:58 +00:00
Ralf Wildenhues
af542c2e31
Cleanups after the update to Autoconf 2.64, Automake 1.11.
...
/:
* README-maintainer-mode: Point directly to upstream locations
for autoconf, automake, libtool, gettext, instead of copies on
sources.redhat.com. Document required versions.
* configure.ac: Do not substitute datarootdir, htmldir,
pdfdir, docdir. Do not process --with-datarootdir,
--with-htmldir, --with-pdfdir, --with-docdir.
* configure: Regenerate.
gdb/:
* CONTRIBUTE: Bump documented Autoconf version.
* configure.ac: Do not substitute datarootdir, htmldir,
pdfdir, docdir. Do not process --with-datarootdir,
--with-htmldir, --with-pdfdir, --with-docdir.
* configure: Regenerate.
gdb/doc/:
* gdbint.texinfo (Releasing GDB): Point to
README-maintainer-mode file for required autoconf version.
* configure.ac: Do not substitute datarootdir, htmldir,
pdfdir, docdir. Do not process --with-datarootdir,
--with-htmldir, --with-pdfdir, --with-docdir.
* configure: Regenerate.
gprof/:
* Makefile.am (pdf__strip_dir, install-pdf, install-pdf-am)
(install-pdf-recursive, html__strip_dir, install-html)
(install-html-am, install-html-recursive): Remove.
* Makefile.in: Regenerate.
opcodes/:
* Makefile.am (install-pdf, install-html): Remove.
* Makefile.in: Regenerate.
gas/:
* Makefile.am (install-pdf, install-pdf-recursive, install-html)
(install-html-recursive): Remove.
* Makefile.in: Regenerate.
* doc/Makefile.am (pdf__strip_dir, install-pdf, install-pdf-am)
(html__strip_dir, install-html, install-html-am): Remove.
* doc/Makefile.in: Regenerate.
ld/:
* Makefile.am (pdf__strip_dir, install-pdf, install-pdf-am)
(install-pdf-recursive, html__strip_dir, install-html)
(install-html-am, install-html-recursive): Remove.
* Makefile.in: Regenerate.
binutils/:
* Makefile.am (install-pdf, install-pdf-recursive, install-html)
(install-html-recursive): Remove.
* Makefile.in: Regenerate.
* doc/Makefile.am (pdf__strip_dir, install-pdf, install-pdf-am)
(html__strip_dir, install-html, install-html-am): Remove.
* doc/Makefile.in: Regenerate.
bfd/:
* Makefile.am (datarootdir, docdir, htmldor, pdfdir)
(install-pdf, install-pdf-recursive, install-html)
(install-html-recursive): Remove.
* Makefile.in: Regenerate.
bfd/doc/:
* Makefile.am (pdf__strip_dir, install-pdf, install-pdf-am)
(html__strip_dir, install-html, install-html-am): Remove.
* Makefile.in: Regenerate.
2009-08-22 17:08:11 +00:00
Ralf Wildenhues
81ecdfbb4d
Regenerate tree using Autoconf 2.64 and Automake 1.11.
...
config/:
* override.m4 (_GCC_AUTOCONF_VERSION): Bump to 2.64.
/:
* configure: Regenerate.
etc/:
* configure: Regenerate.
sim/common/:
* config.in: Regenerate.
* configure: Likewise.
sim/iq2000/:
* config.in: Regenerate.
* configure: Likewise.
sim/d10v/:
* config.in: Regenerate.
* configure: Likewise.
sim/igen/:
* config.in: Regenerate.
* configure: Likewise.
sim/m32r/:
* config.in: Regenerate.
* configure: Likewise.
sim/frv/:
* config.in: Regenerate.
* configure: Likewise.
sim/:
* avr/config.in: Regenerate.
* avr/configure: Likewise.
* configure: Likewise.
* cris/config.in: Likewise.
* cris/configure: Likewise.
sim/h8300/:
* config.in: Regenerate.
* configure: Likewise.
sim/mn10300/:
* config.in: Regenerate.
* configure: Likewise.
sim/ppc/:
* config.in: Regenerate.
* configure: Likewise.
sim/erc32/:
* config.in: Regenerate.
* configure: Likewise.
sim/arm/:
* config.in: Regenerate.
* configure: Likewise.
sim/m68hc11/:
* config.in: Regenerate.
* configure: Likewise.
sim/lm32/:
* config.in: Regenerate.
* configure: Likewise.
sim/sh64/:
* config.in: Regenerate.
* configure: Likewise.
sim/v850/:
* config.in: Regenerate.
* configure: Likewise.
sim/cr16/:
* config.in: Regenerate.
* configure: Likewise.
sim/moxie/:
* config.in: Regenerate.
* configure: Likewise.
sim/m32c/:
* config.in: Regenerate.
* configure: Likewise.
sim/mips/:
* config.in: Regenerate.
* configure: Likewise.
sim/mcore/:
* config.in: Regenerate.
* configure: Likewise.
sim/testsuite/d10v-elf/:
* configure: Regenerate.
sim/testsuite/:
* configure: Regenerate.
sim/testsuite/frv-elf/:
* configure: Regenerate.
sim/testsuite/m32r-elf/:
* configure: Regenerate.
sim/testsuite/mips64el-elf/:
* configure: Regenerate.
sim/sh/:
* config.in: Regenerate.
* configure: Likewise.
gold/:
* Makefile.in: Regenerate.
* aclocal.m4: Likewise.
* config.in: Likewise.
* configure: Likewise.
* testsuite/Makefile.in: Likewise.
gprof/:
* Makefile.in: Regenerate.
* aclocal.m4: Likewise.
* configure: Likewise.
* gconfig.in: Likewise.
opcodes/:
* Makefile.in: Regenerate.
* aclocal.m4: Likewise.
* config.in: Likewise.
* configure: Likewise.
gas/:
* Makefile.in: Regenerate.
* aclocal.m4: Likewise.
* config.in: Likewise.
* configure: Likewise.
* doc/Makefile.in: Likewise.
ld/:
* Makefile.in: Regenerate.
* aclocal.m4: Likewise.
* config.in: Likewise.
* configure: Likewise.
gdb/:
* aclocal.m4: Regenerate.
* config.in: Likewise.
* configure: Likewise.
* gnulib/Makefile.in: Likewise.
gdb/doc/:
* configure: Regenerate.
gdb/gdbserver/:
* aclocal.m4: Regenerate.
* config.in: Likewise.
* configure: Likewise.
gdb/testsuite/:
* configure: Regenerate.
* gdb.hp/configure: Likewise.
* gdb.hp/gdb.aCC/configure: Likewise.
* gdb.hp/gdb.base-hp/configure: Likewise.
* gdb.hp/gdb.compat/configure: Likewise.
* gdb.hp/gdb.defects/configure: Likewise.
* gdb.hp/gdb.objdbg/configure: Likewise.
* gdb.stabs/configure: Likewise.
binutils/:
* Makefile.in: Regenerate.
* aclocal.m4: Likewise.
* config.in: Likewise.
* configure: Likewise.
* doc/Makefile.in: Likewise.
bfd/:
* Makefile.in: Regenerate.
* aclocal.m4: Likewise.
* config.in: Likewise.
* configure: Likewise.
bfd/doc/:
* Makefile.in: Regenerate.
readline/:
* configure: Regenerate.
readline/examples/rlfe/:
* configure: Regenerate.
2009-08-22 16:56:56 +00:00
Nick Clifton
7ba29e2a41
Add support for Xilinx MicroBlaze processor.
...
* bfd/Makefile.am: Add cpu-microblaze.{lo,c}, elf32-microblaze.{lo,c}.
* bfd/Makefile.in: Same.
* bfd/archures.c: Add bfd_arch_microblaze.
* bfd/bfd-in2.h: Regenerate.
* bfd/config.bfd: Add microblaze target.
* bfd/configure: Add bfd_elf32_microblaze_vec target.
* bfd/configure.in: Same.
* bfd/cpu-microblaze.c: New.
* bfd/elf32-microblaze.c: New.
* bfd/libbfd-in.h: Add prototype _bfd_dwarf2_fixup_section_debug_loc().
* bfd/libbfd.h: Regenerate.
* bfd/reloc.c: Add MICROBLAZE relocations.
* bfd/section.c: Add struct relax_table and relax_count to section.
* bfd/targets.c: Add bfd_elf32_microblaze_vec.
* binutils/MAINTAINERS: Add self as maintainer.
* binutils/readelf.c: Include elf/microblaze.h, add EM_MICROBLAZE &
EM_MICROBLAZE_OLD to guess_is_rela(), dump_relocations(),
get_machine_name().
* config.sub: Add microblaze target.
* configure: Same.
* configure.ac: Same.
* gas/Makefile.am: add microblaze to CPU_TYPES, config/tc-microblaze.c to
TARGET_CPU_CFILES, config/tc-microblaze.h to TARGET_CPU_HFILES, add
DEP_microblaze_elf target.
* gas/Makefile.in: Same.
* gas/config/tc-microblaze.c: Add MicroBlaze assembler.
* gas/config/tc-microblaze.h: Add header for tc-microblaze.c.
* gas/configure: Add microblaze target.
* gas/configure.in: Same.
* gas/configure.tgt: Same.
* gas/doc/Makefile.am: Add c-microblaze.texi to CPU_DOCS.
* gas/doc/Makefile.in: Same.
* gas/doc/all.texi: Set MICROBLAZE.
* gas/doc/as.texinfo: Add MicroBlaze doc links.
* gas/doc/c-microblaze.texi: New MicroBlaze docs.
* include/dis-asm.h: Decl print_insn_microblaze().
* include/elf/common.h: Define EM_MICROBLAZE & EM_MICROBLAZE_OLD.
* include/elf/microblaze.h: New reloc definitions.
* ld/Makefile.am: Add eelf32mb_linux.o, eelf32microblaze.o to
ALL_EMULATIONS, targets.
* ld/Makefile.in: Same.
* ld/configure.tgt: Add microblaze*-linux*, microblaze* targets.
* ld/emulparams/elf32mb_linux.sh: New.
* ld/emulparams/elf32microblaze.sh. New.
* ld/scripttempl/elfmicroblaze.sc: New.
* opcodes/Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to
CFILES, microblaze-dis.lo to ALL_MACHINES, targets.
* opcodes/Makefile.in: Same.
* opcodes/configure: Add bfd_microblaze_arch target.
* opcodes/configure.in: Same.
* opcodes/disassemble.c: Define ARCH_microblaze, return
print_insn_microblaze().
* opcodes/microblaze-dis.c: New MicroBlaze disassembler.
* opcodes/microblaze-opc.h: New MicroBlaze opcode definitions.
* opcodes/microblaze-opcm.h: New MicroBlaze opcode types.
2009-08-06 17:38:04 +00:00
H.J. Lu
8a9036a406
bfd/
...
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* archures.c (bfd_architecture): Add bfd_arch_l1om.
(bfd_l1om_arch): New.
(bfd_archures_list): Add &bfd_l1om_arch.
* bfd-in2.h: Regenerated.
* config.bfd (targ64_selvecs): Add bfd_elf64_l1om_vec if
bfd_elf64_x86_64_vec is supported. Add bfd_elf64_l1om_freebsd_vec
if bfd_elf64_x86_64_freebsd_vec is supported.
(targ_selvecs): Likewise.
* configure.in: Support bfd_elf64_l1om_vec and
bfd_elf64_l1om_freebsd_vec.
* configure: Regenerated.
* cpu-l1om.c: New.
* elf64-x86-64.c (elf64_l1om_elf_object_p): New.
(bfd_elf64_l1om_vec): Likewise.
(bfd_elf64_l1om_freebsd_vec): Likewise.
* Makefile.am (ALL_MACHINES): Add cpu-l1om.lo.
(ALL_MACHINES_CFILES): Add cpu-l1om.c.
* Makefile.in: Regenerated.
* targets.c (bfd_elf64_l1om_vec): New.
(bfd_elf64_l1om_freebsd_vec): Likewise.
(_bfd_target_vector): Add bfd_elf64_l1om_vec and
bfd_elf64_l1om_freebsd_vec.
binutils/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* readelf.c (guess_is_rela): Handle EM_L1OM.
(dump_relocations): Likewise.
(get_machine_name): Likewise.
(get_section_type_name): Likewise.
(get_elf_section_flags): Likewise.
(get_symbol_index_type): Likewise.
(is_32bit_abs_reloc): Likewise.
(is_32bit_pcrel_reloc): Likewise.
(is_64bit_abs_reloc): Likewise.
(is_64bit_pcrel_reloc): Likewise.
(is_none_reloc): Likewise.
gas/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (cpu_arch): Add l1om.
(check_cpu_arch_compatible): New.
(set_cpu_arch): Use it.
(i386_arch): New.
(i386_mach): Return bfd_mach_l1om for Intel L1OM.
(md_show_usage): Display l1om.
(i386_target_format): Return ELF_TARGET_L1OM_FORMAT if
cpu_arch_isa_flags.bitfield.cpul1om is set.
* config/tc-i386.h (TARGET_ARCH): Use (i386_arch ()).
(i386_arch): New.
(ELF_TARGET_L1OM_FORMAT): Likewise.
* doc/c-i386.texi: Document l1om.
gas/testsuite/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/l1om.d: New.
* gas/i386/l1om-inval.l: Likewise.
* gas/i386/l1om-inval.s: Likewise.
* gas/i386/i386.exp: Run l1om-inval and l1om.
include/elf/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* common.h (EM_L1OM): New.
ld/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* configure.tgt (targ64_extra_emuls): Add elf_l1om if elf_x86_64
is supported. Add elf_l1om_fbsd if elf_x86_64_fbsd is supported.
(targ_extra_emuls): Likewise.
* Makefile.am (ALL_64_EMULATIONS): Add eelf_l1om.o and
eelf_l1om_fbsd.o
(eelf_l1om.c): New.
(eelf_l1om_fbsd.c): Likewise.
* Makefile.in: Regenerated.
* emulparams/elf_l1om.sh: New.
* emulparams/elf_l1om_fbsd.sh: Likewise.
ld/testsuite/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* ld-x86-64/abs-l1om.d: New.
* ld-x86-64/protected2-l1om.d: Likewise.
* ld-x86-64/protected3-l1om.d: Likewise.
* ld-x86-64/x86-64.exp: Run abs-l1om, protected2-l1om and
protected3-l1om.
opcodes/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* configure.in: Handle bfd_l1om_arch.
* disassemble.c (disassembler): Likewise.
* configure: Regenerated.
* i386-dis.c (print_insn): Handle bfd_mach_l1om and
bfd_mach_l1om_intel_syntax. Use 8 bytes per line for Intel L1OM.
* i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~CpuL1OM.
Add CPU_L1OM_FLAGS.
(cpu_flags): Add CpuL1OM.
(set_bitfield): Take an argument to set the value field.
(process_i386_cpu_flag): Support ~CpuXXX and ~(CpuXXX|CpuYYY).
(process_i386_opcode_modifier): Updated.
(process_i386_operand_type): Likewise.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
* i386-opc.h (CpuL1OM): New.
(CpuXsave): Updated.
(i386_cpu_flags): Add cpul1om.
2009-07-25 14:58:58 +00:00
Jan Beulich
309d33736f
gas/
...
2009-07-24 Jan Beulich <jbeulich@novell.com>
* tc-i386.c (cpu_arch): Add .8087, .287, .387, .no87, .nommx,
.nosse, and .noavx.
(cpu_flags_and_not): New.
(set_cpu_arch): Check whether sub-architecture specified is a
feature disable.
(md_parse_option): Likewise.
(parse_real_register): Don't return floating point register
when x87 functionality is disabled.
(md_show_usage): Add new sub-options.
* doc/c-i386.texi: Update with new command line sub-options.
gas/testsuite/
2009-07-24 Jan Beulich <jbeulich@novell.com>
* gas/i386/8087.[ds]: New.
* gas/i386/287.[ds]: New.
* gas/i386/387.[ds]: New.
* gas/i386/no87.[ls]: New.
* gas/i386/no87-2.[ls]: New.
* gas/i386/i386.exp: Run new tests.
* gas/i386/att-regs.s: Also check FPU register access.
* gas/i386/intel-regs.s: Likewise.
* gas/i386/att-regs.d: Adjust expectations.
* gas/i386/intel-regs.d: Likewise.
opcodes/
2009-07-24 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (fgrps): Correct annotation for feni/fdisi. Add
frstpm.
* i386-gen.c (cpu_flag_init): Add FP enabling flags where needed.
(cpu_flags): Add Cpu8087, Cpu287, Cpu387, Cpu687, and CpuFISTTP.
(set_bitfield): Expand CpuFP to Cpu8087|Cpu287|Cpu387.
* i386-opc.h (Cpu8087, Cpu287, Cpu387, Cpu687, CpuFISTTP):
Define.
(union i386_cpu_flags): Add cpu8087, cpu287, cpu387, cpu687,
and cpufisttp.
* i386-opc.tbl: Qualify floating point instructions by their
respective CpuXXX flag. Fix fucom{,p,pp}, fprem1, fsin, fcos,
and fsincos to be avilable only on 387. Fix fstsw ax to be
available only on 287+. Add f{,n}eni, f{,n}disi, f{,n}setpm,
and frstpm.
* i386-init.h, i386-tbl.h: Regenerate.
2009-07-24 15:41:20 +00:00
Nick Clifton
7769efb28e
PR 10288
...
* arm-dis.c (arm_opcodes): Catch non-zero bits 8-11 in register
offset or indexed based addressing mode 3.
2009-07-20 12:11:18 +00:00
Nick Clifton
74bdfecf08
PR 10288
...
* arm-dis.c (arm_opcodes): Catch illegal Addressing Mode 1
patterns.
(arm_decode_shift): Catch illegal register based shifts.
(print_insn_arm): Properly handle negative register r0
post-indexed addressing.
2009-07-14 14:16:34 +00:00
Doug Kwan
d1aaab3c71
2009-07-10 Doug Kwan <dougkwan@google.com>
...
* arm-disc.c (print_insn_coprocessor, print_insn_arm): Print only
lower 32 bits of long types to make hexadecimal output consistent
on both 32-bit and 64-bit hosts.
2009-07-10 16:58:54 +00:00
Alan Modra
87337981d9
Regenerate.
2009-07-10 14:20:41 +00:00
Nick Clifton
1103f72c0f
gas/
...
* config/tc-arm.c (insns): Fix encoding for torvsc.
gas/testsuite/
* gas/arm/iwmmxt2.d: Fix insn pattern for torvsc,
add patterns for waddsubhx.
* gas/arm/iwmmxt2.s: Add tests for waddsubhx.
opcodes/
* arm-dis.c (coprocessor_opcodes): Fix mask for waddbhus.
2009-07-07 16:15:32 +00:00
Nick Clifton
78c66db84c
PR 10288
...
* arm-dis.c (arm_opcodes): Be more strict about decoding scaled
addressing modes.
2009-07-07 14:46:14 +00:00
DJ Delorie
22102fb0d9
[cgen]
...
* cpu/mep-core.cpu (fsft, ssarb): Mark as VOLATILE.
* cpu/mep-ivc2.cpu (many): Add VOLATILE to more insns that make
unspecified accesses to control registers.
[sid/component/cgen-cpu/mep]
* mep-cop1-16-decode.cxx: Regenerate.
* mep-cop1-16-decode.h: Regenerate.
* mep-cop1-16-defs.h: Regenerate.
* mep-cop1-16-model.cxx: Regenerate.
* mep-cop1-16-model.h: Regenerate.
* mep-cop1-16-sem.cxx: Regenerate.
* mep-cop1-32-decode.cxx: Regenerate.
* mep-cop1-32-decode.h: Regenerate.
* mep-cop1-32-defs.h: Regenerate.
* mep-cop1-32-model.cxx: Regenerate.
* mep-cop1-32-model.h: Regenerate.
* mep-cop1-32-sem.cxx: Regenerate.
* mep-cop1-48-decode.cxx: Regenerate.
* mep-cop1-48-decode.h: Regenerate.
* mep-cop1-48-defs.h: Regenerate.
* mep-cop1-48-model.cxx: Regenerate.
* mep-cop1-48-model.h: Regenerate.
* mep-cop1-48-sem.cxx: Regenerate.
* mep-cop1-64-decode.cxx: Regenerate.
* mep-cop1-64-decode.h: Regenerate.
* mep-cop1-64-defs.h: Regenerate.
* mep-cop1-64-model.cxx: Regenerate.
* mep-cop1-64-model.h: Regenerate.
* mep-cop1-64-sem.cxx: Regenerate.
* mep-core1-decode.cxx: Regenerate.
* mep-core1-decode.h: Regenerate.
* mep-core1-defs.h: Regenerate.
* mep-core1-model.cxx: Regenerate.
* mep-core1-model.h: Regenerate.
* mep-core1-sem.cxx: Regenerate.
* mep-cpu.h: Regenerate.
* mep-decode.cxx: Regenerate.
* mep-decode.h: Regenerate.
* mep-defs.h: Regenerate.
* mep-desc.h: Regenerate.
* mep-model.cxx: Regenerate.
* mep-model.h: Regenerate.
* mep-sem.cxx: Regenerate.
[opcodes]
* mep-desc.c: Regenerate.
* mep-desc.h: Regenerate.
* mep-opc.c: Regenerate.
* mep-opc.h: Regenerate.
2009-07-07 01:56:05 +00:00
Dwarakanath Rajagopal
922d8de8c1
<gas changes>
...
2009-07-06 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
* config/tc-i386.c (cpu_arch): Add .fma4 and CPU_FMA4_FLAGS.
(build_modrm_byte): Add support to handle FMA4 instructions.
(md_show_usage): Add fma4.
<gas/testsuite changes>
2009-07-06 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
* gas/i386/i386.exp: Add FMA4 tests.
* gas/i386/x86-64-fma4.d: Ditto.
* gas/i386/fma4.d: Ditto.
* gas/i386/x86-64-fma4.s: Ditto.
* gas/i386/fma4.s: Ditto.
<opcodes changes>
2009-07-06 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
* i386-opc.h (CpuFMA4): Add CpuFMA4.
(i386_cpu_flags): New.
* i386-gen.c: Add CPU_FMA4_FLAGS.
* i386-opc.tbl: Add FMA4 instructions.
* i386-tbl.h: Regenerate.
* i386-init.h: Regenerate.
* i386-dis.c (OP_VEX_FMA): New. Handle FMA4.
(OP_XMM_VexW): Ditto.
(OP_EX_VexW): Ditto.
(VEXI4_Fixup): Ditto.
(VexI4, VexFMA, Vex128FMA, EXVexW, EXdVexW, XMVexW): New Macros.
(PREFIX_VEX_3A5C, PREFIX_VEX_3A5D, PREFIX_VEX_3A5E): New.
(PREFIX_VEX_3A5F, PREFIX_VEX_3A60): New.
(PREFIX_VEX_3A68, PREFIX_VEX_3A69, PREFIX_VEX_3A6A): New.
(PREFIX_VEX_3A6B, PREFIX_VEX_3A6C, PREFIX_VEX_3A6D): New.
(PREFIX_VEX_3A6E, PREFIX_VEX_3A6F, PREFIX_VEX_3A7A): New.
(PREFIX_VEX_3A7B, PREFIX_VEX_3A7C, PREFIX_VEX_3A7D): New.
(PREFIX_VEX_3A7E, PREFIX_VEX_3A7F): New.
(VEX_LEN_3A6A_P_2,VEX_LEN_3A6B_P_2, VEX_LEN_3A6E_P_2): New.
(VEX_LEN_3A6F_P_2,VEX_LEN_3A7A_P_2, VEX_LEN_3A7B_P_2): New.
(VEX_LEN_3A7E_P_2,VEX_LEN_3A7F_P_2): New.
(get_vex_imm8): New. handle FMA4.
(OP_EX_VexReg): Ditto.
2009-07-06 19:34:30 +00:00
Nick Clifton
fe56b6cece
PR 10288
...
* arm-dis.c (coprocessor): Print the LDC and STC versions of the
LFM and SFM instructions as comments,.
Improve consistency of formatting for instructions displayed as
comments and decimal values displayed with their hexadecimal
equivalents.
Formatting tidy ups.
Updated expected disassembler regexps.
2009-06-30 11:57:05 +00:00
Nick Clifton
05413229fd
PR 10288
...
* arm-dis.c (enum opcode_sentinels): New: Used to mark the
boundary between variaant and generic coprocessor instuctions.
(coprocessor): Use it.
Fix architecture version of MCRR and MRRC instructions.
(arm_opcdes): Fix patterns for STRB and STRH instructions.
(print_insn_coprocessor): Check architecture and extension masks.
Print a hexadecimal version of any decimal constant that is
outside of the range of -16 to +32.
(print_arm_address): Add a return value of the offset used in the
adress, if it is worth printing a hexadecimal version of it.
(print_insn_neon): Print a hexadecimal version of any decimal
constant that is outside of the range of -16 to +32.
(print_insn_arm): Likewise.
(print_insn_thumb16): Likewise.
(print_insn_thumb32): Likewise.
PR 10297
* arm-dis.c (UNDEFINED_INSTRUCTION): New macro for a description
of an undefined instruction.
(arm_opcodes): Use it.
(thumb_opcod): Use it.
(thumb32_opc): Use it.
Update expected disassembly regrexps in GAS and LD testsuites.
2009-06-29 08:08:15 +00:00
DJ Delorie
dab97f2471
[cgen]
...
* intrinsics.scm: Updates to support IVC2.
(belongs-to-group?): Check IVC2 slots.
(-slots-attribute): New.
(targets::attributes): Add SLOTS.
(target:add-well-known-intrinsics): Add CPMOV.
(md-insn): Add CPTYPE and CRET?.
(add-md-insn): Likewise.
(add-intrinsic-for-isa): Disable the duplicate tests, as IVC2 has
duplicate insns with different bit patterns.
(write-cgen-insn?): Add cret? support.
(intrinsics.h): Add vector types.
(runtime-op): Add vector support.
(intrinsic-protos.h): Let GCC define its types. Add cret? support.
* cpu/mep-core.cpu: Add CPTYPE and CRET attributes.
* cpu/mep-ivc2.cpu: Update all insns to include type information.
(h-cr-ivc2): Default to typeless.
(h-ccr-ivc2): Fix register width.
(SLOTS): Fix values and default.
(ivc2_*): Add control register names.
(crop, crqp, crpp, croc, crqc, crpc): Default to typeless.
[opcodes]
* mep-desc.c: Regenerate.
* mep-desc.h: Regenerate.
* mep-dis.c: Regenerate.
* mep-ibld.c: Regenerate.
* mep-opc.c: Regenerate.
[sid/component/cgen-cpu/mep]
* ivc2-cop.cxx (ivc2_cphadd_w): Change to return value.
(ivc2_cpsubaca0u_b): Remove debug line.
* ivc2-cpu.h (ivc2_cpccadd_b): Change to return value.
* mep-cop1-16-decode.cxx: Regenerate.
* mep-cop1-16-sem.cxx: Regenerate.
* mep-cop1-32-decode.cxx: Regenerate.
* mep-cop1-32-sem.cxx: Regenerate.
* mep-cop1-48-decode.cxx: Regenerate.
* mep-cop1-48-sem.cxx: Regenerate.
* mep-cop1-64-decode.cxx: Regenerate.
* mep-cop1-64-sem.cxx: Regenerate.
* mep-core1-decode.cxx: Regenerate.
* mep-cpu.h: Regenerate.
* mep-decode.cxx: Regenerate.
* mep-desc.h: Regenerate.
2009-06-24 03:06:42 +00:00
DJ Delorie
378a0c07ca
[cgen]
...
* cpu/mep.opc (mep_cgen_insn_supported_asm): New, skip the short
version of BSR when assembling VLIW bundles. Use it in mep-asm.c
[opcodes]
* mep-asm.c: Regenerate.
* mep-opc.c: Regenerate.
* mep-opc.h: Regenerate.
2009-06-24 01:44:53 +00:00
Nick Clifton
aece7d2e74
* po/fi.po: Updated Finish translation.
2009-06-22 11:32:21 +00:00
Alan Modra
1998a8e033
cpu/
...
* m32c.opc (parse_lab_5_3): Use correct enum.
opcodes/
* m32c-asm.c: Regenerate.
2009-06-22 00:53:25 +00:00
Alan Modra
b33bafa0d7
* score-dis.c (print_insn_score48, print_insn_score32): Move default
...
case label to proper lexical block.
* score7-dis.c (print_insn_score32): Likewise.
2009-06-22 00:01:57 +00:00
Martin Schwidefsky
ce21feb4ba
* s390-opc.c (INSTR_RR_0R_OPT, INSTR_RX_0RRD_OPT, MASK_RR_0R_OPT,
...
MASK_RX_0RRD_OPT): New instruction formats with optional arguments.
* s390-opc.txt (nopr, nop): Use new instruction format.
2009-06-19 10:55:42 +00:00
Nick Clifton
0313a2b8d2
PR 10288
...
* arm-dis.c (print_insn_coprocessor): Check that a user specified
ARM architecture supports the matched instruction.
(print_insn_arm): Likewise.
(select_arm_features): New function. Fills in the fields of an
arm_feature_set structure based on a given arm machine number.
(print_insn): Initialise an arm_feature_set structure.
* objdump.c (disassemble_bytes): Set the
USER_SPECIFIED_MACHINE_TYPE flag in the disassemble_info structure
if the user has invoked the -m switch.
* doc/binutils.texi: Document the additional behaviour of
objdump's -m switch for ARM targets.
* dis-asm.h (USER_SPECIFIED_MACHINE_TYPE): New value for the flags
field of struct disassemble_info.
* gas/arm/align.s: Add labels so that COFF based targets can
correctly locate THUMB code.
* gas/arm/copro.d: Do not pass --architecture switch to objdump.
2009-06-18 10:31:21 +00:00
Maciej W. Rozycki
6db7e006e4
bfd/
...
* elf32-vax.c (elf_vax_plt_sym_val): New function.
(elf_backend_plt_sym_val): Define.
opcodes/
* vax-dis.c (is_function_entry): Return success for synthetic
symbols too.
(is_plt_tail): New function.
(print_insn_vax): Decode PLT entry offset longword.
2009-06-16 02:23:09 +00:00
Nick Clifton
fe2ceba101
PR 10186
...
* arm-dis.c (thumb32_opcodes): Fix binary value of SEV.W
instruction.
* gas/arm/thumb32.d: Fix expected binary value of SEV.W instruction.
* config/tc-arm.c (T16_32_TAB): Fix binary value of SEV.W
instruction.
2009-06-15 15:42:36 +00:00
Nick Clifton
522fe56177
PR 10173
...
* cr16-dis.c (print_arg): Avoid printing the 0x prefix twice.
2009-06-15 15:24:52 +00:00
Nick Clifton
1316c8b37f
PR 10263
...
* arm-dis.c (print_insn): Ignore is_data if the user has requested
the disassembly of data as well as instructions.
* objdump.c (disassemble_bytes): Set the DISASSEMBLE_DATA bit in
the flags field of the disassemble_info structure if the -D switch
is in operation.
* dis-asm.h (struct disassemble_info): New value for the flags
field.
2009-06-15 11:37:26 +00:00
Doug Evans
f6475b4872
* cgen.sh: Handle multiple simultaneous runs for parallel makes.
2009-06-14 16:36:56 +00:00
Anthony Green
f865a31d1e
Add PC-relative branch instructions to moxie port.
2009-06-11 11:27:58 +00:00
Anthony Green
0e7c7f11f4
Print moxie addresses nicely.
2009-06-06 13:02:21 +00:00
Alan Modra
67a648f17a
* dep-in.sed: Don't use \n in replacement part of s command.
...
* Makefile.am (DEP1): LC_ALL for uniq.
* Makefile.in: Regenerate.
2009-06-04 06:57:56 +00:00
Nick Clifton
06c582ac9d
* po/nl.po: Updated Dutch translation.
2009-06-02 16:31:59 +00:00
Tristan Gingold
3164099e4f
2009-05-29 Tristan Gingold <gingold@adacore.com>
...
* ia64-gen.c (parse_resource_users, print_dependency_table,
add_dis_table_ent, finish_distable, insert_bit_table_ent,
add_dis_entry, compact_distree, gen_dis_table, completer_entries_eq,
get_prefix_len, compute_completer_bits, insert_opcode_dependencies,
insert_completer_entry, print_completer_entry, print_completer_table,
opcodes_eq, add_opcode_entry, shrink): Use ISO C syntax for functions.
2009-06-02 07:48:05 +00:00
DJ Delorie
d285268e48
[cgen]
...
* cpu/mep.opc (parse_signed16_range): New.
(parse_unsigned16_range): New.
* cpu/mep-ivc2.cpu (imm16p0, simm16p0): Use them.
[opcodes]
* mep-asm.c: Regenerate.
* mep-desc.c: Regenerate.
2009-05-28 22:53:08 +00:00
DJ Delorie
2f3565a392
[cgen/cpu]
...
* cpu/mep-ivc2.cpu (h-ccr-ivc2): Enable for C3 slots, fix
accumulator names.
(f-ivc2-ccrn-c3hi): New.
(f-ivc2-ccrn-c3lo): New.
(f-ivc2-ccrn-c3): New.
(ivc2c3ccrn): Use it.
[sid/component/cgen-cpu/mep]
* mep-cop1-32-decode.cxx: Regenerate.
* mep-cop1-32-decode.h: Regenerate.
* mep-cop1-32-sem.cxx: Regenerate.
* mep-cop1-48-sem.cxx: Regenerate.
[opcodes]
* mep-asm.c: Regenerate.
* mep-desc.c: Regenerate.
* mep-desc.h: Regenerate.
* mep-dis.c: Regenerate.
* mep-ibld.c: Regenerate.
* mep-opc.c: Regenerate.
* mep-opc.h: Regenerate.
2009-05-27 01:49:46 +00:00
Nick Clifton
f12e7348b2
Update Indonesian translations.
...
Update translation templates.
2009-05-26 16:49:41 +00:00
Alan Modra
9e097a72c9
* dep-in.sed: Don't modify .o to .lo here. Output one filename
...
per line with all lines having continuation backslash. Prefix
first line with "A", following lines with "B".
* Makefile.am (DEP): Don't use dep.sed here.
(DEP1): Run $MKDEP on single files, modify .o to .lo here. Use
dep.sed here on dependencies, sort and uniq.
* Makefile.in: Regenerate.
2009-05-26 03:19:28 +00:00
Tristan Gingold
4f8318f890
2009-05-25 Tristan Gingold <gingold@adacore.com>
...
* makefile.vms (OPT): New variable.
(CFLAGS): Update compilation flags.
2009-05-25 12:43:48 +00:00
DJ Delorie
1d74713bc6
[cgen]
...
* cpu/mep.opc (mep_examine_ivc2_insns): Fix bug in ivc2 decoder.
(mep_config_map): Regenerate.
* cpu/mep-ivc2.cpu (h-ccr-ivc2): Add generic names as well as
ivc2-specific names.
(simm8p20): New.
(cmovc): move to after field definitions, use ivc2-specific
register names.
(cpmovi_b_P0S_P1): New.
[utils/mep]
* mepcfgtool.c (do_cgen_config_opc): Propagate endianness and VLIW
size to default configuration.
[sid/component/cgen-cpu/mep]
* mep-cop1-16-decode.cxx: Regenerate.
* mep-cop1-16-decode.h: Regenerate.
* mep-cop1-16-model.cxx: Regenerate.
* mep-cop1-16-model.h: Regenerate.
* mep-cop1-16-sem.cxx: Regenerate.
* mep-cop1-64-decode.cxx: Regenerate.
* mep-cop1-64-decode.h: Regenerate.
* mep-cop1-64-model.cxx: Regenerate.
* mep-cop1-64-model.h: Regenerate.
* mep-cop1-64-sem.cxx: Regenerate.
[opcodes]
* mep-asm.c: Regenerate.
* mep-desc.c: Regenerate.
* mep-desc.h: Regenerate.
* mep-dis.c: Regenerate.
* mep-ibld.c: Regenerate.
* mep-opc.c: Regenerate.
* mep-opc.h: Regenerate.
2009-05-22 17:37:45 +00:00
Dwarakanath Rajagopal
c1e679ec0a
<gas changes>
...
2009-05-22 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
* config/tc-i386.c (process_drex): Delete. Remove SSE5 support.
(build_modrm_byte): Remove DREX handling support.
(DREX_*): Delete.
(drex_byte): Delete.
(md_assemble): Remove DREX handling support.
(process_operands): Remove DREX, SSE5 support.
(i386_insn): Remove DREX.
<gas/testsuite changes>
2009-05-22 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
* gas/i386/i386.exp: Remove SSE5 tests.
* gas/i386/x86-64-sse5.s: Delete. Remove SSE5 tests.
* gas/i386/x86-64-sse5.d: Ditto.
* gas/i386/arch-10-1.l: Remove SSE5 tests.
* gas/i386/arch-10-2.l: Ditto.
* gas/i386/arch-10-3.l: Ditto.
* gas/i386/arch-10-4.l: Ditto.
* gas/i386/arch-10.d: Ditto.
* gas/i386/arch-10.s: Ditto.
* gas/i386/arch-4.s: Delete. Remove SSE5 tests.
* gas/i386/arch-4.d: Ditto.
* gas/i386/arch-8.s: Ditto.
* gas/i386/arch-8.d: Ditto.
* gas/i386/arch-2.s: Remove SSE5 tests.
* gas/i386/arch-2.d: Remove SSE5 tests.
* gas/i386/x86-64-arch-2.s: Ditto.
<opcodes changes>
2009-05-22 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
* i386-opc.h (Cpusse5): Delete.
(i386_cpu_flags): Delete.
* i386-gen.c: Remove CpuSSE5, Drex, Drexv and Drexc.
* i386-opc.tbl: Remove SSE5 instructions.
* i386-tbl.h: Regenerate.
* i386-init.h: Regenerate.
* i386-dis.c (OP_E_memeory, OP_E_extended): Remove drex handling.
(print_drex_arg): Delete.
(OP_DREX4): Delete.
(OP_DREX3): Delete.
(OP_DREX_ICMP): Delete.
(OP_DREX_FCMP): Delete.
(DREX_*): Delete.
(THREE_BYTE_0F24, THREE_BYTE_0F25, THREE_BYTE_0f7B): Delete.
2009-05-22 15:57:25 +00:00
Alan Modra
2b3decb5e1
Run "make dep-am" and regenerate
2009-05-22 09:33:16 +00:00
DJ Delorie
eb9568003a
* mep-asm.c: Regenerate.
...
* mep-opc.c: Regenerate.
2009-05-19 23:35:47 +00:00
DJ Delorie
3526b6802e
Index: opcodes
...
* mep-asm.c: Regenerate.
* mep-desc.c: Regenerate.
* mep-desc.h: Regenerate.
* mep-dis.c: Regenerate.
* mep-ibld.c: Regenerate.
* mep-opc.c: Regenerate.
* mep-opc.h: Regenerate.
Index: gas
* config/tc-mep.c (md_begin): Check coprocessor type.
(md_check_parallel64_scheduling): Use memset to initialize the buffer.
(md_check_parallel32_scheduling): Likewise.
(slot_ok): New.
(mep_check_ivc2_scheduling): New.
(mep_check_parallel_scheduling): Call it.
(mep_process_saved_insns): Add IVC2 slot support.
(md_assemble): Likewise.
2009-04-30 21:23:30 +00:00
Anthony Green
59b1530d0b
Add missing disassembler patch for moxie.
2009-04-30 04:54:08 +00:00
DJ Delorie
45be3704c8
[cgen]
...
* cpu/mep-c5.cpu (f-12s20): Change to signed.
(lhucpm1): Limit to C5 mach.
(dsp0,dsp1): Rewrite as aliases so that intrinsics are generated.
* cpu/mep-core.cpu (extend-cdisp10): New.
(f-cdisp10): Change to signed, use extend-cdisp10 to sign extend.
[opcodes]
* mep-desc.c: Regenerate.
* mep-ibld.c: Regenerate.
* mep-opc.c: Regenerate.
* mep-opc.h: Regenerate.
[sid/component/cgen-cpu/mep]
* mep-core1-decode.cxx: Regenerate.
* mep-core1-decode.h: Regenerate.
* mep-decode.cxx: Regenerate.
* mep-decode.h: Regenerate.
2009-04-18 02:56:43 +00:00
DJ Delorie
52de720d5d
Add missing ChangeLog entry:
...
* mep-asm.c: Regenerate.
* mep-desc.c: Regenerate.
* mep-desc.h: Regenerate.
* mep-dis.c: Regenerate.
* mep-ibld.c: Regenerate.
* mep-opc.c: Regenerate.
* mep-opc.h: Regenerate.
2009-04-18 01:50:02 +00:00
Nick Clifton
20135e4cea
Add new binutils target: moxie
2009-04-16 15:39:48 +00:00
Jan Beulich
ac5c19e6ba
gas/testsuite/
...
2009-04-15 Jan Beulich <jbeulich@novell.com>
* gas/i386/x86-64-sse5.s: Add test of protd.
* gas/i386/x86-64-sse5.d: Adjust expectations to match input.
opcodes/
2009-04-15 Jan Beulich <jbeulich@novell.com>
* i386-opc.tbl (protb, protw, protd, protq): Set opcode
extension to None.
(pshab, pshaw, pshad, pshaq): Likewise.
* i386-tbl.h: Re-generate.
2009-04-15 13:31:28 +00:00