2009-12-18 21:07:58 +00:00
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2009-12-18 H.J. Lu <hongjiu.lu@intel.com>
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* i386-gen.c (operand_types): Move Imm1 before Imm8.
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2009-12-17 09:52:18 +00:00
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2009-12-17 Nick Clifton <nickc@redhat.com>
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PR binutils/10924
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* arm-dis.c: Add support for %<>ru and %<>rU formats to enforce
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unique register numbers. Extend support for %<>R format to
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thumb32 and coprocessor instructions.
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2009-12-16 20:08:32 +00:00
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2009-12-16 H.J. Lu <hongjiu.lu@intel.com>
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* i386-gen.c (opcode_modifiers): Remove ByteOkIntel.
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* i386-opc.h (ByteOkIntel): Removed.
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(i386_opcode_modifier): Remove byteokintel.
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* i386-opc.tbl: Remove ByteOkIntel.
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* i386-tbl.h: Regenerated.
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Replace Vex0F, Vex0F38, Vex0F3A, XOP08, XOP09 and XOP0A with VexOpcode.
gas/
2009-12-16 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (build_vex_prefix): Replace vex0f, vex0f38,
vex0f3a, xop08, xop09 and xop0a with vexopcode.
opcodes/
2009-12-16 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Remove Vex0F, Vex0F38,
Vex0F3A, XOP08, XOP09 and XOP0A. Add VexOpcode.
* i386-opc.h (Vex0F): Removed.
(Vex0F38): Likewise.
(Vex0F3A): Likewise.
(VexOpcode): New.
(VEX0F): Likewise.
(VEX0F38): Likewise.
(VEX0F3A): Likewise.
(XOP08): Defined as a macro.
(XOP09): Likewise.
(XOP0A): Likewise.
(i386_opcode_modifier): Remove vex0f, vex0f38, vex0f3a, xop08,
xop09 and xop0a. Add vexopcode.
* i386-opc.tbl: Replace Vex0F with VexOpcode=0, Vex0F38 with
VexOpcode=1, Vex0F3A with VexOpcode=2, XOP08 with VexOpcode=3,
XOP09 with VexOpcode=4 and XOP0A with VexOpcode=5.
* i386-tbl.h: Regenerated.
2009-12-16 15:43:16 +00:00
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2009-12-16 H.J. Lu <hongjiu.lu@intel.com>
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* i386-gen.c (opcode_modifiers): Remove Vex0F, Vex0F38,
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Vex0F3A, XOP08, XOP09 and XOP0A. Add VexOpcode.
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* i386-opc.h (Vex0F): Removed.
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(Vex0F38): Likewise.
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(Vex0F3A): Likewise.
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(VexOpcode): New.
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(VEX0F): Likewise.
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(VEX0F38): Likewise.
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(VEX0F3A): Likewise.
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(XOP08): Defined as a macro.
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(XOP09): Likewise.
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(XOP0A): Likewise.
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(i386_opcode_modifier): Remove vex0f, vex0f38, vex0f3a, xop08,
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xop09 and xop0a. Add vexopcode.
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* i386-opc.tbl: Replace Vex0F with VexOpcode=0, Vex0F38 with
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VexOpcode=1, Vex0F3A with VexOpcode=2, XOP08 with VexOpcode=3,
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XOP09 with VexOpcode=4 and XOP0A with VexOpcode=5.
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* i386-tbl.h: Regenerated.
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2009-12-16 05:18:11 +00:00
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2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
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* i386-opc.h (VEX2SOURCES): Renamed to ...
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(XOP2SOURCES): This.
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2009-12-16 04:00:35 +00:00
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2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
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* i386-gen.c (opcode_modifiers): Remove Vex3Sources and
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Vex2Sources. Add VexSources.
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2009-12-16 05:31:40 +00:00
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* i386-opc.h (Vex2Sources): Removed.
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2009-12-16 04:00:35 +00:00
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(Vex3Sources): Likewise.
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(VEX2SOURCES): New.
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(VEX3SOURCES): Likewise.
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(VexSources): Likewise.
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(i386_opcode_modifier): Remove vex2sources and vex3sources.
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Add vexsources.
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* i386-opc.tbl: Replace Vex2Sources with VexSources=1 and
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Vex3Sourceswith VexSources=2.
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* i386-tbl.h: Regenerated.
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2009-12-16 02:10:45 +00:00
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2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
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* i386-gen.c (opcode_modifiers): Remove VexW0 and VexW1. Add
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VexW.
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* i386-opc.h (VexW0): Removed.
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(VexW1): Likewise.
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(VEXW0): New.
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(VEXW1): Likewise.
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(VexW): Likewise.
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(i386_opcode_modifier): Remove vexw0 and vexw1. Add vexw.
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* i386-opc.tbl: Replace VexW0 with VexW=1 and VexW1 with
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Vex=2.
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2009-12-16 04:00:35 +00:00
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* i386-tbl.h: Regenerated.
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2009-12-16 02:10:45 +00:00
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2009-12-15 23:33:51 +00:00
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2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c (VEX_W_3818_P_2_M_0): New.
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(vex_w_table): Add VEX_W_3818_P_2_M_0.
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(mod_table): Use VEX_W_3818_P_2_M_0.
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2009-12-15 22:20:50 +00:00
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2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c (vex_w_table): Reformat.
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2009-12-15 22:13:05 +00:00
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2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c (VEX_W_382X_P_2_M_0): New.
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(vex_w_table): Add VEX_W_382X_P_2_M_0.
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(mod_table): Use VEX_W_382X_P_2_M_0.
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2009-12-15 21:37:51 +00:00
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2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c (vex_w_table): Reformat.
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2009-12-15 18:56:09 +00:00
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2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c (USE_VEX_W_TABLE): New.
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(VEX_W_TABLE): Likewise.
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(VEX_W_XXX): Likewise.
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(vex_w_table): Likewise.
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(prefix_table): Use VEX_W_XXX.
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(vex_table): Likewise.
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(vex_len_table): Likewise.
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(mod_table): Likewise.
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(get_valid_dis386): Handle USE_VEX_W_TABLE.
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* i386-opc.tbl: Add VexW0 to AVX instructions where the VEX.W bit
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isn't used.
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* i386-tbl.h: Regenerated.
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2009-12-15 16:36:59 +00:00
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2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
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* i386-opc.h (VEX128): New.
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(VEX256): Likewise.
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2009-12-15 01:42:57 +00:00
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2009-12-14 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c (vex_len_table): Reformat.
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2009-12-14 20:22:16 +00:00
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2009-12-14 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c (MOD_VEX_51): Renamed to ...
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(MOD_VEX_50): This.
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(vex_table): Updated.
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(mod_table): Likewise.
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2009-12-14 16:38:23 +00:00
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2009-12-14 Nick Clifton <nickc@redhat.com>
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PR binutils/10924
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* arm-dis.c (arm_opcodes): Specify %R in cases where using r15
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results in unpredictable behaviour.
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(print_insn_arm): Handle %R.
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2009-12-12 01:17:41 +00:00
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2009-12-11 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c (get_valid_dis386): Set vex.w to 0 for VEX C5
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prefix.
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(print_insn): Don't set vex.w here.
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2009-12-12 00:13:11 +00:00
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2009-12-11 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c (print_insn): Set vex.w to 0.
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2009-12-11 20:38:51 +00:00
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2009-12-11 Quentin Neill <quentin.neill@amd.com>
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* i386-dis.c (get_vex_imm8): Extend logic to apply in all cases,
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to avoid fetching ahead for the immediate bytes when OP_E_memory
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has already been called. Fix indentation.
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2009-12-11 13:42:17 +00:00
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2009-12-11 Nick Clifton <nickc@redhat.com>
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* Makefile.in: Regenerate.
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* configure: Regenerate.
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* arm-dis.c: Fix shadowed variable warnings.
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* cgen-opc.c: Likewise.
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* cr16-dis.c: Likewise.
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* crx-dis.c: Likewise.
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* d30v-dis.c: Likewise.
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* fr30-dis.c: Likewise.
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* frv-opc.c: Likewise.
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* h8500-dis.c: Likewise.
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* i386-dis.c: Likewise.
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* i960-dis.c: Likewise.
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* ia64-gen.c: Likewise.
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* ia64-opc.c: Likewise.
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* m32c-asm.c: Likewise.
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* m32c-dis.c: Likewise.
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* m68k-dis.c: Likewise.
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* maxq-dis.c: Likewise.
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* mcore-dis.c: Likewise.
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* mep-asm.c: Likewise.
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* microblaze-dis.c: Likewise.
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* mmix-dis.c: Likewise.
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* ns32k-dis.c: Likewise.
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* or32-opc.c: Likewise.
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* s390-dis.c: Likewise.
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* sh64-dis.c: Likewise.
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* spu-dis.c: Likewise.
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* tic30-dis.c: Likewise.
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2009-12-09 08:38:04 +00:00
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2009-12-09 Nick Clifton <nickc@redhat.com>
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PR 10924
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* arm-dis.c (print_insn_arm): Mark insns that use the PC in
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post-indexed addressing as unpredictable.
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2009-12-04 07:51:41 +00:00
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2009-12-03 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c (FXSAVE_Fixup): New.
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(FXSAVE): Likewise.
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(mod_table): Use FXSAVE on fxsave and fxrstor.
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* i386-opc.tbl: Add fxsave64 and fxrstor64.
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* i386-tbl.h: Regenerated.
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2009-12-02 20:26:30 +00:00
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2009-12-02 Nick Clifton <nickc@redhat.com>
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Richard Earnshaw <rearnsha@arm.com>
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PR gas/11013
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* arm-dis.c (thumb32_opc): Adjust disassembly of QADD, QDADD, QSUB
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and QDSUB.
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2009-11-30 14:45:30 +00:00
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2009-11-30 Massimo Ruo Roch <massimo.ruoroch@polito.it>
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PR gas/11030
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* m68k-opc.c (m68k_opcodes): Allow the STLDSR instruction on the
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Coldfire ISA A+.
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2009-11-25 15:15:30 +00:00
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2009-11-17 Quentin Neill <quentin.neill@amd.com>
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Sebastian Pop <sebastian.pop@amd.com>
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* i386-dis.c (get_vex_imm8): Increase bytes_before_imm when
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decoding the second source operand from the immediate byte.
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(OP_EX_VexW): Pass an extra integer to identify the second
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and third source arguments.
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2009-11-19 15:26:42 +00:00
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2009-11-19 H.J. Lu <hongjiu.lu@intel.com>
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* i386-opc.tbl: Add IsLockable to cmpxch16b.
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* i386-tbl.h: Regenerated.
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2009-11-19 14:07:11 +00:00
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|
|
2009-11-19 Nick Clifton <nickc@redhat.com>
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|
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PR binutils/10924
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|
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* arm-dis.c (print_insn_arm): Do not print an offset of zero when
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decoding Immediaate Offset addressing.
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2009-11-19 07:08:39 +00:00
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2009-11-18 Sebastian Pop <sebastian.pop@amd.com>
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PR binutils/10973
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* i386-dis.c (get_vex_imm8): Do not increment codep.
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Avoid incrementing bytes_before_imm when OP_E_memory
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has already forwarded the codep pointer.
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|
|
(OP_EX_VexW): Increment codep to skip mod/rm byte.
|
|
|
|
|
|
|
2009-11-18 20:28:59 +00:00
|
|
|
|
2009-11-18 Sebastian Pop <sebastian.pop@amd.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c (VEX_LEN_XOP_08_A0): Removed.
|
|
|
|
|
|
(VEX_LEN_XOP_08_A1): Removed.
|
|
|
|
|
|
(xop_table): Remove entries for VEX_LEN_XOP_08_A0 and
|
|
|
|
|
|
VEX_LEN_XOP_08_A1.
|
|
|
|
|
|
(vex_len_table): Same.
|
|
|
|
|
|
* i386-gen.c (CPU_CVT16_FLAGS): Removed.
|
|
|
|
|
|
(cpu_flags): Remove field for CpuCVT16.
|
|
|
|
|
|
* i386-opc.h (CpuCVT16): Removed.
|
|
|
|
|
|
(i386_cpu_flags): Remove bitfield cpucvt16.
|
|
|
|
|
|
(i386-opc.tbl): Remove CVT16 instructions.
|
|
|
|
|
|
* i386-init.h: Regenerated.
|
|
|
|
|
|
* i386-tbl.h: Regenerated.
|
|
|
|
|
|
|
2009-11-18 04:04:17 +00:00
|
|
|
|
2009-11-17 Sebastian Pop <sebastian.pop@amd.com>
|
|
|
|
|
|
Quentin Neill <quentin.neill@amd.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c (OP_Vex_2src_1): New.
|
|
|
|
|
|
(OP_Vex_2src_2): New.
|
|
|
|
|
|
(Vex_2src_1): New.
|
|
|
|
|
|
(Vex_2src_2): New.
|
|
|
|
|
|
(XOP_08): Added.
|
|
|
|
|
|
(VEX_LEN_XOP_08_A0): Added.
|
|
|
|
|
|
(VEX_LEN_XOP_08_A1): Added.
|
|
|
|
|
|
(VEX_LEN_XOP_09_80): Added.
|
|
|
|
|
|
(VEX_LEN_XOP_09_81): Added.
|
|
|
|
|
|
(xop_table): Added an entry for XOP_08. Handle xop instructions.
|
|
|
|
|
|
(vex_len_table): Added entries for VEX_LEN_XOP_08_A0,
|
|
|
|
|
|
VEX_LEN_XOP_08_A1, VEX_LEN_XOP_09_80, VEX_LEN_XOP_09_81.
|
|
|
|
|
|
(get_valid_dis386): Handle XOP_08.
|
|
|
|
|
|
(OP_Vex_2src): New.
|
|
|
|
|
|
* i386-gen.c (cpu_flag_init): Add CPU_XOP_FLAGS and CPU_CVT16_FLAGS.
|
|
|
|
|
|
(cpu_flags): Add CpuXOP and CpuCVT16.
|
|
|
|
|
|
(opcode_modifiers): Add XOP08, Vex2Sources.
|
|
|
|
|
|
* i386-opc.h (CpuXOP): Added.
|
|
|
|
|
|
(CpuCVT16): Added.
|
|
|
|
|
|
(i386_cpu_flags): Add cpuxop and cpucvt16.
|
|
|
|
|
|
(XOP08): Added.
|
|
|
|
|
|
(Vex2Sources): Added.
|
|
|
|
|
|
(i386_opcode_modifier): Add xop08, vex2sources.
|
|
|
|
|
|
* i386-opc.tbl: Add entries for XOP and CVT16 instructions.
|
|
|
|
|
|
* i386-init.h: Regenerated.
|
|
|
|
|
|
* i386-tbl.h: Regenerated.
|
|
|
|
|
|
|
2009-11-17 17:20:26 +00:00
|
|
|
|
2009-11-17 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR binutils/10924
|
|
|
|
|
|
* arm-dis.c (arm_opcodes): Add patterns to match undefined LDRB
|
|
|
|
|
|
instruction variants. Add pattern for MRS variant that was being
|
|
|
|
|
|
confused with CMP.
|
|
|
|
|
|
(arm_decode_shift): Place error message in a comment.
|
|
|
|
|
|
(print_insn_arm): Note that writing back to the PC is
|
|
|
|
|
|
unpredictable.
|
|
|
|
|
|
Only print 'p' variants of cmp/cmn/teq/tst instructions if
|
|
|
|
|
|
decoding for pre-V6 architectures.
|
|
|
|
|
|
|
2009-11-17 10:43:09 +00:00
|
|
|
|
2009-11-17 Edward Nevill <edward.nevill@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* arm-dis.c (print_insn_thumb32): Handle undefined instruction.
|
|
|
|
|
|
|
2009-11-14 20:04:58 +00:00
|
|
|
|
2009-11-14 Doug Evans <dje@sebabeach.org>
|
|
|
|
|
|
|
|
|
|
|
|
* Makefile.am (stamp-xc16x): Use ../cpu/xc16x.cpu instead of
|
|
|
|
|
|
../cgen/cpu.
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
|
2009-11-14 07:22:05 +00:00
|
|
|
|
2009-11-13 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c (OP_E_extended): Removed.
|
|
|
|
|
|
|
2009-11-13 23:13:48 +00:00
|
|
|
|
2009-11-13 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c (print_insn): Check rex_ignored.
|
|
|
|
|
|
|
2009-11-13 20:42:10 +00:00
|
|
|
|
2009-11-13 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c (ckprefix): Updated to return 0 if number of
|
|
|
|
|
|
prefixes > 14 and record the last position for each prefix.
|
|
|
|
|
|
(lock_prefix): Removed.
|
|
|
|
|
|
(data_prefix): Likewise.
|
|
|
|
|
|
(addr_prefix): Likewise.
|
|
|
|
|
|
(repz_prefix): Likewise.
|
|
|
|
|
|
(repnz_prefix): Likewise.
|
|
|
|
|
|
(last_lock_prefix): New.
|
|
|
|
|
|
(last_repz_prefix): Likewise.
|
|
|
|
|
|
(last_repnz_prefix): Likewise.
|
|
|
|
|
|
(last_data_prefix): Likewise.
|
|
|
|
|
|
(last_addr_prefix): Likewise.
|
|
|
|
|
|
(last_rex_prefix): Likewise.
|
|
|
|
|
|
(last_seg_prefix): Likewise.
|
|
|
|
|
|
(MAX_CODE_LENGTH): Likewise.
|
|
|
|
|
|
(ADDR16_PREFIX): Likewise.
|
|
|
|
|
|
(ADDR32_PREFIX): Likewise.
|
|
|
|
|
|
(DATA16_PREFIX): Likewise.
|
|
|
|
|
|
(DATA32_PREFIX): Likewise.
|
|
|
|
|
|
(REP_PREFIX): Likewise.
|
|
|
|
|
|
(seg_prefix): Likewise.
|
|
|
|
|
|
(all_prefixes): Change size to MAX_CODE_LENGTH - 1.
|
|
|
|
|
|
(prefix_name): Handle ADDR16_PREFIX, ADDR32_PREFIX,
|
|
|
|
|
|
DATA16_PREFIX, DATA32_PREFIX and REP_PREFIX.
|
|
|
|
|
|
(get_valid_dis386): Updated.
|
|
|
|
|
|
(OP_C): Likewise.
|
|
|
|
|
|
(OP_Monitor): Likewise.
|
|
|
|
|
|
(REP_Fixup): Likewise.
|
|
|
|
|
|
(print_insn): Display all prefixes.
|
|
|
|
|
|
(putop): Set PREFIX_DATA on used_prefixes only if it is used.
|
|
|
|
|
|
(intel_operand_size): Likewise.
|
|
|
|
|
|
(OP_E_register): Likewise.
|
|
|
|
|
|
(OP_G): Likewise.
|
|
|
|
|
|
(OP_REG): Likewise.
|
|
|
|
|
|
(OP_IMREG): Likewise.
|
|
|
|
|
|
(OP_I): Likewise.
|
|
|
|
|
|
(OP_I64): Likewise.
|
|
|
|
|
|
(OP_sI): Likewise.
|
|
|
|
|
|
(CRC32_Fixup): Likewise.
|
|
|
|
|
|
(MOVBE_Fixup): Likewise.
|
|
|
|
|
|
(OP_E_memory): Set REFIX_DATA on used_prefixes when it is used
|
|
|
|
|
|
in 16bit mode.
|
|
|
|
|
|
(OP_J): Set REX_W used if it is used. Set PREFIX_DATA on
|
|
|
|
|
|
used_prefixes only if it is used.
|
|
|
|
|
|
|
2009-11-12 19:15:18 +00:00
|
|
|
|
2009-11-12 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.tbl: Remove IsLockable from add, adc, and, dec, inc,
|
|
|
|
|
|
or, sbb, sub, xor and xchg with register only operands.
|
|
|
|
|
|
* i386-tbl.h: Regenerated.
|
|
|
|
|
|
|
gas/
2009-11-12 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (LOCKREP_PREFIX): Removed.
(REP_PREFIX): New.
(LOCK_PREFIX): Likewise.
(PREFIX_GROUP): Likewise.
(REX_PREFIX): Updated.
(MAX_PREFIXES): Likewise.
(add_prefix): Updated. Return enum PREFIX_GROUP.
(md_assemble): Check for lock without a lockable instruction.
(parse_insn): Updated.
(output_insn): Likewise.
gas/testsuite/
2009-11-12 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run lock-1, lock-1-intel, lockbad-1,
x86-64-lock-1, x86-64-lock-1-intel and x86-64-lockbad-1.
* gas/i386/lock-1-intel.d: New.
* gas/i386/lock-1.d: Likewise.
* gas/i386/lock-1.s: Likewise.
* gas/i386/lockbad-1.l: Likewise.
* gas/i386/lockbad-1.s: Likewise.
* gas/i386/x86-64-lock-1-intel.d: Likewise.
* gas/i386/x86-64-lock-1.d: Likewise.
* gas/i386/x86-64-lock-1.s: Likewise.
* gas/i386/x86-64-lockbad-1.l: Likewise.
* gas/i386/x86-64-lockbad-1.s: Likewise.
opcodes/
2009-11-12 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Add IsLockable.
* i386-opc.h (IsLockable): New.
(i386_opcode_modifier): Add islockable.
* i386-opc.tbl: Add IsLockable to add, adc, and, btc, btr,
bts, cmpxchg, cmpxch8b, dec, inc, neg, not, or, sbb, sub,
xor, xadd and xchg.
* i386-tbl.h: Regenerated.
2009-11-12 18:57:14 +00:00
|
|
|
|
2009-11-12 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-gen.c (opcode_modifiers): Add IsLockable.
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.h (IsLockable): New.
|
|
|
|
|
|
(i386_opcode_modifier): Add islockable.
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.tbl: Add IsLockable to add, adc, and, btc, btr,
|
|
|
|
|
|
bts, cmpxchg, cmpxch8b, dec, inc, neg, not, or, sbb, sub,
|
|
|
|
|
|
xor, xadd and xchg.
|
|
|
|
|
|
* i386-tbl.h: Regenerated.
|
|
|
|
|
|
|
2009-11-12 14:49:45 +00:00
|
|
|
|
2009-11-12 Daniel Jacobowitz <dan@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* arm-dis.c (coprocessor_opcodes): Use %A instead of %C. Remove
|
|
|
|
|
|
generic coprocessor instructions for FPA loads and stores.
|
|
|
|
|
|
(print_insn_coprocessor): Remove %C support. Display address for
|
|
|
|
|
|
PC-relative offsets in %A.
|
|
|
|
|
|
|
2009-11-12 02:13:06 +00:00
|
|
|
|
2009-11-11 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c (all_prefixes): New.
|
|
|
|
|
|
(ckprefix): Set all_prefixes.
|
|
|
|
|
|
(print_insn): Print all_prefixes instead of lock_prefix,
|
|
|
|
|
|
repz_prefix, repnz_prefix, addr_prefix and data_prefix.
|
|
|
|
|
|
|
2009-11-11 09:44:45 +00:00
|
|
|
|
2009-11-11 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR binutils/10924
|
|
|
|
|
|
* arm-dis.c (UNPREDICTABLE_INSTRUCTION): New macro.
|
|
|
|
|
|
(print_insn_arm): Extend %s format control code to check for
|
|
|
|
|
|
unpredictable addressing modes. Add support for %S format control
|
|
|
|
|
|
code which suppresses this check.
|
|
|
|
|
|
(W_BIT, I_BIT, U_BIT, P_BIT): New macros.
|
|
|
|
|
|
(WRITEBACK_BIT_SET, IMMEDIATE_BIT_SET, NEGATIVE_BIT_SET,
|
|
|
|
|
|
PRE_BIT_SET): New macros.
|
|
|
|
|
|
(print_insn_coprocessor): Use the new macros instead of magic
|
|
|
|
|
|
constants.
|
|
|
|
|
|
(print_arm_address): Likewise.
|
|
|
|
|
|
(pirnt_insn_arm): Likewise.
|
|
|
|
|
|
(print_insn_thumb32): Likewise.
|
|
|
|
|
|
|
2009-11-11 09:36:08 +00:00
|
|
|
|
2009-11-11 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* po/id.po: Updated Indonesian translation.
|
|
|
|
|
|
|
2009-11-10 18:05:24 +00:00
|
|
|
|
2009-11-10 Maxim Kuvyrkov <maxim@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* m68k-dis.c (print_insn_arg): Handle RGPIOBAR, ACR[4-7] and MBAR[01].
|
|
|
|
|
|
|
2009-11-06 23:17:26 +00:00
|
|
|
|
2009-11-06 Sebastian Pop <sebastian.pop@amd.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c (reg_table): Add XOP_8F_TABLE (XOP_09) to
|
|
|
|
|
|
reg_table[REG_8F][1]: for XOP instructions, ModRM.reg first points to
|
|
|
|
|
|
B.mm in the RXB.mmmmm byte, and so when B is set, we still should use
|
|
|
|
|
|
the xop_table.
|
|
|
|
|
|
(get_valid_dis386): Removed unused condition (from cut/n/paste) for
|
|
|
|
|
|
XOP instructions.
|
|
|
|
|
|
|
2009-11-05 23:40:05 +00:00
|
|
|
|
2009-11-05 Sebastian Pop <sebastian.pop@amd.com>
|
|
|
|
|
|
Quentin Neill <quentin.neill@amd.com>
|
|
|
|
|
|
|
|
|
|
|
|
* opcodes/i386-dis.c (OP_LWPCB_E): New.
|
|
|
|
|
|
(OP_LWP_E): New.
|
|
|
|
|
|
(OP_LWP_I): New.
|
|
|
|
|
|
(USE_XOP_8F_TABLE): New.
|
|
|
|
|
|
(XOP_8F_TABLE): New.
|
|
|
|
|
|
(REG_XOP_LWPCB): New.
|
|
|
|
|
|
(REG_XOP_LWP): New.
|
|
|
|
|
|
(XOP_09): New.
|
|
|
|
|
|
(XOP_0A): New.
|
|
|
|
|
|
(reg_table): Redirect REG_8F to XOP_8F_TABLE.
|
|
|
|
|
|
Add entries for REG_XOP_LWPCB and REG_XOP_LWP.
|
|
|
|
|
|
(xop_table): New.
|
|
|
|
|
|
(get_valid_dis386): Handle USE_XOP_8F_TABLE.
|
|
|
|
|
|
Use the offsets VEX_0F, VEX_0F38, and VEX_0F3A instead of their values
|
|
|
|
|
|
to access to the vex_table.
|
|
|
|
|
|
(OP_LWPCB_E): New.
|
|
|
|
|
|
(OP_LWP_E): New.
|
|
|
|
|
|
(OP_LWP_I): New.
|
|
|
|
|
|
* opcodes/i386-gen.c (cpu_flag_init): Add CPU_LWP_FLAGS, CpuLWP.
|
|
|
|
|
|
(cpu_flags): Add CpuLWP.
|
|
|
|
|
|
(opcode_modifiers): Add VexLWP, XOP09, and XOP0A.
|
|
|
|
|
|
* opcodes/i386-opc.h (CpuLWP): New.
|
|
|
|
|
|
(i386_cpu_flags): Add bit cpulwp.
|
|
|
|
|
|
(VexLWP): New.
|
|
|
|
|
|
(XOP09): New.
|
|
|
|
|
|
(XOP0A): New.
|
|
|
|
|
|
(i386_opcode_modifier): Add vexlwp, xop09, and xop0a.
|
|
|
|
|
|
* opcodes/i386-opc.tbl (llwpcb): Added.
|
|
|
|
|
|
(lwpval): Added.
|
|
|
|
|
|
(lwpins): Added.
|
|
|
|
|
|
|
2009-11-05 00:38:45 +00:00
|
|
|
|
2009-11-04 DJ Delorie <dj@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* rx-decode.opc (rx_decode_opcode) (mvtipl): Add.
|
|
|
|
|
|
(mvtcp, mvfcp, opecp): Remove.
|
|
|
|
|
|
* rx-decode.c: Regenerate.
|
|
|
|
|
|
* rx-dis.c (cpen): Remove.
|
|
|
|
|
|
|
2009-11-04 06:18:27 +00:00
|
|
|
|
2009-11-03 Doug Evans <dje@sebabeach.org>
|
|
|
|
|
|
|
|
|
|
|
|
* m32c-desc.c: Regenerate.
|
|
|
|
|
|
* mep-desc.c: Regenerate.
|
|
|
|
|
|
|
2009-11-02 Paul Brook <paul@codesourcery.com>
ld/testsuite/
* ld-arm/arm-elf.exp: Add new attr-merge-vfp tests.
* ld-arm/attr-merge-vfp-1.d: New test.
* ld-arm/attr-merge-vfp-1r.d: New test.
* ld-arm/attr-merge-vfp-2.d: New test.
* ld-arm/attr-merge-vfp-2r.d: New test.
* ld-arm/attr-merge-vfp-3.d: New test.
* ld-arm/attr-merge-vfp-3r.d: New test.
* ld-arm/attr-merge-vfp-4.d: New test.
* ld-arm/attr-merge-vfp-4r.d: New test.
* ld-arm/attr-merge-vfp-5.d: New test.
* ld-arm/attr-merge-vfp-5r.d: New test.
* ld-arm/attr-merge-vfp-2.s: New test.
* ld-arm/attr-merge-vfp-3.s: New test.
* ld-arm/attr-merge-vfp-3-d16.s: New test.
* ld-arm/attr-merge-vfp-4.s: New test.
* ld-arm/attr-merge-vfp-4-d16.s: New test.
gas/
* doc/c-arm.texi: Document new -mfpu options.
* config/tc-arm.c (fpu_vfp_ext_v3xd, fpu_vfp_fp16, fpu_neon_ext_fma,
fpu_vfp_ext_fma): New.
(NEON_ENC_TAB): Add vfma, vfms, vfnma and vfnms.
(do_vfp_nsyn_fma_fms, do_neon_fmac): New functions.
(insns): Move double precision load/store. Split out double
precision VFPv3 instrucitons. Add VFPv4 instructions.
(arm_fpus): Add VFPv3-FP16, VFPv3xD and VFPv4 variants.
(aeabi_set_public_attributes): Set VFPv4 variants
gas/testsuite/
* gas/arm/attr-mfpu-vfpv4.d: New test.
* gas/arm/attr-mfpu-vfpv4-d16.d: New test.
* gas/arm/neon-fma-cov.d: New test.
* gas/arm/neon-fma-cov.s: New test.
* gas/arm/vfp-fma-inc.s: New test.
* gas/arm/vfp-fma-arm.d: New test.
* gas/arm/vfp-fma-arm.s: New test.
* gas/arm/vfp-fma-thumb.d: New test.
* gas/arm/vfp-fma-thumb.s: New test.
* gas/arm/vfma1.d: New test.
* gas/arm/vfma1.s: New test.
* gas/arm/vfpv3xd.d: New test.
* gas/arm/vfpv3xd.s: New test.
include/opcode/
* arm.h (FPU_VFP_EXT_V3xD, FPU_VFP_EXT_FP16, FPU_NEON_EXT_FMA,
FPU_VFP_EXT_FMA, FPU_VFP_V3xD, FPU_VFP_V4D16, FPU_VFP_V4): Define.
(FPU_ARCH_VFP_V3D16_FP16, FPU_ARCH_VFP_V3_FP16, FPU_ARCH_VFP_V3xD,
FPU_ARCH_VFP_V3xD_FP16, FPU_ARCH_VFP_V4, FPU_ARCH_VFP_V4D16,
FPU_ARCH_NEON_VFP_V4): Define.
binutils/
* readelf.c (arm_attr_tag_VFP_arch): Add VFPv4 and VFPv4-D16.
bfd/
* elf32-arm.c (elf32_arm_merge_eabi_attributes): Handle VFPv4
attributes.
opcodes/
* arm-dis.c (coprocessor_opcodes): Update to use new feature flags.
Add VFPv4 instructions.
2009-11-02 13:44:05 +00:00
|
|
|
|
2009-11-02 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* arm-dis.c (coprocessor_opcodes): Update to use new feature flags.
|
|
|
|
|
|
Add VFPv4 instructions.
|
|
|
|
|
|
|
2009-10-29 22:22:59 +00:00
|
|
|
|
2009-10-29 Sebastian Pop <sebastian.pop@amd.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c (OP_VEX_FMA): Removed.
|
|
|
|
|
|
(VexFMA): Removed.
|
|
|
|
|
|
(Vex128FMA): Removed.
|
|
|
|
|
|
(prefix_table): First source operand of FMA4 insns is decoded
|
|
|
|
|
|
with Vex not with VexFMA.
|
|
|
|
|
|
(OP_EX_VexW): Second source operand is decoded with get_vex_imm8
|
|
|
|
|
|
when vex.w is set. Third source operand is decoded with
|
|
|
|
|
|
|
2009-10-27 01:49:26 +00:00
|
|
|
|
2009-10-27 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
* Makefile.am (HFILES): Remove cgen-ops.h and cgen-types.h.
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
* po/POTFILES.in: Regenerate.
|
|
|
|
|
|
|
2009-10-24 00:17:08 +00:00
|
|
|
|
2009-10-23 Doug Evans <dje@sebabeach.org>
|
|
|
|
|
|
|
|
|
|
|
|
* cgen-ops.h: Delete, moved to ../include/cgen/basic-ops.h.
|
|
|
|
|
|
* cgen-types.h: Delete, moved to ../include/cgen/basic-modes.h.
|
|
|
|
|
|
* cgen-bitset.c: Update.
|
|
|
|
|
|
* fr30-desc.h: Regenerate.
|
|
|
|
|
|
* frv-desc.h: Regenerate.
|
|
|
|
|
|
* ip2k-desc.h: Regenerate.
|
|
|
|
|
|
* iq2000-desc.h: Regenerate.
|
|
|
|
|
|
* lm32-desc.h: Regenerate.
|
|
|
|
|
|
* m32c-desc.h: Regenerate.
|
|
|
|
|
|
* m32c-opc.h: Regenerate.
|
|
|
|
|
|
* m32r-desc.h: Regenerate.
|
|
|
|
|
|
* mep-desc.h: Regenerate.
|
|
|
|
|
|
* mt-desc.h: Regenerate.
|
|
|
|
|
|
* openrisc-desc.h: Regenerate.
|
|
|
|
|
|
* xc16x-desc.h: Regenerate.
|
|
|
|
|
|
* xstormy16-desc.h: Regenerate.
|
|
|
|
|
|
|
2009-10-23 01:11:53 +00:00
|
|
|
|
2009-10-22 DJ Delorie <dj@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* rx-decode.opc (decode_opcode): Fix flags for MUL, SUNTIL, and SWHILE.
|
|
|
|
|
|
* rx-decode.c: Regenerated.
|
|
|
|
|
|
|
2009-10-20 22:18:19 +00:00
|
|
|
|
2009-10-20 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/10775
|
|
|
|
|
|
* i386-dis.c: Document LB, LS and LV macros.
|
|
|
|
|
|
(dis386): Use mov%LB, mov%LS and mov%LV on mov instruction
|
|
|
|
|
|
with the 64-bit displacement or immediate operand.
|
|
|
|
|
|
(putop): Handle LB, LS and LV macros.
|
|
|
|
|
|
|
2009-10-19 05:09:44 +00:00
|
|
|
|
2009-10-18 Doug Evans <dje@sebabeach.org>
|
|
|
|
|
|
|
|
|
|
|
|
* lm32-opinst.c: Regenerate.
|
|
|
|
|
|
* m32c-desc.c: Regenerate.
|
|
|
|
|
|
* m32r-opinst.c: Regenerate.
|
|
|
|
|
|
* openrisc-ibld.c: Regenerate.
|
|
|
|
|
|
* xc16x-desc.c: Regenerate.
|
|
|
|
|
|
* xc16x-desc.h: Regenerate.
|
|
|
|
|
|
|
2009-10-17 17:38:09 +00:00
|
|
|
|
2009-10-17 Doug Evans <dje@sebabeach.org>
|
|
|
|
|
|
|
|
|
|
|
|
* Makefile.am (CGEN_CPUS): Add iq2000, lm32.
|
|
|
|
|
|
(FR30_DEPS, FRV_DEPS, IQ2000_DEPS): Move so all cgen *_DEPS are
|
|
|
|
|
|
sorted alphabetically.
|
|
|
|
|
|
(stamp-fr30, stamp-frv, stamp-iq2000, stamp-xc16x): Move so all cgen
|
|
|
|
|
|
stamp-* rules are sorted alphabetically.
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
|
2009-10-16 15:50:52 +00:00
|
|
|
|
2009-10-16 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.h: Use enum instead of nested macros.
|
|
|
|
|
|
|
2009-10-16 14:47:08 +00:00
|
|
|
|
2009-10-16 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c: Simplify enums.
|
|
|
|
|
|
|
2009-10-15 22:50:09 +00:00
|
|
|
|
2009-10-15 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
Ineiev <ineiev@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR binutils/10767
|
|
|
|
|
|
* i386-dis.c: Use enum instead of nested macros.
|
|
|
|
|
|
|
2009-10-15 22:26:55 +00:00
|
|
|
|
2009-10-15 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c (MAX_BYTEMODE): Removed.
|
|
|
|
|
|
|
2009-10-14 11:30:20 +00:00
|
|
|
|
2009-10-14 Tomas Hurka <tom@hukatronic.cz>
|
|
|
|
|
|
|
|
|
|
|
|
PR 969
|
|
|
|
|
|
* m68k-opc.c (m68k_opcodes): Correct mask for macl and msacl.
|
|
|
|
|
|
|
2009-10-13 18:44:19 +00:00
|
|
|
|
2009-10-13 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c (print_insn): Always clear need_vex, need_vex_reg
|
|
|
|
|
|
and vex_w_done.
|
|
|
|
|
|
|
2009-10-07 15:40:17 +00:00
|
|
|
|
2009-10-07 Michael Eager <eager@eagercon.com>
|
|
|
|
|
|
|
2009-10-13 18:44:19 +00:00
|
|
|
|
* microblaze-dis.c: Add include for microblaze-dis.h,
|
2009-10-07 15:40:17 +00:00
|
|
|
|
eliminate local extern decls.
|
2009-10-13 18:44:19 +00:00
|
|
|
|
* microblaze-dis.h: New.
|
2009-10-07 15:40:17 +00:00
|
|
|
|
|
2009-10-06 15:44:40 +00:00
|
|
|
|
2009-10-06 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* po/fi.po: Updated Finnish translation.
|
|
|
|
|
|
|
2009-10-05 13:14:55 +00:00
|
|
|
|
2009-10-03 Andreas Schwab <schwab@linux-m68k.org>
|
|
|
|
|
|
|
|
|
|
|
|
* opc2c.c: Include "libiberty.h" and <errno.h>.
|
|
|
|
|
|
(orig_filename): Constify.
|
|
|
|
|
|
(dump_lines): Fix line number directive.
|
|
|
|
|
|
(main): Set orig_filename to basename of input file. Use
|
|
|
|
|
|
xstrerror.
|
|
|
|
|
|
|
|
|
|
|
|
* Makefile.am (rx-dis.lo): Remove explicit dependencies.
|
|
|
|
|
|
($(srcdir)/rx-decode.c): Use @MAINT@. Use $(EXEEXT_FOR_BUILD)
|
|
|
|
|
|
instead of $(EXEEXT).
|
|
|
|
|
|
(opc2c$(EXEEXT_FOR_BUILD)): Renamed from opc2c$(EXEEXT) and use
|
|
|
|
|
|
$(LINK_FOR_BUILD). Link with libiberty.
|
|
|
|
|
|
(MOSTLYCLEANFILES): Add opc2c$(EXEEXT_FOR_BUILD).
|
|
|
|
|
|
(MAINTAINERCLEANFILES): Add $(srcdir)/rx-decode.c.
|
|
|
|
|
|
* Makefile.in: Regenerated.
|
|
|
|
|
|
* rx-decode.c: Regenerated.
|
|
|
|
|
|
|
2009-10-03 00:39:53 +00:00
|
|
|
|
2009-10-03 Paul Reed <paulreed@paddedcell.com>
|
|
|
|
|
|
|
|
|
|
|
|
* arm-dis.c (print_insn): Check symtab_size not *symtab.
|
|
|
|
|
|
|
2009-10-02 19:03:40 +00:00
|
|
|
|
2009-10-02 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.tbl: Drop Disp64 on jump and loop instructions.
|
|
|
|
|
|
* i386-tbl.h: Regenerated.
|
|
|
|
|
|
|
2009-10-02 14:42:42 +00:00
|
|
|
|
2009-10-02 Peter Bergner <bergner@vnet.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* ppc-dis.c (ppc_opts): Add "476" entry.
|
|
|
|
|
|
* ppc-opc.c (PPC476): Define.
|
|
|
|
|
|
(powerpc_opcodes): Update mnemonics where required for 476.
|
|
|
|
|
|
|
2009-10-01 19:24:48 +00:00
|
|
|
|
2009-10-01 Peter Bergner <bergner@vnet.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* ppc-opc.c (PPCA2): Use renamed mask PPC_OPCODE_A2.
|
|
|
|
|
|
* ppc-dis.c (ppc_opts): Likewise.
|
|
|
|
|
|
Rename "ppca2" to "a2".
|
|
|
|
|
|
|
2009-10-01 08:19:55 +00:00
|
|
|
|
2009-10-01 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
|
|
|
|
|
|
|
|
|
|
|
|
* crx-dis.c (match_opcode): Truncate mcode to 32-bit.
|
|
|
|
|
|
|
2009-09-29 14:17:19 +00:00
|
|
|
|
2009-09-29 DJ Delorie <dj@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* Makefile.am: Add RX files.
|
|
|
|
|
|
* configure.in: Add support for RX target.
|
|
|
|
|
|
* disassemble.c: Likewise.
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
* configure: Regenerate.
|
|
|
|
|
|
* opc2c.c: New file.
|
|
|
|
|
|
* rx-decode.c: New file.
|
|
|
|
|
|
* rx-decode.opc: New file.
|
|
|
|
|
|
* rx-dis.c: New file.
|
|
|
|
|
|
|
2009-09-29 13:19:10 +00:00
|
|
|
|
2009-09-29 Peter Bergner <bergner@vnet.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* ppc-opc.c (powerpc_opcodes): Remove support for the the "lxsdux",
|
|
|
|
|
|
"lxvd2ux", "lxvw4ux", "stxsdux", "stxvd2ux" and "stxvw4ux" opcodes.
|
|
|
|
|
|
|
2009-09-25 19:59:51 +00:00
|
|
|
|
2009-09-25 Michael Eager <eager@eagercon.com>
|
|
|
|
|
|
|
2009-10-02 15:35:01 +00:00
|
|
|
|
* microblaze-dis.c (get_insn_microblaze, microblaze_get_target_address,
|
|
|
|
|
|
microblaze_decode_insn): Add declarations.
|
|
|
|
|
|
(get_delay_slots_microblaze): Remove.
|
2009-09-25 19:59:51 +00:00
|
|
|
|
|
Update soruces to make alpha, arc and arm targets compile cleanly
with -Wc++-compat:
* config/tc-alpha.c: Add casts.
(extended_bfd_reloc_code_real_type): New type. Used to avoid
enumeration conversion warnings.
(struct alpha_fixup, void assemble_insn, assemble_insn)
(assemble_tokens): Use new type.
* ecoff.c: Add casts. (mark_stabs): Use enumeration names.
* config/obj-elf.c: Add cast
* config/tc-arc.c: Add casts.
* config/obj-aout.h (text_section,data_section,bss_section):
Make extern.
* config/obj-elf.c: Add cast.
* config/tc-arm.c: Add casts.
(X, TxCE, TxCE, TxC3, TxC3w, TxCM_, TxCM, TUE, TUF, CE, CL, cCE)
(cCL, C3E, xCM_, nUF, nCE_tag): Change input format to avoid the
need for keywords as arguments.
* ecoff.c: Add casts.
* ecofflink.c: Add casts.
* elf64-alpha.c: Add casts.
(struct alpha_elf_got_entry, struct alpha_elf_reloc_entry): Move
to top level.
(SKIP_HOWTO): Use enum name.
* elf32-arm.c: Add casts.
(elf32_arm_vxworks_bed): Update code to avoid multiple
declarations.
(struct map_stub): Move to top level.
* arc-dis.c Fix casts.
* arc-ext.c: Add casts.
* arm-dis.c (enum opcode_sentinel_enum): Gave name to anonymous
enum.
* emultempl/armelf.em: Add casts.
2009-09-25 19:13:27 +00:00
|
|
|
|
2009-09-25 Martin Thuresson <martint@google.com>
|
|
|
|
|
|
|
2009-10-02 15:35:01 +00:00
|
|
|
|
Update sources to make arc and arm targets compile cleanly with
|
Update soruces to make alpha, arc and arm targets compile cleanly
with -Wc++-compat:
* config/tc-alpha.c: Add casts.
(extended_bfd_reloc_code_real_type): New type. Used to avoid
enumeration conversion warnings.
(struct alpha_fixup, void assemble_insn, assemble_insn)
(assemble_tokens): Use new type.
* ecoff.c: Add casts. (mark_stabs): Use enumeration names.
* config/obj-elf.c: Add cast
* config/tc-arc.c: Add casts.
* config/obj-aout.h (text_section,data_section,bss_section):
Make extern.
* config/obj-elf.c: Add cast.
* config/tc-arm.c: Add casts.
(X, TxCE, TxCE, TxC3, TxC3w, TxCM_, TxCM, TUE, TUF, CE, CL, cCE)
(cCL, C3E, xCM_, nUF, nCE_tag): Change input format to avoid the
need for keywords as arguments.
* ecoff.c: Add casts.
* ecofflink.c: Add casts.
* elf64-alpha.c: Add casts.
(struct alpha_elf_got_entry, struct alpha_elf_reloc_entry): Move
to top level.
(SKIP_HOWTO): Use enum name.
* elf32-arm.c: Add casts.
(elf32_arm_vxworks_bed): Update code to avoid multiple
declarations.
(struct map_stub): Move to top level.
* arc-dis.c Fix casts.
* arc-ext.c: Add casts.
* arm-dis.c (enum opcode_sentinel_enum): Gave name to anonymous
enum.
* emultempl/armelf.em: Add casts.
2009-09-25 19:13:27 +00:00
|
|
|
|
-Wc++-compat:
|
|
|
|
|
|
* arc-dis.c Fix casts.
|
|
|
|
|
|
* arc-ext.c: Add casts.
|
|
|
|
|
|
* arm-dis.c (enum opcode_sentinel_enum): Gave name to anonymous
|
|
|
|
|
|
enum.
|
|
|
|
|
|
|
2009-09-24 16:37:09 +00:00
|
|
|
|
2009-09-24 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-gen.c (opcode_modifiers): Remove Vex256.
|
|
|
|
|
|
(set_bitfield): Handle XXX=V.
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.h (Vex): Update comments.
|
|
|
|
|
|
(Vex256): Removed.
|
|
|
|
|
|
(VexNDS): Updated.
|
2009-10-02 15:35:01 +00:00
|
|
|
|
(i386_opcode_modifier): Change vex to 2 bits. Remove vex256.
|
2009-09-24 16:37:09 +00:00
|
|
|
|
|
|
|
|
|
|
* i386-opc.tbl: Replace "Vex|Vex256" with Vex=2.
|
|
|
|
|
|
* i386-tbl.h: Regenerated.
|
|
|
|
|
|
|
2009-09-23 10:09:19 +00:00
|
|
|
|
2009-09-23 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* po/fr.po: Updated French translation.
|
|
|
|
|
|
|
gas/
* config/tc-ppc.c (md_show_usage): Document -mpcca2.
* doc/c-ppc.texi (PowerPC-Opts): Document -mppca2.
gas/testsuite/
* gas/ppc/a2.s: New.
* gas/ppc/a2.d: Likewise.
* gas/ppc/ppc.exp: Run the a2 dump test.
include/opcode/
* ppc.h (PPC_OPCODE_PPCA2): New.
opcodes/
* ppc-dis.c (ppc_opts): Add "ppca2" entry.
* ppc-opc.c (powerpc_opcodes): Add eratilx, eratsx, eratsx.,
eratre, wchkall, eratwe, ldawx., mdfcrx., mfdcr. mtdcrx., icswx,
icswx., mtdcr., dci, wclrone, wclrall, wclr, erativax, tlbsrx.,
ici mnemonics.
(ERAT_T): New operand.
(XWC_MASK): New mask.
(XOPL2): New macro.
(PPCA2): Define.
2009-09-21 10:29:07 +00:00
|
|
|
|
2009-09-21 Ben Elliston <bje@au.ibm.com>
|
|
|
|
|
|
Peter Bergner <bergner@vnet.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* ppc-dis.c (ppc_opts): Add "ppca2" entry.
|
|
|
|
|
|
* ppc-opc.c (powerpc_opcodes): Add eratilx, eratsx, eratsx.,
|
|
|
|
|
|
eratre, wchkall, eratwe, ldawx., mdfcrx., mfdcr. mtdcrx., icswx,
|
|
|
|
|
|
icswx., mtdcr., dci, wclrone, wclrall, wclr, erativax, tlbsrx.,
|
|
|
|
|
|
ici mnemonics.
|
|
|
|
|
|
(ERAT_T): New operand.
|
|
|
|
|
|
(XWC_MASK): New mask.
|
|
|
|
|
|
(XOPL2): New macro.
|
|
|
|
|
|
(PPCA2): Define.
|
|
|
|
|
|
|
2009-09-18 07:54:47 +00:00
|
|
|
|
2009-09-18 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* po/es.po: Updated Spanish translation.
|
|
|
|
|
|
* po/vi.po: Updated Vietnamese translation.
|
|
|
|
|
|
|
2009-09-15 17:53:40 +00:00
|
|
|
|
2009-09-15 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c (OP_E_memory): Don't print '-' in Intel mode if
|
|
|
|
|
|
disp == -disp.
|
|
|
|
|
|
|
2009-09-14 12:24:29 +00:00
|
|
|
|
2009-09-14 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* po/nl.po: Updated Dutch translation.
|
|
|
|
|
|
|
2009-09-11 15:27:38 +00:00
|
|
|
|
2009-09-11 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* po/opcodes.pot: Updated by the Translation project.
|
|
|
|
|
|
|
|
|
|
|
|
2009-09-11 Martin Thuresson <martint@google.com>
|
|
|
|
|
|
|
|
|
|
|
|
Updated sources to compile cleanly with -Wc++-compat:
|
|
|
|
|
|
* ld.h (enum endian_enum,enum symbolic_enum,enum dynamic_list_enum): Move to top level.
|
|
|
|
|
|
* ldcref.c: Add casts.
|
|
|
|
|
|
* ldctor.c: Add casts.
|
|
|
|
|
|
* ldexp.c
|
|
|
|
|
|
* ldexp.h (enum node_tree_enum,enum phase_enum): Move to top level.
|
|
|
|
|
|
* ldlang.c: Add casts. (lang_insert_orphan): Use enum name instead of integer.
|
|
|
|
|
|
* ldlang.h (enum statement_enum): Move to top level.
|
|
|
|
|
|
* ldmain.c: Add casts.
|
|
|
|
|
|
* ldwrite.c: Add casts.
|
|
|
|
|
|
* lexsup.c: Add casts. (enum control_enum): Move to top level.
|
|
|
|
|
|
* mri.c: Add casts. (mri_draw_tree): Use enum name instead of integer.
|
|
|
|
|
|
|
2009-09-10 09:04:06 +00:00
|
|
|
|
2009-09-10 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
|
2009-10-02 15:35:01 +00:00
|
|
|
|
|
2009-09-10 09:04:06 +00:00
|
|
|
|
* s390-dis.c (print_insn_s390): Avoid 'long long'.
|
|
|
|
|
|
|
2009-09-10 08:47:20 +00:00
|
|
|
|
2009-09-10 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
|
2009-10-02 15:35:01 +00:00
|
|
|
|
|
2009-09-10 08:47:20 +00:00
|
|
|
|
* s390-dis.c (s390_extract_operand): Remove the shift for pcrel operands.
|
|
|
|
|
|
(print_insn_s390): Signextend and shift pcrel operands before printing.
|
|
|
|
|
|
|
2009-09-09 17:25:31 +00:00
|
|
|
|
2009-09-09 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c (vex_len_table): Change VEX_LEN_AE_R_X_M0 to
|
|
|
|
|
|
VEX_LEN_AE_R_X_M_0 in comments.
|
|
|
|
|
|
|
2009-09-08 23:51:11 +00:00
|
|
|
|
2009-09-08 DJ Delorie <dj@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* mep-opc.c: Regenerate.
|
|
|
|
|
|
|
2009-09-08 09:47:52 +00:00
|
|
|
|
2009-09-08 Andreas Schwab <schwab@linux-m68k.org>
|
|
|
|
|
|
|
|
|
|
|
|
* z8kgen.c (struct op): Replace unused flavor with id.
|
|
|
|
|
|
(opt): Remove extra xorb entry.
|
|
|
|
|
|
(func): Use id field as fallback.
|
|
|
|
|
|
(sub): Return new string, caller changed.
|
|
|
|
|
|
(internal): Allocate end marker. Assign unique id before sorting.
|
|
|
|
|
|
(gas): Likewise. Fix loop end condition.
|
|
|
|
|
|
* z8k-opc.h: Regenerate.
|
|
|
|
|
|
|
2009-09-08 09:00:47 +00:00
|
|
|
|
2009-09-08 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
* ppc-opc.c (powerpc_macros <extrdi>): Allow n+b of 64.
|
|
|
|
|
|
|
2009-09-07 13:01:35 +00:00
|
|
|
|
2009-09-07 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
* z8kgen.c (func): Fix thinko last patch.
|
|
|
|
|
|
|
2009-09-07 12:11:20 +00:00
|
|
|
|
2009-09-07 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
* z8kgen.c (func): Stabilize qsort of identically named entries.
|
|
|
|
|
|
* z8k-opc.h: Regenerate.
|
|
|
|
|
|
|
2009-09-07 11:29:56 +00:00
|
|
|
|
2009-09-07 Tristan Gingold <gingold@adacore.com>
|
|
|
|
|
|
|
|
|
|
|
|
* po/opcodes.pot: Regenerate.
|
|
|
|
|
|
|
2009-09-07 10:54:25 +00:00
|
|
|
|
2009-09-07 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
* configure.in (BUILD_LIBS, BUILD_LIB_DEPS): Define and subst.
|
|
|
|
|
|
* configure: Regenerate.
|
|
|
|
|
|
* Makefile.am (LIBIBERTY, BUILD_LIBIBERTY, BUILD_LIBINTL): Delete.
|
|
|
|
|
|
(BUILD_LIBS, BUILD_LIB_DEPS): Define. Use..
|
|
|
|
|
|
(i386-gen, ia64-gen, z8kgen): ..here.
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
|
2009-09-07 08:14:09 +00:00
|
|
|
|
2009-09-07 Tristan Gingold <gingold@adacore.com>
|
|
|
|
|
|
|
|
|
|
|
|
* z8k-opc.h: Regenerate.
|
|
|
|
|
|
|
* bfd/coff-arm.c (coff_arm_relocate_section)
(record_thumb_to_arm_glue, bfd_arm_process_before_allocation):
Change member name class to symbol_class.
* bfd/coff-i960.c (coff_i960_relocate_section) Rename variable
class to class_val. Change member name class to symbol_class.
* bfd/coff-rs6000.c (_bfd_xcoff_swap_aux_in)
(_bfd_xcoff_swap_aux_out): Rename arguments class to in_class.
* bfd/coff-stgo32.c (adjust_aux_in_post)
(adjust_aux_out_pre, adjust_aux_out_post): Rename arguments class
to in_class.
* bfd/coff64-rs6000.c (_bfd_xcoff64_swap_aux_in)
(_bfd_xcoff64_swap_aux_out): Rename arguments class to in_class.
* bfd/coffcode.h (coff_pointerize_aux_hook): Rename variable class
to n_sclass.
* bfd/coffgen.c (coff_write_symbol, coff_pointerize_aux): Rename
variables named class to n_sclass. (coff_write_symbols): Rename
variable class to sym_class. (bfd_coff_set_symbol_class): Rename
argument class to symbol_class.
* bfd/cofflink.c (_bfd_coff_link_hash_newfunc)
(coff_link_add_symbols, _bfd_coff_link_input_bfd)
(_bfd_coff_write_global_sym, _bfd_coff_generic_relocate_section):
Update code to use renamed members.
* bfd/coffswap.h (coff_swap_aux_in, coff_swap_aux_out): Rename
argument class to in_class.
* bfd/libcoff-in.h (struct coff_link_hash_entry, struct
coff_debug_merge_type) Renamed members class to symbol_class and
type_class.
* bfd/libcoff.h Regenerated.
* bfd/peXXigen.c: (_bfd_XXi_swap_aux_in, _bfd_XXi_swap_aux_out):
Rename argument class to in_class.
* bfd/pef.c (bfd_pef_parse_imported_symbol): Update code to use
renamed members.
* bfd/pef.h (struct bfd_pef_imported_symbol): Changed name of
member class to symbol_class.
* binutils/ieee.c (ieee_read_cxx_misc, ieee_read_cxx_class)
(ieee_read_reference): Rename variables named class to cxxclass.
* gas/config/tc-arc.c (struct syntax_classes): Rename member class
to s_class. (arc_extinst): Rename variable class to
s_class. Update code to use renamed members.
* gas/config/tc-mips.c (insn_uses_reg): Rename argument class to
regclass.
* gas/config/tc-ppc.c (ppc_csect, ppc_change_csect, ppc_function)
(ppc_tc, ppc_is_toc_sym, ppc_symbol_new_hook, ppc_frob_label)
(ppc_fix_adjustable, md_apply_fix): Update code to use renamed
members.
* gas/config/tc-ppc.h (struct ppc_tc_sy): Change name of member
from class to symbol_class. (OBJ_COPY_SYMBOL_ATTRIBUTES): Update
code to use renamed members.
* gas/config/tc-score.c (s3_adjust_paritybit): Rename argument
class to i_class.
* gas/config/tc-score7.c (s7_adjust_paritybit): Rename argument
class to i_class.
* gprof/corefile.c (core_create_function_syms): Rename variable
class to cxxclass.
* include/coff/ti.h (GET_LNSZ_SIZE, PUT_LNSZ_SIZE): Updated name
of class variable to in_class to match changes in function that
use this macro.
* include/opcode/ia64.h (struct ia64_operand): Renamed member
class to op_class
* ld/emultempl/elf32.em (gld${EMULATION_NAME}_load_symbols)
(gld${EMULATION_NAME}_try_needed): Rename variable class to
link_class
* opcodes/ia64-dis.c (print_insn_ia64): Update code to use renamed
member.
* opcodes/m88k-dis.c (m88kdis): Rename variable class to in_class.
* opcodes/tic80-opc.c (tic80_symbol_to_value)
(tic80_value_to_symbol): Rename argument class to symbol_class.
2009-09-05 07:56:26 +00:00
|
|
|
|
2009-09-05 Martin Thuresson <martin@mtme.org>
|
|
|
|
|
|
|
|
|
|
|
|
* ia64-dis.c (print_insn_ia64): Update code to use renamed member.
|
|
|
|
|
|
* m88k-dis.c (m88kdis): Rename variable class to in_class.
|
|
|
|
|
|
* tic80-opc.c (tic80_symbol_to_value, tic80_value_to_symbol):
|
|
|
|
|
|
Rename argument class to symbol_class.
|
|
|
|
|
|
|
2009-09-04 04:29:42 +00:00
|
|
|
|
2009-09-04 Jie Zhang <jie.zhang@analog.com>
|
|
|
|
|
|
|
|
|
|
|
|
* bfin-dis.c (decode_pseudodbg_assert_0): Change according
|
|
|
|
|
|
to the new encoding of DBGA, DBGAH, and DBGAL.
|
|
|
|
|
|
(_print_insn_bfin): Likewise.
|
|
|
|
|
|
|
2009-09-03 17:42:53 +00:00
|
|
|
|
2009-09-03 Jie Zhang <jie.zhang@analog.com>
|
|
|
|
|
|
|
|
|
|
|
|
* bfin-dis.c (_print_insn_bfin): Don't declare.
|
|
|
|
|
|
(print_insn_bfin): Don't declare.
|
|
|
|
|
|
(dregs_pair): Remove.
|
|
|
|
|
|
(ignore_bits): Remove.
|
|
|
|
|
|
(ccstat): Remove.
|
|
|
|
|
|
|
2009-09-03 16:17:36 +00:00
|
|
|
|
2009-09-03 Jie Zhang <jie.zhang@analog.com>
|
|
|
|
|
|
|
|
|
|
|
|
* bfin-dis.c (IS_DREG): Define.
|
|
|
|
|
|
(IS_PREG): Define.
|
|
|
|
|
|
(IS_AREG): Define.
|
|
|
|
|
|
(IS_GENREG): Define.
|
|
|
|
|
|
(IS_DAGREG): Define.
|
|
|
|
|
|
(IS_SYSREG): Define.
|
|
|
|
|
|
(decode_REGMV_0): Check illegal register move instructions.
|
|
|
|
|
|
|
2009-09-03 04:47:46 +00:00
|
|
|
|
2009-09-03 Dave Korn <dave.korn.cygwin@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* Makefile.am (BUILD_LIBINTL): New variable.
|
|
|
|
|
|
(i386-gen$(EXEEXT_FOR_BUILD)): Use it.
|
|
|
|
|
|
(ia64-gen$(EXEEXT_FOR_BUILD)): And here.
|
|
|
|
|
|
(z8kgen$(EXEEXT_FOR_BUILD)): And here.
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
|
2009-09-02 02:10:36 +00:00
|
|
|
|
2009-09-01 DJ Delorie <dj@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* mep-asm.c: Regenerate.
|
|
|
|
|
|
* mep-desc.c: Regenerate.
|
|
|
|
|
|
* mep-opc.c: Regenerate.
|
|
|
|
|
|
|
2009-09-01 13:16:53 +00:00
|
|
|
|
2009-09-01 Tristan Gingold <gingold@adacore.com>
|
|
|
|
|
|
|
|
|
|
|
|
* makefile.vms: Ported to Itanium VMS. Remove useless targets and
|
|
|
|
|
|
dependencies. Remove unused FORMAT variable.
|
|
|
|
|
|
* configure.com: New file to create build.com DCL script for
|
|
|
|
|
|
Itanium VMS or Alpha VMS.
|
|
|
|
|
|
|
Updated sources to avoid using the identifier name "new", which is a
keyword in c++.
* bfd/aoutx.h (NAME (aout, make_empty_symbol)): Rename variable
new to new_symbol.
* bfd/coffgen.c (coff_make_empty_symbol)
(coff_bfd_make_debug_symbol): Rename variable new to new_symbol.
* bfd/cpu-ia64-opc.c (ext_reg, ins_imms_scaled): Rename variable
new to new_insn.
* bfd/doc/chew.c (newentry, add_intrinsic): Rename variable new to
new_d.
* bfd/ecoff.c (_bfd_ecoff_make_empty_symbol): Rename variable new
to new_symbol.
* bfd/elf32-m68k.c (elf_m68k_get_got_entry_type): Rename argument
new to new_reloc.
* bfd/hash.c (bfd_hash_lookup): Rename variable new to new_string.
* bfd/ieee.c (ieee_make_empty_symbol): Rename variable new to
new_symbol.
* bfd/linker.c (bfd_new_link_order): Rename variable new to
new_lo.
* bfd/mach-o.c (bfd_mach_o_sizeof_headers): Rename variable new to
symbol.
* bfd/oasys.c (oasys_make_empty_symbol): Rename variable new to
new_symbol_type.
* bfd/pdp11.c (NAME (aout, make_empty_symbol)): Rename variable
new to new_symbol_type.
* bfd/plugin.c (bfd_plugin_make_empty_symbol): Rename variable new
to new_symbol.
* bfd/rs6000-core.c (CoreHdr, VmInfo): Rename union member new to
new_dump.
(read_hdr, rs6000coff_core_p)
(rs6000coff_core_file_matches_executable_p)
(rs6000coff_core_file_failing_command)
(rs6000coff_core_file_failing_signal): Updated function to use new
union member name.
* bfd/som.c (som_make_empty_symbol): Rename variable new to
new_symbol_type.
* bfd/syms.c (_bfd_generic_make_empty_symbol): Rename variable new
to new_symbol.
* bfd/tekhex.c (first_phase, tekhex_make_empty_symbol): Rename
variable new to new_symbol.
* binutils/nlmconv.c (main): Rename variable new to new_name.
* gas/config/tc-arm.c (insert_reg_alias): Rename variable new to
new_reg.
* gas/config/tc-dlx.c (parse_operand): Rename variable new to
new_pos.
* gas/config/tc-ia64.c (ia64_gen_real_reloc_type): Rename variable
new to newr.
* gas/config/tc-mcore.c (parse_exp, parse_imm): Rename variable
new to new_pointer.
* gas/config/tc-microblaze.c (parse_exp, parse_imm, check_got):
Change name from new to new_pointer.
* gas/config/tc-or32.c (parse_operand): Rename variable new to
new_pointer.
* gas/config/tc-pdp11.c (md_assemble): Rename variable new to
new_pointer.
* gas/config/tc-pj.c (alias): Change argument new to new_name.
* gas/config/tc-score.c (s3_build_score_ops_hsh): Rename variable
new to new_opcode. (s3_build_dependency_insn_hsh) Rename variable
new to new_i2n. (s3_convert): Rename variables old and new to
r_old and r_new.
* gas/config/tc-score7.c (s7_build_score_ops_hsh): Rename variable
new to new_opcode. (s7_build_dependency_insn_hsh): Rename variable
new to new_i2d. (s7_b32_relax_to_b16, s7_convert_frag): Rename
variables old and new to r_old and r_new.
* gas/config/tc-sh.c (parse_exp): Rename variable new to
new_pointer.
* gas/config/tc-sh64.c (shmedia_parse_exp): Rename variable new to
new_pointer.
* gas/config/tc-tic4x.c (tic4x_operand_parse): Rename variable new
to new_pointer.
* gas/config/tc-z8k.c (parse_exp): Rename variable new to
new_pointer.
* gas/listing.c (listing_newline): Rename variable new to new_i.
* ld/ldexp.c (exp_intop, exp_bigintop, exp_relop, exp_binop)
(exp_trinop, exp_unop, exp_nameop, exp_assop): Rename variable new
to new_e.
* ld/ldfile.c (ldfile_add_library_path): Rename variable new to
new_dirs. (ldfile_add_arch): Rename variable new to new_arch.
* ld/ldlang.c (new_statement, lang_final, lang_add_wild)
(lang_target, lang_add_fill, lang_add_data, lang_add_assignment)
(lang_add_insert): Rename variable new to new_stmt. (new_afile):
Added missing cast. (lang_memory_region_lookup): Rename variable
new to new_region. (init_os): Rename variable new to
new_userdata. (lang_add_section): Rename variable new to
new_section. (ldlang_add_undef): Rename variable new to
new_undef. (realsymbol): Rename variable new to new_name.
* opcodes/z8kgen.c (internal, gas): Rename variable new to new_op.
Updated sources to avoid using the identifier name "template",
which is a keyword in c++.
* bfd/elf32-arm.c (struct stub_def): Rename member template to
template_sequence. (arm_build_one_stub,
find_stub_size_and_template, arm_size_one_stub, arm_map_one_stub):
Rename variable template to template_sequence.
* bfd/elfxx-ia64.c (elfNN_ia64_relax_br, elfNN_ia64_relax_brl):
Rename variable template to template_val.
* gas/config/tc-arm.c (struct asm_cond, struct asm_psr, struct
asm_barrier_opt): Change member template to
template_name. (md_begin): Update code to reflect new member
names.
* gas/config/tc-i386.c (struct templates, struct _i386_insn)
(match_template, cpu_flags_match, match_reg_size, match_mem_size)
(operand_size_match, md_begin, i386_print_statistics, pi)
(build_vex_prefix, md_assemble, parse_insn, optimize_imm)
(optimize_disp): Updated code to use new names. (parse_insn):
Added casts.
* gas/config/tc-ia64.c (dot_template, emit_one_bundle): Updated
code to use new names.
* gas/config/tc-score.c (struct s3_asm_opcode): Renamed member
template to template_name. (s3_parse_16_32_inst, s3_parse_48_inst,
s3_do_macro_ldst_label, s3_build_score_ops_hsh): Update code to
use new names.
* gas/config/tc-score7.c (struct s7_asm_opcode): Renamed member
template to template_name. (s7_parse_16_32_inst,
s7_do_macro_ldst_label, s7_build_score_ops_hsh): Update code to
use new names.
* gas/config/tc-tic30.c (md_begin, struct tic30_insn)
(md_assemble): Update code to use new names.
* gas/config/tc-tic54x.c (struct _tic54x_insn, md_begin)
(optimize_insn, tic54x_parse_insn, next_line_shows_parallel):
Update code to use new names.
* include/opcode/tic30.h (template): Rename type template to
insn_template. Updated code to use new name.
* include/opcode/tic54x.h (template): Rename type template to
insn_template.
* opcodes/cris-dis.c (bytes_to_skip): Update code to use new name.
* opcodes/i386-dis.c (putop): Update code to use new name.
* opcodes/i386-gen.c (process_i386_opcodes): Update code to use
new name.
* opcodes/i386-opc.h (struct template): Rename struct template to
insn_template. Update code accordingly.
* opcodes/i386-tbl.h (i386_optab): Update type to use new name.
* opcodes/ia64-dis.c (print_insn_ia64): Rename variable template
to template_val.
* opcodes/tic30-dis.c (struct instruction, get_tic30_instruction):
Update code to use new name.
* opcodes/tic54x-dis.c (has_lkaddr, get_insn_size)
(print_parallel_instruction, print_insn_tic54x, tic54x_get_insn):
Update code to use new name.
* opcodes/tic54x-opc.c (tic54x_unknown_opcode, tic54x_optab):
Update type to new name.
2009-08-29 22:11:02 +00:00
|
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|
|
2009-08-29 Martin Thuresson <martin@mtme.org>
|
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|
* cris-dis.c (bytes_to_skip): Update code to use new name.
|
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|
* i386-dis.c (putop): Update code to use new name.
|
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* i386-gen.c (process_i386_opcodes): Update code to use
|
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new name.
|
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|
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* i386-opc.h (struct template): Rename struct template to
|
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|
|
insn_template. Update code accordingly.
|
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|
* i386-tbl.h (i386_optab): Update type to use new name.
|
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* ia64-dis.c (print_insn_ia64): Rename variable template
|
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|
to template_val.
|
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* tic30-dis.c (struct instruction, get_tic30_instruction):
|
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Update code to use new name.
|
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* tic54x-dis.c (has_lkaddr, get_insn_size)
|
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|
(print_parallel_instruction, print_insn_tic54x, tic54x_get_insn):
|
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|
Update code to use new name.
|
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|
* tic54x-opc.c (tic54x_unknown_opcode, tic54x_optab):
|
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|
Update type to new name.
|
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|
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* z8kgen.c (internal, gas): Rename variable new to new_op.
|
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2009-08-29 00:41:25 +00:00
|
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|
2009-08-28 H.J. Lu <hongjiu.lu@intel.com>
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* Makefile.am (COMPILE_FOR_BUILD): Remove BUILD_CPPFLAGS.
|
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Replace BUILD_CFLAGS with CFLAGS_FOR_BUILD.
|
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(LINK_FOR_BUILD): Replace BUILD_CFLAGS/BUILD_LDFLAGS with
|
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CFLAGS_FOR_BUILD/LDFLAGS_FOR_BUILD.
|
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* Makefile.in: Regenerated.
|
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2009-08-27 05:24:43 +00:00
|
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2009-08-27 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
|
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* Makefile.am (bfdlibdir, bfdincludedir): Move definition ...
|
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|
[INSTALL_LIBBFD]: ... here, ...
|
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|
[INSTALL_LIBBFD]: ... and empty overrides here.
|
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[!INSTALL_LIBBFD]: (rpath_bfdlibdir): New variable.
|
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|
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|
[!INSTALL_LIBBFD] (libbfd_la_LDFLAGS): Use it.
|
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* Makefile.in: Regenerate.
|
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* configure: Regenerate.
|
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2009-08-26 13:16:29 +00:00
|
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|
2009-08-26 Philippe De Muyter <phdm@macqel.be>
|
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|
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* m68k-dis.c (print_insn_arg): Add movecr register names for
|
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|
coldfire v4e families.
|
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|
|
2009-08-25 03:13:44 +00:00
|
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|
2009-08-25 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
|
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|
* Makefile.am (SUBDIRS): Build '.' before 'po'.
|
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|
(COMPILE_FOR_BUILD, LINK_FOR_BUILD, BUILD_LIBIBERTY)
|
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|
|
(MOSTLYCLEANFILES, MAINTAINERCLEANFILES): New variables.
|
|
|
|
|
|
(i386-gen$(EXEEXT_FOR_BUILD)): Renamed from i386-gen, rewrite
|
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|
|
|
|
using *BUILD variables, depend upon $(BUILD_LIBIBERTY).
|
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|
|
(i386-gen.o): New rule.
|
|
|
|
|
|
($(srcdir)/i386-init.h): Adjust.
|
|
|
|
|
|
(i386-opc.lo): Depend on $(srcdir)/i386-tbl.h.
|
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|
|
(ia64-gen$(EXEEXT_FOR_BUILD)): Rename from ia64-gen, adjust likewise.
|
|
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|
|
(ia64-gen.o): New rule.
|
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|
(ia64_asmtab_deps): New variable.
|
|
|
|
|
|
($(srcdir)/ia64-asmtab.c): Use it; adjust likewise.
|
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|
|
|
|
(ia64-opc.lo): Depend on $(srcdir)/ia64-asmtab.c.
|
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|
|
|
(s390-mkopc$(EXEEXT_FOR_BUILD)): Rename from s390-mkopc, adjust
|
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|
|
|
|
likewise.
|
|
|
|
|
|
(s390-opc.tab): Adjust.
|
|
|
|
|
|
(z8kgen$(EXEEXT_FOR_BUILD), z8kgen.o, $(srcdir)/z8k-opc.h): New
|
|
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|
|
|
rules.
|
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|
|
|
|
(z8k-dis.lo): Depend on $(srcdir)/z8k-opc.h.
|
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|
|
* Makefile.in: Regenerate.
|
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|
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|
|
* z8kgen.c (gas): Avoid '/*' in comment.
|
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|
|
|
* z8k-opc.h (func): Regenerate.
|
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|
|
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|
|
More build fixes in opcodes
opcodes/:
* Makefile.am (TARGET_LIBOPCODES_CFILES): New variable, taken
from $(CFILES), sorted, with dis-buf.c, dis-init.c, disassemble.c,
i386-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-f.c, ia64-opc-i.c,
ia64-opc-m.c, ia64-opc-d.c, ia64-gen.c, ia64-asmtab.c removed, and
msp430-dis.c added.
(LIBOPCODES_CFILES): New variable, adding to
TARGET_LIBOPCODES_CFILES also non-target library sources.
(CFILES): Factorize based on $(LIBOPCODES_CFILES), adding generator
files.
(ALL_MACHINES): Factorize based on $(TARGET_LIBOPCODES_CFILES).
(EXTRA_libopcodes_la_SOURCES): Use $(LIBOPCODES_CFILES).
* Makefile.in: Regenerate.
* po/POTFILES.in: Regenerate.
2009-08-24 19:05:01 +00:00
|
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|
2009-08-24 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
|
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|
|
|
|
|
|
|
|
|
* Makefile.am (TARGET_LIBOPCODES_CFILES): New variable, taken
|
|
|
|
|
|
from $(CFILES), sorted, with dis-buf.c, dis-init.c, disassemble.c,
|
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|
|
i386-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-f.c, ia64-opc-i.c,
|
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|
|
|
|
ia64-opc-m.c, ia64-opc-d.c, ia64-gen.c, ia64-asmtab.c removed, and
|
|
|
|
|
|
msp430-dis.c added.
|
|
|
|
|
|
(LIBOPCODES_CFILES): New variable, adding to
|
|
|
|
|
|
TARGET_LIBOPCODES_CFILES also non-target library sources.
|
|
|
|
|
|
(CFILES): Factorize based on $(LIBOPCODES_CFILES), adding generator
|
|
|
|
|
|
files.
|
|
|
|
|
|
(ALL_MACHINES): Factorize based on $(TARGET_LIBOPCODES_CFILES).
|
|
|
|
|
|
(EXTRA_libopcodes_la_SOURCES): Use $(LIBOPCODES_CFILES).
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
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|
|
|
|
* po/POTFILES.in: Regenerate.
|
|
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|
|
2009-08-22 16:56:56 +00:00
|
|
|
|
2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
|
|
|
|
|
|
|
Cleanups in binutils makefiles.
ld/:
* Makefile.am (bin_PROGRAMS): Renamed from ...
(noinst_PROGRAMS): ... this.
(transform): Override, including the renaming of ld-new to ld.
(install-exec-local): Installation of ld in $(bindir) not needed
here any more.
(AM_CPPFLAGS): Renamed from ...
(INCLUDES): ... this.
(MAINTAINERCLEANFILES): Add ld.1.
* Makefile.in: Regenerate.
gold/:
* Makefile.am (AM_CPPFLAGS): Renamed from ...
(INCLUDES): ... this.
* testsuite/Makefile.am (AUTOMAKE_OPTIONS): Add -Wno-portability.
(AM_CPPFLAGS): Renamed from ...
(INCLUDE): ... this.
* Makefile.in, testsuite/Makefile.in: Regenerate.
bfd/:
* Makefile.am (libbfd_la_LDFLAGS): Initialize early, to allow
appending.
[INSTALL_LIBBFD] (bfdlib_LTLIBRARIES, bfdinclude_HEADERS): Set
only in this condition.
[!INSTALL_LIBBFD] (noinst_LTLIBRARIES, libbfd_la_LDFLAGS): New,
to build but not install libbfd.la in this condition.
(install-bfdlibLTLIBRARIES, uninstall-bfdlibLTLIBRARIES)
(install_libbfd, install_libbfd): Remove.
* Makefile.in: Regenerate.
binutils/:
* Makefile.am (AM_CPPFLAGS): Renamed from ...
(INCLUDES): ... this.
(bin2c$(EXEEXT_FOR_BUILD): Adjust rule.
(installcheck-local): Renamed from ...
(installcheck): ... this.
* Makefile.in: Regenerate.
gas/:
* Makefile.am (YFLAGS): Remove, not needed any more.
(AM_CPPFLAGS): Renamed from ...
(INCLUDES): ... this.
* Makefile.in: Regenerate.
gprof/:
* Makefile.am (AM_CPPFLAGS): Renamed from ...
(INCLUDES): ... this.
* Makefile.in: Regenerate.
opcodes/:
* Makefile.am (libopcodes_la_LDFLAGS): Initialize early.
[INSTALL_LIBBFD] (bfdlib_LTLIBRARIES): Set only in this condition.
[INSTALL_LIBBFD] (bfdinclude_DATA): New.
[!INSTALL_LIBBFD] (noinst_LTLIBRARIES): New.
[!INSTALL_LIBBFD] (libopcodes_la_LDFLAGS): Ensure libopcodes.la
is built shared even if it is not to be installed.
(install-bfdlibLTLIBRARIES,uninstall-bfdlibLTLIBRARIES)
(install_libopcodes, uninstall_libopcodes): Remove.
(AM_CPPFLAGS): Renamed from ...
(INCLUDES): ... this.
* Makefile.in: Regenerate.
2009-08-22 19:02:57 +00:00
|
|
|
|
* Makefile.am (libopcodes_la_LDFLAGS): Initialize early.
|
|
|
|
|
|
[INSTALL_LIBBFD] (bfdlib_LTLIBRARIES): Set only in this condition.
|
|
|
|
|
|
[INSTALL_LIBBFD] (bfdinclude_DATA): New.
|
|
|
|
|
|
[!INSTALL_LIBBFD] (noinst_LTLIBRARIES): New.
|
|
|
|
|
|
[!INSTALL_LIBBFD] (libopcodes_la_LDFLAGS): Ensure libopcodes.la
|
|
|
|
|
|
is built shared even if it is not to be installed.
|
|
|
|
|
|
(install-bfdlibLTLIBRARIES,uninstall-bfdlibLTLIBRARIES)
|
|
|
|
|
|
(install_libopcodes, uninstall_libopcodes): Remove.
|
|
|
|
|
|
(AM_CPPFLAGS): Renamed from ...
|
|
|
|
|
|
(INCLUDES): ... this.
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
|
dependency tracking in opcodes
opcodes/:
* Makefile.am (AUTOMAKE_OPTIONS): Remove 1.9 and cygnus, add
1.11, foreign, no-dist.
(MKDEP, m32c_opc_h): Remove variables.
(disassemble.lo): Rewrite using automake-style dependency
tracking rules; only list the dependency upon the primary source
file, but no included headers.
(m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo)
(i386-gen.o, ia64-gen.o): Remove dependency statements.
(EXTRA_libopcodes_la_SOURCES): New variable, list $(CFILES) to
ensure all dependency fragments are included in the Makefile.
(s390-opc.lo): Depend on s390-opc.tab.
(DEP, DEP1, dep.sed, dep, dep-in, dep-am): Remove rules.
(mkdep section): Remove.
* Makefile.in: Regenerate.
* po/POTFILES.in: Regenerate.
2009-08-22 18:44:58 +00:00
|
|
|
|
* Makefile.am (AUTOMAKE_OPTIONS): Remove 1.9 and cygnus, add
|
|
|
|
|
|
1.11, foreign, no-dist.
|
|
|
|
|
|
(MKDEP, m32c_opc_h): Remove variables.
|
|
|
|
|
|
(disassemble.lo): Rewrite using automake-style dependency
|
|
|
|
|
|
tracking rules; only list the dependency upon the primary source
|
|
|
|
|
|
file, but no included headers.
|
|
|
|
|
|
(m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo)
|
|
|
|
|
|
(i386-gen.o, ia64-gen.o): Remove dependency statements.
|
|
|
|
|
|
(EXTRA_libopcodes_la_SOURCES): New variable, list $(CFILES) to
|
|
|
|
|
|
ensure all dependency fragments are included in the Makefile.
|
|
|
|
|
|
(s390-opc.lo): Depend on s390-opc.tab.
|
|
|
|
|
|
(DEP, DEP1, dep.sed, dep, dep-in, dep-am): Remove rules.
|
|
|
|
|
|
(mkdep section): Remove.
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
* po/POTFILES.in: Regenerate.
|
|
|
|
|
|
|
Cleanups after the update to Autoconf 2.64, Automake 1.11.
/:
* README-maintainer-mode: Point directly to upstream locations
for autoconf, automake, libtool, gettext, instead of copies on
sources.redhat.com. Document required versions.
* configure.ac: Do not substitute datarootdir, htmldir,
pdfdir, docdir. Do not process --with-datarootdir,
--with-htmldir, --with-pdfdir, --with-docdir.
* configure: Regenerate.
gdb/:
* CONTRIBUTE: Bump documented Autoconf version.
* configure.ac: Do not substitute datarootdir, htmldir,
pdfdir, docdir. Do not process --with-datarootdir,
--with-htmldir, --with-pdfdir, --with-docdir.
* configure: Regenerate.
gdb/doc/:
* gdbint.texinfo (Releasing GDB): Point to
README-maintainer-mode file for required autoconf version.
* configure.ac: Do not substitute datarootdir, htmldir,
pdfdir, docdir. Do not process --with-datarootdir,
--with-htmldir, --with-pdfdir, --with-docdir.
* configure: Regenerate.
gprof/:
* Makefile.am (pdf__strip_dir, install-pdf, install-pdf-am)
(install-pdf-recursive, html__strip_dir, install-html)
(install-html-am, install-html-recursive): Remove.
* Makefile.in: Regenerate.
opcodes/:
* Makefile.am (install-pdf, install-html): Remove.
* Makefile.in: Regenerate.
gas/:
* Makefile.am (install-pdf, install-pdf-recursive, install-html)
(install-html-recursive): Remove.
* Makefile.in: Regenerate.
* doc/Makefile.am (pdf__strip_dir, install-pdf, install-pdf-am)
(html__strip_dir, install-html, install-html-am): Remove.
* doc/Makefile.in: Regenerate.
ld/:
* Makefile.am (pdf__strip_dir, install-pdf, install-pdf-am)
(install-pdf-recursive, html__strip_dir, install-html)
(install-html-am, install-html-recursive): Remove.
* Makefile.in: Regenerate.
binutils/:
* Makefile.am (install-pdf, install-pdf-recursive, install-html)
(install-html-recursive): Remove.
* Makefile.in: Regenerate.
* doc/Makefile.am (pdf__strip_dir, install-pdf, install-pdf-am)
(html__strip_dir, install-html, install-html-am): Remove.
* doc/Makefile.in: Regenerate.
bfd/:
* Makefile.am (datarootdir, docdir, htmldor, pdfdir)
(install-pdf, install-pdf-recursive, install-html)
(install-html-recursive): Remove.
* Makefile.in: Regenerate.
bfd/doc/:
* Makefile.am (pdf__strip_dir, install-pdf, install-pdf-am)
(html__strip_dir, install-html, install-html-am): Remove.
* Makefile.in: Regenerate.
2009-08-22 17:08:11 +00:00
|
|
|
|
* Makefile.am (install-pdf, install-html): Remove.
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
|
2009-08-22 16:56:56 +00:00
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
* aclocal.m4: Likewise.
|
|
|
|
|
|
* config.in: Likewise.
|
|
|
|
|
|
* configure: Likewise.
|
|
|
|
|
|
|
Add support for Xilinx MicroBlaze processor.
* bfd/Makefile.am: Add cpu-microblaze.{lo,c}, elf32-microblaze.{lo,c}.
* bfd/Makefile.in: Same.
* bfd/archures.c: Add bfd_arch_microblaze.
* bfd/bfd-in2.h: Regenerate.
* bfd/config.bfd: Add microblaze target.
* bfd/configure: Add bfd_elf32_microblaze_vec target.
* bfd/configure.in: Same.
* bfd/cpu-microblaze.c: New.
* bfd/elf32-microblaze.c: New.
* bfd/libbfd-in.h: Add prototype _bfd_dwarf2_fixup_section_debug_loc().
* bfd/libbfd.h: Regenerate.
* bfd/reloc.c: Add MICROBLAZE relocations.
* bfd/section.c: Add struct relax_table and relax_count to section.
* bfd/targets.c: Add bfd_elf32_microblaze_vec.
* binutils/MAINTAINERS: Add self as maintainer.
* binutils/readelf.c: Include elf/microblaze.h, add EM_MICROBLAZE &
EM_MICROBLAZE_OLD to guess_is_rela(), dump_relocations(),
get_machine_name().
* config.sub: Add microblaze target.
* configure: Same.
* configure.ac: Same.
* gas/Makefile.am: add microblaze to CPU_TYPES, config/tc-microblaze.c to
TARGET_CPU_CFILES, config/tc-microblaze.h to TARGET_CPU_HFILES, add
DEP_microblaze_elf target.
* gas/Makefile.in: Same.
* gas/config/tc-microblaze.c: Add MicroBlaze assembler.
* gas/config/tc-microblaze.h: Add header for tc-microblaze.c.
* gas/configure: Add microblaze target.
* gas/configure.in: Same.
* gas/configure.tgt: Same.
* gas/doc/Makefile.am: Add c-microblaze.texi to CPU_DOCS.
* gas/doc/Makefile.in: Same.
* gas/doc/all.texi: Set MICROBLAZE.
* gas/doc/as.texinfo: Add MicroBlaze doc links.
* gas/doc/c-microblaze.texi: New MicroBlaze docs.
* include/dis-asm.h: Decl print_insn_microblaze().
* include/elf/common.h: Define EM_MICROBLAZE & EM_MICROBLAZE_OLD.
* include/elf/microblaze.h: New reloc definitions.
* ld/Makefile.am: Add eelf32mb_linux.o, eelf32microblaze.o to
ALL_EMULATIONS, targets.
* ld/Makefile.in: Same.
* ld/configure.tgt: Add microblaze*-linux*, microblaze* targets.
* ld/emulparams/elf32mb_linux.sh: New.
* ld/emulparams/elf32microblaze.sh. New.
* ld/scripttempl/elfmicroblaze.sc: New.
* opcodes/Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to
CFILES, microblaze-dis.lo to ALL_MACHINES, targets.
* opcodes/Makefile.in: Same.
* opcodes/configure: Add bfd_microblaze_arch target.
* opcodes/configure.in: Same.
* opcodes/disassemble.c: Define ARCH_microblaze, return
print_insn_microblaze().
* opcodes/microblaze-dis.c: New MicroBlaze disassembler.
* opcodes/microblaze-opc.h: New MicroBlaze opcode definitions.
* opcodes/microblaze-opcm.h: New MicroBlaze opcode types.
2009-08-06 17:38:04 +00:00
|
|
|
|
2009-08-06 Michael Eager <eager@eagercon.com>
|
|
|
|
|
|
|
|
|
|
|
|
* Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to
|
|
|
|
|
|
CFILES, microblaze-dis.lo to ALL_MACHINES, targets.
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
* configure.in: Add bfd_microblaze_arch target.
|
|
|
|
|
|
* configure: Regenerate.
|
2009-10-02 15:35:01 +00:00
|
|
|
|
* disassemble.c: Define ARCH_microblaze, return
|
Add support for Xilinx MicroBlaze processor.
* bfd/Makefile.am: Add cpu-microblaze.{lo,c}, elf32-microblaze.{lo,c}.
* bfd/Makefile.in: Same.
* bfd/archures.c: Add bfd_arch_microblaze.
* bfd/bfd-in2.h: Regenerate.
* bfd/config.bfd: Add microblaze target.
* bfd/configure: Add bfd_elf32_microblaze_vec target.
* bfd/configure.in: Same.
* bfd/cpu-microblaze.c: New.
* bfd/elf32-microblaze.c: New.
* bfd/libbfd-in.h: Add prototype _bfd_dwarf2_fixup_section_debug_loc().
* bfd/libbfd.h: Regenerate.
* bfd/reloc.c: Add MICROBLAZE relocations.
* bfd/section.c: Add struct relax_table and relax_count to section.
* bfd/targets.c: Add bfd_elf32_microblaze_vec.
* binutils/MAINTAINERS: Add self as maintainer.
* binutils/readelf.c: Include elf/microblaze.h, add EM_MICROBLAZE &
EM_MICROBLAZE_OLD to guess_is_rela(), dump_relocations(),
get_machine_name().
* config.sub: Add microblaze target.
* configure: Same.
* configure.ac: Same.
* gas/Makefile.am: add microblaze to CPU_TYPES, config/tc-microblaze.c to
TARGET_CPU_CFILES, config/tc-microblaze.h to TARGET_CPU_HFILES, add
DEP_microblaze_elf target.
* gas/Makefile.in: Same.
* gas/config/tc-microblaze.c: Add MicroBlaze assembler.
* gas/config/tc-microblaze.h: Add header for tc-microblaze.c.
* gas/configure: Add microblaze target.
* gas/configure.in: Same.
* gas/configure.tgt: Same.
* gas/doc/Makefile.am: Add c-microblaze.texi to CPU_DOCS.
* gas/doc/Makefile.in: Same.
* gas/doc/all.texi: Set MICROBLAZE.
* gas/doc/as.texinfo: Add MicroBlaze doc links.
* gas/doc/c-microblaze.texi: New MicroBlaze docs.
* include/dis-asm.h: Decl print_insn_microblaze().
* include/elf/common.h: Define EM_MICROBLAZE & EM_MICROBLAZE_OLD.
* include/elf/microblaze.h: New reloc definitions.
* ld/Makefile.am: Add eelf32mb_linux.o, eelf32microblaze.o to
ALL_EMULATIONS, targets.
* ld/Makefile.in: Same.
* ld/configure.tgt: Add microblaze*-linux*, microblaze* targets.
* ld/emulparams/elf32mb_linux.sh: New.
* ld/emulparams/elf32microblaze.sh. New.
* ld/scripttempl/elfmicroblaze.sc: New.
* opcodes/Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to
CFILES, microblaze-dis.lo to ALL_MACHINES, targets.
* opcodes/Makefile.in: Same.
* opcodes/configure: Add bfd_microblaze_arch target.
* opcodes/configure.in: Same.
* opcodes/disassemble.c: Define ARCH_microblaze, return
print_insn_microblaze().
* opcodes/microblaze-dis.c: New MicroBlaze disassembler.
* opcodes/microblaze-opc.h: New MicroBlaze opcode definitions.
* opcodes/microblaze-opcm.h: New MicroBlaze opcode types.
2009-08-06 17:38:04 +00:00
|
|
|
|
print_insn_microblaze().
|
|
|
|
|
|
* microblaze-dis.c: New MicroBlaze disassembler.
|
|
|
|
|
|
* microblaze-opc.h: New MicroBlaze opcode definitions.
|
|
|
|
|
|
* microblaze-opcm.h: New MicroBlaze opcode types.
|
|
|
|
|
|
|
2009-07-25 14:58:58 +00:00
|
|
|
|
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* configure.in: Handle bfd_l1om_arch.
|
|
|
|
|
|
* disassemble.c (disassembler): Likewise.
|
|
|
|
|
|
|
|
|
|
|
|
* configure: Regenerated.
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c (print_insn): Handle bfd_mach_l1om and
|
|
|
|
|
|
bfd_mach_l1om_intel_syntax. Use 8 bytes per line for Intel L1OM.
|
|
|
|
|
|
|
|
|
|
|
|
* i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~CpuL1OM.
|
|
|
|
|
|
Add CPU_L1OM_FLAGS.
|
|
|
|
|
|
(cpu_flags): Add CpuL1OM.
|
|
|
|
|
|
(set_bitfield): Take an argument to set the value field.
|
|
|
|
|
|
(process_i386_cpu_flag): Support ~CpuXXX and ~(CpuXXX|CpuYYY).
|
|
|
|
|
|
(process_i386_opcode_modifier): Updated.
|
|
|
|
|
|
(process_i386_operand_type): Likewise.
|
|
|
|
|
|
* i386-init.h: Regenerated.
|
|
|
|
|
|
* i386-tbl.h: Likewise.
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.h (CpuL1OM): New.
|
|
|
|
|
|
(CpuXsave): Updated.
|
|
|
|
|
|
(i386_cpu_flags): Add cpul1om.
|
|
|
|
|
|
|
gas/
2009-07-24 Jan Beulich <jbeulich@novell.com>
* tc-i386.c (cpu_arch): Add .8087, .287, .387, .no87, .nommx,
.nosse, and .noavx.
(cpu_flags_and_not): New.
(set_cpu_arch): Check whether sub-architecture specified is a
feature disable.
(md_parse_option): Likewise.
(parse_real_register): Don't return floating point register
when x87 functionality is disabled.
(md_show_usage): Add new sub-options.
* doc/c-i386.texi: Update with new command line sub-options.
gas/testsuite/
2009-07-24 Jan Beulich <jbeulich@novell.com>
* gas/i386/8087.[ds]: New.
* gas/i386/287.[ds]: New.
* gas/i386/387.[ds]: New.
* gas/i386/no87.[ls]: New.
* gas/i386/no87-2.[ls]: New.
* gas/i386/i386.exp: Run new tests.
* gas/i386/att-regs.s: Also check FPU register access.
* gas/i386/intel-regs.s: Likewise.
* gas/i386/att-regs.d: Adjust expectations.
* gas/i386/intel-regs.d: Likewise.
opcodes/
2009-07-24 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (fgrps): Correct annotation for feni/fdisi. Add
frstpm.
* i386-gen.c (cpu_flag_init): Add FP enabling flags where needed.
(cpu_flags): Add Cpu8087, Cpu287, Cpu387, Cpu687, and CpuFISTTP.
(set_bitfield): Expand CpuFP to Cpu8087|Cpu287|Cpu387.
* i386-opc.h (Cpu8087, Cpu287, Cpu387, Cpu687, CpuFISTTP):
Define.
(union i386_cpu_flags): Add cpu8087, cpu287, cpu387, cpu687,
and cpufisttp.
* i386-opc.tbl: Qualify floating point instructions by their
respective CpuXXX flag. Fix fucom{,p,pp}, fprem1, fsin, fcos,
and fsincos to be avilable only on 387. Fix fstsw ax to be
available only on 287+. Add f{,n}eni, f{,n}disi, f{,n}setpm,
and frstpm.
* i386-init.h, i386-tbl.h: Regenerate.
2009-07-24 15:41:20 +00:00
|
|
|
|
2009-07-24 Jan Beulich <jbeulich@novell.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c (fgrps): Correct annotation for feni/fdisi. Add
|
|
|
|
|
|
frstpm.
|
|
|
|
|
|
* i386-gen.c (cpu_flag_init): Add FP enabling flags where needed.
|
|
|
|
|
|
(cpu_flags): Add Cpu8087, Cpu287, Cpu387, Cpu687, and CpuFISTTP.
|
|
|
|
|
|
(set_bitfield): Expand CpuFP to Cpu8087|Cpu287|Cpu387.
|
|
|
|
|
|
* i386-opc.h (Cpu8087, Cpu287, Cpu387, Cpu687, CpuFISTTP):
|
|
|
|
|
|
Define.
|
|
|
|
|
|
(union i386_cpu_flags): Add cpu8087, cpu287, cpu387, cpu687,
|
|
|
|
|
|
and cpufisttp.
|
|
|
|
|
|
* i386-opc.tbl: Qualify floating point instructions by their
|
|
|
|
|
|
respective CpuXXX flag. Fix fucom{,p,pp}, fprem1, fsin, fcos,
|
|
|
|
|
|
and fsincos to be avilable only on 387. Fix fstsw ax to be
|
|
|
|
|
|
available only on 287+. Add f{,n}eni, f{,n}disi, f{,n}setpm,
|
|
|
|
|
|
and frstpm.
|
|
|
|
|
|
* i386-init.h, i386-tbl.h: Regenerate.
|
|
|
|
|
|
|
2009-07-20 12:11:18 +00:00
|
|
|
|
2009-07-20 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 10288
|
|
|
|
|
|
* arm-dis.c (arm_opcodes): Catch non-zero bits 8-11 in register
|
|
|
|
|
|
offset or indexed based addressing mode 3.
|
|
|
|
|
|
|
2009-07-14 14:16:34 +00:00
|
|
|
|
2009-07-14 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 10288
|
|
|
|
|
|
* arm-dis.c (arm_opcodes): Catch illegal Addressing Mode 1
|
|
|
|
|
|
patterns.
|
|
|
|
|
|
(arm_decode_shift): Catch illegal register based shifts.
|
|
|
|
|
|
(print_insn_arm): Properly handle negative register r0
|
|
|
|
|
|
post-indexed addressing.
|
|
|
|
|
|
|
2009-07-10 16:58:54 +00:00
|
|
|
|
2009-07-10 Doug Kwan <dougkwan@google.com>
|
|
|
|
|
|
|
|
|
|
|
|
* arm-disc.c (print_insn_coprocessor, print_insn_arm): Print only
|
|
|
|
|
|
lower 32 bits of long types to make hexadecimal output consistent
|
|
|
|
|
|
on both 32-bit and 64-bit hosts.
|
|
|
|
|
|
|
2009-07-10 14:20:41 +00:00
|
|
|
|
2009-07-10 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
* fr30-desc.c, * fr30-desc.h, * fr30-opc.c, * fr30-opc.h,
|
|
|
|
|
|
* frv-desc.c, * frv-desc.h, * frv-opc.c, * frv-opc.h,
|
|
|
|
|
|
* ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c, * ip2k-opc.h,
|
|
|
|
|
|
* iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c, * iq2000-opc.h,
|
|
|
|
|
|
* lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opc.h,
|
|
|
|
|
|
* lm32-opinst.c, * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
|
|
|
|
|
|
* m32c-opc.h, * m32r-desc.c, * m32r-desc.h, * m32r-opc.c,
|
|
|
|
|
|
* m32r-opc.h, * m32r-opinst.c, * mt-desc.c, * mt-desc.h,
|
|
|
|
|
|
* mt-opc.c, * mt-opc.h, * openrisc-desc.c, * openrisc-desc.h,
|
|
|
|
|
|
* openrisc-opc.c, * openrisc-opc.h, * xc16x-desc.c, * xc16x-desc.h,
|
2009-10-02 15:35:01 +00:00
|
|
|
|
* xc16x-opc.c, * xc16x-opc.h, * xstormy16-desc.c, * xstormy16-desc.h,
|
2009-07-10 14:20:41 +00:00
|
|
|
|
* xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
|
|
|
|
|
|
|
2009-07-07 16:15:32 +00:00
|
|
|
|
2009-07-07 Chung-Lin Tang <cltang@pllab.cs.nthu.edu.tw>
|
|
|
|
|
|
|
|
|
|
|
|
* arm-dis.c (coprocessor_opcodes): Fix mask for waddbhus.
|
|
|
|
|
|
|
2009-07-07 14:46:14 +00:00
|
|
|
|
2009-07-07 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 10288
|
|
|
|
|
|
* arm-dis.c (arm_opcodes): Be more strict about decoding scaled
|
|
|
|
|
|
addressing modes.
|
|
|
|
|
|
|
2009-07-07 01:56:05 +00:00
|
|
|
|
2009-07-06 DJ Delorie <dj@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* mep-desc.c: Regenerate.
|
|
|
|
|
|
* mep-desc.h: Regenerate.
|
|
|
|
|
|
* mep-opc.c: Regenerate.
|
|
|
|
|
|
* mep-opc.h: Regenerate.
|
|
|
|
|
|
|
<gas changes>
2009-07-06 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
* config/tc-i386.c (cpu_arch): Add .fma4 and CPU_FMA4_FLAGS.
(build_modrm_byte): Add support to handle FMA4 instructions.
(md_show_usage): Add fma4.
<gas/testsuite changes>
2009-07-06 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
* gas/i386/i386.exp: Add FMA4 tests.
* gas/i386/x86-64-fma4.d: Ditto.
* gas/i386/fma4.d: Ditto.
* gas/i386/x86-64-fma4.s: Ditto.
* gas/i386/fma4.s: Ditto.
<opcodes changes>
2009-07-06 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
* i386-opc.h (CpuFMA4): Add CpuFMA4.
(i386_cpu_flags): New.
* i386-gen.c: Add CPU_FMA4_FLAGS.
* i386-opc.tbl: Add FMA4 instructions.
* i386-tbl.h: Regenerate.
* i386-init.h: Regenerate.
* i386-dis.c (OP_VEX_FMA): New. Handle FMA4.
(OP_XMM_VexW): Ditto.
(OP_EX_VexW): Ditto.
(VEXI4_Fixup): Ditto.
(VexI4, VexFMA, Vex128FMA, EXVexW, EXdVexW, XMVexW): New Macros.
(PREFIX_VEX_3A5C, PREFIX_VEX_3A5D, PREFIX_VEX_3A5E): New.
(PREFIX_VEX_3A5F, PREFIX_VEX_3A60): New.
(PREFIX_VEX_3A68, PREFIX_VEX_3A69, PREFIX_VEX_3A6A): New.
(PREFIX_VEX_3A6B, PREFIX_VEX_3A6C, PREFIX_VEX_3A6D): New.
(PREFIX_VEX_3A6E, PREFIX_VEX_3A6F, PREFIX_VEX_3A7A): New.
(PREFIX_VEX_3A7B, PREFIX_VEX_3A7C, PREFIX_VEX_3A7D): New.
(PREFIX_VEX_3A7E, PREFIX_VEX_3A7F): New.
(VEX_LEN_3A6A_P_2,VEX_LEN_3A6B_P_2, VEX_LEN_3A6E_P_2): New.
(VEX_LEN_3A6F_P_2,VEX_LEN_3A7A_P_2, VEX_LEN_3A7B_P_2): New.
(VEX_LEN_3A7E_P_2,VEX_LEN_3A7F_P_2): New.
(get_vex_imm8): New. handle FMA4.
(OP_EX_VexReg): Ditto.
2009-07-06 19:34:30 +00:00
|
|
|
|
2009-07-06 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.h (CpuFMA4): Add CpuFMA4.
|
|
|
|
|
|
(i386_cpu_flags): New.
|
|
|
|
|
|
* i386-gen.c: Add CPU_FMA4_FLAGS.
|
|
|
|
|
|
* i386-opc.tbl: Add FMA4 instructions.
|
|
|
|
|
|
* i386-tbl.h: Regenerate.
|
|
|
|
|
|
* i386-init.h: Regenerate.
|
|
|
|
|
|
* i386-dis.c (OP_VEX_FMA): New. Handle FMA4.
|
|
|
|
|
|
(OP_XMM_VexW): Ditto.
|
|
|
|
|
|
(OP_EX_VexW): Ditto.
|
|
|
|
|
|
(VEXI4_Fixup): Ditto.
|
|
|
|
|
|
(VexI4, VexFMA, Vex128FMA, EXVexW, EXdVexW, XMVexW): New Macros.
|
|
|
|
|
|
(PREFIX_VEX_3A5C, PREFIX_VEX_3A5D, PREFIX_VEX_3A5E): New.
|
|
|
|
|
|
(PREFIX_VEX_3A5F, PREFIX_VEX_3A60): New.
|
|
|
|
|
|
(PREFIX_VEX_3A68, PREFIX_VEX_3A69, PREFIX_VEX_3A6A): New.
|
|
|
|
|
|
(PREFIX_VEX_3A6B, PREFIX_VEX_3A6C, PREFIX_VEX_3A6D): New.
|
|
|
|
|
|
(PREFIX_VEX_3A6E, PREFIX_VEX_3A6F, PREFIX_VEX_3A7A): New.
|
|
|
|
|
|
(PREFIX_VEX_3A7B, PREFIX_VEX_3A7C, PREFIX_VEX_3A7D): New.
|
|
|
|
|
|
(PREFIX_VEX_3A7E, PREFIX_VEX_3A7F): New.
|
|
|
|
|
|
(VEX_LEN_3A6A_P_2,VEX_LEN_3A6B_P_2, VEX_LEN_3A6E_P_2): New.
|
|
|
|
|
|
(VEX_LEN_3A6F_P_2,VEX_LEN_3A7A_P_2, VEX_LEN_3A7B_P_2): New.
|
|
|
|
|
|
(VEX_LEN_3A7E_P_2,VEX_LEN_3A7F_P_2): New.
|
|
|
|
|
|
(get_vex_imm8): New. handle FMA4.
|
|
|
|
|
|
(OP_EX_VexReg): Ditto.
|
2009-10-02 15:35:01 +00:00
|
|
|
|
|
2009-06-30 11:57:05 +00:00
|
|
|
|
2009-06-30 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 10288
|
|
|
|
|
|
* arm-dis.c (coprocessor): Print the LDC and STC versions of the
|
|
|
|
|
|
LFM and SFM instructions as comments,.
|
|
|
|
|
|
Improve consistency of formatting for instructions displayed as
|
|
|
|
|
|
comments and decimal values displayed with their hexadecimal
|
|
|
|
|
|
equivalents.
|
|
|
|
|
|
Formatting tidy ups.
|
|
|
|
|
|
|
2009-06-29 08:08:15 +00:00
|
|
|
|
2009-06-29 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 10288
|
|
|
|
|
|
* arm-dis.c (enum opcode_sentinels): New: Used to mark the
|
|
|
|
|
|
boundary between variaant and generic coprocessor instuctions.
|
|
|
|
|
|
(coprocessor): Use it.
|
|
|
|
|
|
Fix architecture version of MCRR and MRRC instructions.
|
|
|
|
|
|
(arm_opcdes): Fix patterns for STRB and STRH instructions.
|
|
|
|
|
|
(print_insn_coprocessor): Check architecture and extension masks.
|
|
|
|
|
|
Print a hexadecimal version of any decimal constant that is
|
|
|
|
|
|
outside of the range of -16 to +32.
|
|
|
|
|
|
(print_arm_address): Add a return value of the offset used in the
|
|
|
|
|
|
adress, if it is worth printing a hexadecimal version of it.
|
|
|
|
|
|
(print_insn_neon): Print a hexadecimal version of any decimal
|
|
|
|
|
|
constant that is outside of the range of -16 to +32.
|
|
|
|
|
|
(print_insn_arm): Likewise.
|
|
|
|
|
|
(print_insn_thumb16): Likewise.
|
|
|
|
|
|
(print_insn_thumb32): Likewise.
|
2009-10-02 15:35:01 +00:00
|
|
|
|
|
2009-06-29 08:08:15 +00:00
|
|
|
|
PR 10297
|
|
|
|
|
|
* arm-dis.c (UNDEFINED_INSTRUCTION): New macro for a description
|
|
|
|
|
|
of an undefined instruction.
|
|
|
|
|
|
(arm_opcodes): Use it.
|
|
|
|
|
|
(thumb_opcod): Use it.
|
|
|
|
|
|
(thumb32_opc): Use it.
|
|
|
|
|
|
|
2009-06-24 01:44:53 +00:00
|
|
|
|
2009-06-23 DJ Delorie <dj@redhat.com>
|
|
|
|
|
|
|
2009-06-24 03:06:42 +00:00
|
|
|
|
* mep-desc.c: Regenerate.
|
|
|
|
|
|
* mep-desc.h: Regenerate.
|
|
|
|
|
|
* mep-dis.c: Regenerate.
|
|
|
|
|
|
* mep-ibld.c: Regenerate.
|
|
|
|
|
|
* mep-opc.c: Regenerate.
|
|
|
|
|
|
|
2009-06-24 01:44:53 +00:00
|
|
|
|
* mep-asm.c: Regenerate.
|
|
|
|
|
|
* mep-opc.c: Regenerate.
|
|
|
|
|
|
* mep-opc.h: Regenerate.
|
|
|
|
|
|
|
2009-06-22 11:32:21 +00:00
|
|
|
|
2009-06-22 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* po/fi.po: Updated Finish translation.
|
|
|
|
|
|
|
2009-06-22 00:53:25 +00:00
|
|
|
|
2009-06-22 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
* m32c-asm.c: Regenerate.
|
|
|
|
|
|
|
2009-06-22 00:01:57 +00:00
|
|
|
|
2009-06-22 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
* score-dis.c (print_insn_score48, print_insn_score32): Move default
|
|
|
|
|
|
case label to proper lexical block.
|
|
|
|
|
|
* score7-dis.c (print_insn_score32): Likewise.
|
|
|
|
|
|
|
2009-06-19 10:55:42 +00:00
|
|
|
|
2009-06-19 Martin Schwidefsky <sschwidefsky@de.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* s390-opc.c (INSTR_RR_0R_OPT, INSTR_RX_0RRD_OPT, MASK_RR_0R_OPT,
|
|
|
|
|
|
MASK_RX_0RRD_OPT): New instruction formats with optional arguments.
|
|
|
|
|
|
* s390-opc.txt (nopr, nop): Use new instruction format.
|
|
|
|
|
|
|
2009-06-18 10:31:21 +00:00
|
|
|
|
2009-06-18 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 10288
|
|
|
|
|
|
* arm-dis.c (print_insn_coprocessor): Check that a user specified
|
|
|
|
|
|
ARM architecture supports the matched instruction.
|
|
|
|
|
|
(print_insn_arm): Likewise.
|
|
|
|
|
|
(select_arm_features): New function. Fills in the fields of an
|
|
|
|
|
|
arm_feature_set structure based on a given arm machine number.
|
|
|
|
|
|
(print_insn): Initialise an arm_feature_set structure.
|
|
|
|
|
|
|
2009-06-16 02:23:09 +00:00
|
|
|
|
2009-06-16 Maciej W. Rozycki <macro@linux-mips.org>
|
|
|
|
|
|
|
|
|
|
|
|
* vax-dis.c (is_function_entry): Return success for synthetic
|
|
|
|
|
|
symbols too.
|
|
|
|
|
|
(is_plt_tail): New function.
|
|
|
|
|
|
(print_insn_vax): Decode PLT entry offset longword.
|
|
|
|
|
|
|
2009-06-15 15:24:52 +00:00
|
|
|
|
2009-06-15 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
2009-06-15 15:42:36 +00:00
|
|
|
|
PR 10186
|
|
|
|
|
|
* arm-dis.c (thumb32_opcodes): Fix binary value of SEV.W
|
|
|
|
|
|
instruction.
|
|
|
|
|
|
|
2009-06-15 15:24:52 +00:00
|
|
|
|
PR 10173
|
|
|
|
|
|
* cr16-dis.c (print_arg): Avoid printing the 0x prefix twice.
|
|
|
|
|
|
|
2009-06-15 11:37:26 +00:00
|
|
|
|
2009-06-15 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 10263
|
|
|
|
|
|
* arm-dis.c (print_insn): Ignore is_data if the user has requested
|
|
|
|
|
|
the disassembly of data as well as instructions.
|
|
|
|
|
|
|
2009-06-14 16:36:56 +00:00
|
|
|
|
2009-06-11 Doug Evans <dje@sebabeach.org>
|
|
|
|
|
|
|
|
|
|
|
|
* cgen.sh: Handle multiple simultaneous runs for parallel makes.
|
|
|
|
|
|
|
2009-06-11 11:27:58 +00:00
|
|
|
|
2009-06-11 Anthony Green <green@moxielogic.com>
|
|
|
|
|
|
|
|
|
|
|
|
* moxie-opc.c (moxie_form1_opc_info): Remove branch instructions.
|
|
|
|
|
|
(moxie_form3_opc_info): Add branch instructions.
|
|
|
|
|
|
* moxie-dis.c (print_insn_moxie): Disassemble MOXIE_F3_PCREL
|
|
|
|
|
|
encoded instructions.
|
|
|
|
|
|
|
2009-06-06 13:02:21 +00:00
|
|
|
|
2009-06-06 Anthony Green <green@moxielogic.com>
|
|
|
|
|
|
|
|
|
|
|
|
* moxie-opc.c: Recode some MOXIE_F1_4 opcodes as MOXIE_F1_M.
|
|
|
|
|
|
* moxie-dis.c (print_insn_moxie): Handle MOXIE_F1_M case.
|
|
|
|
|
|
|
2009-06-04 06:57:56 +00:00
|
|
|
|
2009-06-04 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
* dep-in.sed: Don't use \n in replacement part of s command.
|
|
|
|
|
|
* Makefile.am (DEP1): LC_ALL for uniq.
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
|
2009-06-02 16:31:59 +00:00
|
|
|
|
2009-06-02 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* po/nl.po: Updated Dutch translation.
|
|
|
|
|
|
|
2009-05-29 Tristan Gingold <gingold@adacore.com>
* ia64-gen.c (parse_resource_users, print_dependency_table,
add_dis_table_ent, finish_distable, insert_bit_table_ent,
add_dis_entry, compact_distree, gen_dis_table, completer_entries_eq,
get_prefix_len, compute_completer_bits, insert_opcode_dependencies,
insert_completer_entry, print_completer_entry, print_completer_table,
opcodes_eq, add_opcode_entry, shrink): Use ISO C syntax for functions.
2009-06-02 07:48:05 +00:00
|
|
|
|
2009-06-02 Tristan Gingold <gingold@adacore.com>
|
|
|
|
|
|
|
|
|
|
|
|
* ia64-gen.c (parse_resource_users, print_dependency_table,
|
|
|
|
|
|
add_dis_table_ent, finish_distable, insert_bit_table_ent,
|
|
|
|
|
|
add_dis_entry, compact_distree, gen_dis_table, completer_entries_eq,
|
|
|
|
|
|
get_prefix_len, compute_completer_bits, insert_opcode_dependencies,
|
|
|
|
|
|
insert_completer_entry, print_completer_entry, print_completer_table,
|
|
|
|
|
|
opcodes_eq, add_opcode_entry, shrink): Use ISO C syntax for functions.
|
|
|
|
|
|
|
2009-05-28 22:53:08 +00:00
|
|
|
|
2009-05-28 DJ Delorie <dj@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* mep-asm.c: Regenerate.
|
|
|
|
|
|
* mep-desc.c: Regenerate.
|
|
|
|
|
|
|
2009-05-27 01:49:46 +00:00
|
|
|
|
2009-05-26 DJ Delorie <dj@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* mep-asm.c: Regenerate.
|
|
|
|
|
|
* mep-desc.c: Regenerate.
|
|
|
|
|
|
* mep-desc.h: Regenerate.
|
|
|
|
|
|
* mep-dis.c: Regenerate.
|
|
|
|
|
|
* mep-ibld.c: Regenerate.
|
|
|
|
|
|
* mep-opc.c: Regenerate.
|
|
|
|
|
|
* mep-opc.h: Regenerate.
|
|
|
|
|
|
|
2009-05-26 16:49:41 +00:00
|
|
|
|
2009-05-26 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* po/id.po: Updated Indonesian translation.
|
|
|
|
|
|
* po/opcodes.pot: Updated template file.
|
|
|
|
|
|
|
2009-05-26 03:19:28 +00:00
|
|
|
|
2009-05-26 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
* dep-in.sed: Don't modify .o to .lo here. Output one filename
|
|
|
|
|
|
per line with all lines having continuation backslash. Prefix
|
|
|
|
|
|
first line with "A", following lines with "B".
|
|
|
|
|
|
* Makefile.am (DEP): Don't use dep.sed here.
|
|
|
|
|
|
(DEP1): Run $MKDEP on single files, modify .o to .lo here. Use
|
|
|
|
|
|
dep.sed here on dependencies, sort and uniq.
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
|
2009-05-25 12:43:48 +00:00
|
|
|
|
2009-05-25 Tristan Gingold <gingold@adacore.com>
|
|
|
|
|
|
|
|
|
|
|
|
* makefile.vms (OPT): New variable.
|
|
|
|
|
|
(CFLAGS): Update compilation flags.
|
|
|
|
|
|
|
2009-05-22 17:37:45 +00:00
|
|
|
|
2009-05-22 DJ Delorie <dj@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* mep-asm.c: Regenerate.
|
|
|
|
|
|
* mep-desc.c: Regenerate.
|
|
|
|
|
|
* mep-desc.h: Regenerate.
|
|
|
|
|
|
* mep-dis.c: Regenerate.
|
|
|
|
|
|
* mep-ibld.c: Regenerate.
|
|
|
|
|
|
* mep-opc.c: Regenerate.
|
|
|
|
|
|
* mep-opc.h: Regenerate.
|
|
|
|
|
|
|
2009-05-22 15:57:25 +00:00
|
|
|
|
2009-05-22 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.h (Cpusse5): Delete.
|
|
|
|
|
|
(i386_cpu_flags): Delete.
|
|
|
|
|
|
* i386-gen.c: Remove CpuSSE5, Drex, Drexv and Drexc.
|
|
|
|
|
|
* i386-opc.tbl: Remove SSE5 instructions.
|
|
|
|
|
|
* i386-tbl.h: Regenerate.
|
|
|
|
|
|
* i386-init.h: Regenerate.
|
|
|
|
|
|
* i386-dis.c (OP_E_memeory, OP_E_extended): Remove drex handling.
|
|
|
|
|
|
(print_drex_arg): Delete.
|
|
|
|
|
|
(OP_DREX4): Delete.
|
|
|
|
|
|
(OP_DREX3): Delete.
|
|
|
|
|
|
(OP_DREX_ICMP): Delete.
|
|
|
|
|
|
(OP_DREX_FCMP): Delete.
|
|
|
|
|
|
(DREX_*): Delete.
|
|
|
|
|
|
(THREE_BYTE_0F24, THREE_BYTE_0F25, THREE_BYTE_0f7B): Delete.
|
2009-10-02 15:35:01 +00:00
|
|
|
|
|
2009-05-22 09:33:16 +00:00
|
|
|
|
2009-05-22 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
* Makefile.am: Run "make dep-am".
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
* po/POTFILES.in: Regenerate.
|
|
|
|
|
|
|
2009-05-19 23:35:47 +00:00
|
|
|
|
2009-05-19 DJ Delorie <dj@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* mep-asm.c: Regenerate.
|
|
|
|
|
|
* mep-opc.c: Regenerate.
|
|
|
|
|
|
|
2009-04-30 21:23:30 +00:00
|
|
|
|
2009-04-30 DJ Delorie <dj@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* mep-asm.c: Regenerate.
|
|
|
|
|
|
* mep-desc.c: Regenerate.
|
|
|
|
|
|
* mep-desc.h: Regenerate.
|
|
|
|
|
|
* mep-dis.c: Regenerate.
|
|
|
|
|
|
* mep-ibld.c: Regenerate.
|
|
|
|
|
|
* mep-opc.c: Regenerate.
|
|
|
|
|
|
* mep-opc.h: Regenerate.
|
|
|
|
|
|
|
2009-04-18 02:56:43 +00:00
|
|
|
|
2009-04-17 DJ Delorie <dj@redhat.com
|
|
|
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|
|
|
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|
|
|
|
* mep-desc.c: Regenerate.
|
|
|
|
|
|
* mep-ibld.c: Regenerate.
|
|
|
|
|
|
* mep-opc.c: Regenerate.
|
|
|
|
|
|
* mep-opc.h: Regenerate.
|
|
|
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|
|
2009-04-16 15:39:48 +00:00
|
|
|
|
2009-04-15 Anthony Green <green@moxielogic.com>
|
|
|
|
|
|
|
|
|
|
|
|
* moxie-opc.c, moxie-dis.c: Created.
|
|
|
|
|
|
* Makefile.am: Build the moxie source files.
|
|
|
|
|
|
* configure.in: Add moxie support.
|
|
|
|
|
|
* Makefile.in, configure: Rebuilt.
|
|
|
|
|
|
* disassemble.c (disassembler): Add moxie support.
|
|
|
|
|
|
(ARCH_moxie): Define.
|
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|
|
2009-04-15 13:31:28 +00:00
|
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|
|
2009-04-15 Jan Beulich <jbeulich@novell.com>
|
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|
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|
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|
|
|
|
* i386-opc.tbl (protb, protw, protd, protq): Set opcode
|
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|
|
|
extension to None.
|
|
|
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|
(pshab, pshaw, pshad, pshaq): Likewise.
|
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|
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|
|
* i386-tbl.h: Re-generate.
|
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|
|
2009-04-18 01:50:02 +00:00
|
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|
|
2009-04-08 DJ Delorie <dj@redhat.com
|
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|
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|
|
* mep-asm.c: Regenerate.
|
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|
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|
* mep-desc.c: Regenerate.
|
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|
|
* mep-desc.h: Regenerate.
|
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|
|
* mep-dis.c: Regenerate.
|
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|
* mep-ibld.c: Regenerate.
|
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|
* mep-opc.c: Regenerate.
|
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|
|
* mep-opc.h: Regenerate.
|
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|
2009-04-07 18:28:02 +00:00
|
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|
2009-04-07 Peter Bergner <bergner@vnet.ibm.com>
|
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|
|
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|
|
* ppc-opc.c (powerpc_opcodes) <"tlbilxlpid", "tlbilxpid", "tlbilxva",
|
|
|
|
|
|
"tlbilx">: Use secondary opcode "18" as per the ISA 2.06 documentation.
|
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|
Reorder entries so the extended mnemonics are listed before tlbilx.
|
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|
2009-04-02 13:30:56 +00:00
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|
2009-04-02 Peter Bergner <bergner@vnet.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* ppc-dis.c (powerpc_init_dialect): Do not choose a default dialect
|
|
|
|
|
|
due to -many/-Many.
|
|
|
|
|
|
(print_insn_powerpc): Make sure we only deprecate instructions using
|
|
|
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|
|
the original dialect and not a modified dialect due to -Many handling.
|
|
|
|
|
|
Move the handling of the condition register and default operands to
|
|
|
|
|
|
the end of the if/else if/else chain.
|
|
|
|
|
|
* ppc-opc.c (powerpc_opcodes): Reorder the opcode table so that
|
|
|
|
|
|
instructions from newer processors are listed before older ones.
|
|
|
|
|
|
<"icblce", "sync", "eieio", "tlbld">: Deprecate for processors
|
|
|
|
|
|
that have instructions with conflicting opcodes.
|
|
|
|
|
|
|
2009-04-02 00:42:29 +00:00
|
|
|
|
2009-04-01 Peter Bergner <bergner@vnet.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* ppc-opc.c (powerpc_opcodes) <"dcbzl">: Merge the POWER4 and
|
|
|
|
|
|
E500MC entries.
|
|
|
|
|
|
|
2009-04-01 15:45:13 +00:00
|
|
|
|
2009-04-01 Christophe Lyon <christophe.lyon@st.com>
|
|
|
|
|
|
|
|
|
|
|
|
* arm-dis.c (print_insn): Print BE8 opcodes in little endianness.
|
|
|
|
|
|
|
2009-03-30 14:41:31 +00:00
|
|
|
|
2009-03-30 Joseph Myers <joseph@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* arm-dis.c (print_insn): Also check section matches in backwards
|
|
|
|
|
|
search for mapping symbol.
|
|
|
|
|
|
|
2009-03-27 00:28:32 +00:00
|
|
|
|
2009-03-26 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c (get_valid_dis386): Abort on unhandled table.
|
|
|
|
|
|
|
2009-03-18 11:27:18 +00:00
|
|
|
|
2009-03-18 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
2009-03-18 11:47:18 +00:00
|
|
|
|
* cgen-opc.c: Include alloca-conf.h rather than alloca.h.
|
2009-03-18 11:27:18 +00:00
|
|
|
|
* Makefile.am: Run "make dep-am".
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
* openrisc-opc.c: Regenerate.
|
|
|
|
|
|
|
2009-03-10 09:21:01 +00:00
|
|
|
|
2009-03-10 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* po/id.po: Updated Indonesian translation.
|
|
|
|
|
|
|
2009-03-10 06:53:46 +00:00
|
|
|
|
2009-03-10 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
* ppc-dis.c: Include "opintl.h".
|
|
|
|
|
|
(struct ppc_mopt, ppc_opts): New.
|
|
|
|
|
|
(ppc_parse_cpu): New function.
|
|
|
|
|
|
(powerpc_init_dialect): Use it.
|
|
|
|
|
|
(print_ppc_disassembler_options): Dump options from ppc_opts.
|
|
|
|
|
|
Internationalize message.
|
|
|
|
|
|
|
2009-03-06 12:14:40 +00:00
|
|
|
|
2009-03-06 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* po/es.po: Updated Spanish translation.
|
|
|
|
|
|
|
2009-03-04 02:10:34 +00:00
|
|
|
|
2009-03-04 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
PR 6768
|
|
|
|
|
|
* configure.in: Test for ld --as-needed support. Link shared
|
|
|
|
|
|
libopcodes against libm.
|
|
|
|
|
|
* configure: Regenerate.
|
|
|
|
|
|
|
2009-03-04 01:00:53 +00:00
|
|
|
|
2009-03-03 Peter Bergner <bergner@vnet.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* ppc-opc.c (powerpc_opcodes): Reorder the opcode table so that
|
|
|
|
|
|
instructions from newer processors are listed before older ones.
|
|
|
|
|
|
|
2009-03-04 01:16:15 +00:00
|
|
|
|
2009-03-03 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
* Makefile.am: Run "make dep-am".
|
|
|
|
|
|
(HFILES): Move lm32-desc.h and lm32-opc.h from..
|
|
|
|
|
|
(CFILES): ..here.
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
|
2009-03-02 10:33:08 +00:00
|
|
|
|
2009-03-02 Qinwei <qinwei@sunnorth.com.cn>
|
|
|
|
|
|
|
|
|
|
|
|
* score7-dis.c: New file.
|
|
|
|
|
|
* Makefile.am: Add dependencies for score7-dis.c.
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
* configure.in: Add score7-dis to score files.
|
|
|
|
|
|
* configure: Regenerate.
|
|
|
|
|
|
* score-dis.c: Add support for score7 architecture.
|
|
|
|
|
|
* score-opc.h: Likewise.
|
|
|
|
|
|
|
2009-03-01 18:57:19 +00:00
|
|
|
|
2009-03-01 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
|
|
|
|
|
|
|
|
|
|
|
|
* configure: Regenerate.
|
|
|
|
|
|
|
2009-02-27 20:13:04 +00:00
|
|
|
|
2009-02-27 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c (OP_EX): Call OP_E_memory instead of OP_E.
|
|
|
|
|
|
|
gas/
* config/tc-ppc.c (pre_defined_registers): Add "f32" to "f63",
"f.32" to "f.63", "vs0" to "vs63" and "vs.0" to "vs.63".
(parse_cpu): Extend -mpower7 to accept power7 and isel instructions.
gas/testsuite/
* gas/ppc/e500mc.d ("wait", "waitsrv", "waitimpl"): Add tests.
* gas/ppc/e500mc.s: Likewise.
* gas/ppc/power6.d ("cdtbcd", "cbcdtd", "addg6s"): Add tests.
* gas/ppc/power6.s: Likewise.
* gas/ppc/power7.d ("lfdpx", "mffgpr", "mftgpr"): Remove invalid tests.
("wait", "waitsrv", "waitimpl", "divwe", "divwe.", "divweo", "divweo.",
"divweu", "divweu.", "divweuo", "divweuo.", "bpermd", "popcntw",
"popcntd", "ldbrx", "stdbrx", "lfiwzx", "lfiwzx", "fcfids", "fcfids.",
"fcfidus", "fcfidus.", "fctiwu", "fctiwu.", "fctiwuz", "fctiwuz.",
"fctidu", "fctidu.", "fctiduz", "fctiduz.", "fcfidu", "fcfidu.",
"ftdiv", "ftdiv", "ftsqrt", "ftsqrt", "dcbtt", "dcbtstt", "dcffix",
"dcffix.", "lbarx", "lbarx", "lbarx", "lharx", "lharx", "lharx",
"stbcx.", "sthcx.", "fre", "fre.", "fres", "fres.", "frsqrte",
"frsqrte.", "frsqrtes", "frsqrtes.", "isel"): Add tests.
* gas/ppc/power7.s: Likewise.
* gas/ppc/vsx.d: New test.
* gas/ppc/vsx.s: Likewise.
* gas/ppc/ppc.exp: Run it.
include/opcode/
* ppc.h (PPC_OPCODE_POWER7): New.
opcodes/
* ppc-dis.c (powerpc_init_dialect): Extend -Mpower7 to disassemble
the power7 and the isel instructions.
* ppc-opc.c (insert_xc6, extract_xc6): New static functions.
(insert_dm, extract_dm): Likewise.
(XB6): Update comment to include XX2 form.
(WC, XC6, SHW, DMEX, UIM, XX2, XX3RC, XX4, XX2_MASK, XX2UIM_MASK,
XX2BF_MASK, XX3BF_MASK, XX3SHW_MASK, XX4_MASK, XWC_MASK, POWER7): New.
(RemoveXX3DM): Delete.
(powerpc_opcodes): <"lfdp", "lfdpx", "mcrxr", "mftb", "mffgpr",
"mftgpr">: Deprecate for POWER7.
<"fres", "fres.", "frsqrtes", "frsqrtes.", "fre", "fre.", "frsqrte",
"frsqrte.">: Deprecate the three operand form and enable the two
operand form for POWER7 and later.
<"wait">: Extend to accept optional parameter. Enable for POWER7.
<"waitsrv", "waitimpl">: Add extended opcodes.
<"ldbrx", "stdbrx">: Enable for POWER7.
<"cdtbcd", "cbcdtd", "addg6s">: Add POWER6 opcodes.
<"bpermd", "dcbtstt", "dcbtt", "dcffix.", "dcffix", "divde.", "divde",
"divdeo.", "divdeo", "divdeu.", "divdeu", "divdeuo.", "divdeuo",
"divwe.", "divwe", "divweo.", "divweo", "divweu.", "divweu", "divweuo.",
"divweuo", "fcfids.", "fcfids", "fcfidu.", "fcfidu", "fcfidus.",
"fcfidus", "fctidu.", "fctidu", "fctiduz.", "fctiduz", "fctiwu.",
"fctiwu", "fctiwuz.", "fctiwuz", "ftdiv", "ftsqrt", "lbarx", "lfiwzx",
"lharx", "popcntd", "popcntw", "stbcx.", "sthcx.">: Add POWER7 opcodes.
<"lxsdux", "lxsdx", "lxvdsx", "lxvw4ux", "lxvw4x", "stxsdux", "stxsdx",
"stxvw4ux", "stxvw4x", "xsabsdp", "xsadddp", "xscmpodp", "xscmpudp",
"xscpsgndp", "xscvdpsp", "xscvdpsxds", "xscvdpsxws", "xscvdpuxds",
"xscvdpuxws", "xscvspdp", "xscvsxddp", "xscvuxddp", "xsdivdp",
"xsmaddadp", "xsmaddmdp", "xsmaxdp", "xsmindp", "xsmsubadp",
"xsmsubmdp", "xsmuldp", "xsnabsdp", "xsnegdp", "xsnmaddadp",
"xsnmaddmdp", "xsnmsubadp", "xsnmsubmdp", "xsrdpi", "xsrdpic",
"xsrdpim", "xsrdpip", "xsrdpiz", "xsredp", "xsrsqrtedp", "xssqrtdp",
"xssubdp", "xstdivdp", "xstsqrtdp", "xvabsdp", "xvabssp", "xvadddp",
"xvaddsp", "xvcmpeqdp.", "xvcmpeqdp", "xvcmpeqsp.", "xvcmpeqsp",
"xvcmpgedp.", "xvcmpgedp", "xvcmpgesp.", "xvcmpgesp", "xvcmpgtdp.",
"xvcmpgtdp", "xvcmpgtsp.", "xvcmpgtsp", "xvcpsgnsp", "xvcvdpsp",
"xvcvdpsxds", "xvcvdpsxws", "xvcvdpuxds", "xvcvdpuxws", "xvcvspdp",
"xvcvspsxds", "xvcvspsxws", "xvcvspuxds", "xvcvspuxws", "xvcvsxddp",
"xvcvsxdsp", "xvcvsxwdp", "xvcvsxwsp", "xvcvuxddp", "xvcvuxdsp",
"xvcvuxwdp", "xvcvuxwsp", "xvdivdp", "xvdivsp", "xvmaddadp",
"xvmaddasp", "xvmaddmdp", "xvmaddmsp", "xvmaxdp", "xvmaxsp",
"xvmindp", "xvminsp", "xvmovsp", "xvmsubadp", "xvmsubasp", "xvmsubmdp",
"xvmsubmsp", "xvmuldp", "xvmulsp", "xvnabsdp", "xvnabssp", "xvnegdp",
"xvnegsp", "xvnmaddadp", "xvnmaddasp", "xvnmaddmdp", "xvnmaddmsp",
"xvnmsubadp", "xvnmsubasp", "xvnmsubmdp", "xvnmsubmsp", "xvrdpi",
"xvrdpic", "xvrdpim", "xvrdpip", "xvrdpiz", "xvredp", "xvresp",
"xvrspi", "xvrspic", "xvrspim", "xvrspip", "xvrspiz", "xvrsqrtedp",
"xvrsqrtesp", "xvsqrtdp", "xvsqrtsp", "xvsubdp", "xvsubsp", "xvtdivdp",
"xvtdivsp", "xvtsqrtdp", "xvtsqrtsp", "xxland", "xxlandc", "xxlnor",
"xxlor", "xxlxor", "xxmrghw", "xxmrglw", "xxsel", "xxsldwi", "xxspltd",
"xxspltw", "xxswapd">: Add VSX opcodes.
2009-02-26 22:07:33 +00:00
|
|
|
|
2009-02-26 Peter Bergner <bergner@vnet.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* ppc-dis.c (powerpc_init_dialect): Extend -Mpower7 to disassemble
|
|
|
|
|
|
the power7 and the isel instructions.
|
|
|
|
|
|
* ppc-opc.c (insert_xc6, extract_xc6): New static functions.
|
|
|
|
|
|
(insert_dm, extract_dm): Likewise.
|
|
|
|
|
|
(XB6): Update comment to include XX2 form.
|
|
|
|
|
|
(WC, XC6, SHW, DMEX, UIM, XX2, XX3RC, XX4, XX2_MASK, XX2UIM_MASK,
|
|
|
|
|
|
XX2BF_MASK, XX3BF_MASK, XX3SHW_MASK, XX4_MASK, XWC_MASK, POWER7): New.
|
|
|
|
|
|
(RemoveXX3DM): Delete.
|
|
|
|
|
|
(powerpc_opcodes): <"lfdp", "lfdpx", "mcrxr", "mftb", "mffgpr",
|
|
|
|
|
|
"mftgpr">: Deprecate for POWER7.
|
|
|
|
|
|
<"fres", "fres.", "frsqrtes", "frsqrtes.", "fre", "fre.", "frsqrte",
|
|
|
|
|
|
"frsqrte.">: Deprecate the three operand form and enable the two
|
|
|
|
|
|
operand form for POWER7 and later.
|
|
|
|
|
|
<"wait">: Extend to accept optional parameter. Enable for POWER7.
|
|
|
|
|
|
<"waitsrv", "waitimpl">: Add extended opcodes.
|
|
|
|
|
|
<"ldbrx", "stdbrx">: Enable for POWER7.
|
|
|
|
|
|
<"cdtbcd", "cbcdtd", "addg6s">: Add POWER6 opcodes.
|
|
|
|
|
|
<"bpermd", "dcbtstt", "dcbtt", "dcffix.", "dcffix", "divde.", "divde",
|
|
|
|
|
|
"divdeo.", "divdeo", "divdeu.", "divdeu", "divdeuo.", "divdeuo",
|
|
|
|
|
|
"divwe.", "divwe", "divweo.", "divweo", "divweu.", "divweu", "divweuo.",
|
|
|
|
|
|
"divweuo", "fcfids.", "fcfids", "fcfidu.", "fcfidu", "fcfidus.",
|
|
|
|
|
|
"fcfidus", "fctidu.", "fctidu", "fctiduz.", "fctiduz", "fctiwu.",
|
|
|
|
|
|
"fctiwu", "fctiwuz.", "fctiwuz", "ftdiv", "ftsqrt", "lbarx", "lfiwzx",
|
|
|
|
|
|
"lharx", "popcntd", "popcntw", "stbcx.", "sthcx.">: Add POWER7 opcodes.
|
|
|
|
|
|
<"lxsdux", "lxsdx", "lxvdsx", "lxvw4ux", "lxvw4x", "stxsdux", "stxsdx",
|
|
|
|
|
|
"stxvw4ux", "stxvw4x", "xsabsdp", "xsadddp", "xscmpodp", "xscmpudp",
|
|
|
|
|
|
"xscpsgndp", "xscvdpsp", "xscvdpsxds", "xscvdpsxws", "xscvdpuxds",
|
|
|
|
|
|
"xscvdpuxws", "xscvspdp", "xscvsxddp", "xscvuxddp", "xsdivdp",
|
|
|
|
|
|
"xsmaddadp", "xsmaddmdp", "xsmaxdp", "xsmindp", "xsmsubadp",
|
|
|
|
|
|
"xsmsubmdp", "xsmuldp", "xsnabsdp", "xsnegdp", "xsnmaddadp",
|
|
|
|
|
|
"xsnmaddmdp", "xsnmsubadp", "xsnmsubmdp", "xsrdpi", "xsrdpic",
|
|
|
|
|
|
"xsrdpim", "xsrdpip", "xsrdpiz", "xsredp", "xsrsqrtedp", "xssqrtdp",
|
|
|
|
|
|
"xssubdp", "xstdivdp", "xstsqrtdp", "xvabsdp", "xvabssp", "xvadddp",
|
|
|
|
|
|
"xvaddsp", "xvcmpeqdp.", "xvcmpeqdp", "xvcmpeqsp.", "xvcmpeqsp",
|
|
|
|
|
|
"xvcmpgedp.", "xvcmpgedp", "xvcmpgesp.", "xvcmpgesp", "xvcmpgtdp.",
|
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|
|
|
|
"xvcmpgtdp", "xvcmpgtsp.", "xvcmpgtsp", "xvcpsgnsp", "xvcvdpsp",
|
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|
"xvcvdpsxds", "xvcvdpsxws", "xvcvdpuxds", "xvcvdpuxws", "xvcvspdp",
|
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|
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|
|
"xvcvspsxds", "xvcvspsxws", "xvcvspuxds", "xvcvspuxws", "xvcvsxddp",
|
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|
"xvcvsxdsp", "xvcvsxwdp", "xvcvsxwsp", "xvcvuxddp", "xvcvuxdsp",
|
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|
"xvcvuxwdp", "xvcvuxwsp", "xvdivdp", "xvdivsp", "xvmaddadp",
|
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|
"xvmaddasp", "xvmaddmdp", "xvmaddmsp", "xvmaxdp", "xvmaxsp",
|
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|
"xvmindp", "xvminsp", "xvmovsp", "xvmsubadp", "xvmsubasp", "xvmsubmdp",
|
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|
"xvmsubmsp", "xvmuldp", "xvmulsp", "xvnabsdp", "xvnabssp", "xvnegdp",
|
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|
"xvnegsp", "xvnmaddadp", "xvnmaddasp", "xvnmaddmdp", "xvnmaddmsp",
|
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|
"xvnmsubadp", "xvnmsubasp", "xvnmsubmdp", "xvnmsubmsp", "xvrdpi",
|
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|
"xvrdpic", "xvrdpim", "xvrdpip", "xvrdpiz", "xvredp", "xvresp",
|
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|
"xvrspi", "xvrspic", "xvrspim", "xvrspip", "xvrspiz", "xvrsqrtedp",
|
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|
|
"xvrsqrtesp", "xvsqrtdp", "xvsqrtsp", "xvsubdp", "xvsubsp", "xvtdivdp",
|
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|
"xvtdivsp", "xvtsqrtdp", "xvtsqrtsp", "xxland", "xxlandc", "xxlnor",
|
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|
"xxlor", "xxlxor", "xxmrghw", "xxmrglw", "xxsel", "xxsldwi", "xxspltd",
|
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|
|
"xxspltw", "xxswapd">: Add VSX opcodes.
|
|
|
|
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|
|
2009-02-23 20:41:46 +00:00
|
|
|
|
2009-02-23 H.J. Lu <hongjiu.lu@intel.com>
|
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|
|
|
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|
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|
|
* i386-gen.c (operand_type_init): Remove OPERAND_TYPE_VEX_IMM4.
|
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|
|
|
|
(operand_types): Remove Vex_Imm4.
|
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|
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|
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|
|
* i386-opc.h (Vex_Imm4): Removed.
|
|
|
|
|
|
(OTMax): Updated.
|
|
|
|
|
|
(i386_operand_type): Remove vex_imm4.
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.tbl: Remove Vex_Imm4 comments.
|
|
|
|
|
|
* i386-init.h: Regenerated.
|
|
|
|
|
|
* i386-tbl.h: Likewise.
|
|
|
|
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|
|
2009-02-23 14:58:34 +00:00
|
|
|
|
2009-02-23 Richard Earnshaw <rearnsha@arm.com>
|
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|
|
|
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|
|
* arm-dis.c (neon_opcodes): Correct bit-mask and patterns for
|
|
|
|
|
|
vq{r}shr{u}n.s64 insnstructions.
|
|
|
|
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|
|
2009-02-19 21:18:46 +00:00
|
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|
|
2009-02-19 Peter Bergner <bergner@vnet.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* ppc-opc.c (powerpc_opcodes) <"lfdepx", "stfdepx">: Fix the first
|
|
|
|
|
|
operand to be a float point register (FRT/FRS).
|
|
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|
|
2009-02-18 20:51:59 +00:00
|
|
|
|
2009-02-18 Adam Nemet <anemet@caviumnetworks.com>
|
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|
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|
|
|
|
|
|
|
* mips-opc.c (mips_builtin_opcodes): Move the Octeon-specific
|
|
|
|
|
|
dmfc2 and dmtc2 before the architecture-level variants.
|
|
|
|
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|
|
2009-02-18 17:13:04 +00:00
|
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|
|
2009-02-18 Pierre Muller <muller@ics.u-strasbg.fr>
|
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|
|
|
|
|
|
|
|
|
|
* fr30-opc.c: Regenerate.
|
|
|
|
|
|
* frv-opc.c: Regenerate.
|
|
|
|
|
|
* ip2k-opc.c: Regenerate.
|
|
|
|
|
|
* iq2000-opc.c: Regenerate.
|
|
|
|
|
|
* lm32-opc.c: Regenerate.
|
|
|
|
|
|
* m32c-opc.c: Regenerate.
|
|
|
|
|
|
* m32r-opc.c: Regenerate.
|
|
|
|
|
|
* mep-opc.c: Regenerate.
|
|
|
|
|
|
* mt-opc.c: Regenerate.
|
|
|
|
|
|
* xc16x-opc.c: Regenerate.
|
|
|
|
|
|
* xstormy16-opc.c: Regenerate.
|
|
|
|
|
|
* tic54x-dis.c (print_instruction): Avoid compiler warning on
|
|
|
|
|
|
sprintf call.
|
|
|
|
|
|
|
gas/
* config/tc-m68k.c (mcf51qe_ctrl): Add CPUCR.
(mcf52259_ctrl, mcf52277_ctrl, mcf53017_ctrl): New.
(mcf5307_ctrl): Add VBR.
(no_mac): New variable.
(m68k_extensions): Refer to no_mac mask.
(m68k_cpus): Add 51, 51ac, 51cn, 51em, 51jm, 52274, 52277,
52252..52259, 53011..53017.
(m68k_ip): Process CPUCR.
(init_table): Add cpucr entry.
(m68k_set_extension): Allow negated mask to refer to a variable.
(md_show_usage): Use '%s' to silence fprintf warning.
* config/m68k-parse.h (CPUCR): New control register.
gas/testsuite/
* m68k/br-isac.d, m68k/br-isac.s: Add stldsr test.
opcodes/
* m68k-opc.c (m68k_opcodes): Add stldsr instruction.
2009-02-12 08:31:03 +00:00
|
|
|
|
2009-02-12 Nathan Sidwell <nathan@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* m68k-opc.c (m68k_opcodes): Add stldsr instruction.
|
|
|
|
|
|
|
2009-02-06 01:50:54 +00:00
|
|
|
|
2009-02-05 Peter Bergner <bergner@vnet.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* ppc-opc.c: Update copyright year.
|
|
|
|
|
|
(powerpc_opcodes) <"dcbt", "dcbtst">: Deprecate the Embedded operand
|
|
|
|
|
|
ordering for POWER4 and later and use the correct Server ordering.
|
|
|
|
|
|
|
2009-02-04 16:03:31 +00:00
|
|
|
|
2009-02-04 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
AVX Programming Reference (January, 2009)
|
|
|
|
|
|
* i386-dis.c (PREFIX_VEX_3A44): New.
|
|
|
|
|
|
(VEX_LEN_3A44_P_2): Likewise.
|
|
|
|
|
|
(PREFIX_VEX_3A48): Updated.
|
|
|
|
|
|
(VEX_LEN_3A4C_P_2): Likewise.
|
|
|
|
|
|
(prefix_table): Add PREFIX_VEX_3A44.
|
|
|
|
|
|
(vex_table): Likewise.
|
|
|
|
|
|
(vex_len_table): Add VEX_LEN_3A44_P_2.
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.tbl: Add PCLMUL + AVX instructions.
|
|
|
|
|
|
* i386-tbl.h: Regenerated.
|
|
|
|
|
|
|
bfd:
2009-02-03 Sandip Matte <sandip@rmicorp.com>
* aoutx.h (NAME (aout, machine_type)): Handle bfd_mach_mips_xlr.
* archures.c (bfd_mach_mips_xlr): Define.
* bfd-in2.h: Regenerate.
* cpu-mips.c (I_xlr): Define.
(arch_info_struct): Add XLR entry.
* elfxx-mips.c (_bfd_elf_mips_mach): Handle E_MIPS_MACH_XLR.
(mips_set_isa_flags): Handle bfd_mach_mips_xlr
(mips_mach_extensions): Add XLR entry.
binutils:
2009-02-03 Sandip Matte <sandip@rmicorp.com>
* readelf.c (get_machine_flags): Handle E_MIPS_MACH_XLR.
gas:
2009-02-03 Sandip Matte <sandip@rmicorp.com>
* config/tc-mips.c (macro): Handle M_MSGSND, M_MSGLD, M_MSGLD_T,
M_MSGWAIT and M_MSGWAIT_T.
(mips_cpu_info_table): Add XLR entry.
* doc/c-mips.texi (-march): Document xlr.
gas/testsuite:
2009-02-03 Sandip Matte <sandip@rmicorp.com>
* gas/mips/mips.exp (xlr): New architecture.
(xlr-ext): Run test.
* gas/mips/xlr-ext.d, gas/mips/xlr-ext.s: New.
include/elf:
2009-02-03 Sandip Matte <sandip@rmicorp.com>
* mips.h (E_MIPS_MACH_XLR): Define.
include/opcode:
2009-02-03 Sandip Matte <sandip@rmicorp.com>
* mips.h (INSN_XLR): Define.
(INSN_CHIP_MASK): Update.
(CPU_XLR): Define.
(OPCODE_IS_MEMBER): Update.
(M_MSGSND, M_MSGLD, M_MSGLD_T, M_MSGWAIT, M_MSGWAIT_T): Define.
opcodes:
2009-02-03 Sandip Matte <sandip@rmicorp.com>
* mips-dis.c (mips_cp0_names_xlr, mips_cp0sel_names_xlr): Define.
(mips_arch_choices): Add XLR entry.
* mips-opc.c (XLR): Define.
(mips_builtin_opcodes): Add XLR instructions.
2009-02-03 18:16:04 +00:00
|
|
|
|
2009-02-03 Sandip Matte <sandip@rmicorp.com>
|
|
|
|
|
|
|
|
|
|
|
|
* mips-dis.c (mips_cp0_names_xlr, mips_cp0sel_names_xlr): Define.
|
|
|
|
|
|
(mips_arch_choices): Add XLR entry.
|
|
|
|
|
|
* mips-opc.c (XLR): Define.
|
|
|
|
|
|
(mips_builtin_opcodes): Add XLR instructions.
|
|
|
|
|
|
|
2009-02-03 15:54:05 +00:00
|
|
|
|
2009-02-03 Carlos O'Donell <carlos@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* Makefile.am: Add install-pdf target.
|
|
|
|
|
|
* po/Make-in: Add install-pdf target.
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
|
2009-02-03 02:15:57 +00:00
|
|
|
|
2009-02-02 DJ Delorie <dj@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* mep-asm.c: Regenerate.
|
|
|
|
|
|
* mep-desc.c: Regenerate.
|
|
|
|
|
|
* mep-desc.h: Regenerate.
|
|
|
|
|
|
* mep-dis.c: Regenerate.
|
|
|
|
|
|
* mep-ibld.c: Regenerate.
|
|
|
|
|
|
* mep-opc.c: Regenerate.
|
|
|
|
|
|
* mep-opc.h: Regenerate.
|
|
|
|
|
|
|
2009-01-29 11:48:34 +00:00
|
|
|
|
2009-01-29 Mark Mitchell <mark@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* arm-dis.c (thumb32_opcodes): Correct decoding for qadd, qdadd,
|
|
|
|
|
|
qsub, and qdsub.
|
|
|
|
|
|
|
2009-01-28 08:45:47 +00:00
|
|
|
|
2009-01-28 Chao-ying Fu <fu@mips.com>
|
|
|
|
|
|
|
2009-10-02 15:35:01 +00:00
|
|
|
|
* mips-opc.c (suxc1): Add the flag of FP_D.
|
2009-01-28 08:45:47 +00:00
|
|
|
|
|
2009-01-20 07:22:30 +00:00
|
|
|
|
2009-01-20 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
* fr30-asm.c, fr30-dis.c, fr30-ibld.c, frv-asm.c, frv-dis.c,
|
|
|
|
|
|
* frv-ibld.c, ip2k-asm.c, ip2k-dis.c, ip2k-ibld.c,
|
|
|
|
|
|
* iq2000-asm.c, iq2000-dis.c, iq2000-ibld.c, m32c-asm.c,
|
|
|
|
|
|
* m32c-dis.c, m32c-ibld.c, m32r-asm.c, m32r-dis.c,
|
|
|
|
|
|
* m32r-ibld.c, mep-asm.c, mep-dis.c, mep-ibld.c, mt-asm.c,
|
|
|
|
|
|
* mt-dis.c, mt-ibld.c, openrisc-asm.c, openrisc-dis.c,
|
|
|
|
|
|
* openrisc-ibld.c, xc16x-asm.c, xc16x-dis.c, xc16x-ibld.c,
|
|
|
|
|
|
* xstormy16-asm.c, xstormy16-dis.c, xstormy16-ibld.c: Regenerate.
|
|
|
|
|
|
|
2009-01-16 08:02:29 +00:00
|
|
|
|
2009-01-16 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
* configure.in (commonbfdlib): Delete.
|
|
|
|
|
|
(SHARED_LIBADD): Add pic libiberty if such is available.
|
|
|
|
|
|
* configure: Regenerate.
|
|
|
|
|
|
* po/POTFILES.in: Regenerate.
|
|
|
|
|
|
|
2009-01-15 04:27:28 +00:00
|
|
|
|
2009-01-14 Peter Bergner <bergner@vnet.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* ppc-dis.c (print_insn_powerpc): Skip insn if it is deprecated.
|
|
|
|
|
|
* ppc-opc.c (powerpc_opcodes) <mtfsf, mtfsf.>: Deprecate the two
|
|
|
|
|
|
operand form and enable the four operand form for POWER6 and later.
|
|
|
|
|
|
<mtfsfi, mtfsfi.>: Deprecate the two operand form and enable the
|
|
|
|
|
|
three operand form for POWER6 and later.
|
|
|
|
|
|
|
2009-01-14 19:35:12 +00:00
|
|
|
|
2009-01-14 Mike Frysinger <vapier@gentoo.org>
|
|
|
|
|
|
|
|
|
|
|
|
* bfin-dis.c (OUTS): Use "%s" as format string.
|
|
|
|
|
|
|
2009-01-14 00:42:07 +00:00
|
|
|
|
2009-01-13 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-gen.c (cpu_flag_init): Remove a white space.
|
|
|
|
|
|
(operand_type_init): Likewise.
|
|
|
|
|
|
|
2009-01-13 00:00:35 +00:00
|
|
|
|
2009-01-12 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.tbl: Add NoAVX to movnti, lfence and mfence.
|
|
|
|
|
|
* i386-tbl.h: Regenerated.
|
|
|
|
|
|
|
gas/testsuite/
2009-01-12 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/opts.s: Add tests for add, adc, and, cmp, or, sbb,
sub and xor.
* gas/i386/x86-64-opts.s: Likewise.
* gas/i386/opts.d: Updated.
* gas/i386/opts-intel.d: Likewise.
* gas/i386/x86-64-opts.d: Likewise.
* gas/i386/x86-64-opts-intel.d: Likewise.
opcodes/
2009-01-12 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (dis386): Use EbS on addB, orB, adcB, sbbB, andB,
subB, xorB and cmpB. Use EvS on addS, orS, adcS, sbbS, andS,
subS, xorS and cmpS.
2009-01-12 16:04:11 +00:00
|
|
|
|
2009-01-12 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c (dis386): Use EbS on addB, orB, adcB, sbbB, andB,
|
|
|
|
|
|
subB, xorB and cmpB. Use EvS on addS, orS, adcS, sbbS, andS,
|
|
|
|
|
|
subS, xorS and cmpS.
|
|
|
|
|
|
|
gas/
2009-01-10 H.J. Lu <hongjiu.lu@intel.com>
* gas/config/tc-i386.c (cpu_arch): Add corei7, .clflush and
.syscall.
(i386_align_code): Handle PROCESSOR_COREI7.
(md_show_usage): Add corei7, clflush and syscall.
(i386_target_format): Replace cpup4 with cpuclflush.
* gas/config/tc-i386.h (processor_type): Add PROCESSOR_COREI7.
* doc/c-i386.texi: Document corei7, clflush and syscall.
gas/testsuite/
2009-01-10 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/arch-10.s: Add clflush and syscall.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/arch-10.d: Updated.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
opcodes/
2009-01-10 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Replace CpuP4 and CpuK6 with
CpuClflush and CpuSYSCALL, respectively. Remove CpuK8. Add
CPU_COREI7_FLAGS, CPU_CLFLUSH_FLAGS and CPU_SYSCALL_FLAGS.
(cpu_flags): Remove CpuP4, CpuK6 and CpuK8. Add CpuClflush
and CpuSYSCALL.
(lineno): Removed.
(set_bitfield): Take an argument, lineno. Don't report lineno
on error if it is -1.
(process_i386_cpu_flag): Take an argument, lineno.
(process_i386_opcode_modifier): Likewise.
(process_i386_operand_type): Likewise.
(output_i386_opcode): Likewise.
(opcode_hash_entry): Add lineno.
(process_i386_opcodes): Updated.
(process_i386_registers): Likewise.
(process_i386_initializers): Likewise.
* i386-opc.h (CpuP4): Removed.
(CpuK6): Likewise.
(CpuK8): Likewise.
(CpuClflush): New.
(CpuSYSCALL): Likewise.
(CpuMMX): Updated.
(i386_cpu_flags): Remove cpup4, cpuk6 and cpuk8. Add
cpuclflush and cpusyscall.
* i386-opc.tbl: Update movnti, clflush, lfence, mfence, pause,
syscall and sysret.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2009-01-10 17:25:52 +00:00
|
|
|
|
2009-01-10 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-gen.c (cpu_flag_init): Replace CpuP4 and CpuK6 with
|
|
|
|
|
|
CpuClflush and CpuSYSCALL, respectively. Remove CpuK8. Add
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CPU_COREI7_FLAGS, CPU_CLFLUSH_FLAGS and CPU_SYSCALL_FLAGS.
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(cpu_flags): Remove CpuP4, CpuK6 and CpuK8. Add CpuClflush
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and CpuSYSCALL.
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(lineno): Removed.
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(set_bitfield): Take an argument, lineno. Don't report lineno
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on error if it is -1.
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(process_i386_cpu_flag): Take an argument, lineno.
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(process_i386_opcode_modifier): Likewise.
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(process_i386_operand_type): Likewise.
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(output_i386_opcode): Likewise.
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(opcode_hash_entry): Add lineno.
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(process_i386_opcodes): Updated.
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(process_i386_registers): Likewise.
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(process_i386_initializers): Likewise.
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* i386-opc.h (CpuP4): Removed.
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(CpuK6): Likewise.
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(CpuK8): Likewise.
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(CpuClflush): New.
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(CpuSYSCALL): Likewise.
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(CpuMMX): Updated.
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(i386_cpu_flags): Remove cpup4, cpuk6 and cpuk8. Add
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cpuclflush and cpusyscall.
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* i386-opc.tbl: Update movnti, clflush, lfence, mfence, pause,
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syscall and sysret.
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* i386-init.h: Regenerated.
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* i386-tbl.h: Likewise.
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2009-01-09 20:32:32 +00:00
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2009-01-09 H.J. Lu <hongjiu.lu@intel.com>
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* i386-gen.c (cpu_flag_init): Add CpuRdtscp to CPU_K8_FLAGS
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and CPU_AMDFAM10_FLAGS. Add CPU_RDTSCP_FLAGS.
|
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(cpu_flags): Add CpuRdtscp.
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(set_bitfield): Remove CpuSledgehammer check.
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* i386-opc.h (CpuRdtscp): New.
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(CpuLM): Updated.
|
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(i386_cpu_flags): Add cpurdtscp.
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* i386-opc.tbl: Replace CpuSledgehammer with CpuRdtscp.
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* i386-init.h: Regenerated.
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* i386-tbl.h: Likewise.
|
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|
2009-01-09 18:50:58 +00:00
|
|
|
|
2009-01-09 Peter Bergner <bergner@vnet.ibm.com>
|
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* ppc-opc.c (PPCNONE): Define.
|
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(NOPOWER4): Delete.
|
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(powerpc_opcodes): Initialize the new "deprecated" field.
|
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|
2009-01-06 17:15:28 +00:00
|
|
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|
2009-01-06 H.J. Lu <hongjiu.lu@intel.com>
|
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|
AVX Programming Reference (December, 2008)
|
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|
|
* i386-dis.c (VEX_LEN_2B_M_0): Removed.
|
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(VEX_LEN_E7_P_2_M_0): Likewise.
|
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|
(VEX_LEN_2C_P_1): Updated.
|
|
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|
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|
(VEX_LEN_E8_P_2): Likewise.
|
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|
(vex_len_table): Remove VEX_LEN_2B_M_0 and VEX_LEN_E7_P_2_M_0.
|
|
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(mod_table): Likewise.
|
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* i386-opc.tbl: Add 256bit vmovntdq, vmovntpd and vmovntps.
|
|
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|
* i386-tbl.h: Regenerated.
|
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|
2009-01-06 01:14:45 +00:00
|
|
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|
2009-01-05 H.J. Lu <hongjiu.lu@intel.com>
|
|
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* i386-gen.c (process_copyright): Update for 2009.
|
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* i386-init.h: Regenerated.
|
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* i386-tbl.h: Likewise.
|
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2009-01-06 01:03:27 +00:00
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|
2009-01-05 H.J. Lu <hongjiu.lu@intel.com>
|
2008-04-23 16:11:47 +00:00
|
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|
2009-01-06 01:03:27 +00:00
|
|
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|
AVX Programming Reference (December, 2008)
|
|
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|
|
* i386-dis.c (OP_VEX_FMA): Removed.
|
binutils/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* dwarf.c (dwarf_regnames_i386): Add AVX registers.
(dwarf_regnames_x86_64): Likewise.
gas/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* NEWS: Mention AES, CLMUL, AVX/FMA and -msse2avx.
* doc/c-i386.texi: Add avx, aes, clmul and fma to -march=.
Document -msse2avx, .avx, .aes, .clmul and .fma.
* config/tc-i386.c (YMMWORD_MNEM_SUFFIX): New.
(vex_prefix): Likewise.
(sse2avx): Likewise.
(CPU_FLAGS_ARCH_MATCH): Likewise.
(CPU_FLAGS_64BIT_MATCH): Likewise.
(CPU_FLAGS_32BIT_MATCH): Likewise.
(CPU_FLAGS_PERFECT_MATCH): Likewise.
(regymm): Likewise.
(vex_imm4): Likewise.
(fits_in_imm4): Likewise.
(build_vex_prefix): Likewise.
(VEX_check_operands): Likewise.
(bad_implicit_operand): Likewise.
(OPTION_MSSE2AVX): Likewise.
(T_YMMWORD): Likewise.
(_i386_insn): Add vex.
(cpu_arch): Add .avx, .aes, .clmul and .fma.
(cpu_flags_match): Changed to take a pointer to const template.
Enable encoding SSE instructions with VEX prefix for -msse2avx.
(match_mem_size): Also check ymmword.
(operand_type_match): Clear ymmword.
(md_begin): Allow '_' in mnemonic.
(type_names): Add OPERAND_TYPE_VEX_IMM4.
(process_immext): Update assert.
(md_assemble): Don't call process_immext if sse2avx and immext
are true. Call build_vex_prefix if vex is true.
(parse_insn): Updated for cpu_flags_match.
(swap_operands): Handle 5 operands.
(match_template): Handle 5 operands. Updated for cpu_flags_match.
Check regymm. Call VEX_check_operands. Handle YMMWORD_MNEM_SUFFIX.
(process_suffix): Handle YMMWORD_MNEM_SUFFIX.
(check_byte_reg): Check regymm.
(process_operands): Duplicate the destination register for
-msse2avx if needed.
(build_modrm_byte): Updated for instructions with VEX encoding.
(output_insn): Output VEX prefix if needed.
(md_longopts): Add msse2avx.
(md_parse_option): Handle OPTION_MSSE2AVX.
(md_show_usage): Add avx, aes, clmul, fma and -msse2avx.
(intel_e09): Support YMMWORD.
(intel_e11): Likewise.
(intel_get_token): Likewise.
gas/testsuite/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run aes, aes-intel, x86-64-aes,
x86-64-aes-intel, avx, avx-intel, inval-avx, x86-64-avx,
x86-64-avx-intel and x86-64-inval-avx.
* gas/cfi/cfi-i386.s: Add tests for AVX register maps.
* gas/cfi/cfi-x86_64.s: Likewise.
* gas/i386/aes.d: New.
* gas/i386/aes.s: Likewise.
* gas/i386/aes-intel.d: Likewise.
* gas/i386/avx.d: Likewise.
* gas/i386/avx.s: Likewise.
* gas/i386/avx-intel.d: Likewise.
* gas/i386/clmul.d: Likewise.
* gas/i386/clmul-intel.d: Likewise.
* gas/i386/clmul.s: Likewise.
* gas/i386/i386.exp: Likewise.
* gas/i386/inval-avx.l: Likewise.
* gas/i386/inval-avx.s: Likewise.
* gas/i386/sse2avx.d: Likewise.
* gas/i386/sse2avx.s: Likewise.
* gas/i386/x86-64-aes.d: Likewise.
* gas/i386/x86-64-aes.s: Likewise.
* gas/i386/x86-64-aes-intel.d: Likewise.
* gas/i386/x86-64-avx.d: Likewise.
* gas/i386/x86-64-avx.s: Likewise.
* gas/i386/x86-64-avx-intel.d: Likewise.
* gas/i386/x86-64-clmul.d: Likewise.
* gas/i386/x86-64-clmul-intel.d: Likewise.
* gas/i386/x86-64-clmul.s: Likewise.
* gas/i386/x86-64-inval-avx.l: Likewise.
* gas/i386/x86-64-inval-avx.s: Likewise.
* gas/i386/x86-64-sse2avx.d: Likewise.
* gas/i386/x86-64-sse2avx.s: Likewise.
* gas/i386/arch-10.s: Add tests for AVX, AES, CLMUL and FMA.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/rexw.s: Add AVX tests.
* gas/i386/x86-64-opcode-inval.s: Remove lds/les test.
* gas/cfi/cfi-i386.d: Updated.
* gas/cfi/cfi-x86_64.d: Likewise.
* gas/i386/arch-10.d: Likewise.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/rexw.d: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
* gas/i386/x86-64-opcode-inval.d: Likewise.
* gas/i386/x86-64-opcode-inval-intel.d: Likewise.
include/opcode/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (MAX_OPERANDS): Set to 5.
(MAX_MNEM_SIZE): Changed to 20.
opcodes/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (OP_E_register): New.
(OP_E_memory): Likewise.
(OP_VEX): Likewise.
(OP_EX_Vex): Likewise.
(OP_EX_VexW): Likewise.
(OP_XMM_Vex): Likewise.
(OP_XMM_VexW): Likewise.
(OP_REG_VexI4): Likewise.
(PCLMUL_Fixup): Likewise.
(VEXI4_Fixup): Likewise.
(VZERO_Fixup): Likewise.
(VCMP_Fixup): Likewise.
(VPERMIL2_Fixup): Likewise.
(rex_original): Likewise.
(rex_ignored): Likewise.
(Mxmm): Likewise.
(XMM): Likewise.
(EXxmm): Likewise.
(EXxmmq): Likewise.
(EXymmq): Likewise.
(Vex): Likewise.
(Vex128): Likewise.
(Vex256): Likewise.
(VexI4): Likewise.
(EXdVex): Likewise.
(EXqVex): Likewise.
(EXVexW): Likewise.
(EXdVexW): Likewise.
(EXqVexW): Likewise.
(XMVex): Likewise.
(XMVexW): Likewise.
(XMVexI4): Likewise.
(PCLMUL): Likewise.
(VZERO): Likewise.
(VCMP): Likewise.
(VPERMIL2): Likewise.
(xmm_mode): Likewise.
(xmmq_mode): Likewise.
(ymmq_mode): Likewise.
(vex_mode): Likewise.
(vex128_mode): Likewise.
(vex256_mode): Likewise.
(USE_VEX_C4_TABLE): Likewise.
(USE_VEX_C5_TABLE): Likewise.
(USE_VEX_LEN_TABLE): Likewise.
(VEX_C4_TABLE): Likewise.
(VEX_C5_TABLE): Likewise.
(VEX_LEN_TABLE): Likewise.
(REG_VEX_XX): Likewise.
(MOD_VEX_XXX): Likewise.
(PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
(PREFIX_0F3A44): Likewise.
(PREFIX_0F3ADF): Likewise.
(PREFIX_VEX_XXX): Likewise.
(VEX_OF): Likewise.
(VEX_OF38): Likewise.
(VEX_OF3A): Likewise.
(VEX_LEN_XXX): Likewise.
(vex): Likewise.
(need_vex): Likewise.
(need_vex_reg): Likewise.
(vex_i4_done): Likewise.
(vex_table): Likewise.
(vex_len_table): Likewise.
(OP_REG_VexI4): Likewise.
(vex_cmp_op): Likewise.
(pclmul_op): Likewise.
(vpermil2_op): Likewise.
(m_mode): Updated.
(es_reg): Likewise.
(PREFIX_0F38F0): Likewise.
(PREFIX_0F3A60): Likewise.
(reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
(prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
and PREFIX_VEX_XXX entries.
(x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
(three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
PREFIX_0F3ADF.
(mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
Add MOD_VEX_XXX entries.
(ckprefix): Initialize rex_original and rex_ignored. Store the
REX byte in rex_original.
(get_valid_dis386): Handle the implicit prefix in VEX prefix
bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
(print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
calling get_valid_dis386. Use rex_original and rex_ignored when
printing out REX.
(putop): Handle "XY".
(intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
ymmq_mode.
(OP_E_extended): Updated to use OP_E_register and
OP_E_memory.
(OP_XMM): Handle VEX.
(OP_EX): Likewise.
(XMM_Fixup): Likewise.
(CMP_Fixup): Use ARRAY_SIZE.
* i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
CPU_FMA_FLAGS and CPU_AVX_FLAGS.
(operand_type_init): Add OPERAND_TYPE_REGYMM and
OPERAND_TYPE_VEX_IMM4.
(cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
(opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
VexImmExt and SSE2AVX.
(operand_types): Add RegYMM, Ymmword and Vex_Imm4.
* i386-opc.h (CpuAVX): New.
(CpuAES): Likewise.
(CpuCLMUL): Likewise.
(CpuFMA): Likewise.
(Vex): Likewise.
(Vex256): Likewise.
(VexNDS): Likewise.
(VexNDD): Likewise.
(VexW0): Likewise.
(VexW1): Likewise.
(Vex0F): Likewise.
(Vex0F38): Likewise.
(Vex0F3A): Likewise.
(Vex3Sources): Likewise.
(VexImmExt): Likewise.
(SSE2AVX): Likewise.
(RegYMM): Likewise.
(Ymmword): Likewise.
(Vex_Imm4): Likewise.
(Implicit1stXmm0): Likewise.
(CpuXsave): Updated.
(CpuLM): Likewise.
(ByteOkIntel): Likewise.
(OldGcc): Likewise.
(Control): Likewise.
(Unspecified): Likewise.
(OTMax): Likewise.
(i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
(i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
vex3sources, veximmext and sse2avx.
(i386_operand_type): Add regymm, ymmword and vex_imm4.
* i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
* i386-reg.tbl: Add AVX registers, ymm0..ymm15.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-04-03 14:03:21 +00:00
|
|
|
|
(OP_EX_VexW): Likewise.
|
2009-01-06 01:03:27 +00:00
|
|
|
|
(OP_EX_VexImmW): Likewise.
|
binutils/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* dwarf.c (dwarf_regnames_i386): Add AVX registers.
(dwarf_regnames_x86_64): Likewise.
gas/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* NEWS: Mention AES, CLMUL, AVX/FMA and -msse2avx.
* doc/c-i386.texi: Add avx, aes, clmul and fma to -march=.
Document -msse2avx, .avx, .aes, .clmul and .fma.
* config/tc-i386.c (YMMWORD_MNEM_SUFFIX): New.
(vex_prefix): Likewise.
(sse2avx): Likewise.
(CPU_FLAGS_ARCH_MATCH): Likewise.
(CPU_FLAGS_64BIT_MATCH): Likewise.
(CPU_FLAGS_32BIT_MATCH): Likewise.
(CPU_FLAGS_PERFECT_MATCH): Likewise.
(regymm): Likewise.
(vex_imm4): Likewise.
(fits_in_imm4): Likewise.
(build_vex_prefix): Likewise.
(VEX_check_operands): Likewise.
(bad_implicit_operand): Likewise.
(OPTION_MSSE2AVX): Likewise.
(T_YMMWORD): Likewise.
(_i386_insn): Add vex.
(cpu_arch): Add .avx, .aes, .clmul and .fma.
(cpu_flags_match): Changed to take a pointer to const template.
Enable encoding SSE instructions with VEX prefix for -msse2avx.
(match_mem_size): Also check ymmword.
(operand_type_match): Clear ymmword.
(md_begin): Allow '_' in mnemonic.
(type_names): Add OPERAND_TYPE_VEX_IMM4.
(process_immext): Update assert.
(md_assemble): Don't call process_immext if sse2avx and immext
are true. Call build_vex_prefix if vex is true.
(parse_insn): Updated for cpu_flags_match.
(swap_operands): Handle 5 operands.
(match_template): Handle 5 operands. Updated for cpu_flags_match.
Check regymm. Call VEX_check_operands. Handle YMMWORD_MNEM_SUFFIX.
(process_suffix): Handle YMMWORD_MNEM_SUFFIX.
(check_byte_reg): Check regymm.
(process_operands): Duplicate the destination register for
-msse2avx if needed.
(build_modrm_byte): Updated for instructions with VEX encoding.
(output_insn): Output VEX prefix if needed.
(md_longopts): Add msse2avx.
(md_parse_option): Handle OPTION_MSSE2AVX.
(md_show_usage): Add avx, aes, clmul, fma and -msse2avx.
(intel_e09): Support YMMWORD.
(intel_e11): Likewise.
(intel_get_token): Likewise.
gas/testsuite/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run aes, aes-intel, x86-64-aes,
x86-64-aes-intel, avx, avx-intel, inval-avx, x86-64-avx,
x86-64-avx-intel and x86-64-inval-avx.
* gas/cfi/cfi-i386.s: Add tests for AVX register maps.
* gas/cfi/cfi-x86_64.s: Likewise.
* gas/i386/aes.d: New.
* gas/i386/aes.s: Likewise.
* gas/i386/aes-intel.d: Likewise.
* gas/i386/avx.d: Likewise.
* gas/i386/avx.s: Likewise.
* gas/i386/avx-intel.d: Likewise.
* gas/i386/clmul.d: Likewise.
* gas/i386/clmul-intel.d: Likewise.
* gas/i386/clmul.s: Likewise.
* gas/i386/i386.exp: Likewise.
* gas/i386/inval-avx.l: Likewise.
* gas/i386/inval-avx.s: Likewise.
* gas/i386/sse2avx.d: Likewise.
* gas/i386/sse2avx.s: Likewise.
* gas/i386/x86-64-aes.d: Likewise.
* gas/i386/x86-64-aes.s: Likewise.
* gas/i386/x86-64-aes-intel.d: Likewise.
* gas/i386/x86-64-avx.d: Likewise.
* gas/i386/x86-64-avx.s: Likewise.
* gas/i386/x86-64-avx-intel.d: Likewise.
* gas/i386/x86-64-clmul.d: Likewise.
* gas/i386/x86-64-clmul-intel.d: Likewise.
* gas/i386/x86-64-clmul.s: Likewise.
* gas/i386/x86-64-inval-avx.l: Likewise.
* gas/i386/x86-64-inval-avx.s: Likewise.
* gas/i386/x86-64-sse2avx.d: Likewise.
* gas/i386/x86-64-sse2avx.s: Likewise.
* gas/i386/arch-10.s: Add tests for AVX, AES, CLMUL and FMA.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/rexw.s: Add AVX tests.
* gas/i386/x86-64-opcode-inval.s: Remove lds/les test.
* gas/cfi/cfi-i386.d: Updated.
* gas/cfi/cfi-x86_64.d: Likewise.
* gas/i386/arch-10.d: Likewise.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/rexw.d: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
* gas/i386/x86-64-opcode-inval.d: Likewise.
* gas/i386/x86-64-opcode-inval-intel.d: Likewise.
include/opcode/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (MAX_OPERANDS): Set to 5.
(MAX_MNEM_SIZE): Changed to 20.
opcodes/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (OP_E_register): New.
(OP_E_memory): Likewise.
(OP_VEX): Likewise.
(OP_EX_Vex): Likewise.
(OP_EX_VexW): Likewise.
(OP_XMM_Vex): Likewise.
(OP_XMM_VexW): Likewise.
(OP_REG_VexI4): Likewise.
(PCLMUL_Fixup): Likewise.
(VEXI4_Fixup): Likewise.
(VZERO_Fixup): Likewise.
(VCMP_Fixup): Likewise.
(VPERMIL2_Fixup): Likewise.
(rex_original): Likewise.
(rex_ignored): Likewise.
(Mxmm): Likewise.
(XMM): Likewise.
(EXxmm): Likewise.
(EXxmmq): Likewise.
(EXymmq): Likewise.
(Vex): Likewise.
(Vex128): Likewise.
(Vex256): Likewise.
(VexI4): Likewise.
(EXdVex): Likewise.
(EXqVex): Likewise.
(EXVexW): Likewise.
(EXdVexW): Likewise.
(EXqVexW): Likewise.
(XMVex): Likewise.
(XMVexW): Likewise.
(XMVexI4): Likewise.
(PCLMUL): Likewise.
(VZERO): Likewise.
(VCMP): Likewise.
(VPERMIL2): Likewise.
(xmm_mode): Likewise.
(xmmq_mode): Likewise.
(ymmq_mode): Likewise.
(vex_mode): Likewise.
(vex128_mode): Likewise.
(vex256_mode): Likewise.
(USE_VEX_C4_TABLE): Likewise.
(USE_VEX_C5_TABLE): Likewise.
(USE_VEX_LEN_TABLE): Likewise.
(VEX_C4_TABLE): Likewise.
(VEX_C5_TABLE): Likewise.
(VEX_LEN_TABLE): Likewise.
(REG_VEX_XX): Likewise.
(MOD_VEX_XXX): Likewise.
(PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
(PREFIX_0F3A44): Likewise.
(PREFIX_0F3ADF): Likewise.
(PREFIX_VEX_XXX): Likewise.
(VEX_OF): Likewise.
(VEX_OF38): Likewise.
(VEX_OF3A): Likewise.
(VEX_LEN_XXX): Likewise.
(vex): Likewise.
(need_vex): Likewise.
(need_vex_reg): Likewise.
(vex_i4_done): Likewise.
(vex_table): Likewise.
(vex_len_table): Likewise.
(OP_REG_VexI4): Likewise.
(vex_cmp_op): Likewise.
(pclmul_op): Likewise.
(vpermil2_op): Likewise.
(m_mode): Updated.
(es_reg): Likewise.
(PREFIX_0F38F0): Likewise.
(PREFIX_0F3A60): Likewise.
(reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
(prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
and PREFIX_VEX_XXX entries.
(x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
(three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
PREFIX_0F3ADF.
(mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
Add MOD_VEX_XXX entries.
(ckprefix): Initialize rex_original and rex_ignored. Store the
REX byte in rex_original.
(get_valid_dis386): Handle the implicit prefix in VEX prefix
bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
(print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
calling get_valid_dis386. Use rex_original and rex_ignored when
printing out REX.
(putop): Handle "XY".
(intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
ymmq_mode.
(OP_E_extended): Updated to use OP_E_register and
OP_E_memory.
(OP_XMM): Handle VEX.
(OP_EX): Likewise.
(XMM_Fixup): Likewise.
(CMP_Fixup): Use ARRAY_SIZE.
* i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
CPU_FMA_FLAGS and CPU_AVX_FLAGS.
(operand_type_init): Add OPERAND_TYPE_REGYMM and
OPERAND_TYPE_VEX_IMM4.
(cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
(opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
VexImmExt and SSE2AVX.
(operand_types): Add RegYMM, Ymmword and Vex_Imm4.
* i386-opc.h (CpuAVX): New.
(CpuAES): Likewise.
(CpuCLMUL): Likewise.
(CpuFMA): Likewise.
(Vex): Likewise.
(Vex256): Likewise.
(VexNDS): Likewise.
(VexNDD): Likewise.
(VexW0): Likewise.
(VexW1): Likewise.
(Vex0F): Likewise.
(Vex0F38): Likewise.
(Vex0F3A): Likewise.
(Vex3Sources): Likewise.
(VexImmExt): Likewise.
(SSE2AVX): Likewise.
(RegYMM): Likewise.
(Ymmword): Likewise.
(Vex_Imm4): Likewise.
(Implicit1stXmm0): Likewise.
(CpuXsave): Updated.
(CpuLM): Likewise.
(ByteOkIntel): Likewise.
(OldGcc): Likewise.
(Control): Likewise.
(Unspecified): Likewise.
(OTMax): Likewise.
(i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
(i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
vex3sources, veximmext and sse2avx.
(i386_operand_type): Add regymm, ymmword and vex_imm4.
* i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
* i386-reg.tbl: Add AVX registers, ymm0..ymm15.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-04-03 14:03:21 +00:00
|
|
|
|
(OP_XMM_VexW): Likewise.
|
|
|
|
|
|
(VEXI4_Fixup): Likewise.
|
|
|
|
|
|
(VPERMIL2_Fixup): Likewise.
|
|
|
|
|
|
(VexI4): Likewise.
|
2009-01-06 01:03:27 +00:00
|
|
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|
(VexFMA): Likewise.
|
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|
|
(Vex128FMA): Likewise.
|
binutils/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* dwarf.c (dwarf_regnames_i386): Add AVX registers.
(dwarf_regnames_x86_64): Likewise.
gas/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* NEWS: Mention AES, CLMUL, AVX/FMA and -msse2avx.
* doc/c-i386.texi: Add avx, aes, clmul and fma to -march=.
Document -msse2avx, .avx, .aes, .clmul and .fma.
* config/tc-i386.c (YMMWORD_MNEM_SUFFIX): New.
(vex_prefix): Likewise.
(sse2avx): Likewise.
(CPU_FLAGS_ARCH_MATCH): Likewise.
(CPU_FLAGS_64BIT_MATCH): Likewise.
(CPU_FLAGS_32BIT_MATCH): Likewise.
(CPU_FLAGS_PERFECT_MATCH): Likewise.
(regymm): Likewise.
(vex_imm4): Likewise.
(fits_in_imm4): Likewise.
(build_vex_prefix): Likewise.
(VEX_check_operands): Likewise.
(bad_implicit_operand): Likewise.
(OPTION_MSSE2AVX): Likewise.
(T_YMMWORD): Likewise.
(_i386_insn): Add vex.
(cpu_arch): Add .avx, .aes, .clmul and .fma.
(cpu_flags_match): Changed to take a pointer to const template.
Enable encoding SSE instructions with VEX prefix for -msse2avx.
(match_mem_size): Also check ymmword.
(operand_type_match): Clear ymmword.
(md_begin): Allow '_' in mnemonic.
(type_names): Add OPERAND_TYPE_VEX_IMM4.
(process_immext): Update assert.
(md_assemble): Don't call process_immext if sse2avx and immext
are true. Call build_vex_prefix if vex is true.
(parse_insn): Updated for cpu_flags_match.
(swap_operands): Handle 5 operands.
(match_template): Handle 5 operands. Updated for cpu_flags_match.
Check regymm. Call VEX_check_operands. Handle YMMWORD_MNEM_SUFFIX.
(process_suffix): Handle YMMWORD_MNEM_SUFFIX.
(check_byte_reg): Check regymm.
(process_operands): Duplicate the destination register for
-msse2avx if needed.
(build_modrm_byte): Updated for instructions with VEX encoding.
(output_insn): Output VEX prefix if needed.
(md_longopts): Add msse2avx.
(md_parse_option): Handle OPTION_MSSE2AVX.
(md_show_usage): Add avx, aes, clmul, fma and -msse2avx.
(intel_e09): Support YMMWORD.
(intel_e11): Likewise.
(intel_get_token): Likewise.
gas/testsuite/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run aes, aes-intel, x86-64-aes,
x86-64-aes-intel, avx, avx-intel, inval-avx, x86-64-avx,
x86-64-avx-intel and x86-64-inval-avx.
* gas/cfi/cfi-i386.s: Add tests for AVX register maps.
* gas/cfi/cfi-x86_64.s: Likewise.
* gas/i386/aes.d: New.
* gas/i386/aes.s: Likewise.
* gas/i386/aes-intel.d: Likewise.
* gas/i386/avx.d: Likewise.
* gas/i386/avx.s: Likewise.
* gas/i386/avx-intel.d: Likewise.
* gas/i386/clmul.d: Likewise.
* gas/i386/clmul-intel.d: Likewise.
* gas/i386/clmul.s: Likewise.
* gas/i386/i386.exp: Likewise.
* gas/i386/inval-avx.l: Likewise.
* gas/i386/inval-avx.s: Likewise.
* gas/i386/sse2avx.d: Likewise.
* gas/i386/sse2avx.s: Likewise.
* gas/i386/x86-64-aes.d: Likewise.
* gas/i386/x86-64-aes.s: Likewise.
* gas/i386/x86-64-aes-intel.d: Likewise.
* gas/i386/x86-64-avx.d: Likewise.
* gas/i386/x86-64-avx.s: Likewise.
* gas/i386/x86-64-avx-intel.d: Likewise.
* gas/i386/x86-64-clmul.d: Likewise.
* gas/i386/x86-64-clmul-intel.d: Likewise.
* gas/i386/x86-64-clmul.s: Likewise.
* gas/i386/x86-64-inval-avx.l: Likewise.
* gas/i386/x86-64-inval-avx.s: Likewise.
* gas/i386/x86-64-sse2avx.d: Likewise.
* gas/i386/x86-64-sse2avx.s: Likewise.
* gas/i386/arch-10.s: Add tests for AVX, AES, CLMUL and FMA.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/rexw.s: Add AVX tests.
* gas/i386/x86-64-opcode-inval.s: Remove lds/les test.
* gas/cfi/cfi-i386.d: Updated.
* gas/cfi/cfi-x86_64.d: Likewise.
* gas/i386/arch-10.d: Likewise.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/rexw.d: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
* gas/i386/x86-64-opcode-inval.d: Likewise.
* gas/i386/x86-64-opcode-inval-intel.d: Likewise.
include/opcode/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (MAX_OPERANDS): Set to 5.
(MAX_MNEM_SIZE): Changed to 20.
opcodes/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (OP_E_register): New.
(OP_E_memory): Likewise.
(OP_VEX): Likewise.
(OP_EX_Vex): Likewise.
(OP_EX_VexW): Likewise.
(OP_XMM_Vex): Likewise.
(OP_XMM_VexW): Likewise.
(OP_REG_VexI4): Likewise.
(PCLMUL_Fixup): Likewise.
(VEXI4_Fixup): Likewise.
(VZERO_Fixup): Likewise.
(VCMP_Fixup): Likewise.
(VPERMIL2_Fixup): Likewise.
(rex_original): Likewise.
(rex_ignored): Likewise.
(Mxmm): Likewise.
(XMM): Likewise.
(EXxmm): Likewise.
(EXxmmq): Likewise.
(EXymmq): Likewise.
(Vex): Likewise.
(Vex128): Likewise.
(Vex256): Likewise.
(VexI4): Likewise.
(EXdVex): Likewise.
(EXqVex): Likewise.
(EXVexW): Likewise.
(EXdVexW): Likewise.
(EXqVexW): Likewise.
(XMVex): Likewise.
(XMVexW): Likewise.
(XMVexI4): Likewise.
(PCLMUL): Likewise.
(VZERO): Likewise.
(VCMP): Likewise.
(VPERMIL2): Likewise.
(xmm_mode): Likewise.
(xmmq_mode): Likewise.
(ymmq_mode): Likewise.
(vex_mode): Likewise.
(vex128_mode): Likewise.
(vex256_mode): Likewise.
(USE_VEX_C4_TABLE): Likewise.
(USE_VEX_C5_TABLE): Likewise.
(USE_VEX_LEN_TABLE): Likewise.
(VEX_C4_TABLE): Likewise.
(VEX_C5_TABLE): Likewise.
(VEX_LEN_TABLE): Likewise.
(REG_VEX_XX): Likewise.
(MOD_VEX_XXX): Likewise.
(PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
(PREFIX_0F3A44): Likewise.
(PREFIX_0F3ADF): Likewise.
(PREFIX_VEX_XXX): Likewise.
(VEX_OF): Likewise.
(VEX_OF38): Likewise.
(VEX_OF3A): Likewise.
(VEX_LEN_XXX): Likewise.
(vex): Likewise.
(need_vex): Likewise.
(need_vex_reg): Likewise.
(vex_i4_done): Likewise.
(vex_table): Likewise.
(vex_len_table): Likewise.
(OP_REG_VexI4): Likewise.
(vex_cmp_op): Likewise.
(pclmul_op): Likewise.
(vpermil2_op): Likewise.
(m_mode): Updated.
(es_reg): Likewise.
(PREFIX_0F38F0): Likewise.
(PREFIX_0F3A60): Likewise.
(reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
(prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
and PREFIX_VEX_XXX entries.
(x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
(three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
PREFIX_0F3ADF.
(mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
Add MOD_VEX_XXX entries.
(ckprefix): Initialize rex_original and rex_ignored. Store the
REX byte in rex_original.
(get_valid_dis386): Handle the implicit prefix in VEX prefix
bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
(print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
calling get_valid_dis386. Use rex_original and rex_ignored when
printing out REX.
(putop): Handle "XY".
(intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
ymmq_mode.
(OP_E_extended): Updated to use OP_E_register and
OP_E_memory.
(OP_XMM): Handle VEX.
(OP_EX): Likewise.
(XMM_Fixup): Likewise.
(CMP_Fixup): Use ARRAY_SIZE.
* i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
CPU_FMA_FLAGS and CPU_AVX_FLAGS.
(operand_type_init): Add OPERAND_TYPE_REGYMM and
OPERAND_TYPE_VEX_IMM4.
(cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
(opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
VexImmExt and SSE2AVX.
(operand_types): Add RegYMM, Ymmword and Vex_Imm4.
* i386-opc.h (CpuAVX): New.
(CpuAES): Likewise.
(CpuCLMUL): Likewise.
(CpuFMA): Likewise.
(Vex): Likewise.
(Vex256): Likewise.
(VexNDS): Likewise.
(VexNDD): Likewise.
(VexW0): Likewise.
(VexW1): Likewise.
(Vex0F): Likewise.
(Vex0F38): Likewise.
(Vex0F3A): Likewise.
(Vex3Sources): Likewise.
(VexImmExt): Likewise.
(SSE2AVX): Likewise.
(RegYMM): Likewise.
(Ymmword): Likewise.
(Vex_Imm4): Likewise.
(Implicit1stXmm0): Likewise.
(CpuXsave): Updated.
(CpuLM): Likewise.
(ByteOkIntel): Likewise.
(OldGcc): Likewise.
(Control): Likewise.
(Unspecified): Likewise.
(OTMax): Likewise.
(i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
(i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
vex3sources, veximmext and sse2avx.
(i386_operand_type): Add regymm, ymmword and vex_imm4.
* i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
* i386-reg.tbl: Add AVX registers, ymm0..ymm15.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-04-03 14:03:21 +00:00
|
|
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|
(EXVexW): Likewise.
|
|
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(EXdVexW): Likewise.
|
|
|
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(EXqVexW): Likewise.
|
2009-01-06 01:03:27 +00:00
|
|
|
|
(EXVexImmW): Likewise.
|
binutils/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* dwarf.c (dwarf_regnames_i386): Add AVX registers.
(dwarf_regnames_x86_64): Likewise.
gas/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* NEWS: Mention AES, CLMUL, AVX/FMA and -msse2avx.
* doc/c-i386.texi: Add avx, aes, clmul and fma to -march=.
Document -msse2avx, .avx, .aes, .clmul and .fma.
* config/tc-i386.c (YMMWORD_MNEM_SUFFIX): New.
(vex_prefix): Likewise.
(sse2avx): Likewise.
(CPU_FLAGS_ARCH_MATCH): Likewise.
(CPU_FLAGS_64BIT_MATCH): Likewise.
(CPU_FLAGS_32BIT_MATCH): Likewise.
(CPU_FLAGS_PERFECT_MATCH): Likewise.
(regymm): Likewise.
(vex_imm4): Likewise.
(fits_in_imm4): Likewise.
(build_vex_prefix): Likewise.
(VEX_check_operands): Likewise.
(bad_implicit_operand): Likewise.
(OPTION_MSSE2AVX): Likewise.
(T_YMMWORD): Likewise.
(_i386_insn): Add vex.
(cpu_arch): Add .avx, .aes, .clmul and .fma.
(cpu_flags_match): Changed to take a pointer to const template.
Enable encoding SSE instructions with VEX prefix for -msse2avx.
(match_mem_size): Also check ymmword.
(operand_type_match): Clear ymmword.
(md_begin): Allow '_' in mnemonic.
(type_names): Add OPERAND_TYPE_VEX_IMM4.
(process_immext): Update assert.
(md_assemble): Don't call process_immext if sse2avx and immext
are true. Call build_vex_prefix if vex is true.
(parse_insn): Updated for cpu_flags_match.
(swap_operands): Handle 5 operands.
(match_template): Handle 5 operands. Updated for cpu_flags_match.
Check regymm. Call VEX_check_operands. Handle YMMWORD_MNEM_SUFFIX.
(process_suffix): Handle YMMWORD_MNEM_SUFFIX.
(check_byte_reg): Check regymm.
(process_operands): Duplicate the destination register for
-msse2avx if needed.
(build_modrm_byte): Updated for instructions with VEX encoding.
(output_insn): Output VEX prefix if needed.
(md_longopts): Add msse2avx.
(md_parse_option): Handle OPTION_MSSE2AVX.
(md_show_usage): Add avx, aes, clmul, fma and -msse2avx.
(intel_e09): Support YMMWORD.
(intel_e11): Likewise.
(intel_get_token): Likewise.
gas/testsuite/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run aes, aes-intel, x86-64-aes,
x86-64-aes-intel, avx, avx-intel, inval-avx, x86-64-avx,
x86-64-avx-intel and x86-64-inval-avx.
* gas/cfi/cfi-i386.s: Add tests for AVX register maps.
* gas/cfi/cfi-x86_64.s: Likewise.
* gas/i386/aes.d: New.
* gas/i386/aes.s: Likewise.
* gas/i386/aes-intel.d: Likewise.
* gas/i386/avx.d: Likewise.
* gas/i386/avx.s: Likewise.
* gas/i386/avx-intel.d: Likewise.
* gas/i386/clmul.d: Likewise.
* gas/i386/clmul-intel.d: Likewise.
* gas/i386/clmul.s: Likewise.
* gas/i386/i386.exp: Likewise.
* gas/i386/inval-avx.l: Likewise.
* gas/i386/inval-avx.s: Likewise.
* gas/i386/sse2avx.d: Likewise.
* gas/i386/sse2avx.s: Likewise.
* gas/i386/x86-64-aes.d: Likewise.
* gas/i386/x86-64-aes.s: Likewise.
* gas/i386/x86-64-aes-intel.d: Likewise.
* gas/i386/x86-64-avx.d: Likewise.
* gas/i386/x86-64-avx.s: Likewise.
* gas/i386/x86-64-avx-intel.d: Likewise.
* gas/i386/x86-64-clmul.d: Likewise.
* gas/i386/x86-64-clmul-intel.d: Likewise.
* gas/i386/x86-64-clmul.s: Likewise.
* gas/i386/x86-64-inval-avx.l: Likewise.
* gas/i386/x86-64-inval-avx.s: Likewise.
* gas/i386/x86-64-sse2avx.d: Likewise.
* gas/i386/x86-64-sse2avx.s: Likewise.
* gas/i386/arch-10.s: Add tests for AVX, AES, CLMUL and FMA.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/rexw.s: Add AVX tests.
* gas/i386/x86-64-opcode-inval.s: Remove lds/les test.
* gas/cfi/cfi-i386.d: Updated.
* gas/cfi/cfi-x86_64.d: Likewise.
* gas/i386/arch-10.d: Likewise.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/rexw.d: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
* gas/i386/x86-64-opcode-inval.d: Likewise.
* gas/i386/x86-64-opcode-inval-intel.d: Likewise.
include/opcode/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (MAX_OPERANDS): Set to 5.
(MAX_MNEM_SIZE): Changed to 20.
opcodes/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (OP_E_register): New.
(OP_E_memory): Likewise.
(OP_VEX): Likewise.
(OP_EX_Vex): Likewise.
(OP_EX_VexW): Likewise.
(OP_XMM_Vex): Likewise.
(OP_XMM_VexW): Likewise.
(OP_REG_VexI4): Likewise.
(PCLMUL_Fixup): Likewise.
(VEXI4_Fixup): Likewise.
(VZERO_Fixup): Likewise.
(VCMP_Fixup): Likewise.
(VPERMIL2_Fixup): Likewise.
(rex_original): Likewise.
(rex_ignored): Likewise.
(Mxmm): Likewise.
(XMM): Likewise.
(EXxmm): Likewise.
(EXxmmq): Likewise.
(EXymmq): Likewise.
(Vex): Likewise.
(Vex128): Likewise.
(Vex256): Likewise.
(VexI4): Likewise.
(EXdVex): Likewise.
(EXqVex): Likewise.
(EXVexW): Likewise.
(EXdVexW): Likewise.
(EXqVexW): Likewise.
(XMVex): Likewise.
(XMVexW): Likewise.
(XMVexI4): Likewise.
(PCLMUL): Likewise.
(VZERO): Likewise.
(VCMP): Likewise.
(VPERMIL2): Likewise.
(xmm_mode): Likewise.
(xmmq_mode): Likewise.
(ymmq_mode): Likewise.
(vex_mode): Likewise.
(vex128_mode): Likewise.
(vex256_mode): Likewise.
(USE_VEX_C4_TABLE): Likewise.
(USE_VEX_C5_TABLE): Likewise.
(USE_VEX_LEN_TABLE): Likewise.
(VEX_C4_TABLE): Likewise.
(VEX_C5_TABLE): Likewise.
(VEX_LEN_TABLE): Likewise.
(REG_VEX_XX): Likewise.
(MOD_VEX_XXX): Likewise.
(PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
(PREFIX_0F3A44): Likewise.
(PREFIX_0F3ADF): Likewise.
(PREFIX_VEX_XXX): Likewise.
(VEX_OF): Likewise.
(VEX_OF38): Likewise.
(VEX_OF3A): Likewise.
(VEX_LEN_XXX): Likewise.
(vex): Likewise.
(need_vex): Likewise.
(need_vex_reg): Likewise.
(vex_i4_done): Likewise.
(vex_table): Likewise.
(vex_len_table): Likewise.
(OP_REG_VexI4): Likewise.
(vex_cmp_op): Likewise.
(pclmul_op): Likewise.
(vpermil2_op): Likewise.
(m_mode): Updated.
(es_reg): Likewise.
(PREFIX_0F38F0): Likewise.
(PREFIX_0F3A60): Likewise.
(reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
(prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
and PREFIX_VEX_XXX entries.
(x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
(three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
PREFIX_0F3ADF.
(mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
Add MOD_VEX_XXX entries.
(ckprefix): Initialize rex_original and rex_ignored. Store the
REX byte in rex_original.
(get_valid_dis386): Handle the implicit prefix in VEX prefix
bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
(print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
calling get_valid_dis386. Use rex_original and rex_ignored when
printing out REX.
(putop): Handle "XY".
(intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
ymmq_mode.
(OP_E_extended): Updated to use OP_E_register and
OP_E_memory.
(OP_XMM): Handle VEX.
(OP_EX): Likewise.
(XMM_Fixup): Likewise.
(CMP_Fixup): Use ARRAY_SIZE.
* i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
CPU_FMA_FLAGS and CPU_AVX_FLAGS.
(operand_type_init): Add OPERAND_TYPE_REGYMM and
OPERAND_TYPE_VEX_IMM4.
(cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
(opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
VexImmExt and SSE2AVX.
(operand_types): Add RegYMM, Ymmword and Vex_Imm4.
* i386-opc.h (CpuAVX): New.
(CpuAES): Likewise.
(CpuCLMUL): Likewise.
(CpuFMA): Likewise.
(Vex): Likewise.
(Vex256): Likewise.
(VexNDS): Likewise.
(VexNDD): Likewise.
(VexW0): Likewise.
(VexW1): Likewise.
(Vex0F): Likewise.
(Vex0F38): Likewise.
(Vex0F3A): Likewise.
(Vex3Sources): Likewise.
(VexImmExt): Likewise.
(SSE2AVX): Likewise.
(RegYMM): Likewise.
(Ymmword): Likewise.
(Vex_Imm4): Likewise.
(Implicit1stXmm0): Likewise.
(CpuXsave): Updated.
(CpuLM): Likewise.
(ByteOkIntel): Likewise.
(OldGcc): Likewise.
(Control): Likewise.
(Unspecified): Likewise.
(OTMax): Likewise.
(i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
(i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
vex3sources, veximmext and sse2avx.
(i386_operand_type): Add regymm, ymmword and vex_imm4.
* i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
* i386-reg.tbl: Add AVX registers, ymm0..ymm15.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-04-03 14:03:21 +00:00
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(XMVexW): Likewise.
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(VPERMIL2): Likewise.
|
2009-01-06 01:03:27 +00:00
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(PREFIX_VEX_3A48...PREFIX_VEX_3A4A): Likewise.
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(PREFIX_VEX_3A5C...PREFIX_VEX_3A5F): Likewise.
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(PREFIX_VEX_3A68...PREFIX_VEX_3A6F): Likewise.
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(PREFIX_VEX_3A78...PREFIX_VEX_3A7F): Likewise.
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(VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2): Likewise.
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(VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2): Likewise.
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(get_vex_imm8): Likewise.
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(OP_EX_VexReg): Likewise.
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vpermil2_op): Likewise.
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(EXVexWdq): New.
|
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(vex_w_dq_mode): Likewise.
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(PREFIX_VEX_3896...PREFIX_VEX_389F): Likewise.
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(PREFIX_VEX_38A6...PREFIX_VEX_38AF): Likewise.
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(PREFIX_VEX_38B6...PREFIX_VEX_38BF): Likewise.
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(es_reg): Updated.
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(PREFIX_VEX_38DB): Likewise.
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(PREFIX_VEX_3A4A): Likewise.
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(PREFIX_VEX_3A60): Likewise.
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(PREFIX_VEX_3ADF): Likewise.
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(VEX_LEN_3ADF_P_2): Likewise.
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(prefix_table): Remove PREFIX_VEX_3A48...PREFIX_VEX_3A4A,
|
2009-10-02 15:35:01 +00:00
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PREFIX_VEX_3A5C...PREFIX_VEX_3A5F,
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2009-01-06 01:03:27 +00:00
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PREFIX_VEX_3A68...PREFIX_VEX_3A6F and
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PREFIX_VEX_3A78...PREFIX_VEX_3A7F. Add
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PREFIX_VEX_3896...PREFIX_VEX_389F,
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PREFIX_VEX_38A6...PREFIX_VEX_38AF and
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PREFIX_VEX_38B6...PREFIX_VEX_38BF.
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binutils/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* dwarf.c (dwarf_regnames_i386): Add AVX registers.
(dwarf_regnames_x86_64): Likewise.
gas/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* NEWS: Mention AES, CLMUL, AVX/FMA and -msse2avx.
* doc/c-i386.texi: Add avx, aes, clmul and fma to -march=.
Document -msse2avx, .avx, .aes, .clmul and .fma.
* config/tc-i386.c (YMMWORD_MNEM_SUFFIX): New.
(vex_prefix): Likewise.
(sse2avx): Likewise.
(CPU_FLAGS_ARCH_MATCH): Likewise.
(CPU_FLAGS_64BIT_MATCH): Likewise.
(CPU_FLAGS_32BIT_MATCH): Likewise.
(CPU_FLAGS_PERFECT_MATCH): Likewise.
(regymm): Likewise.
(vex_imm4): Likewise.
(fits_in_imm4): Likewise.
(build_vex_prefix): Likewise.
(VEX_check_operands): Likewise.
(bad_implicit_operand): Likewise.
(OPTION_MSSE2AVX): Likewise.
(T_YMMWORD): Likewise.
(_i386_insn): Add vex.
(cpu_arch): Add .avx, .aes, .clmul and .fma.
(cpu_flags_match): Changed to take a pointer to const template.
Enable encoding SSE instructions with VEX prefix for -msse2avx.
(match_mem_size): Also check ymmword.
(operand_type_match): Clear ymmword.
(md_begin): Allow '_' in mnemonic.
(type_names): Add OPERAND_TYPE_VEX_IMM4.
(process_immext): Update assert.
(md_assemble): Don't call process_immext if sse2avx and immext
are true. Call build_vex_prefix if vex is true.
(parse_insn): Updated for cpu_flags_match.
(swap_operands): Handle 5 operands.
(match_template): Handle 5 operands. Updated for cpu_flags_match.
Check regymm. Call VEX_check_operands. Handle YMMWORD_MNEM_SUFFIX.
(process_suffix): Handle YMMWORD_MNEM_SUFFIX.
(check_byte_reg): Check regymm.
(process_operands): Duplicate the destination register for
-msse2avx if needed.
(build_modrm_byte): Updated for instructions with VEX encoding.
(output_insn): Output VEX prefix if needed.
(md_longopts): Add msse2avx.
(md_parse_option): Handle OPTION_MSSE2AVX.
(md_show_usage): Add avx, aes, clmul, fma and -msse2avx.
(intel_e09): Support YMMWORD.
(intel_e11): Likewise.
(intel_get_token): Likewise.
gas/testsuite/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run aes, aes-intel, x86-64-aes,
x86-64-aes-intel, avx, avx-intel, inval-avx, x86-64-avx,
x86-64-avx-intel and x86-64-inval-avx.
* gas/cfi/cfi-i386.s: Add tests for AVX register maps.
* gas/cfi/cfi-x86_64.s: Likewise.
* gas/i386/aes.d: New.
* gas/i386/aes.s: Likewise.
* gas/i386/aes-intel.d: Likewise.
* gas/i386/avx.d: Likewise.
* gas/i386/avx.s: Likewise.
* gas/i386/avx-intel.d: Likewise.
* gas/i386/clmul.d: Likewise.
* gas/i386/clmul-intel.d: Likewise.
* gas/i386/clmul.s: Likewise.
* gas/i386/i386.exp: Likewise.
* gas/i386/inval-avx.l: Likewise.
* gas/i386/inval-avx.s: Likewise.
* gas/i386/sse2avx.d: Likewise.
* gas/i386/sse2avx.s: Likewise.
* gas/i386/x86-64-aes.d: Likewise.
* gas/i386/x86-64-aes.s: Likewise.
* gas/i386/x86-64-aes-intel.d: Likewise.
* gas/i386/x86-64-avx.d: Likewise.
* gas/i386/x86-64-avx.s: Likewise.
* gas/i386/x86-64-avx-intel.d: Likewise.
* gas/i386/x86-64-clmul.d: Likewise.
* gas/i386/x86-64-clmul-intel.d: Likewise.
* gas/i386/x86-64-clmul.s: Likewise.
* gas/i386/x86-64-inval-avx.l: Likewise.
* gas/i386/x86-64-inval-avx.s: Likewise.
* gas/i386/x86-64-sse2avx.d: Likewise.
* gas/i386/x86-64-sse2avx.s: Likewise.
* gas/i386/arch-10.s: Add tests for AVX, AES, CLMUL and FMA.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/rexw.s: Add AVX tests.
* gas/i386/x86-64-opcode-inval.s: Remove lds/les test.
* gas/cfi/cfi-i386.d: Updated.
* gas/cfi/cfi-x86_64.d: Likewise.
* gas/i386/arch-10.d: Likewise.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/rexw.d: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
* gas/i386/x86-64-opcode-inval.d: Likewise.
* gas/i386/x86-64-opcode-inval-intel.d: Likewise.
include/opcode/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (MAX_OPERANDS): Set to 5.
(MAX_MNEM_SIZE): Changed to 20.
opcodes/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (OP_E_register): New.
(OP_E_memory): Likewise.
(OP_VEX): Likewise.
(OP_EX_Vex): Likewise.
(OP_EX_VexW): Likewise.
(OP_XMM_Vex): Likewise.
(OP_XMM_VexW): Likewise.
(OP_REG_VexI4): Likewise.
(PCLMUL_Fixup): Likewise.
(VEXI4_Fixup): Likewise.
(VZERO_Fixup): Likewise.
(VCMP_Fixup): Likewise.
(VPERMIL2_Fixup): Likewise.
(rex_original): Likewise.
(rex_ignored): Likewise.
(Mxmm): Likewise.
(XMM): Likewise.
(EXxmm): Likewise.
(EXxmmq): Likewise.
(EXymmq): Likewise.
(Vex): Likewise.
(Vex128): Likewise.
(Vex256): Likewise.
(VexI4): Likewise.
(EXdVex): Likewise.
(EXqVex): Likewise.
(EXVexW): Likewise.
(EXdVexW): Likewise.
(EXqVexW): Likewise.
(XMVex): Likewise.
(XMVexW): Likewise.
(XMVexI4): Likewise.
(PCLMUL): Likewise.
(VZERO): Likewise.
(VCMP): Likewise.
(VPERMIL2): Likewise.
(xmm_mode): Likewise.
(xmmq_mode): Likewise.
(ymmq_mode): Likewise.
(vex_mode): Likewise.
(vex128_mode): Likewise.
(vex256_mode): Likewise.
(USE_VEX_C4_TABLE): Likewise.
(USE_VEX_C5_TABLE): Likewise.
(USE_VEX_LEN_TABLE): Likewise.
(VEX_C4_TABLE): Likewise.
(VEX_C5_TABLE): Likewise.
(VEX_LEN_TABLE): Likewise.
(REG_VEX_XX): Likewise.
(MOD_VEX_XXX): Likewise.
(PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
(PREFIX_0F3A44): Likewise.
(PREFIX_0F3ADF): Likewise.
(PREFIX_VEX_XXX): Likewise.
(VEX_OF): Likewise.
(VEX_OF38): Likewise.
(VEX_OF3A): Likewise.
(VEX_LEN_XXX): Likewise.
(vex): Likewise.
(need_vex): Likewise.
(need_vex_reg): Likewise.
(vex_i4_done): Likewise.
(vex_table): Likewise.
(vex_len_table): Likewise.
(OP_REG_VexI4): Likewise.
(vex_cmp_op): Likewise.
(pclmul_op): Likewise.
(vpermil2_op): Likewise.
(m_mode): Updated.
(es_reg): Likewise.
(PREFIX_0F38F0): Likewise.
(PREFIX_0F3A60): Likewise.
(reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
(prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
and PREFIX_VEX_XXX entries.
(x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
(three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
PREFIX_0F3ADF.
(mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
Add MOD_VEX_XXX entries.
(ckprefix): Initialize rex_original and rex_ignored. Store the
REX byte in rex_original.
(get_valid_dis386): Handle the implicit prefix in VEX prefix
bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
(print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
calling get_valid_dis386. Use rex_original and rex_ignored when
printing out REX.
(putop): Handle "XY".
(intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
ymmq_mode.
(OP_E_extended): Updated to use OP_E_register and
OP_E_memory.
(OP_XMM): Handle VEX.
(OP_EX): Likewise.
(XMM_Fixup): Likewise.
(CMP_Fixup): Use ARRAY_SIZE.
* i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
CPU_FMA_FLAGS and CPU_AVX_FLAGS.
(operand_type_init): Add OPERAND_TYPE_REGYMM and
OPERAND_TYPE_VEX_IMM4.
(cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
(opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
VexImmExt and SSE2AVX.
(operand_types): Add RegYMM, Ymmword and Vex_Imm4.
* i386-opc.h (CpuAVX): New.
(CpuAES): Likewise.
(CpuCLMUL): Likewise.
(CpuFMA): Likewise.
(Vex): Likewise.
(Vex256): Likewise.
(VexNDS): Likewise.
(VexNDD): Likewise.
(VexW0): Likewise.
(VexW1): Likewise.
(Vex0F): Likewise.
(Vex0F38): Likewise.
(Vex0F3A): Likewise.
(Vex3Sources): Likewise.
(VexImmExt): Likewise.
(SSE2AVX): Likewise.
(RegYMM): Likewise.
(Ymmword): Likewise.
(Vex_Imm4): Likewise.
(Implicit1stXmm0): Likewise.
(CpuXsave): Updated.
(CpuLM): Likewise.
(ByteOkIntel): Likewise.
(OldGcc): Likewise.
(Control): Likewise.
(Unspecified): Likewise.
(OTMax): Likewise.
(i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
(i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
vex3sources, veximmext and sse2avx.
(i386_operand_type): Add regymm, ymmword and vex_imm4.
* i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
* i386-reg.tbl: Add AVX registers, ymm0..ymm15.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-04-03 14:03:21 +00:00
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|
(vex_table): Likewise.
|
2009-01-06 01:03:27 +00:00
|
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|
(vex_len_table): Remove VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2
|
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|
and VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2.
|
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(putop): Support "%XW".
|
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|
(intel_operand_size): Handle vex_w_dq_mode.
|
2008-03-17 22:17:33 +00:00
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2009-01-06 01:03:27 +00:00
|
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* i386-opc.h (VexNDS): Add a comment for VEX NDS and VEX DDS.
|
2008-03-17 22:17:33 +00:00
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2009-01-06 01:03:27 +00:00
|
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|
* i386-opc.tbl: Remove vpermil2pd/vpermil2ps and old FMA
|
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|
instructions. Add new FMA instructions.
|
2008-03-01 23:30:51 +00:00
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* i386-tbl.h: Regenerated.
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2009-10-02 15:35:01 +00:00
|
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|
2009-01-02 Matthias Klose <doko@ubuntu.com>
|
2008-01-02 00:37:44 +00:00
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2009-10-02 15:35:01 +00:00
|
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* or32-opc.c (or32_print_register, or32_print_immediate,
|
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|
disassemble_insn): Don't rely on undefined sprintf behaviour.
|
2008-01-02 00:37:44 +00:00
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2009-01-06 01:03:27 +00:00
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For older changes see ChangeLog-2008
|
1999-05-03 07:29:11 +00:00
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Local Variables:
|
2001-01-11 19:01:42 +00:00
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mode: change-log
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left-margin: 8
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fill-column: 74
|
1999-05-03 07:29:11 +00:00
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version-control: never
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End:
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