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Author SHA1 Message Date
Maciej W. Rozycki
ef068ef442 Correct ChangeLog dates. 2013-02-13 19:36:10 +00:00
Maciej W. Rozycki
5417f71edb opcodes/ 
* mips-dis.c (is_compressed_mode_p): Only match symbols from the
	section disassembled.

	binutils/testsuite/
	* binutils-all/mips/mixed-micromips.d: New test.
	* binutils-all/mips/mixed-mips16.d: New test.
	* binutils-all/mips/mixed-micromips.s: New test source.
	* binutils-all/mips/mixed-mips16.s: New test source.
	* binutils-all/mips/mips.exp: New file.
 2013-02-13 17:09:09 +00:00
Richard Earnshaw
6fe6ded97b 2013-02-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 
* arm-dis.c: Update strht pattern.

	* gas/arm/archv6t2.s: Add strht and ldrht tests.
	* gas/arm/archv6t2.d: Add disassembly patterns for the above.
 2013-02-11 10:15:52 +00:00
Richard Sandiford
0aa27725e5 gas/ 
2013-02-09  Jürgen Urban  <JuergenUrban@gmx.de>

	* config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
	(macro): Use it.  Assert that trunc.w.s is not used for r5900.

opcodes/
2013-02-09  Jürgen Urban  <JuergenUrban@gmx.de>

	* mips-opc.c (mips_builtin_opcodes): Enable l.d and s.d macros for
	single-float.  Disable ll, lld, sc and scd for EE.  Disable the
	trunc.w.s macro for EE.

gas/testsuite/
2013-02-09  Jürgen Urban  <JuergenUrban@gmx.de>

	* gas/mips/24k-triple-stores-2.d, gas/mips/24k-triple-stores-2.s,
	gas/mips/micromips@24k-triple-stores-2.d: Move "sc" tests to...
	* gas/mips/24k-triple-stores-2-llsc.d,
	gas/mips/24k-triple-stores-2-llsc.s,
	gas/mips/micromips@24k-triple-stores-2-llsc.d: ...these new tests.
	* gas/mips/r5900-full.d, gas/mips/r5900-full.s: Verify that the
	MIPS ISA level can be upgraded to support ll, sc, lld and scd.
	* gas/mips/l_d-single.d, gas/mips/s_d-single.d,
	gas/mips/r5900-nollsc.l, gas/mips/r5900-nollsc.s: New tests.
	* gas/mips/mips.exp: Update accordingly.  Add "nollsc" to r5900
	properties.
 2013-02-09 10:24:20 +00:00
Sandra Loosemore
36591ba149 2013-02-06 Sandra Loosemore <sandra@codesourcery.com> 
Andrew Jenner <andrew@codesourcery.com>

	Based on patches from Altera Corporation.

	bfd/
	* Makefile.am (ALL_MACHINES): Add cpu-nios2.lo.
	(ALL_MACHINES_CFILES): Add cpu-nios2.c.
	(BFD_BACKENDS): Add elf32-nios2.lo.
	(BFD32_BACKENDS_CFILES): Add elf32-nios2.c.
	* Makefile.in: Regenerated.
	* configure.in: Add entries for bfd_elf32_bignios2_vec and
	bfd_elf32_littlenios2_vec.
	* configure: Regenerated.
	* config.bfd: Add cases for nios2.
	* archures.c (enum bfd_architecture): Add bfd_arch_nios2.
	(bfd_mach_nios2): Define.
	(bfd_nios2_arch): Declare.
	(bfd_archures_list): Add bfd_nios2_arch.
	* targets.c (bfd_elf32_bignios2_vec): Declare.
	(bfd_elf32_littlenios2_vec): Declare.
	(_bfd_target_vector): Add entries for bfd_elf32_bignios2_vec and
	bfd_elf32_littlenios2_vec.
	* elf-bfd.h (enum elf_target_id): Add NIOS2_ELF_DATA.
	* reloc.c (enum bfd_reloc_code_real): Add Nios II relocations.
	* bfd-in2.h: Regenerated.
	* libbfd.h: Regenerated.
	* cpu-nios2.c: New file.
	* elf32-nios2.c: New file.

	opcodes/
	* Makefile.am (TARGET_LIBOPCODES_CFILES): Add nios2-dis.c and
	nios2-opc.c.
	* Makefile.in: Regenerated.
	* configure.in: Add case for bfd_nios2_arch.
	* configure: Regenerated.
	* disassemble.c (ARCH_nios2): Define.
	(disassembler): Add case for bfd_arch_nios2.
	* nios2-dis.c: New file.
	* nios2-opc.c: New file.

	include/
	* dis-asm.h (print_insn_big_nios2): Declare.
	(print_insn_little_nios2): Declare.

	include/elf
	* nios2.h: New file.

	include/opcode/
	* nios2.h: New file.

	gas/
	* Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
	(TARGET_CPU_HFILES): Add config/tc-nios2.h.
	* Makefile.in: Regenerated.
	* configure.tgt: Add case for nios2*-linux*.
	* config/obj-elf.c: Conditionally include elf/nios2.h.
	* config/tc-nios2.c: New file.
	* config/tc-nios2.h: New file.
	* doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
	* doc/Makefile.in: Regenerated.
	* doc/all.texi: Set NIOSII.
	* doc/as.texinfo (Overview): Add Nios II options.
	(Machine Dependencies): Include c-nios2.texi.
	* doc/c-nios2.texi: New file.
	* NEWS: Note Altera Nios II support.

	gas/testsuite/
	* gas/nios2/add.d: New.
	* gas/nios2/add.s: New.
	* gas/nios2/align_fill.d: New.
	* gas/nios2/align_fill.s: New.
	* gas/nios2/align_text.d: New.
	* gas/nios2/align_text.s: New.
	* gas/nios2/and.d: New.
	* gas/nios2/and.s: New.
	* gas/nios2/branch.d: New.
	* gas/nios2/branch.s: New.
	* gas/nios2/break.d: New.
	* gas/nios2/break.s: New.
	* gas/nios2/bret.d: New.
	* gas/nios2/bret.s: New.
	* gas/nios2/cache.d: New.
	* gas/nios2/cache.s: New.
	* gas/nios2/call26.d: New.
	* gas/nios2/call26.s: New.
	* gas/nios2/call.d: New.
	* gas/nios2/call.s: New.
	* gas/nios2/cmp.d: New.
	* gas/nios2/cmp.s: New.
	* gas/nios2/comments.d: New.
	* gas/nios2/comments.s: New.
	* gas/nios2/complex.d: New.
	* gas/nios2/complex.s: New.
	* gas/nios2/ctl.d: New.
	* gas/nios2/ctl.s: New.
	* gas/nios2/custom.d: New.
	* gas/nios2/custom.s: New.
	* gas/nios2/etbt.d: New.
	* gas/nios2/etbt.s: New.
	* gas/nios2/flushda.d: New.
	* gas/nios2/flushda.s: New.
	* gas/nios2/illegal.l: New.
	* gas/nios2/illegal.s: New.
	* gas/nios2/jmp.d: New.
	* gas/nios2/jmp.s: New.
	* gas/nios2/ldb.d: New.
	* gas/nios2/ldb.s: New.
	* gas/nios2/ldh.d: New.
	* gas/nios2/ldh.s: New.
	* gas/nios2/ldw.d: New.
	* gas/nios2/ldw.s: New.
	* gas/nios2/lineseparator.d: New.
	* gas/nios2/lineseparator.s: New.
	* gas/nios2/mov.d: New.
	* gas/nios2/movia.d: New.
	* gas/nios2/movia.s: New.
	* gas/nios2/movi.d: New.
	* gas/nios2/movi.s: New.
	* gas/nios2/mov.s: New.
	* gas/nios2/mul.d: New.
	* gas/nios2/mul.s: New.
	* gas/nios2/nios2.exp: New.
	* gas/nios2/nor.d: New.
	* gas/nios2/nor.s: New.
	* gas/nios2/or.d: New.
	* gas/nios2/or.s: New.
	* gas/nios2/ret.d: New.
	* gas/nios2/ret.s: New.
	* gas/nios2/rol.d: New.
	* gas/nios2/rol.s: New.
	* gas/nios2/rotate.d: New.
	* gas/nios2/rotate.s: New.
	* gas/nios2/stb.d: New.
	* gas/nios2/stb.s: New.
	* gas/nios2/sth.d: New.
	* gas/nios2/sth.s: New.
	* gas/nios2/stw.d: New.
	* gas/nios2/stw.s: New.
	* gas/nios2/sub.d: New.
	* gas/nios2/sub.s: New.
	* gas/nios2/sync.d: New.
	* gas/nios2/sync.s: New.
	* gas/nios2/trap.d: New.
	* gas/nios2/trap.s: New.
	* gas/nios2/tret.d: New.
	* gas/nios2/tret.s: New.
	* gas/nios2/warn_noat.l: New.
	* gas/nios2/warn_noat.s: New.
	* gas/nios2/warn_nobreak.l: New.
	* gas/nios2/warn_nobreak.s: New.
	* gas/nios2/xor.d: New.
	* gas/nios2/xor.s: New.

	ld/
	* Makefile.am (enios2elf.c): New rule.
	* Makefile.in: Regenerated.
	* configure.tgt: Add case for nios2*-*-*.
	* emulparams/nios2elf.sh: New file.
	* NEWS: Note Altera Nios II support.

	ld/testsuite/
	* ld-nios2/emit-relocs-1a.s: New.
	* ld-nios2/emit-relocs-1b.s: New.
	* ld-nios2/emit-relocs-1.d: New.
	* ld-nios2/emit-relocs-1.ld: New.
	* ld-nios2/gprel.d: New.
	* ld-nios2/gprel.s: New.
	* ld-nios2/hilo16.d: New.
	* ld-nios2/hilo16.s: New.
	* ld-nios2/hilo16_symbol.s: New.
	* ld-nios2/imm5.d: New.
	* ld-nios2/imm5.s: New.
	* ld-nios2/imm5_symbol.s: New.
	* ld-nios2/nios2.exp: New.
	* ld-nios2/pcrel16.d: New.
	* ld-nios2/pcrel16_label.s: New.
	* ld-nios2/pcrel16.s: New.
	* ld-nios2/relax_callr.d: New.
	* ld-nios2/relax_callr.ld: New.
	* ld-nios2/relax_callr.s: New.
	* ld-nios2/relax_cjmp.d: New.
	* ld-nios2/relax_cjmp.s: New.
	* ld-nios2/relax_jmp.ld: New.
	* ld-nios2/relax_section.d: New.
	* ld-nios2/relax_section.s: New.
	* ld-nios2/relax_ujmp.d: New.
	* ld-nios2/relax_ujmp.s: New.
	* ld-nios2/reloc.d: New.
	* ld-nios2/reloc.s: New.
	* ld-nios2/reloc_symbol.s: New.
	* ld-nios2/s16.d: New.
	* ld-nios2/s16.s: New.
	* ld-nios2/s16_symbol.s: New.
	* ld-nios2/u16.d: New.
	* ld-nios2/u16.s: New.
	* ld-nios2/u16_symbol.s: New.
	* ld-elf/indirect.exp: Skip on targets that don't support
	-shared -fPIC.
	* ld-elfcomm/elfcomm.exp: Build with -G0 for nios2.
	* ld-plugin/lto.exp: Skip shared library tests on targets that
	don't support them.  Skip execution tests on non-native targets.

	binutils/
	* readelf.c: Include elf/nios2.h.
	(dump_relocations): Add case for EM_ALTERA_NIOS2.
	(get_nios2_dynamic_type): New.
	(get_dynamic_type): Add case for EM_ALTERA_NIOS2.
	(is_32bit_abs_reloc): Fix EM_ALTERA_NIOS2 case.
	(is_16bit_abs_reloc): Likewise.
	(is_none_reloc): Add EM_ALTERA_NIOS2 and EM_NIOS32 cases.
	* NEWS: Note Altera Nios II support.
	* MAINTAINERS: Add Nios II maintainers.
 2013-02-06 23:22:26 +00:00
Alan Modra
545093a450 * po/POTFILES.in: Regenerate. 
* rl78-decode.c: Regenerate.
	* rx-decode.c: Regenerate.
 2013-02-04 06:04:33 +00:00
Yufeng Zhang
e30181a58d include/opcode/ 
2013-01-30  Yufeng Zhang  <yufeng.zhang@arm.com>

	* aarch64.h (aarch64_op): Add OP_SXTL, OP_SXTL2, OP_UXTL and OP_UXTL2.

opcodes/

2013-01-30  Yufeng Zhang  <yufeng.zhang@arm.com>

	* aarch64-tbl.h (aarch64_opcode_table): Flag sshll, sshll2, ushll and
	ushll2 with F_HAS_ALIAS.  Add entries for sxtl, sxtl2, uxtl and uxtl2.
	* aarch64-asm.c (convert_xtl_to_shll): New function.
	(convert_to_real): Handle OP_SXTL, OP_SXTL2, OP_UXTL and OP_UXTL2 by
	calling convert_xtl_to_shll.
	* aarch64-dis.c (convert_shll_to_xtl): New function.
	(convert_to_alias): Handle OP_SXTL, OP_SXTL2, OP_UXTL and OP_UXTL2 by
	calling convert_shll_to_xtl.
	* aarch64-gen.c: Update copyright year.
	* aarch64-asm-2.c: Re-generate.
	* aarch64-dis-2.c: Re-generate.
	* aarch64-opc-2.c: Re-generate.

gas/testsuite/

2013-01-30  Yufeng Zhang  <yufeng.zhang@arm.com>

	* gas/aarch64/alias.s: Add new tests.
	* gas/aarch64/alias.d: Update.
	* gas/aarch64/no-aliases.d: Update.
 2013-01-30 15:43:32 +00:00
Nick Clifton
78c8d46ca4 Add support for V850E3V5 architecture 2013-01-24 11:14:05 +00:00
Yufeng Zhang
f5555712ba include/opcode/ 
2013-01-17  Yufeng Zhang  <yufeng.zhang@arm.com>

	* aarch64.h (aarch64_op): Remove OP_V_MOVI_B.

opcodes/

2013-01-17  Yufeng Zhang  <yufeng.zhang@arm.com>

	* aarch64-asm.c (aarch64_ins_advsimd_imm_modified): Handle 8-bit MOVI.
	* aarch64-dis.c (aarch64_ext_advsimd_imm_modified): Likewise.
	* aarch64-opc.c (operand_general_constraint_met_p): For
	AARCH64_MOD_LSL, move the range check on the shift amount before the
	alignment check; change to call set_sft_amount_out_of_range_error
	instead of set_imm_out_of_range_error.
	* aarch64-tbl.h (QL_SIMD_IMM_B): Replace NIL with LSL.
	(aarch64_opcode_table): Remove the OP enumerator from the asimdimm
	8-bit MOVI entry; change the 2nd operand from SIMD_IMM to
	SIMD_IMM_SFT.

gas/

2013-01-17  Yufeng Zhang  <yufeng.zhang@arm.com>

	* config/tc-aarch64.c (output_operand_error_record): Change to output
	the out-of-range error message as value-expected message if there is
	only one single value in the expected range.
	(programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
	LSL #0 as a programmer-friendly feature.

gas/testsuite/

2013-01-17  Yufeng Zhang  <yufeng.zhang@arm.com>

	* gas/aarch64/diagnostic.l: Update.
	* gas/aarch64/movi.s: Add tests.
	* gas/aarch64/movi.d: Update.
	* gas/aarch64/programmer-friendly.s: Add comment.
 2013-01-17 16:09:44 +00:00
H.J. Lu
2f81ff9286 Add OPERAND_TYPE_IMM32_64 
* i386-gen.c (operand_type_init): Add OPERAND_TYPE_IMM32_64.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
 2013-01-16 22:11:05 +00:00
Nick Clifton
dd42f06036 * config/tc-v850.c (md_assemble): Allow signed values for 
V850E_IMMEDIATE.

	* gas/v850/basic.exp: Allow for variations in reloc names.
	* gas/v850/split-lo16.d: Likewise.

	* gas/v850/v850e1.s: Add more tests of the PREPARE insn.
	* gas/v850/v850e1.d: Update expected disassembly.

	* v850-dis.c (get_operand_value): Sign extend V850E_IMMEDIATE
	values.
	* v850-opc.c (IMM16LO): Add V850_OPERAND_SIGNED attribute.
 2013-01-15 08:45:45 +00:00
Nick Clifton
a4533ed80a * metag-dis.c (REG_WIDTH): Increase to 64. 
* gas/metag/metadsp21.d: Fix expected MMOV disassembly.
 2013-01-14 11:22:06 +00:00
Peter Bergner
5817ffd1f8 include/opcode/ 
* ppc.h (PPC_OPCODE_POWER8): New define.
	(PPC_OPCODE_HTM): Likewise.

opcodes/
	* ppc-dis.c (ppc_opts): Add "power8", "pwr8" and "htm" entries.
	* ppc-opc.c (HTM_R, HTM_SI, XRTRB_MASK, XRTRARB_MASK, XRTLRARB_MASK,
	XRTARARB_MASK, XRTBFRARB_MASK, XRCL, POWER8, PPCHTM): New defines.
	(SH6): Update.
	<"tabort.", "tabortdc.", "tabortdci.", "tabortwc.",
	"tabortwci.", "tbegin.", "tcheck", "tend.", "trechkpt.",
	"treclaim.", "tsr.">: Add POWER8 HTM opcodes.
	<"tendall.", "tresume.", "tsuspend.">: Add POWER8 HTM extended opcodes.

gas/
	* doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
	* doc/c-ppc.texi (PowerPC-Opts):  Likewise.
	* config/tc-ppc.c (md_show_usage): Likewise.
	(ppc_handle_align): Handle power8's group ending nop.

gas/testsuite/
	* gas/ppc/htm.d: New test.
	* gas/ppc/htm.s: Likewise.
	* gas/ppc/power8.d: Likewise.
	* gas/ppc/power8.s: Likewise.
	* gas/ppc/ppc.exp: Run them.
 2013-01-11 02:25:36 +00:00
Nick Clifton
a3c629886c * common.h: Fix case of "Meta". 
* metag.h: New file.

	* dis-asm.h (print_insn_metag): New declaration.

	* metag.h: New file.

	* Makefile.am: Add Meta.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* configure.in: Add Meta.
	* disassemble.c: Add Meta support.
	* metag-dis.c: New file.

	* Makefile.am: Add Meta.
	* Makefile.in: Regenerate.
	* archures.c (bfd_mach_metag): New.
	* bfd-in2.h: Regenerate.
	* config.bfd: Add Meta.
	* configure: Regenerate.
	* configure.in: Add Meta.
	* cpu-metag.c: New file.
	* elf-bfd.h: Add Meta.
	* elf32-metag.c: New file.
	* elf32-metag.h: New file.
	* libbfd.h: Regenerate.
	* reloc.c: Add Meta relocations.
	* targets.c: Add Meta.

	* Makefile.am: Add Meta.
	* Makefile.in: Regenerate.
	* config/tc-metag.c: New file.
	* config/tc-metag.h: New file.
	* configure.tgt: Add Meta.
	* doc/Makefile.am: Add Meta.
	* doc/Makefile.in: Regenerate.
	* doc/all.texi: Add Meta.
	* doc/as.texiinfo: Document Meta options.
	* doc/c-metag.texi: New file.

	* gas/metag/labelarithmetic.d: New file.
	* gas/metag/labelarithmetic.s: New file.
	* gas/metag/metacore12.d: New file.
	* gas/metag/metacore12.s: New file.
	* gas/metag/metacore21-invalid.l: New file.
	* gas/metag/metacore21-invalid.s: New file.
	* gas/metag/metacore21.d: New file.
	* gas/metag/metacore21.s: New file.
	* gas/metag/metacore21ext.d: New file.
	* gas/metag/metacore21ext.s: New file.
	* gas/metag/metadsp21-invalid.l: New file.
	* gas/metag/metadsp21-invalid.s: New file.
	* gas/metag/metadsp21.d: New file.
	* gas/metag/metadsp21.s: New file.
	* gas/metag/metadsp21ext.d: New file.
	* gas/metag/metadsp21ext.s: New file.
	* gas/metag/metafpu21.d: New file.
	* gas/metag/metafpu21.s: New file.
	* gas/metag/metafpu21ext.d: New file.
	* gas/metag/metafpu21ext.s: New file.
	* gas/metag/metag.exp: New file.
	* gas/metag/tls.d: New file.
	* gas/metag/tls.s: New file.

	* Makefile.am: Add Meta.
	* Makefile.in: Regenerate.
	* configure.tgt: Add Meta.
	* emulparams/elf32metag.sh: New file.
	* emultempl/metagelf.em: New file.

	* ld-elf/merge.d: Mark Meta as xfail.
	* ld-gc/start.d: Skip this test on Meta.
	* ld-gc/personality.d: Skip this test on Meta.
	* ld-metag/external.s: New file.
	* ld-metag/metag.exp: New file.
	* ld-metag/pcrel.d: New file.
	* ld-metag/pcrel.s: New file.
	* ld-metag/shared.d: New file.
	* ld-metag/shared.r: New file.
	* ld-metag/shared.s: New file.
	* ld-metag/stub.d: New file.
	* ld-metag/stub.s: New file.
	* ld-metag/stub_pic_app.d: New file.
	* ld-metag/stub_pic_app.r: New file.
	* ld-metag/stub_pic_app.s: New file.
	* ld-metag/stub_pic_shared.d: New file.
	* ld-metag/stub_pic_shared.s: New file.
	* ld-metag/stub_shared.d: New file.
	* ld-metag/stub_shared.r: New file.
	* ld-metag/stub_shared.s: New file.

	* binutils/readelf.c: (guess_is_rela): Add EM_METAG.
	(dump_relocations): Add EM_METAG.
	(get_machine_name): Correct case for Meta.
	(is_32bit_abs_reloc): Add support for Meta ADDR32 reloc.
	(is_none_reloc): Add support for Meta NONE reloc.
 2013-01-10 09:49:22 +00:00
Nick Clifton
f1a133ffb8 oops - typo correction. 2013-01-07 15:10:18 +00:00
Nick Clifton
73335eaedf (make_instruction): Rename to cr16_make_instruction. 
(match_opcode): Rename to cr16_match_opcode.
 2013-01-07 15:09:07 +00:00
Nick Clifton
e407c74b5b * archures.c: Add support for MIPS r5900 
* bfd-in2.h: Add support for MIPS r5900
	* config.bfd: Add support for Sony Playstation 2
	* cpu-mips.c: Add support for MIPS r5900
	* elfxx-mips.c: Add support for MIPS r5900 (extension of r4000)

	* config/tc-mips.c: Add support for MIPS r5900
	Add M_LQ_AB and M_SQ_AB to support large values for instructions lq and sq.
	* config/tc-mips.c (can_swap_branch_p, get_append_method): Detect some conditional short loops to fix a bug on the r5900 by NOP in the branch delay slot.
	* config/tc-mips.c (M_MUL): Support 3 operands in multu on r5900.
	* config/tc-mips.c (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
	* config/tc-mips.c (s_mipsset): Force 32 bit floating point on r5900.
	* configure.in: Detect CPU type when target string contains r5900 (e.g. mips64r5900el-linux-gnu).

	* config/tc-mips.c (mips_ip): Check parameter range of instructions mfps and mtps on r5900.

	* elf/mips.h: Add MIPS machine variant number for r5900 which is compatible with old Playstation 2 software.
	* opcode/mips.h: Add support for r5900 instructions including lq and sq.

	* configure.tgt: Support ELF files for Sony Playstation 2 (for ps2dev and ps2sdk).
	* emulparams/elf32lr5900n32.sh: Create linker script for Sony Playstation 2 ELF files using MIPS ABI n32.
	* emulparams/elf32lr5900.sh: Create linker script for Sony Playstation 2 ELF files using MIPS ABI o32.
	* Makefile.am: Add linker scripts for Sony Playstation 2 ELF files.

	* opcodes/mips-dis.c: Add names for CP0 registers of r5900.
	* opcodes/mips-opc.c: Add M_SQ_AB and M_LQ_AB to support larger range for instructions sq and lq.

	* opcodes/mips-opc.c: Add support for MIPS r5900 CPU.
	Add support for 128 bit MMI (Multimedia Instructions).
	Add support for EE instructions (Emotion Engine).
	Disable unsupported floating point instructions (64 bit and undefined compare operations).
	Enable instructions of MIPS ISA IV which are supported by r5900.
	Disable 64 bit co processor instructions.
	Disable 64 bit multiplication and division instructions.
	Disable instructions for co-processor 2 and 3, because these are not supported (preparation for later VU0 support (Vector Unit)).
	Disable cvt.w.s because this behaves like trunc.w.s and the correct execution can't be ensured on r5900.
	Add trunc.w.s using the opcode encoding of cvt.w.s on r5900. This will confuse less developers and compilers.
 2013-01-04 17:22:53 +00:00
Yufeng Zhang
fb098a1efc opcodes/ 
2013-01-04  Yufeng Zhang  <yufeng.zhang@arm.com>

	* aarch64-opc.c (aarch64_print_operand): Change to print
	AARCH64_OPND_IMM_MOV in hexadecimal in the instruction and in decimal
	in comment.
	* aarch64-tbl.h (aarch64_opcode_table): Remove the 'F_PSEUDO' flag
	from the opcode entries of OP_MOV_IMM_LOG, OP_MOV_IMM_WIDEN and
	OP_MOV_IMM_WIDE.

gas/testsuite/

2013-01-04  Yufeng Zhang  <yufeng.zhang@arm.com>

	* gas/aarch64/int-insns.d: Update.
	* gas/aarch64/mov.d: Update.
	* gas/aarch64/reloc-insn.d: Update.

ld/testsuite/

2013-01-04  Yufeng Zhang  <yufeng.zhang@arm.com>

	* ld-aarch64/emit-relocs-264.d: Append the '-Mno-aliases' option to
	the objdump directive.
	* ld-aarch64/emit-relocs-266.d: Ditto.
	* ld-aarch64/emit-relocs-268.d: Ditto.
	* ld-aarch64/emit-relocs-269.d: Ditto.
	* ld-aarch64/emit-relocs-270.d: Ditto.
	* ld-aarch64/emit-relocs-271.d: Ditto.
	* ld-aarch64/emit-relocs-272.d: Ditto.
 2013-01-04 14:59:33 +00:00
Nick Clifton
a32c3ff848 * aarch64-opc.c (aarch64_prfops): Update to support PLIL1KEEP, 
PLIL1STRM, PLIL2KEEP, PLIL2STRM, PLIL3KEEP and PLIL3STRM.

        * gas/aarch64/system.d: Update.
 2013-01-04 13:32:06 +00:00
H.J. Lu
6265840747 Update copyright year to 2013 
binutils/

2013-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* version.c (print_version): Update copyright year to 2013.

gas/

2013-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* as.c (parse_args): Update copyright year to 2013.

ld/

2013-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* ldver.c (ldversion): Update copyright year to 2013.

opcodes/

2013-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (process_copyright): Update copyright year to 2013.
 2013-01-02 17:15:38 +00:00
Nick Clifton
bab4becb12 opcodes/ChangeLog 
* cr16-dis.c (match_opcode,make_instruction: Remove static declaration.
	(dwordU,wordU): Moved typedefs to opcode/cr16.h
	(cr16_words,cr16_allWords,cr16_currInsn): Added prefix 'cr16_'

bfd/Changelog
	* config.bfd (cr16*-*-uclinux*): New target support.

include/opcode/ChangeLog
	* cr16.h (dwordU,wordU): Moved typedefs from cr16-dis.c
	(make_instruction,match_opcode): Added function prototypes.
	(cr16_words,cr16_allWords,cr16_currInsn): Declare as extern.
 2013-01-02 13:13:36 +00:00
Nick Clifton
5bf135a788 Add copyright notices 2012-12-17 16:56:12 +00:00
Alan Modra
943d398f4c PR binutils/14950 
* ppc-opc.c (insert_sci8, extract_sci8): Rewrite.
	(insert_sci8n, extract_sci8n): Likewise.
 2012-12-13 07:46:13 +00:00
Nick Clifton
752937aa0c Add copyright notices 2012-12-10 12:48:03 +00:00
Joern Rennecke
02a79b89fd 2012-11-30 Oleg Raikhman <oleg@adapteva.com> 
Joern Rennecke  <joern.rennecke@embecosm.com>

cpu:
        * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
        (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
        (testset-insn): Add NO_DIS attribute to t.l.
        (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
        (move-insns): Add NO-DIS attribute to cmov.l.
        (op-mmr-movts): Add NO-DIS attribute to movts.l.
        (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
        (op-rrr): Add NO-DIS attribute to .l.
        (shift-rrr): Add NO-DIS attribute to .l.
        (op-shift-rri): Add NO-DIS attribute to i32.l.
        (bitrl, movtl): Add NO-DIS attribute.
        (op-iextrrr): Add NO-DIS attribute to .l
        (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
        (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.

opcodes:
        * epiphany-desc.c, epiphany-desc.h, epiphany-opc.c: Regenerate.
 2012-11-30 17:54:58 +00:00
Roland McGrath
cdaaa29dd6 opcodes/ 
* s390-mkopc.c (file_header): Add const.
 2012-11-29 23:42:03 +00:00
Michael Eager
94dda8b768 opcodes/Changelog: 
* microblaze-opc.h: Rename INST_TYPE_RD_R1_SPECIAL to
	INST_TYPE_R1_R2_SPECIAL
	* microblaze-dis.c (print_insn_microblaze): Same.
gas/Changelog
	* gas/config/tc-microblaze.c: Rename INST_TYPE_RD_R1_SPECIAL to
	INST_TYPE_R1_R2_SPECIAL, don't set RD for wic.
 2012-11-29 21:09:01 +00:00
Alan Modra
776fc41826 include/opcode/ 
* ppc.h (ppc_parse_cpu): Update prototype.
opcodes/
	* ppc-dis.c (ppc_parse_cpu): Add "sticky" param.  Track bits
	set from ppc_opts.sticky in it.  Delete "retain_mask".
	(powerpc_init_dialect): Choose default dialect from info->mach
	before parsing -M options.  Handle more bfd_mach_ppc variants.
	Update common default to power7.
gas/
	* config/tc-ppc.c (sticky): New var.
	(md_parse_option, ppc_machine): Update ppc_parse_cpu calls.
gas/testsuite/
	* gas/ppc/astest2.d: Pass -Mppc to objdump.
ld/testsuite/
	* ld-powerpc/plt1.d: Update for default "at" branch hints.
	* ld-powerpc/tlsexe.d: Likewise.
	* ld-powerpc/tlsexetoc.d: Likewise.
	* ld-powerpc/tlsopt1.d: Likewise.
	* ld-powerpc/tlsopt1_32.d: Likewise.
	* ld-powerpc/tlsopt2.d: Likewise.
	* ld-powerpc/tlsopt2_32.d: Likewise.
	* ld-powerpc/tlsopt4.d: Likewise.
	* ld-powerpc/tlsopt4_32.d: Likewise.
	* ld-powerpc/tlsso.d: Likewise.
	* ld-powerpc/tlstocso.d: Likewise.
 2012-11-23 03:28:13 +00:00
Michael Eager
abe9f67d45 Add swap byte (swapb) and swap halfword (swaph) opcodes. 
binutils/opcodes
          * microblaze-opc.h (op_code_struct): Add swapb, swaph Increase MAX_OPCODES.
          * microblaze-opcm.h (microblaze_instr): Likewise
binutils/gas/testsuite
          * gas/microblaze/allinsn.s: Add swapb, swaph
          * gas/microblaze/allinsn.d: Likewise
 2012-11-21 17:54:11 +00:00
Michael Eager
0db4b3260c Add stack high register and stack low register for MicroBlaze 
hardware assisted stack protection, stores stack low / stack high limits
for detecting stack overflow / underflow

binutils/opcodes
          * microblaze-opcm.h: Add REG_SLR_MASK, REG_SHR_MASK, REG_SHR and REG_SLR
          * microblaze-dis.c (get_field_special): Handle REG_SLR_MASK and REG_SHR_MASK
binutils/gas
          * config/tc-microblaze.c (parse_reg): Parse REG_SLR, REG_SHR
binutils/gas
          * gas/microblaze/allinsn.s: Test use of SHR, SLR
          * gas/microblaze/allinsn.d: Likewise
 2012-11-21 17:34:14 +00:00
H.J. Lu
9b30cccca9 Fix opcode for 64-bit jecxz 
gas/testsuite/

	PR gas/14859
	* gas/i386/x86-64-opcode.s: Add jecxz.
	* gas/i386/x86-64-opcode.d: Updated.

opcodes/

	PR gas/14859
	* i386-opc.tbl: Fix opcode for 64-bit jecxz.
	* i386-tbl.h: Regenerated.
 2012-11-20 14:21:33 +00:00
Andreas Krebbel
0b7fe784ac 2012-11-20 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> 
* s390-opc.txt: Fix srstu and strag opcodes.

2012-11-20  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* gas/s390/zarch-z9-109.d: Fix srstu opcode.
	* gas/s390/zarch-z900.d: Replace lasp with strag.
 2012-11-20 11:58:30 +00:00
Michael Eager
d3da77419a opcodes/ 
* microblaze-opc.h: Define new instruction type INST_TYPE_IMM5,
	update OPCODE_MASK_H13S, add OPCODE_MASK_HN, define MIN_IMM5 / MAX_IMM5,
	and increase MAX_OPCODES.
	(op_code_struct):  add mbar and sleep
	* microblaze-opcm.h (microblaze_instr): add mbar
	Define IMM_MBAR and IMM5_MBAR_MASK
	* microblaze-dis.c: Add get_field_imm5_mbar
	(print_insn_microblaze): Add support for INST_TYPE_IMM5 and INST_TYPE_NONE

gas/
	* config/tc-microblaze.c (md_assemble): Add support for INST_TYPE_IMM5

gas/testsuite/
	* gas/microblaze/allinsn.s: Add mbar and sleep
	* gas/microblaze/allinsn.d: Likewise
 2012-11-14 17:05:24 +00:00
Michael Eager
ed8ec0ec78 Add clz opcode. 
opcodes/
	* microblaze-opc.h: Increase MAX_OPCODES (op_code_struct):  add clz insn
	* microblaze-opcm.h (microblaze_instr): add clz

gas/testsuite/
	* gas/microblaze/allinsn.s: Add clz insn
	* gas/microblaze/allinsn.d: Likewise
 2012-11-14 16:45:01 +00:00
Michael Eager
e692c2171e Add the endian reversing versions of load/store instructions; 
2012-11-14  Edgar E. Iglesias <edgar.iglesias@gmail.com>

	* microblaze-opc.h: Increase MAX_OPCODES (op_code_struct):  add lbur,
	lhur, lwr, sbr, shr, swr
	* microblaze-opcm.h (microblaze_instr): add lbur, lhur, lwr, sbr, shr,
	swr

2012-11-14  David Holsgrove  <david.holsgrove@xilinx.com>

	* gas/microblaze/allinsn.exp: New file - test newly added opcodes
	* gas/microblaze/allinsn.s: Likewise
	* gas/microblaze/allinsn.d: Likewise
 2012-11-14 16:19:30 +00:00
Nick Clifton
de863c7475 2012-11-09 Nick Clifton <nickc@redhat.com> 
* Makefile.am (ALL_MACHINES): Add cpu-v850-rh850.lo.
	(ALL_MACHINES_CFILES): Add cpu-v850-rh850.c.
	* archures.c (bfd_arch_info): Add bfd_v850_rh850_arch.
	* config.bfd: Likewise.
	* configure.in: Add bfd_elf32_v850_rh850_vec.
	* cpu-v850.c: Update printed description.
	* cpu-v850_rh850.c: New file.
	* elf32-v850.c (v850_elf_check_relocs): Add support for RH850 ABI
	relocs.
	(v850_elf_perform_relocation): Likewise.
	(v850_elf_final_link_relocate): Likewise.
	(v850_elf_relocate_section): Likewise.
	(v850_elf_relax_section): Likewise.
	(v800_elf_howto_table): New.
	(v850_elf_object_p): Add support for RH850 ABI values.
	(v850_elf_final_write_processing): Likewise.
	(v850_elf_merge_private_bfd_data): Likewise.
	(v850_elf_print_private_bfd_data): Likewise.
	(v800_elf_reloc_map): New.
	(v800_elf_reloc_type_lookup): New.
	(v800_elf_reloc_name_lookup): New.
	(v800_elf_info_to_howto): New.
	(bfd_elf32_v850_rh850_vec): New.
	(bfd_arch_v850_rh850): New.
	* targets.c (_bfd_targets): Add bfd_elf32_v850_rh850_vec.
	* Makefile.in: Regenerate.
	* bfd-in2.h: Regenerate.
	* configure: Regenerate.

	* readelf.c (get_machine_flags): Add support for E_FLAG_RX_ABI.
	(guess_is_rela): Add EM_V800.
	(dump_relocations): Likewise.
	(get_machine_name): Update EM_V800.
	(get_machine_flags): Add support for RH850 ABI flags.
	(is_32bit_abs_reloc): Add support for RH850 ABI reloc.

	* config/tc-v850.c (v850_target_arch): New.
	(v850_target_format): New.
	(set_machine): Use v850_target_arch.
	(md_begin): Likewise.
	(md_show_usage): Document new switches.
	(md_parse_option): Add -mgcc-abi, -mrh850-abi, -m8byte-align and
	-m4byte-align.
	* config/tc-v850.c (TARGET_ARCH) Use v850_target_arch.
	(TARGET_FORMAT): Use v850_target_format.
	* doc/c-v850.texi: Document new options.

	* v850.h: Add RH850 ABI values.

	* Makefile.am: (ALL_EMULATION_SOURCES): Add ev850_rh850.c.
	* Makefile.in: Regenerate.
	* configure.tgt (v850*-*-*): Make v850_rh850 the default
	emulation. Add vanilla v850 as an extra emulation.
	* emulparams/v850_rh850.sh: New file.
	* scripttempl/v850_rh850.sc: New file.

	* configure.in: Add bfd_v850_rh850_arch.
	* configure: Regenerate.
	* disassemble.c (disassembler): Likewise.
 2012-11-09 17:36:19 +00:00
H.J. Lu
5bb3703f01 Remove trailing redundant `;' 
bfd/

	* aout-tic30.c (MY_final_link_callback): Remove trailing
	redundant `;'.
	* coff-h8500.c (extra_case): Likewise.
	(bfd_coff_reloc16_get_value): Likewise.
	* dwarf2.c (_bfd_dwarf2_cleanup_debug_info): Likewise.
	* elf.c (_bfd_elf_slurp_version_tables): Likewise.
	* elf32-frv.c (elf32_frv_relocate_section): Likewise.
	* elf32-v850.c (v850_elf_perform_relocation): Likewise.
	* opncls.c (bfd_calc_gnu_debuglink_crc32): Likewise.
	* plugin.c (add_symbols): Likewise.
	* reloc.c (bfd_check_overflow): Likewise.
	* vms-lib.c (_bfd_vms_lib_archive_p): Likewise.

binutils/

	* coffgrok.c (coff_grok): Remove trailing redundant `;'.
	* resrc.c (open_input_stream): Likewise.

gas/

	* config/atof-ieee.c (gen_to_words): Remove trailing redundant
	`;'.
	* config/atof-vax.c (flonum_gen2vax): Likewise.
	* config/tc-d10v.c (write_2_short): Likewise.
	* config/tc-i386-intel.c (i386_intel_simplify): Likewise.
	* config/tc-s390.c (tc_s390_force_relocation): Likewise.
	* config/tc-v850.c (md_parse_option): Likewise.
	* config/tc-xtensa.c (find_address_of_next_align_frag): Likewise.
	* dwarf2dbg.c (out_header): Likewise.
	* symbols.c (dollar_label_name): Likewise.
	(fb_label_name): Likewise.

ld/

	* testplug.c (record_add_file): Remove trailing redundant `;'.

opcodes/

	* aarch64-opc.h (gen_mask): Remove trailing redundant `;'.
	* ia64-gen.c (fetch_insn_class): Likewise.
 2012-11-09 08:29:34 +00:00
Alan Modra
6febeb7413 Regenerate. 2012-11-08 03:03:26 +00:00
Alan Modra
d17dce5567 * configure.in: Apply 2012-09-10 change to config.in here. 2012-11-05 10:45:32 +00:00
Andreas Krebbel
aac129d776 2012-10-26 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> 
* s390-mkopc.c: Accept empty lines in s390-opc.txt.
	* s390-opc.c: Add M_20OPT field. New instruction formats RRF_RURR2 and RRF_RMRR.
	* s390-opc.txt: Add new instructions.  New instruction type for lptea.

2012-10-26  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* gas/testsuite/gas/s390/zarch-z10.d: Refreshed.
	* gas/testsuite/gas/s390/zarch-z10.s: Refreshed.
	* gas/testsuite/gas/s390/zarch-z196.d: Refreshed.
	* gas/testsuite/gas/s390/zarch-z196.s: Refreshed.
	* gas/testsuite/gas/s390/zarch-z9-109.d: Refreshed.
	* gas/testsuite/gas/s390/zarch-z990.d: Refreshed.
	* gas/testsuite/gas/s390/zarch-z990.s: Refreshed.
	* gas/testsuite/gas/s390/zarch-zEC12.d: Refreshed.
	* gas/testsuite/gas/s390/zarch-zEC12.s: Refreshed.
 2012-10-26 09:41:55 +00:00
Christian Groessler
747a4ac1f4 gas/testsuite: 
* gas/z8k/z8k.exp: Run translate-ops test.
        * gas/z8k/translate-ops.s: New file.
        * gas/z8k/translate-ops.d: New file.

opcodes:

        * z8kgen.c (struct op): Fix encoding for translate opcodes (trdb,
        trdrb, trib, trirb, trtdb, trtdrb, trtib, trtirb).  Remove
        non-existing opcode trtrb.
        * z8k-opc.h: Regenerate.
 2012-10-26 08:14:07 +00:00
Alan Modra
62082a42b9 * ppc-opc (powerpc_opcodes): "lfdp" and "stfdp" use DS offset. 2012-10-26 03:38:20 +00:00
Roland McGrath
6c067bbb1a gas/testsuite/ 
* gas/i386/rex.s: Add test of REX prefix before fsave (i.e. fwait).
	* gas/i386/rex.d: Update.

opcodes/
	* i386-dis.c (ckprefix): When bailing out for fwait with prefixes,
	set rex_used to rex.
 2012-10-24 21:41:33 +00:00
Peter Bergner
ab4437c322 opcodes/ 
* ppc-opc.c (powerpc_opcodes) <vcfpsxws>: Fix opcode spelling.

gas/testsuite/
	* gas/ppc/altivec.s <vcfpsxws>: Fix opcode spelling.
 2012-10-22 16:04:28 +00:00
Tom Tromey
9a176a4afc * tic54x-dis.c (print_instruction): Don't use K&R style. 
(print_parallel_instruction, sprint_dual_address)
	(sprint_indirect_address, sprint_direct_address, sprint_mmr)
	(sprint_cc2, sprint_condition): Likewise.
 2012-10-18 15:28:06 +00:00
Kai Tietz
4ad3b7ef02 * aarch64-asm.c (aarch64_ins_ldst_reglist): Initialize 
value with a default.
        (do_special_encoding): Likewise.
        (aarch64_ins_ldst_elemlist): Pre-initialize QSsize, and opcodeh2
        variables with default.
        * arc-dis.c (write_comments_): Don't use strncat due
        size of state->commentBuffer pointer isn't predictable.
 2012-10-18 06:53:16 +00:00
Yufeng Zhang
b7a54b5525 Updated the system register table. 
opcodes/

* aarch64-opc.c (aarch64_sys_regs): Add rmr_el1, rmr_el2 and
rmr_el3; remove daifset and daifclr.

gas/testsuite/

* gas/aarch64/sysreg-1.s: Add tests of rmr_el1, rmr_el2 and rmr_el3.
* gas/aarch64/sysreg-1.d: Update.
* gas/aarch64/illegal.s: Add tests of daifset and daifclr.
* gas/aarch64/illegal.d: Update.
 2012-10-15 15:07:49 +00:00
Yufeng Zhang
9b61754a3f Added the changelog for the previous commit. 2012-10-15 14:57:31 +00:00
Yufeng Zhang
9de794e148 Added missing alignment check to load/store uimm12 immediate offset. 
opcodes/

* aarch64-opc.c (operand_general_constraint_met_p): Change to check
the alignment of addr.offset.imm instead of that of shifter.amount for
operand type AARCH64_OPND_ADDR_UIMM12.

gas/testsuite/

* gas/aarch64/illegal-2.s: Add test case.
* gas/aarch64/illegal-2.l: Likewise.
 2012-10-15 14:52:06 +00:00
Richard Earnshaw
f8ece37fb1 2012-10-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 
* arm-dis.c: Use preferred form of vrint instruction variants
	for disassembly.

2012-10-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* gas/arm/armv8-a+fp.d: Use preferred form of vrint instruction
	variants for disassembly.
	* gas/arm/armv8-a+fp.s: Likewise.
	* gas/arm/armv8-a+simd.d: Likewise.
	* gas/arm/armv8-a+simd.s: Likewise.
 2012-10-11 15:33:08 +00:00
Nagajyothi Eggone
5e5c50d37b Add AMD bdver3 support. 
gas/

	* config/tc-i386.c (cpu_arch): Add CPU_BDVER3_FLAGS.
	* doc/c-i386.texi: Add -march=bdver3 option.

gas/testsuite/

	* gas/i386/i386.exp: Run bdver3 test cases.
	* gas/i386/nops-1-bdver3.d: New.
	* gas/i386/arch-10-bdver3.d: New.
	* gas/i386/x86-64-nops-1-bdver3.d: New.
	* gas/i386/x86-64-arch-2-bdver3.d: New.

opcodes/

	* i386-gen.c (cpu_flag_init): Add CPU_BDVER3_FLAGS.
	* i386-init.h: Regenerated.
 2012-10-09 08:43:06 +00:00
Peter Bergner
c7a5aa9c64 opcodes/ 
* ppc-dis.c (ppc_opts) <altivec>: Use PPC_OPCODE_ALTIVEC2;
	* ppc-opc.c (VBA): New define.
	(powerpc_opcodes) <vcuxwfp, vcsxwfp, vcfpuxws, vcfpsxsw, vmr, vnot,
	mfppr, mfppr32, mtppr, mtppr32>: New extended mnemonics.

gas/testsuite/
	* gas/ppc/power7.d: Add tests for mfppr, mfppr32, mtppr and mtppr32.
	* gas/ppc/power7.s: Likewise.
	* gas/ppc/altivec.d: Add tests for all legacy Altivec instructions.
	* gas/ppc/altivec.s: Likewise.
	* gas/ppc/altivec2.d: New test file.
	* gas/ppc/altivec2.s: Likewise.
	* gas/ppc/ppc.exp: Run it.
 2012-10-05 14:06:20 +00:00
Nick Clifton
04ee5257d6 * v850-dis.c (disassemble): Place square parentheses around second 
register operand of clr1, not1, set1 and tst1 instructions.

	* config/tc-v850.c (v850_insert_operand): Use a static buffer for
	the error message.

	* gas/v850/v850e1.d: Fix expected disassembly of clr1, not1, set1
	and tst1 insns.
 2012-10-04 10:30:06 +00:00
Andreas Krebbel
cfc7277920 2012-10-04 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> 
* config/tc-s390.c (s390_parse_cpu): Add new option zEC12.
	* doc/as.texinfo: Document new option zEC12.
	* doc/c-s390.texi: Likewise.

2012-10-04  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* gas/s390/s390.exp: Run zEC12 tests.
	* gas/s390/zarch-zEC12.d: New file.
	* gas/s390/zarch-zEC12.s: New file.

2012-10-04  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* s390-mkopc.c: Support new option zEC12.
	* s390-opc.c: Add new instruction formats.
	* s390-opc.txt: Add new instructions for zEC12.

2012-10-04  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* s390.h (s390_opcode_cpu_val): Add S390_OPCODE_ZEC12.
 2012-10-04 08:47:36 +00:00
Anthony Green
1415a2a767 Don't abort() when disassembling bad moxie instructions. 2012-09-28 03:53:39 +00:00
H.J. Lu
160a30bb92 Add missing Cpu flags in bd and bt cores 
gas/testsuite/

2012-09-25  Saravanan Ekanathan <saravanan.ekanathan@amd.com>

	* gas/i386/arch-10-bdver1.d: New file to test bdver1 core.
	* gas/i386/x86-64-arch-2-bdver1.d: Likewise.
	* gas/i386/i386.exp: Run bdver1 testcases.
	* gas/i386/arch-10-bdver2.d: Updated -march flags.
	* gas/i386/arch-10-btver1.d: Likewise.
	* gas/i386/arch-10-btver2.d: Likewise.
	* gas/i386/x86-64-arch-2-bdver2.d: Likewise.
	* gas/i386/x86-64-arch-2-btver1.d: Likewise.
	* gas/i386/x86-64-arch-2-btver2.d: Likewise.

opcodes/

2012-09-25  Saravanan Ekanathan <saravanan.ekanathan@amd.com>

	* gas/i386/arch-10-bdver1.d: New file to test bdver1 core.
	* gas/i386/x86-64-arch-2-bdver1.d: Likewise.
	* gas/i386/i386.exp: Run bdver1 testcases.
	* gas/i386/arch-10-bdver2.d: Updated -march flags.
	* gas/i386/arch-10-btver1.d: Likewise.
	* gas/i386/arch-10-btver2.d: Likewise.
	* gas/i386/x86-64-arch-2-bdver2.d: Likewise.
	* gas/i386/x86-64-arch-2-btver1.d: Likewise.
	* gas/i386/x86-64-arch-2-btver2.d: Likewise.
 2012-09-25 13:12:34 +00:00
H.J. Lu
60aa667ec4 Replace CpuSSE3 with CpuCX16 for cmpxchg16b 
gas/

	* config/tc-i386.c (cpu_arch): Add .cx16.
	* doc/c-i386.texi: Document .cx16.

gas/testsuite/

	* gas/i386/x86-64-arch-2.s: Add test for cmpxchg16b.
	* gas/i386/x86-64-arch-2.d: Update correspondingly.
	* gas/i386/x86-64-arch-2-bdver2.d: Likewise.
	* gas/i386/x86-64-arch-2-btver1.d: Likewise.
	* gas/i386/x86-64-arch-2-btver2.d: Likewise.
	* gas/i386/x86-64-arch-2-lzcnt.d: Likewise.
	* gas/i386/x86-64-arch-2-prefetchw.d: Likewise.
	* gas/i386/ilp32/x86-64-arch-2.d: Likewise.

opcodes/

	* i386-gen.c (cpu_flag_init): Add CpuCX16 to CPU_NOCONA_FLAGS,
	CPU_CORE_FLAGS, CPU_CORE2_FLAGS, CPU_COREI7_FLAGS,
	CPU_BDVER1_FLAGS, CPU_BDVER2_FLAGS, CPU_BTVER1_FLAGS,
	CPU_BTVER2_FLAGS.  Add CPU_CX16_FLAGS.
	(cpu_flags): Add CpuCX16.
	* i386-opc.h (CpuCX16): New.
	(i386_cpu_flags): Add cpucx16.
	* i386-opc.tbl: Replace CpuSSE3 with CpuCX16 for cmpxchg16b.
	* i386-tbl.h: Regenerate.
	* i386-init.h: Likewise.
 2012-09-20 11:53:33 +00:00
Richard Earnshaw
4b8c8c02e9 2012-09-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 
opcodes:
	* arm-dis.c: Changed ldra and strl-form mnemonics
	to lda and stl-form.
gas:
	* config/tc-arm.c: Changed ldra and strl-form mnemonics
	to lda and stl-form for armv8.
gas/testsuite:
	* gas/arm/armv8-a-bad.l: Updated for changed mnemonics.
	* gas/arm/armv8-a-bad.s: Likewise.
	* gas/arm/armv8-a.d: Likewise.
	* gas/arm/armv8-a.s: Likewise.
	* gas/arm/inst.s: Added test for ldrt encoding compatibly with ldralt.
	* gas/arm/inst.d: Updated.
 2012-09-18 14:52:43 +00:00
Maciej W. Rozycki
83ea18d0a3 opcodes/ 
* micromips-opc.c (micromips_opcodes): Correct the encoding of
	the "swxc1" instruction.

	gas/testsuite/
	* gas/mips/micromips.d: Correct the disassembly of SWXC1.
	* gas/mips/micromips-trap.d: Likewise.
	* gas/mips/micromips@24k-triple-stores-1.d: Likewise.
	* gas/mips/micromips@mips4-fp.d: Likewise.
 2012-09-18 14:19:04 +00:00
Richard Earnshaw
062f38fa2f 2012-09-17 Yufeng Zhang <yufeng.zhang@arm.com> 
* aarch64-asm.c (aarch64_ins_imm_half): Remove ATTRIBUTE_UNUSED from
	the parameter 'inst'.
	(aarch64_ins_addr_simm): Add ATTRIBUTE_UNUSED to the parameter 'inst'.
	(convert_mov_to_movewide): Change to assert (0) when
	aarch64_wide_constant_p returns FALSE.
 2012-09-17 17:43:42 +00:00
David Edelsohn
b132a67daa * configure: Regenerate. 2012-09-15 00:07:05 +00:00
Anthony Green
1f9b75dde1 Fix moxie disassembly for new branch semantics 2012-09-14 10:49:03 +00:00
Anthony Green
e202fa84e7 Bi-endian patches for moxie 2012-09-13 22:24:51 +00:00
Alan Modra
1d43092daf missed from 2012-08-15 change 2012-09-10 23:57:09 +00:00
Alan Modra
00716ab174 * config.in: Disable sanity check for kfreebsd. 2012-09-10 22:30:57 +00:00
H.J. Lu
6d2920c847 Regenerate binutils configure 
bfd/

2012-09-10  H.J. Lu  <hongjiu.lu@intel.com>

	* configure: Regenerated.

binutils/

2012-09-10  H.J. Lu  <hongjiu.lu@intel.com>

	* configure: Regenerated.

etc/

2010-11-20  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>

	* Makefile.in (install-strip): New target.

gas/

2012-09-10  H.J. Lu  <hongjiu.lu@intel.com>

	* configure: Regenerated.

gold/

2012-09-09  Alan Modra  <amodra@gmail.com>

	* target.h (Target::gc_mark_symbol, do_gc_mark_symbol): New functions.

gprof/

2012-09-10  H.J. Lu  <hongjiu.lu@intel.com>

	* configure: Regenerated.

intl/

2010-06-27  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>

	PR bootstrap/44621

ld/

2012-09-10  H.J. Lu  <hongjiu.lu@intel.com>

	* configure: Regenerated.

libiberty/

2011-08-28  H.J. Lu  <hongjiu.lu@intel.com>

	* argv.c (dupargv): Replace malloc with xmalloc.  Don't check

opcodes/

2012-09-10  H.J. Lu  <hongjiu.lu@intel.com>

	* configure: Regenerated.
 2012-09-10 17:00:44 +00:00
H.J. Lu
b3e14edafc Add Intel Itanium Series 9500 support 
bfd/

2012-09-04  Sergey A. Guriev <sergey.a.guriev@intel.com>

	* cpu-ia64-opc.c (ins_cnt6a): New function.
	(ext_cnt6a): Ditto.
	(ins_strd5b): Ditto.
	(ext_strd5b): Ditto.
	(elf64_ia64_operands): Add new operand types.

gas/

2012-09-04  Sergey A. Guriev  <sergey.a.guriev@intel.com>

	* config/tc-ia64.c (reg_symbol): Add a new register.
	(indirect_reg): Ditto.
	(pseudo_func): Add new symbolic constants.
	(operand_match): Add new operand types recognition.
	(operand_insn): Add new register recognition.
	(md_begin): Add new register definition.
	(specify_resource): Add new register recognition.

gas/testsuite/

2012-09-04  Sergey A. Guriev  <sergey.a.guriev@intel.com>

	* gas/testsuite/gas/ia64/psn.d: New file.
	* gas/testsuite/gas/ia64/psn.s: New file.
	* gas/testsuite/gas/ia64/ia64.exp: Add new testcase.
	* gas/testsuite/gas/ia64/opc-i.d: Fixed failing tests.
	* gas/testsuite/gas/ia64/opc-m.d: Ditto.

include/opcode/

2012-09-04  Sergey A. Guriev <sergey.a.guriev@intel.com>

	* ia64.h (ia64_opnd): Add new operand types.

opcodes/

2012-09-04  Sergey A. Guriev <sergey.a.guriev@intel.com>

	* ia64-asmtab.h (completer_index): Extend bitfield to full uint.
	* ia64-gen.c: Promote completer index type to longlong.
	(irf_operand): Add new register recognition.
	(in_iclass_mov_x): Add an entry for the new mov_* instruction type.
	(lookup_specifier): Add new resource recognition.
	(insert_bit_table_ent): Relax abort condition according to the
	changed completer index type.
	(print_dis_table): Fix printf format for completer index.
	* ia64-ic.tbl: Add a new instruction class.
	* ia64-opc-i.c (ia64_opcodes_i): Define new I-instructions.
	* ia64-opc-m.c (ia64_opcodes_m): Define new M-instructions.
	* ia64-opc.h: Define short names for new operand types.
	* ia64-raw.tbl: Add new RAW resource for DAHR register.
	* ia64-waw.tbl: Add new WAW resource for DAHR register.
	* ia64-asmtab.c: Regenerate.
 2012-09-04 13:52:06 +00:00
Peter Bergner
382c72e904 * ppc-opc.c (VXASHB_MASK): New define. 
(powerpc_opcodes) <vsldoi>: Use VXASHB_MASK.
 2012-08-29 22:34:04 +00:00
Peter Bergner
fb048c26f1 * ppc-opc.c (UIMM4, UIMM3, UIMM2, VXVA_MASK, VXVB_MASK, VXVAVB_MASK, 
VXVDVA_MASK, VXUIMM4_MASK, VXUIMM3_MASK, VXUIMM2_MASK): New defines.
	(powerpc_opcodes) <vexptefp, vlogefp, vrefp, vrfim, vrfin, vrfip,
	vrfiz, vrsqrtefp, vupkhpx, vupkhsb, vupkhsh, vupklpx, vupklsb,
	vupklsh>: Use VXVA_MASK.
	<vspltisb, vspltish, vspltisw>: Use VXVB_MASK.
	<mfvscr>: Use VXVAVB_MASK.
	<mtvscr>: Use VXVDVA_MASK.
	<vspltb>: Use VXUIMM4_MASK.
	<vsplth>: Use VXUIMM3_MASK.
	<vspltw>: Use VXUIMM2_MASK.
 2012-08-28 16:41:07 +00:00
Matthew Gretton-Dann
3c9017d250 * gas/config/tc-arm.c (ARM_ENC_TAB): Add sha1h and sha2op entries. 
(do_sha1h): New function.
	(do_sha1su1): Likewise.
	(do_sha256su0): Likewise.
	(insns): Add 2 operand SHA instructions.
	* gas/testsuite/gas/arm/armv8-a+crypto.s: Update testcase.
	* gas/testsuite/gas/arm/armv8-a+crypto.d: Likewise.
	* opcodes/arm-dis.c (neon_opcodes): Add 2 operand sha instructions.
 2012-08-24 08:14:40 +00:00
Matthew Gretton-Dann
48adcd8ed5 * gas/config/tc-arm.c (NEON_ENC_TAB): Add sha3op entry. 
(do_crypto_3op_1): New function.
	(do_sha1c): Likewise.
	(do_sha1p): Likewise.
	(do_sha1m): Likewise.
	(do_sha1su0): Likewise.
	(do_sha256h): Likewise.
	(do_sha256h2): Likewise.
	(do_sha256su1): Likewise.
	(insns): Add SHA 3 operand instructions.
	* gas/testsuite/gas/arm/armv8-a+crypto.d: Update testcase.
	* gas/testsuite/gas/arm/armv8-a+crypto.s: Likewise.
	* opcodes/arm-dis.c (neon_opcodes): Add SHA 3-operand instructions.
 2012-08-24 08:14:04 +00:00
Matthew Gretton-Dann
4f51b4bdbb * gas/config/tc-arm.c (neon_type_mask): Add P64 type. 
(type_chk_of_el_type): Handle P64 type.
	(el_type_of_type_chk): Likewise.
	(do_neon_vmull): Handle VMULL.P64.
	* gas/testsuite/gas/arm/armv8-a+crypto.d: Update testcase.
	* gas/testsuite/gas/arm/armv8-a+crypto.s: Likewise.
	* opcodes/arm-dis.c (neon_opcodes): Handle VMULL.P64.
 2012-08-24 08:13:24 +00:00
Matthew Gretton-Dann
91ff78946d * gas/config/tc-arm.c (NEON_ENC_TAB): Add aes entry. 
(neon_type_mask): Add N_UNT.
	(neon_check_type): Don't always decay typed to untyped sizes.
	(do_crypto_2op_1): New function.
	(do_aese): Likewise.
	(do_aesd): Likewise.
	(do_aesmc.8): Likewise.
	(do_aesimc.8): Likewise.
	(insns): Add AES instructions.
	* gas/testsuite/gas/arm/armv8-a+crypto.d: New testcase.
	* gas/testsuite/gas/arm/armv8-a+crypto.s: Likewise.
	* opcodes/arm-dis.c (neon_opcodes): Add support for AES instructions.
 2012-08-24 08:12:45 +00:00
Matthew Gretton-Dann
c70a898785 * gas/config/tc-arm.c (el_type_type_check): Add handling for 16-bit 
floating point types.
	(do_neon_cvttb_2): New function.
	(do_neon_cvttb_1): Likewise.
	(do_neon_cvtb): Refactor to use do_neon_cvttb_1.
	(do_neon_cvtt): Likewise.
	* gas/testsuite/gas/arm/armv8-a+fp.d: Update testcase.
	* gas/testsuite/gas/arm/armv8-a+fp.s: Likewise.
	* gas/testsuite/gas/arm/half-prec-vfpv3.s: Likewise.
	* opcodes/arm-dis.c (coprocessor_opcodes): Add support for HP/DP
	conversions.
 2012-08-24 08:11:44 +00:00
Matthew Gretton-Dann
30bdf75259 * gas/config/tc-arm.c (NEON_ENC_TAB): Add vrint entries. 
(neon_cvt_mode): Add neon_cvt_mode_r.
	(do_vrint_1): New function.
	(do_vrint_x): Likewise.
	(do_vrint_z): Likewise.
	(do_vrint_r): Likewise.
	(do_vrint_a): Likewise.
	(do_vrint_n): Likewise.
	(do_vrint_p): Likewise.
	(do_vrint_m): Likewise.
	(insns): Add VRINT instructions.
	* gas/testsuite/gas/arm/armv8-a+fpv5.d: Update testcase.
	* gas/testsuite/gas/arm/armv8-a+fpv5.s: Likewise.
	* gas/testsuite/gas/arm/armv8-a+simdv3.d: Likewise.
	* gas/testsuite/gas/arm/armv8-a+simdv3.s: Likewise.
	* opcodes/arm-dis.c (coprocessor_opcodes): Add VRINT.
	(neon_opcodes): Likewise.
 2012-08-24 08:11:13 +00:00
Matthew Gretton-Dann
7e8e678496 * gas/config/tc-arm.c (NEON_ENC_TAB): Add vcvta entry. 
(neon_cvt_mode): New enumeration.
	(do_vfp_nsyn_cvt_fpv8): New function.
	(do_neon_cvt_1): Add support for new conversions.
	(do_neon_cvtr): Use neon_cvt_mode enumerator.
	(do_neon_cvt): Likewise.
	(do_neon_cvta): New function.
	(do_neon_cvtn): Likewise.
	(do_neon_cvtp): Likewise.
	(do_neon_cvtm): Likewise.
	(insns): Add new VCVT instructions.
	* gas/testsuite/gas/arm/armv8-a+fp.d: Update testcase.
	* gas/testsuite/gas/arm/armv8-a+fp.s: Likewise.
	* gas/testsuite/gas/arm/armv8-a+simd.d: Likewise.
	* gas/testsuite/gas/arm/armv8-a+simd.s: Likewise.
	* opcodes/arm-dis.c (coprocessor_opcodes): Add support for new VCVT
	variants.
	(neon_opcodes): Likewise.
 2012-08-24 08:09:50 +00:00
Matthew Gretton-Dann
73924fbcf8 * gas/config/tc-arm.c (NEON_ENC_TAB): Add vmaxnm, vminnm entries. 
(vfp_or_neon_is_neon_bits): Add NEON_CHECK_ARCH8 enumerator.
	(vfp_or_neon_is_neon): Add check for SIMD for ARMv8.
	(do_maxnm): New function.
	(insns): Add vmaxnm, vminnm entries.
	* gas/testsuite/gas/testsuite/gas/armv8-a+fp.d: Update testcase.
	* gas/testsuite/gas/testsuite/gas/armv8-a+fp.s: Likewise.
	* gas/testsuite/gas/testsuite/gas/armv8-a+simd.d: New testcase.
	* gas/testsuite/gas/testsuite/gas/armv8-a+simd.s: Likewise.
	* opcodes/arm-dis.c (coprocessor_opcodes): Add VMAXNM/VMINNM.
	(neon_opcodes): Likewise.
 2012-08-24 08:07:36 +00:00
Matthew Gretton-Dann
33399f071c * gas/config/tc-arm.c (NEON_ENC_TAB): Add entries for VSEL. 
(NEON_ENC_FPV8_): New define.
	(do_vfp_nsyn_fpv8): New function.
	(do_vsel): Likewise.
	(insns): Add VSEL instructions.
	* gas/testsuite/gas/arm/armv8-a+fp.d: New testcase.
	* gas/testsuite/gas/arm/armv8-a+fp.s: Likewise.
	* opcodes/arm-dis.c (coprocessor_opcodes): Add VSEL.
	(print_insn_coprocessor): Add new %<>c bitfield format
	specifier.
 2012-08-24 08:06:36 +00:00
Matthew Gretton-Dann
9eb6c0f132 * gas/config/tc-arm.c (do_rm_rn): New function. 
(do_strlex): Likewise.
	(do_t_strlex): Likewise.
	(insns): Add support for LDRA/STRL instructions.
	* gas/testsuite/gas/arm/armv8-a-bad.l: Update testcase.
	* gas/testsuite/gas/arm/armv8-a-bad.s: Likewise.
	* gas/testsuite/gas/arm/armv8-a.d: Likewise.
	* gas/testsuite/gas/arm/armv8-a.s: Likewise.
	* opcodes/arm-dis.c (arm_opcodes): Add LDRA/STRL instructions.
	(thumb32_opcodes): Likewise.
	(print_arm_insn): Add support for %<>T formatter.
 2012-08-24 08:03:39 +00:00
Matthew Gretton-Dann
8884b7208b * gas/config/tc-arm.c (do_t_bkpt_hlt1): New function. 
(do_t_hlt): New function.
	(do_t_bkpt): Use do_t_bkpt_hlt1.
	(insns): Add HLT.
	* gas/testsuite/gas/arm/armv8-a-bad.l: Update for HLT.
	* gas/testsuite/gas/arm/armv8-a-bad.s: Likewise.
	* gas/testsuite/gas/arm/armv8-a.d: Likewise.
	* gas/testsuite/gas/arm/armv8-a.s: Likewise.
	* opcodes/arm-dis.c (arm_opcodes): Add HLT.
	(thumb_opcodes): Likewise.
 2012-08-24 08:02:51 +00:00
Matthew Gretton-Dann
b79f7053dd * gas/config/tc-arm.c (insns): Add DCPS instruction. 
* gas/testsuite/gas/arm/armv8-a.d: Update.
	* gas/testsuite/gas/arm/armv8-a.s: Likewise.
	* opcodes/arm-dis.c (thumb32_opcodes): Add DCPS instruction.
 2012-08-24 08:02:09 +00:00
Matthew Gretton-Dann
53c4b28b4f * gas/config/tc-arm.c (T16_32_TAB): Add _sevl. 
(insns): Add SEVL.
	* gas/testsuite/gas/arm/armv8-a.s: New testcase.
	* gas/testsuite/gas/arm/armv8-a.d: Likewise.
	* opcodes/arm-dis.c (arm_opcodes): Add SEVL.
	(thumb_opcodes): Likewise.
	(thumb32_opcodes): Likewise.
 2012-08-24 08:01:18 +00:00
Matthew Gretton-Dann
e797f7e0b2 * gas/config/tc-arm.c (asm_barrier_opt): Add arch field. 
(mark_feature_used): New function.
	(parse_barrier): Check specified option is valid for the
	specified architecture.
	(UL_BARRIER): New macro.
	(barrier_opt_names): Update for new barrier options.
	* gas/testsuite/gas/arm/armv8-a-barrier.s: New testcase.
	* gas/testsuite/gas/arm/armv8-a-barrier-arm.d: Likewise.
	* gas/testsuite/gas/arm/armv8-a-barrier-thumb.d: Likewise.
	* opcodes/arm-dis.c (data_barrier_option): New function.
	(print_insn_arm): Use data_barrier_option.
	(print_insn_thumb32): Use data_barrier_option.
 2012-08-24 08:00:20 +00:00
Matthew Gretton-Dann
e2efe87d8a * opcodes/arm-dis.c (COND_UNCOND): New constant. 
(print_insn_coprocessor): Add support for %u format specifier.
	(print_insn_neon): Likewise.
 2012-08-24 07:59:05 +00:00
David S. Miller
2c63854f55 Fix sparc opcode encoding for 4-arg crypto instructions. 
include/opcode

	* sparc.h (F3F4): New macro.

opcodes

	* sparc-opc.c (4-argument crypto instructions): Fix encoding using
	F3F4 macro.

gas/testsuite

	* gas/sparc/crypto.d: Fix opcodes for 4-arg crypto instructions.
 2012-08-21 23:00:36 +00:00
Alan Modra
e67ed0e885 opcodes/ChangeLog 
* ppc-opc.c (powerpc_opcodes): Changed opcode for vabsdub,
	vabsduh, vabsduw, mviwsplt.
gas/testsuite/ChangeLog
	* gas/ppc/e6500.d: Changed opcode for vabsdub, vabsduh, vabsduw,
	mviwsplt.
 2012-08-20 03:20:24 +00:00
H.J. Lu
7b458c12dc Add AMD btver1 and btver2 support 
gas/

2012-08-17  Nagajyothi Eggone  <nagajyothi.eggone@amd.com>

	* config/tc-i386.c (cpu_arch): Add CPU_BTVER1_FLAGS and
	CPU_BTVER2_FLAGS.
	(i386_align_code): Add case for PROCESSOR_BT.

	* config/tc-i386.h (enum processor_type): Add PROCESSOR_BT.

	* doc/c-i386.texi: Add -march={btver1, btver2} options.

gas/testsuite/

2012-08-17  Nagajyothi Eggone  <nagajyothi.eggone@amd.com>

	* gas/i386/i386.exp: Run btver1 and btver2 test cases.

	* gas/i386/nops-1-btver1.d: New.
	* gas/i386/nops-1-btver2.d: New.
	* gas/i386/arch-10-btver1.d: New.
	* gas/i386/arch-10-btver2.d: New.
	* gas/i386/x86-64-nops-1-btver1.d: New.
	* gas/i386/x86-64-nops-1-btver2.d: New.
	* gas/i386/x86-64-arch-2-btver1.d: New.
	* gas/i386/x86-64-arch-2-btver2.d: New.

opcodes/

2012-08-17  Nagajyothi Eggone  <nagajyothi.eggone@amd.com>

	* i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and
	CPU_BTVER2_FLAGS.

	* i386-opc.h: Update CpuPRFCHW comment.

	* i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
 2012-08-17 17:12:36 +00:00
Nick Clifton
eb80cb8751 * po/vi.po: Updated Vietnamese translation. 
* po/uk.po: New Ukranian translation.
	* configure.in (ALL_LINGUAS): Add uk.
	* configure: Regenerate.
 2012-08-17 14:33:27 +00:00
Peter Bergner
8baf7b78b5 * ppc-opc.c (powerpc_opcodes) <"lswx">: Use RAX for the second and 
RBX for the third operand.
	<"lswi">: Use RAX for second and NBI for the third operand.
 2012-08-16 18:12:38 +00:00
DJ Delorie
3d557b4cce * rl78-decode.opc (rl78_decode_opcode): Merge %e and %[01] 
operands, so that data addresses can be corrected when not
ES-overridden.
* rl78-decode.c: Regenerate.
* rl78-dis.c (print_insn_rl78): Make order of modifiers
irrelevent.  When the 'e' specifier is used on an operand and no
ES prefix is provided, adjust address to make it absolute.
 2012-08-15 22:37:56 +00:00
Peter Bergner
588925d065 opcodes/ 
* ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR.

gas/testsuite/
	* gas/ppc/power4.s <lq, stq>: Add more tests.
	* gas/ppc/power4.d: Likewise.
 2012-08-15 21:25:21 +00:00
Peter Bergner
9f6a6cc022 opcodes/ 
* ppc-opc.c <xnop, yield, mdoio, mdoom>: New extended mnemonics.

gas/testsuite/
	* gas/ppc/common.d ("nop", "xnop"): Add tests.
	* gas/ppc/common.s: Likewise.
	* gas/ppc/power7.d ("yield", "mdoio", "mdoom"): Add tests.
	* gas/ppc/power7.s: Likewise.
 2012-08-15 15:33:25 +00:00
Maciej W. Rozycki
fc8c4fd1b2 * mips-dis.c (print_insn_args): Add GET_OP and GET_OP_S local 
macros, use local variables for info struct member accesses,
	update the type of the variable used to hold the instruction
	word.
	(print_insn_mips, print_mips16_insn_arg): Likewise.
	(print_insn_mips16): Add GET_OP and GET_OP_S local macros, use
	local variables for info struct member accesses.
	(print_insn_micromips): Add GET_OP_S local macro.
	(_print_insn_mips): Update the type of the variable used to hold
	the instruction word.
 2012-08-14 22:00:05 +00:00
Nick Clifton
a06ea96464 Add support for 64-bit ARM architecture: AArch64 2012-08-13 14:52:54 +00:00
Maciej W. Rozycki
35d0a16941 include/opcode/ 
* mips.h (mips_opcode): Add the exclusions field.
	(OPCODE_IS_MEMBER): Remove macro.
	(cpu_is_member): New inline function.
	(opcode_is_member): Likewise.

	opcodes/
	* micromips-opc.c (micromips_opcodes): Update comment.
	* mips-opc.c (mips_builtin_opcodes): Likewise.  Mark coprocessor
	instructions for IOCT as appropriate.
	* mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with
	opcode_is_member.
	* configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with
	the result of a check for the -Wno-missing-field-initializers
	GCC option.
	* Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable.
	(mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to
	compilation.
	(mips16-opc.lo): Likewise.
	(micromips-opc.lo): Likewise.
	* aclocal.m4: Regenerate.
	* configure: Regenerate.
	* Makefile.in: Regenerate.

	gas/
	* config/tc-mips.c (NO_ISA_COP, COP_INSN): Remove macros.
	(is_opcode_valid): Remove coprocessor instruction exclusions.
	Replace OPCODE_IS_MEMBER with opcode_is_member.
	(is_opcode_valid_16): Replace OPCODE_IS_MEMBER with
	opcode_is_member.
	(macro): Remove coprocessor instruction exclusions.
 2012-08-13 14:26:14 +00:00
H.J. Lu
5c5acbbddf Enable FMA instructions for bdver2 
gas/testsuite/

	PR gas/14423
	* gas/i386/arch-10-bdver2.d: New file.
	* gas/i386/x86-64-arch-2-bdver2.d: Likewise.
	* gas/i386/i386.exp: Run new test

opcodes/

2012-08-11  Saravanan Ekanathan <saravanan.ekanathan@amd.com>

	PR gas/14423
	* i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS.
	* i386-init.h: Regenerated.
 2012-08-10 21:19:40 +00:00
Nick Clifton
3c892704a9 Updated Vietnamese translation. 2012-08-09 14:46:44 +00:00
Roland McGrath
d7189fa58e gas/testsuite/ 
* gas/i386/prefetch.s: New file.
	* gas/i386/prefetch.d: New file.
	* gas/i386/prefetch-intel.d: New file.
	* gas/i386/x86-64-prefetch.d: New file.
	* gas/i386/x86-64-prefetch-intel.d: New file.
	* gas/i386/i386.exp: Run them.

opcodes/
	* i386-dis.c (reg_table): Fill out REG_0F0D table with
	AMD-reserved cases as "prefetch".
	(MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants.
	(MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise.
	(reg_table): Use those under REG_0F18.
	(mod_table): Add those cases as "nop/reserved".
 2012-08-07 18:22:04 +00:00
Jan Beulich
4c692bc7aa There were several cases where the registers in the REX encoded range 
got treated identically to the ones in the base range, due to not
paying attention to the fact that reg_entry's reg_num field doesn't
fully specify the register number (reg_flags also needs to be checked
for RegRex). This patch introduces and uses a new (inline) function to
obtain the full register number, and uses it to fix all those cases.

It additionally adds the missing operand checks for SVME instructions
(which match the monitor/mwait ones).

gas/
2012-08-07  Jan Beulich <jbeulich@suse.com>

	* config/tc-i386.c (register_number): New function.
	(build_vex_prefix, process_immext, process_operands,
	build_modrm_byte, i386_index_check): Use it.

gas/testsuite/
2012-08-07  Jan Beulich <jbeulich@suse.com>

	* gas/i386/x86-64-specific-reg.{s,l}: New.
	* gas/i386/i386.exp: Run new test.

opcodes/
2012-08-07  Jan Beulich <jbeulich@suse.com>

	* i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
 2012-08-07 16:51:34 +00:00
Roland McGrath
de88229846 gas/testsuite/ 
* gas/i386/x86-64-stack.s: Add cases for push segment register.
	* gas/i386/x86-64-stack.d: Updated.
	* gas/i386/x86-64-stack-suffix.d: Updated.
	* gas/i386/x86-64-stack-intel.d: Updated.
	* gas/i386/ilp32/x86-64-stack.d: Updated.
	* gas/i386/ilp32/x86-64-stack-suffix.d: Updated.
	* gas/i386/ilp32/x86-64-stack-intel.d: Updated.

opcodes/
	* i386-dis.c (print_insn): Print spaces between multiple excess
	prefixes.  Return actual number of excess prefixes consumed,
	not always one.

	* i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
 2012-08-06 22:08:25 +00:00
Roland McGrath
7bb15c6f21 gas/testsuite/ 
* gas/i386/x86-64-stack.s: Add cases for push immediate.
	* gas/testsuite/gas/i386/ilp32/x86-64-stack-intel.d: Updated.
	* gas/testsuite/gas/i386/ilp32/x86-64-stack-suffix.d: Updated.
	* gas/testsuite/gas/i386/ilp32/x86-64-stack.d: Updated.
	* gas/testsuite/gas/i386/x86-64-stack-intel.d: Updated.
	* gas/testsuite/gas/i386/x86-64-stack-suffix.d: Updated.
	* gas/testsuite/gas/i386/x86-64-stack.d: Updated.

opcodes/
	* i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG.
	(putop): For 'T', 'U', and 'V', treat REX_W like DFLAG.
	(intel_operand_size): For stack_v_mode, treat REX_W like DFLAG.
	(OP_E_register): Likewise.
	(OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
 2012-08-06 20:19:34 +00:00
Jan-Benedict Glaw
3843081d42 * configure.in: Formatting. 
* configure: Regenerate.
 2012-08-02 08:13:48 +00:00
Alan Modra
488916061e * h8300-dis.c: Fix printf arg warnings. 
* i960-dis.c: Likewise.
	* mips-dis.c: Likewise.
	* pdp11-dis.c: Likewise.
	* sh-dis.c: Likewise.
	* v850-dis.c: Likewise.
	* configure.in: Formatting.
	* configure: Regenerate.
	* rl78-decode.c: Regenerate.
	* po/POTFILES.in: Regenerate.
 2012-08-01 00:41:35 +00:00
Maciej W. Rozycki
03f66e8a8f include/opcode/ 
* mips.h: Document microMIPS DSP ASE usage.
	(MICROMIPSOP_MASK_DSPACC, MICROMIPSOP_SH_DSPACC): Update for
	microMIPS DSP ASE support.
	(MICROMIPSOP_MASK_DSPSFT, MICROMIPSOP_SH_DSPSFT): Likewise.
	(MICROMIPSOP_MASK_SA3, MICROMIPSOP_SH_SA3): Likewise.
	(MICROMIPSOP_MASK_SA4, MICROMIPSOP_SH_SA4): Likewise.
	(MICROMIPSOP_MASK_IMM8, MICROMIPSOP_SH_IMM8): Likewise.
	(MICROMIPSOP_MASK_IMM10, MICROMIPSOP_SH_IMM10): Likewise.
	(MICROMIPSOP_MASK_WRDSP, MICROMIPSOP_SH_WRDSP): Likewise.
	(MICROMIPSOP_MASK_BP, MICROMIPSOP_SH_BP): Likewise.

	gas/
	* config/tc-mips.c (macro_build) <'2'>: Handle microMIPS.
	(macro) <M_BALIGN>: Update error handling.
	(validate_micromips_insn) <'2', '3', '4', '5', '6'>: New cases.
	<'7', '8', '0', '@', '^'>: Likewise.
	(mips_ip) <'2', '3', '4', '5', '6', '7', '8'>: Handle microMIPS.
	<'9'>: Fix formatting.
	<'0', '@'>: Handle microMIPS.
	<'^'>: New case.

	gas/testsuite/
	* gas/mips/micromips@mips32-dsp.d: New.
	* gas/mips/micromips@mips32-dspr2.d: New.
	* gas/mips/mips32-dsp.d: Remove -mips32r2.
	* gas/mips/mips32-dspr2.d: Likewise.
	* gas/mips/mips.exp: (mips_create_arch): Use -mips64r2
	for micromips.  Use run_dump_test_arches to run dsp tests.

	opcodes/
	* micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
	(DSP_VOLA): Likewise.
	(D32, D33): Likewise.
	(micromips_opcodes): Add DSP ASE instructions.
	* micromips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
	<'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
 2012-07-31 21:38:54 +00:00
Jan Beulich
94948e646e VMOVNTDQA was both misplaced and improperly tagged as being an AVX 
instruction (instead of AVX2).

2012-07-31  Jan Beulich <jbeulich@suse.com>

	* i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2
	instruction group. Mark as requiring AVX2.
	* i386-tbl.h: Re-generate.
 2012-07-31 07:38:42 +00:00
Sean Keys
416cf80afb 2012-07-05 Sean Keys <skeys@ipdatasys.com> 
* xgate-dis.c: Removed an IF statement that will
        always be false due to overlapping operand masks.
        * xgate-opc.c: Corrected 'com' opcode entry and
        fixed spacing.
 2012-07-30 21:49:06 +00:00
Nick Clifton
a6dc81d2ab Updated translations 2012-07-30 08:43:46 +00:00
Mike Frysinger
c4dd807e7b bfd: update to AC_INIT 
Move the package name/version from AM_INIT_AUTOMAKE to AC_INIT per recent
autotools guidelines.  We use recent versions of both, so it shouldn't be
a problem.

This sets PACKAGE_xxx variables correctly, and makes the output of:
	./configure --version
actually useful:
	bfd configure 2.22.52

Changing the other dirs to use AC_INIT would require a bit of m4 trickery
that I don't feel like getting into, and they all use BFD_VERSION anyways,
so there isn't much point.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
 2012-07-27 16:30:57 +00:00
Nick Clifton
63d08c6844 Fix attributation of PR 13135 patch. 2012-07-26 14:05:38 +00:00
James Lemke
03edbe3bfb 2012-07-25 James Lemke <jwlemke@codesourcery.com> 
* ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
 2012-07-25 13:08:55 +00:00
Nick Clifton
d908c8af5a PR binutils/13135 
* arm-dis.c: Add necessary casts for printing integer values.
	Use %s when printing string values.
	* hppa-dis.c: Likewise.
	* m68k-dis.c: Likewise.
	* microblaze-dis.c: Likewise.
	* mips-dis.c: Likewise.
	* ppc-dis.c: Likewise.
	* sparc-dis.c: Likewise.

	* dis-asm.h (fprintf_ftype): Add ATTRIBUTE_FPTR_PRINTF_2.
 2012-07-24 12:56:47 +00:00
H.J. Lu
ff688e1f8e Use vex_len_table in xop_table 
PR binutils/14355
	* i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
	(VEX_LEN_0FXOP_08_CD): Likewise.
	(VEX_LEN_0FXOP_08_CE): Likewise.
	(VEX_LEN_0FXOP_08_CF): Likewise.
	(VEX_LEN_0FXOP_08_EC): Likewise.
	(VEX_LEN_0FXOP_08_ED): Likewise.
	(VEX_LEN_0FXOP_08_EE): Likewise.
	(VEX_LEN_0FXOP_08_EF): Likewise.
	(xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
	vpcomub, vpcomuw, vpcomud, vpcomuq.
	(vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
	VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
	VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
	VEX_LEN_0FXOP_08_EF.
 2012-07-19 13:41:03 +00:00
H.J. Lu
e2e1fcde62 Implement RDRSEED, ADX and PRFCHW instructions 
gas/

	* config/tc-i386.c: Add ADX, RDSEED and PRFCHW asm directives.
	* doc/c-i386.texi: Document the new directives.

gas/testsuite/

	* gas/i386/i386.exp: Run adx, rdseed and prefetchw tests.
	* gas/i386/x86-64-arch-2.s: Use prefetchw as 3dnow and Prfchw tests.
	* gas/i386/arch-10.s: Likewise.
	* gas/i386/arch-10-1.l: Changed correspondingly.
	* gas/i386/arch-10-2.l: Likewise.
	* gas/i386/arch-10-3.l: Likewise.
	* gas/i386/arch-10-4.l: Likewise.
	* gas/i386/arch-10.d: Likewise.
	* gas/i386/arch-10-lzcnt.d: Likewise.
	* gas/i386/x86-64-arch-2.d: Likewise.
	* gas/i386/x86-64-arch-2-lzcnt.d: Likewise.
	* gas/i386/ilp32/x86-64-arch-2.d: Likewise.
	* gas/i386/arch-10-prefetchw.d: New file.
	* gas/i386/x86-64-arch-2-prefetchw.d: Likewise.
	* gas/i386/rdseed.s: Likewise.
	* gas/i386/rdseed.d: Likewise.
	* gas/i386/rdseed-intel.d: Likewise.
	* gas/i386/adx.s: Likewise.
	* gas/i386/adx.d: Likewise.
	* gas/i386/adx-intel.d: Likewise.
	* gas/i386/x86-64-rdseed.s: Likewise.
	* gas/i386/x86-64-rdseed.d: Likewise.
	* gas/i386/x86-64-rdseed-intel.d: Likewise.
	* gas/i386/x86-64-adx.s: Likewise.
	* gas/i386/x86-64-adx.d: Likewise.
	* gas/i386/x86-64-adx-intel.d: Likewise.

opcodes/

	* i386-dis.c (PREFIX_0F38F6): New.
	(prefix_table): Add adcx, adox instructions.
	(three_byte_table): Use PREFIX_0F38F6.
	(mod_table): Add rdseed instruction.
	* i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
	(cpu_flags): Likewise.
	* i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
	(i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
	* i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
	prefetchw.
	* i386-tbl.h: Regenerate.
	* i386-init.h: Likewise.
 2012-07-16 12:58:29 +00:00
Sean Keys
3879925e69 gas/config/ 
* tc-xgate.c: Revised assembler so that operands
	are collected before the addressing mode is
	determined.

include/opcode/
	* xgate.h: Changed the format string for mode
	XGATE_OP_DYA_MON.

opcodes/
	* xgate-dis.c: Removed an IF statement that will
	always be false due to overlapping operand masks.
	* xgate-opc.c: Corrected 'com' opcode entry and
	fixed spacing.
 2012-07-05 19:37:52 +00:00
Thomas Schwinge
f4263ca2cd Typo fix. 2012-07-05 08:28:22 +00:00
Thomas Schwinge
8b99bf0bbe opcodes/ 
* mips-dis: Remove gratuitous newline.
 2012-07-05 08:18:43 +00:00
Roland McGrath
9fa0f14a97 gas/testsuite/ 
* gas/i386/rep-suffix.s: Add 'rep nop' case.
	* gas/i386/x86-64-rep-suffix.s: Likewise.
	* gas/i386/rep-suffix.d: Updated.
	* gas/i386/x86-64-rep-suffix.d: Likewise.
	* gas/i386/ilp32/x86-64-rep-suffix.d: Likewise.

opcodes/
	* i386-opc.tbl: Add RepPrefixOk to nop.
	* i386-tbl.h: Regenerate.
 2012-07-02 18:12:28 +00:00
Nick Clifton
4c6a93d362 * po/vi.po: Updated Vietnamese translation. 
* po/uk.po: New Ukranian translation.
	* configure.in (ALL_LINGUAS): Add uk.
	* configure: Regenerate.
 2012-06-28 14:36:01 +00:00
Roland McGrath
fe13e45b9a gas/ 
* NEWS: Mention 'rep ret' too.

gas/testsuite/
	* gas/i386/rep-ret.d: New file.
	* gas/i386/rep-ret.s: New file.
	* gas/i386/i386.exp: Add the new test.

opcodes/
	* i386-opc.tbl: Add RepPrefixOk to ret.
	* i386-tbl.h: Regenerate.
 2012-06-22 21:54:06 +00:00
Roland McGrath
29c048b696 gas/ 
* config/tc-i386.c (parse_insn): Don't complain about REP prefix
	when the template has opcode_modifier.repprefixok set.
	* NEWS: Mention the change.

gas/testsuite/
	* gas/i386/rep-bsf.d: New file.
	* gas/i386/rep-bsf.s: New file.
	* gas/i386/i386.exp: Add the new test.

opcodes/
	* i386-opc.h (RepPrefixOk): New enum constant.
	(i386_opcode_modifier): New bitfield 'repprefixok'.
	* i386-gen.c (opcode_modifiers): Add RepPrefixOk.
	* i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
	instructions that have IsString.
	* i386-tbl.h: Regenerate.
 2012-06-22 16:42:08 +00:00
Andreas Schwab
c7a8dbf91f opcodes/ 
* ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
(iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
(lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
(stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
(dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
(dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
(stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
(tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
(stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.

gas/testsuite/
* gas/ppc/e500mc.d: Update.
* gas/ppc/476.d: Update.
 2012-06-11 08:20:43 +00:00
Alan Modra
94caa96637 bfd/ 
* elf32-ppc.h (has_vle_insns, is_ppc_vle): Delete.
	(has_tls_reloc, has_tls_get_addr_call): Move back to..
	* elf32-ppc.c: ..here.
	(ppc_elf_section_flags, elf_backend_section_flags): Delete.
	(ppc_elf_modify_segment_map): Use ELF sh_flags to detect VLE sections.
opcodes/
	* ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
	(get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
ld/testsuite/
	* ld-powerpc/vle.ld: New.
	* ld-powerpc/powerpc.exp (vle reloc tests): Link using vle.ld.
 2012-05-19 06:58:48 +00:00
Alan Modra
71fe7babab * ia64-opc.c: Remove #include "ansidecl.h". 
* z8kgen.c: Include sysdep.h first.
 2012-05-18 05:31:15 +00:00
Alan Modra
5eb3690ee9 * arc-dis.c: Include sysdep.h first, remove some redundant includes. 
* bfin-dis.c: Likewise.
	* i860-dis.c: Likewise.
	* ia64-dis.c: Likewise.
	* ia64-gen.c: Likewise.
	* m68hc11-dis.c: Likewise.
	* mmix-dis.c: Likewise.
	* msp430-dis.c: Likewise.
	* or32-dis.c: Likewise.
	* rl78-dis.c: Likewise.
	* rx-dis.c: Likewise.
	* tic4x-dis.c: Likewise.
	* tilegx-opc.c: Likewise.
	* tilepro-opc.c: Likewise.
	* rx-decode.c: Regenerate.
 2012-05-18 01:59:38 +00:00
Alan Modra
a4ebc835cb * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi. 2012-05-18 00:39:28 +00:00
Alan Modra
98c76446ea * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE. 2012-05-18 00:30:47 +00:00
Nick Clifton
df7b86aa4c PR 14072 
* configure.in: Add check that sysdep.h has been included before
	any system header files.
	* configure: Regenerate.
	* config.in: Regenerate.
	* sysdep.h: Generate an error if included before config.h.
	* alpha-opc.c: Include sysdep.h before any other header file.
	* alpha-dis.c: Likewise.
	* avr-dis.c: Likewise.
	* cgen-opc.c: Likewise.
	* cr16-dis.c: Likewise.
	* cris-dis.c: Likewise.
	* crx-dis.c: Likewise.
	* d10v-dis.c: Likewise.
	* d10v-opc.c: Likewise.
	* d30v-dis.c: Likewise.
	* d30v-opc.c: Likewise.
	* h8500-dis.c: Likewise.
	* i370-dis.c: Likewise.
	* i370-opc.c: Likewise.
	* m10200-dis.c: Likewise.
	* m10300-dis.c: Likewise.
	* micromips-opc.c: Likewise.
	* mips-opc.c: Likewise.
	* mips61-opc.c: Likewise.
	* moxie-dis.c: Likewise.
	* or32-opc.c: Likewise.
	* pj-dis.c: Likewise.
	* ppc-dis.c: Likewise.
	* ppc-opc.c: Likewise.
	* s390-dis.c: Likewise.
	* sh-dis.c: Likewise.
	* sh64-dis.c: Likewise.
	* sparc-dis.c: Likewise.
	* sparc-opc.c: Likewise.
	* spu-dis.c: Likewise.
	* tic30-dis.c: Likewise.
	* tic54x-dis.c: Likewise.
	* tic80-dis.c: Likewise.
	* tic80-opc.c: Likewise.
	* tilegx-dis.c: Likewise.
	* tilepro-dis.c: Likewise.
	* v850-dis.c: Likewise.
	* v850-opc.c: Likewise.
	* vax-dis.c: Likewise.
	* w65-dis.c: Likewise.
	* xgate-dis.c: Likewise.
	* xtensa-dis.c: Likewise.
	* rl78-decode.opc: Likewise.
	* rl78-decode.c: Regenerate.
	* rx-decode.opc: Likewise.
	* rx-decode.c: Regenerate.

	* configure.in: Add check that sysdep.h has been included before
	any system header files.
	* configure: Regenerate.
	* config.in: Regenerate.
	* sysdep.h: Generate an error if included before config.h.

	* configure.in: Add check that sysdep.h has been included before
	any system header files.
	* configure: Regenerate.
	* config.in: Regenerate.
	* aclocal.m4: Regenerate.
	* bfd-in.h: Generate an error if included before config.h.
	* sysdep.h: Likewise.
	* bfd-in2.h: Regenerate.
	* compress.c: Remove #include "config.h".
	* plugin.c: Likewise.
	* elf32-m68hc1x.c: Include sysdep.h before alloca-conf.h.
	* elf64-hppa.c: Likewise.
	* som.c: Likewise.
	* xsymc.c: Likewise.

	* configure.in: Add check that sysdep.h has been included before
	any system header files.
	* configure: Regenerate.
	* config.in: Regenerate.

	* configure.in: Add check that sysdep.h has been included before
	any system header files.
	* configure: Regenerate.
	* config.in: Regenerate.
	* aclocal.m4: Regenerate.
	* Makefile.am: Use wrappers around C files generated by flex.
	* Makefile.in: Regenerate.
	* doc/Makefile.in: Regenerate.
	* itbl-lex-wrapper.c: New file.
	* config/bfin-lex-wrapper.c: New file.
	* cgen.c: Include as.h before setjmp.h.
	* config/tc-dlx.c: Include as.h before any other header.
	* config/tc-h8300.c: Likewise.
	* config/tc-lm32.c: Likewise.
	* config/tc-mep.c: Likewise.
	* config/tc-microblaze.c: Likewise.
	* config/tc-mmix.c: Likewise.
	* config/tc-msp430.c: Likewise.
	* config/tc-or32.c: Likewise.
	* config/tc-tic4x.c: Likewise.
	* config/tc-tic54x.c: Likewise.
	* config/tc-xtensa.c: Likewise.

	* configure.in: Add check that sysdep.h has been included before
	any system header files.
	* configure: Regenerate.
	* config.in: Regenerate.
	* unwind-ia64.h: Include config.h.
 2012-05-17 15:13:28 +00:00
Alan Modra
e1dad58d73 bfd/ 
* elf32-ppc.c (has_tls_reloc, has_tls_get_addr_call, has_vle_insns,
	is_ppc_vle): Move to..
	* elf32-ppc.h: ..here, making is_ppc_vle a macro.
opcodes/
	* ppc_dis.c: Don't include elf/ppc.h.
 2012-05-17 02:24:50 +00:00
Nick Clifton
101af531fe * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg} 
to PUSH/POP {reg}.

	* binutils-all/arm/objdump.exp:
	STMFD/LDMIA sp!, {reg} don't disassemble to PUSH/POP {reg} any longer.

	* gas/arm/stm-ldm.d: STMFD/LDMIA sp!, {reg} don't disassemble to
	PUSH/POP {reg} any longer.  Some new test cases have been added as well.
	* gas/arm/stm-ldm.s: Likewise.
 2012-05-16 10:53:49 +00:00
Nick Clifton
6927f98292 * config/tc-m68hc11.c: Add S12X and XGATE co-processor support. 
Add option to offset S12 addresses into XGATE memory space.
	Tweak target flags to match other tools. (i.e. -m m68hc11).
	* doc/as.texinfo: Mention new options.
	* doc/c-m68hc11.texi: Document new options.
	* NEWS: Mention new support.

	* archures.c: Add bfd_arch_m9s12x and bfd_arch_m9s12xg.
	* config.bfd: Likewise.
	* cpu-m9s12x.c: New.
	* cpu-m9s12xg.c: New.
	* elf32-m68hc12.c: Add S12X and XGATE co-processor support.
	Add option to offset S12 addresses into XGATE memory space.
	Fix carry bug in IMM16 (IMM8 low/high) relocate.
	* Makefile.am (ALL_MACHINES): Add cpu-m9s12x and cpu-m9s12xg.
	(ALL_MACHINES_CFILES): Likewise.
	* reloc.c: Add S12X relocs.
	* Makefile.in: Regenerate.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.

	* gas/m68hc11/insns9s12x.s: New
	* gas/m68hc11/insns9s12x.d: New
	* gas/m68hc11/hexprefix.s: New
	* gas/m68hc11/hexprefix.d: New
	* gas/m68hc11/9s12x-exg-sex-tfr.s: New
	* gas/m68hc11/9s12x-exg-sex-tfr.d: New
	* gas/m68hc11/insns9s12xg.s: New
	* gas/m68hc11/insns9s12xg.d: New
	* gas/m68hc11/9s12x-mov.s: New
	* gas/m68hc11/9s12x-mov.d: New
	* gas/m68hc11/m68hc11.exp: Updated
	* gas/m68hc11/*.d: Brought in line with changed objdump output.
	* gas/all/gas.exp: XFAIL all hc11/12 targets for redef2,3.
	* gas/elf/elf.exp: XFAIL all hc11/12 targets for redef.
	* gas/elf/dwarf2-1.d: Skip for hc11/12 targets.
	* gas/elf/dwarf2-2.d: Likewise.

	* ld-m68hc11/xgate-link.s: New.
	* ld-m68hc11/xgate-link.d: New.
	* ld-m68hc11/xgate-offset.s: New.
	* ld-m68hc11/xgate-offset.d: New.
	* ld-m68hc11/xgate1.s: New.
	* ld-m68hc11/xgate1.d: New.
	* ld-m68hc11/xgate2.s: New.
	* ld-m68hc11/m68hc11.exp: Updated.
	* ld-m68hc11/*.d: Brought in line with changed objdump output.
	* ld-gc/gc.exp: Update CFLAGS for m68hc11.
	* ld-plugin/plugin.exp: Likewise.
	* ld-srec/srec.exp: XFAIL for m68hc11 and m68hc12.

	* configure.in: Add S12X and XGATE co-processor support to m68hc11
	target.
	* disassemble.c: Likewise.
	* configure: Regenerate.
	* m68hc11-dis.c: Make objdump output more consistent, use hex
	instead of decimal and use 0x prefix for hex.
	* m68hc11-opc.c: Add S12X and XGATE opcodes.
	* dis-asm.h (print_insn_m9s12x): Prototype.
	(print_insn_m9s12xg): Prototype.

	* m68hc11.h (R_M68HC12_16B, R_M68HC12_PCREL_9, R_M68HC12_PCREL_10)
	R_M68HC12_HI8XG, R_M68HC12_LO8XG): New relocations.
	(E_M68HC11_XGATE_RAMOFFSET): Define.

	* m68hc11.h: Add XGate definitions.
	(struct m68hc11_opcode): Add xg_mask field.
 2012-05-15 12:55:51 +00:00
James Lemke
b9c361e0ad Add support for PowerPC VLE. 
2012-05-14  Catherine Moore  <clm@codesourcery.com>

	* NEWS:  Mention PowerPC VLE port.

2012-05-14  James Lemke <jwlemke@codesourcery.com>
	    Catherine Moore  <clm@codesourcery.com>

	bfd/
	* bfd.c (bfd_lookup_section_flags): Add section parm.
	* ecoff.c (bfd_debug_section): Remove flag_info initializer.
	* elf-bfd.h (bfd_elf_section_data): Move in section_flag_info.
	(bfd_elf_lookup_section_flags): Add section parm.
	* elf32-ppc.c (is_ppc_vle): New function.
	(ppc_elf_modify_segment_map): New function.
	(elf_backend_modify_segment_map): Define.
	(has_vle_insns): New define.
	* elf32-ppc.h (ppc_elf_modify_segment_map): Declare.
	* elflink.c (bfd_elf_lookup_section_flags): Add return value & parm.
	Move in logic to omit / include a section.
	* libbfd-in.h (bfd_link_info): Add section parm.
	(bfd_generic_lookup_section_flags): Likewise.
	* reloc.c (bfd_generic_lookup_section_flags): Likewise.
	* section.c (bfd_section): Move out section_flag_info.
	(BFD_FAKE_SECTION): Remove flag_info initializer.
	* targets.c (_bfd_lookup_section_flags): Add section parm.

2012-05-14  Catherine Moore  <clm@codesourcery.com>

	bfd/
	* archures.c (bfd_mach_ppc_vle): New.
	* bfd-in2.h: Regenerated.
	* cpu-powerpc.c (bfd_powerpc_archs): New entry for vle.
	* elf32-ppc.c (split16_format_type): New enumeration.
	(ppc_elf_vle_split16): New function.
	(HOWTO): Add entries for R_PPC_VLE relocations.
	(ppc_elf_reloc_type_lookup): Handle PPC_VLE relocations.
	(ppc_elf_section_flags): New function.
	(ppc_elf_lookup_section_flags): New function.
	(ppc_elf_section_processing): New function.
	(ppc_elf_check_relocs): Handle PPC_VLE relocations.
	(ppc_elf_relocation_section): Likewise.
	(elf_backend_lookup_section_flags_hook): Define.
	(elf_backend_section_flags): Define.
	(elf_backend_section_processing): Define.
	* elf32-ppc.h (ppc_elf_section_processing): Declare.
	* libbfd.h: Regenerated.
	* reloc.c (BFD_RELOC_PPC_VLE_REL8, BFD_RELOC_PPC_VLE_REL15,
	BFD_RELOC_PPC_VLE_REL24, BFD_RELOC_PPC_VLE_LO16A,
	BFD_RELOC_PPC_VLE_LO16D, BFD_RELOC_PPC_VLE_HI16A,
	BFD_RELOC_PPC_VLE_HI16D, BFD_RELOC_PPC_VLE_HA16A,
	BFD_RELOC_PPC_VLE_HA16D, BFD_RELOC_PPC_VLE_SDA21,
	BFD_RELOC_PPC_VLE_SDA21_LO, BFD_RELOC_PPC_VLE_SDAREL_LO16A,
	BFD_RELOC_PPC_VLE_SDAREL_LO16D, BFD_RELOC_PPC_VLE_SDAREL_HI16A,
	BFD_RELOC_PPC_VLE_SDAREL_HI16D, BFD_RELOC_PPC_VLE_SDAREL_HA16A,
	BFD_RELOC_PPC_VLE_SDAREL_HA16D): New bfd relocations.

2012-05-14  James Lemke  <jwlemke@codesourcery.com>

	gas/
	* config/tc-ppc.c (insn_validate): New func of existing code to call..
	(ppc_setup_opcodes): ..from 2 places here.
	Revise for second (VLE) opcode table.
	Add #ifdef'd code to print opcode tables.

2012-05-14  James Lemke  <jwlemke@codesourcery.com>

	gas/
	* config/tc-ppc.c (ppc_setup_opcodes): Allow out-of-order
	for the VLE conditional branches.

2012-05-14  Catherine Moore  <clm@codesourcery.com>
            Maciej W. Rozycki  <macro@codesourcery.com>
	    Rhonda Wittels  <rhonda@codesourcery.com>

	gas/
	* config/tc-ppc.c (PPC_VLE_SPLIT16A): New macro.
	(PPC_VLE_SPLIT16D): New macro.
	(PPC_VLE_LO16A): New macro.
	(PPC_VLE_LO16D): New macro.
	(PPC_VLE_HI16A): New macro.
	(PPC_VLE_HI16D): New macro.
	(PPC_VLE_HA16A): New macro.
	(PPC_VLE_HA16D): New macro.
	(PPC_APUINFO_VLE): New definition.
	(md_chars_to_number): New function.
	(md_parse_option): Check for combinations of little
	endian and -mvle.
	(md_show_usage): Document -mvle.
	(ppc_arch): Recognize VLE.
	(ppc_mach): Recognize bfd_mach_ppc_vle.
	(ppc_setup_opcodes): Print the opcode table if
	* config/tc-ppc.h (ppc_frag_check): Declare.
	* doc/c-ppc.texi: Document -mvle.
	* NEWS:  Mention PowerPC VLE port.

2012-05-14  Catherine Moore  <clm@codesourcery.com>

	gas/
	* config/tc-ppc.h (ppc_dw2_line_min_insn_length): Declare.
	(DWARF2_LINE_MIN_INSN_LENGTH): Redefine.
	* config/tc-ppc.c (ppc_dw2_line_min_insn_length): New.
	* dwarf2dbg.c (scale_addr_delta): Handle values of 1
	for DWARF2_LINE_MIN_INSN_LENGTH.

2012-05-14  Catherine Moore  <clm@codesourcery.com>
            Maciej W. Rozycki  <macro@codesourcery.com>
	    Rhonda Wittels  <rhonda@codesourcery.com>

	gas/testsuite/
	* gas/ppc/ppc.exp: Run new tests.
	* gas/ppc/vle-reloc.d: New test.
	* gas/ppc/vle-reloc.s: New test.
	* gas/ppc/vle-simple-1.d: New test.
	* gas/ppc/vle-simple-1.s: New test.
	* gas/ppc/vle-simple-2.d: New test.
	* gas/ppc/vle-simple-2.s: New test.
	* gas/ppc/vle-simple-3.d: New test.
	* gas/ppc/vle-simple-3.s: New test.
	* gas/ppc/vle-simple-4.d: New test.
	* gas/ppc/vle-simple-4.s: New test.
	* gas/ppc/vle-simple-5.d: New test.
	* gas/ppc/vle-simple-5.s: New test.
	* gas/ppc/vle-simple-6.d: New test.
	* gas/ppc/vle-simple-6.s: New test.
	* gas/ppc/vle.d: New test.
	* gas/ppc/vle.s: New test.

2012-05-14  James Lemke  <jwlemke@codesourcery.com>
	include/elf/
	* ppc.h (SEC_PPC_VLE): Remove.

2012-05-14  Catherine Moore  <clm@codesourcery.com>
	    James Lemke  <jwlemke@codesourcery.com>

	include/elf/
	* ppc.h (R_PPC_VLE_REL8): New reloction.
	(R_PPC_VLE_REL15): Likewise.
	(R_PPC_VLE_REL24): Likewise.
	(R_PPC_VLE_LO16A): Likewise.
	(R_PPC_VLE_LO16D): Likewise.
	(R_PPC_VLE_HI16A): Likewise.
	(R_PPC_VLE_HI16D): Likewise.
	(R_PPC_VLE_HA16A): Likewise.
	(R_PPC_VLE_HA16D): Likewise.
	(R_PPC_VLE_SDA21): Likewise.
	(R_PPC_VLE_SDA21_LO): Likewise.
	(R_PPC_VLE_SDAREL_LO16A): Likewise.
	(R_PPC_VLE_SDAREL_LO16D): Likewise.
	(R_PPC_VLE_SDAREL_HI16A): Likewise.
	(R_PPC_VLE_SDAREL_HI16D): Likewise.
	(R_PPC_VLE_SDAREL_HA16A): Likewise.
	(R_PPC_VLE_SDAREL_HA16D): Likewise.
	(SEC_PPC_VLE): Remove.
	(PF_PPC_VLE): New program header flag.
	(SHF_PPC_VLE): New section header flag.
	(vle_opcodes, vle_num_opcodes): New.
	(VLE_OP): New macro.
	(VLE_OP_TO_SEG): New macro.

2012-05-14  Catherine Moore  <clm@codesourcery.com>
            Maciej W. Rozycki  <macro@codesourcery.com>
	    Rhonda Wittels  <rhonda@codesourcery.com>

	include/opcode/
	* ppc.h (PPC_OPCODE_VLE): New definition.
	(PPC_OP_SA): New macro.
	(PPC_OP_SE_VLE): New macro.
	(PPC_OP): Use a variable shift amount.
	(powerpc_operand): Update comments.
	(PPC_OPSHIFT_INV): New macro.
	(PPC_OPERAND_CR): Replace with...
	(PPC_OPERAND_CR_BIT): ...this and
	(PPC_OPERAND_CR_REG): ...this.

2012-05-14  James Lemke  <jwlemke@codesourcery.com>

	ld/
	* ldlang.c (walk_wild_consider_section): Don't copy section_flag_list.
	Pass it to callback.
	(walk_wild_section_general): Pass section_flag_list to callback.
	(lang_add_section): Add sflag_list parm.
	Move out logic to keep / omit a section & call bfd_lookup_section_flags.
	(output_section_callback_fast): Add sflag_list parm.
	Add new parm to lang_add_section calls.
	(output_section_callback): Likewise.
	(check_section_callback): Add sflag_list parm.
	(lang_place_orphans): Add new parm to lang_add_section calls.
	(gc_section_callback): Add sflag_list parm.
	(find_relro_section_callback): Likewise.
	* ldlang.h (callback_t): Add flag_info parm.
	(lang_add_section): Add sflag_list parm.
	* emultempl/armelf.em (elf32_arm_add_stub_section):
	Add lang_add_section parm.
	* emultempl/beos.em (gld*_place_orphan): Likewise.
	* emultempl/elf32.em (gld*_place_orphan): Likewise.
	* emultempl/hppaelf.em (hppaelf_add_stub_section): Likewise.
	* emultempl/m68hc1xelf.em (m68hc11elf_add_stub_section): Likewise.
	* emultempl/mipself.em (mips_add_stub_section): Likewise.
	* emultempl/mmo.em (mmo_place_orphan): Likewise.
	* emultempl/pe.em (gld_*_place_orphan): Likewise.
	* emultempl/pep.em (gld_*_place_orphan): Likewise.
	* emultempl/ppc64elf.em (ppc_add_stub_section): Likewise.
	* emultempl/spuelf.em (spu_place_special_section): Likewise.
	* emultempl/vms.em (vms_place_orphan): Likewise.

2012-05-14  James Lemke  <jwlemke@codesourcery.com>

	ld/testsuite/
	* ld-powerpc/powerpc.exp: Create ppceabitests.
	* ld-powerpc/vle-multiseg.s: New.
	* ld-powerpc/vle-multiseg-1.d: New.
	* ld-powerpc/vle-multiseg-1.ld: New.
	* ld-powerpc/vle-multiseg-2.d: New.
	* ld-powerpc/vle-multiseg-2.ld: New.
	* ld-powerpc/vle-multiseg-3.d: New.
	* ld-powerpc/vle-multiseg-3.ld: New.
	* ld-powerpc/vle-multiseg-4.d: New.
	* ld-powerpc/vle-multiseg-4.ld: New.
	* ld-powerpc/vle-multiseg-5.d: New.
	* ld-powerpc/vle-multiseg-5.ld: New.
	* ld-powerpc/vle-multiseg-6.d: New.
	* ld-powerpc/vle-multiseg-6.ld: New.
	* ld-powerpc/vle-multiseg-6a.s: New.
	* ld-powerpc/vle-multiseg-6b.s: New.
	* ld-powerpc/vle-multiseg-6c.s: New.
	* ld-powerpc/vle-multiseg-6d.s: New.
	* ld-powerpc/powerpc.exp: Run new tests.

2012-05-14  Catherine Moore  <clm@codesourcery.com>

	ld/
	* NEWS:  Mention PowerPC VLE port.

2012-05-14  Catherine Moore  <clm@codesourcery.com>

	ld/testsuite/
	* ld-powerpc/apuinfo.rd: Update for VLE.
	* ld-powerpc/vle-reloc-1.d: New.
	* ld-powerpc/vle-reloc-1.s: New.
	* ld-powerpc/vle-reloc-2.d: New.
	* ld-powerpc/vle-reloc-2.s: New.
	* ld-powerpc/vle-reloc-3.d: New.
	* ld-powerpc/vle-reloc-3.s: New.
	* ld-powerpc/vle-reloc-def-1.s: New.
	* ld-powerpc/vle-reloc-def-2.s: New.
	* ld-powerpc/vle-reloc-def-3.s: New.

2012-05-14  James Lemke  <jwlemke@codesourcery.com>

	opcodes/
	* ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
	(PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
	(vle_opcd_indices): New array.
	(lookup_vle): New function.
	(disassemble_init_powerpc): Revise for second (VLE) opcode table.
	(print_insn_powerpc): Likewise.
	* ppc-opc.c: Likewise.

2012-05-14  Catherine Moore  <clm@codesourcery.com>
            Maciej W. Rozycki  <macro@codesourcery.com>
	    Rhonda Wittels  <rhonda@codesourcery.com>
	    Nathan Froyd <froydnj@codesourcery.com>

	opcodes/
	* ppc-opc.c (insert_arx, extract_arx): New functions.
	(insert_ary, extract_ary): New functions.
	(insert_li20, extract_li20): New functions.
	(insert_rx, extract_rx): New functions.
	(insert_ry, extract_ry): New functions.
	(insert_sci8, extract_sci8): New functions.
	(insert_sci8n, extract_sci8n): New functions.
	(insert_sd4h, extract_sd4h): New functions.
	(insert_sd4w, extract_sd4w): New functions.
	(insert_vlesi, extract_vlesi): New functions.
	(insert_vlensi, extract_vlensi): New functions.
	(insert_vleui, extract_vleui): New functions.
	(insert_vleil, extract_vleil): New functions.
 	(BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
 	(BI16, BI32, BO32, B8): New.
	(B15, B24, CRD32, CRS): New.
 	(CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
	(DB, IMM20, RD, Rx, ARX, RY, RZ): New.
	(ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
	(SH6_MASK): Use PPC_OPSHIFT_INV.
	(SI8, UI5, OIMM5, UI7, BO16): New.
	(VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
	(XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
	(ALLOW8_SPRG): New.
	(insert_sprg, extract_sprg): Check ALLOW8_SPRG.
	(OPVUP, OPVUP_MASK OPVUP): New
	(BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
	(EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
	(BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
	(BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
 	(IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
	(IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
	(SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
	(SE_IM5, SE_IM5_MASK): New.
	(SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
	(EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
	(BO32DNZ, BO32DZ): New.
	(NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
	(PPCVLE): New.
	(powerpc_opcodes): Add new VLE instructions.  Update existing
	instruction to include PPCVLE if supported.
	* ppc-dis.c (ppc_opts): Add vle entry.
	(get_powerpc_dialect): New function.
	(powerpc_init_dialect): VLE support.
	(print_insn_big_powerpc): Call get_powerpc_dialect.
	(print_insn_little_powerpc): Likewise.
	(operand_value_powerpc): Handle negative shift counts.
	(print_insn_powerpc): Handle 2-byte instruction lengths.
 2012-05-14 19:45:30 +00:00
Nick Clifton
208a4923ed PR binutils/14028 
* configure.in: Invoke ACX_HEADER_STRING.
	* configure: Regenerate.
	* config.in: Regenerate.
	* sysdep.h: If STRINGS_WITH_STRING is defined then include both
	string.h and strings.h.
 2012-05-11 14:25:30 +00:00
Nick Clifton
6750a3a775 PR binutils/14006 
* arm-dis.c (print_insn): Fix detection of instruction mode in
	files containing multiple executable sections.
 2012-05-11 09:41:21 +00:00
Nick Clifton
f6c1a2d592 Add support for Motorola XGATE embedded CPU 2012-05-03 13:12:08 +00:00
DJ Delorie
78e98aaba5 * rx-decode.opc (MOV): Do not sign-extend immediates which are 
already the maximum bit size.
* rx-decode.c: Regenerate.
 2012-04-30 22:04:22 +00:00
David S. Miller
2e52845baf Add support for sparc %cfr ASR register. 
opcodes/

	* sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
	* sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.

gas/

	* config/tc-sparc.c (v9a_asr_table): Add 'cfr'.

gas/testsuite/

	* gas/sparc/sparc.exp: Run cfr test.
	* gas/sparc/cfr.s: New testcase.
	* gas/sparc/cfr.d: Likewise.
 2012-04-27 20:43:35 +00:00
David S. Miller
58004e23c9 Add support for sparc pause instruction. 
opcodes/

	* sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
	* sparc-dis.c (v9a_asr_reg_names): Add 'pause'.

gas/

	* config/tc-sparc.c (sparc_arch_table): Add HWCAP_PAUSE to sparc4,
	v8pluse, v8plusv, v9e, and v9v.
	(v9a_asr_table): Add 'pause'.

gas/testsuite/

	* gas/sparc/sparc.exp: Run pause test.
	* gas/sparc/pause.s: New testcase.
	* gas/sparc/pause.d: Likewise.
 2012-04-27 18:04:00 +00:00
David S. Miller
698544e152 Add support for sparc compare-and-branch instructions. 
opcodes/

	* sparc-opc.c (CBCOND): New define.
	(CBCOND_XCC): Likewise.
	(cbcond): New helper macro.
	(sparc_opcodes): Add compare-and-branch instructions.

gas/

	* config/tc-sparc.c (sparc_arch_table): Add HWCAP_CBCOND to
	sparc4, v8pluse, v8plusv, v9e, and v9v.
	(sparc_ip): Handle R_SPARC_5 of immediate constants inline in
	order to accomodate cbcond which otherwise would require two
	relocations to be handled in a single instruction..

gas/testsuite/

	* gas/sparc/cbcond.s: New file.
	* gas/sparc/cbcond.d: New file.
	* gas/sparc/sparc.exp: Run cbcond test.
 2012-04-27 18:03:13 +00:00
David S. Miller
6cda13266f Add support for SPARC T4 crypto instructions. 
include/opcode/

	* sparc.h: Document new arg code' )' for crypto RS3
	immediates.

opcodes/

	* sparc-dis.c (print_insn_sparc): Handle ')'.
	* sparc-opc.c (sparc_opcodes): Add crypto instructions.

gas/

	* config/tc-sparc.c (sparc_ip): Likewise.  Accept instruction
	names containing "_".
	(sparc_arch_table): Add sparc4, v8pluse, and v9e.  Add crypto
	hwcap masks to v8plusv and v9v.

gas/testsuite/

	* gas/sparc/crypto.s: New file.
	* gas/sparc/crypto.d: New file.
	* gas/sparc/sparc.exp: Run crypto test.
 2012-04-27 18:02:35 +00:00
David S. Miller
ec668d69b9 Move sparc opcode hwcaps out of sparc_opcode flags field. 
include/opcode/

	* sparc.h (struct sparc_opcode): New field 'hwcaps'.
	F_MUL32, F_DIV32, F_FDMULD, F_V8PLUS, F_POPC, F_VIS, F_VIS2,
	F_ASI_BLK_INIT, F_FMAF, F_VIS3, F_HPC, F_RANDOM, F_TRANS,
	F_FJFMAU, F_IMA, F_ASI_CACHE_SPARING, F_HWCAP_MASK): Delete.
	(HWCAP_MUL32, HWCAP_DIV32, HWCAP_FSMULD, HWCAP_V8PLUS, HWCAP_POPC,
	HWCAP_VIS, HWCAP_VIS2, HWCAP_ASI_BLK_INIT, HWCAP_FMAF,
	HWCAP_VIS3, HWCAP_HPC, HWCAP_RANDOM, HWCAP_TRANS, HWCAP_FJFMAU,
	HWCAP_IMA, HWCAP_ASI_CACHE_SPARING, HWCAP_AES, HWCAP_DES,
	HWCAP_KASUMI, HWCAP_CAMELLIA, HWCAP_MD5, HWCAP_SHA1,
	HWCAP_SHA256, HWCAP_SHA512, HWCAP_MPMUL, HWCAP_MONT, HWCAP_PAUSE,
	HWCAP_CBCOND, HWCAP_CRC32): New defines.

opcodes/

	* sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
	into new struct sparc_opcode 'hwcaps' field instead of 'flags'.

gas/

	* config/tc-sparc.c (sparc_arch_table): Rework to use HWCAP_*
	masks.
	(sparc_md_end): No longer need to translate hwcap_seen values into
	ELF hwcap bits, they now match exactly.
	(get_hwcap_name): Use HWCAP_* and handle new values.
	(sparc_ip): Fetch hwcaps from insn->hwcaps instead of insn->flags.
 2012-04-27 18:01:35 +00:00
David S. Miller
2615994e91 Support R_SPARC_WDISP10 and R_SPARC_H34. 
include/

	* elf/sparc.h (R_SPARC_WDISP10): New reloc.
	* opcode/sparc.h: Define '=' as generating R_SPARC_WDISP10.

opcodes/

	* sparc-dis.c (X_DISP10): Define.
	(print_insn_sparc): Handle '='.

bfd/

	* reloc.c (BFD_RELOC_SPARC_H34, BFD_RELOC_SPARC_SIZE32,
	BFD_RELOC_SPARC_SIZE64, BFD_RELOC_SPARC_WDISP10): New relocs.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Likewise.
	* elfxx-sparc.c (sparc_elf_wdisp10_reloc): New function.
	(_bfd_sparc_elf_howto_table): Add entries for R_SPARC_H34,
	R_SPARC_SIZE32, R_SPARC_64, and R_SPARC_WDISP10.
	(_bfd_sparc_elf_reloc_type_lookup): Handle new relocs.
	(_bfd_sparc_elf_check_relocs): Likewise.
	(_bfd_sparc_elf_gc_sweep_hook): Likewise.
	(_bfd_sparc_elf_relocate_section): Likewise.

gas/

	* config/tc-sparc.c (sparc_ip): Handle '=', "%h34", "%l34", and
	BFD_RELOC_SPARC_H34.
	(md_apply_fix): Handle BFD_RELOC_SPARC_WDISP10 and BFD_RELOC_SPARC_H34.
	(tc_gen_reloc): Likewise.

gas/testsuite/

	* gas/sparc/reloc64.s: Add abs34 code model tests.
	* gas/sparc/reloc64.d: Update.

elfcpp/

	* sparc.h (R_SPARC_WDISP10): New relocation.

gold/

	* sparc.cc (Reloc::wdisp10): New relocation method.
	(Reloc::h34): Likewise.
	(Target_sparc::Scan::check_non_pic): Handle R_SPARC_H34.
	(Target_sparc::Scan::get_reference_flags): Handle R_SPARC_H34 and
	R_SPARC_WDISP10.
	(Target_sparc::Scan::local): Likewise.
	(Target_sparc::Scan::global): Likewise.
	(Target_sparc::Relocate::relocate): Likewise.
 2012-04-12 16:26:06 +00:00
Mike Frysinger
5de10af023 opcodes: bfin: simplify field width processing and fix build warnings 
This fix the build time warning:
warning: format not a string literal, argument types not checked [-Wformat-nonliteral]

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
 2012-04-01 04:15:43 +00:00
Maxim Kuvyrkov
55a36193d8 gas/ 
* config/tc-mips.c (mips_cpu_info_table): Add entry for Broadcom XLP.
	* doc/c-mips.texi: Mention XLP.

	opcodes/
	* mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
 2012-03-24 01:09:28 +00:00
Alan Modra
d668828207 * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete. 
(powerpc_opcd_indices): Bump array size.
	(disassemble_init_powerpc): Set powerpc_opcd_indices entries
	corresponding to unused opcodes to following entry.
	(lookup_powerpc): New function, extracted and optimised from..
	(print_insn_powerpc): ..here.
 2012-03-16 12:14:32 +00:00
Alan Modra
b240011aba include/ 
* dis-asm.h (disassemble_init_powerpc): Declare.
opcodes/
	* disassemble.c (disassemble_init_for_target): Handle ppc init.
	* ppc-dis.c (private): New var.
	(powerpc_init_dialect): Don't return calloc failure, instead use
	private.
	(PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
	(powerpc_opcd_indices): New array.
	(disassemble_init_powerpc): New function.
	(print_insn_big_powerpc): Don't init dialect here.
	(print_insn_little_powerpc): Likewise.
	(print_insn_powerpc): Start search using powerpc_opcd_indices.
 2012-03-15 12:58:48 +00:00
Alan Modra
aea77599d0 include/opcode/ 
* ppc.h: Add PPC_OPCODE_ALTIVEC2, PPC_OPCODE_E6500, PPC_OPCODE_TMR.
opcodes/
	* ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
	* ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
	(PPCVEC2, PPCTMR, E6500): New short names.
	(powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
	mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
	lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
	lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
	lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
	optional operands on sync instruction for E6500 target.
bfd/
	* archures.c: Add bfd_mach_ppc_e5500 and bfd_mach_ppc_e6500.
	* bfd-in2.h: Regenerate.
	* cpu-powerpc.c (bfd_powerpc_archs): Add entryies for
	bfd_mach_ppc_e5500 and bfd_mach_ppc_e6500.
gas/
	* config/tc-ppc.c (md_show_usage): Document -me5500 and -me6500.
	(ppc_handle_align): Add termination nop opcode for e500mc family.
	* doc/as.texinfo: Document options -me5500 and -me6500.
	* doc/c-ppc.texi: Likewise.
gas/testsuite/
	* gas/ppc/e500mc64_nop.s: New test case for e500mc family
	termination nops.
	* gas/ppc/e500mc64_nop.d: Likewise.
	* gas/ppc/e5500_nop.s: Likewise.
	* gas/ppc/e5500_nop.d: Likewise.
	* gas/ppc/e6500_nop.s: Likewise.
	* gas/ppc/e6500_nop.d: Likewise.
	* gas/ppc/e6500.s: New.
	* gas/ppc/e6500.d: Likewise.
	* gas/ppc/ppc.exp: Run e6500, e500mc64_nop, e5500_nop, and e6500_nop.
 2012-03-09 23:39:06 +00:00
Andreas Krebbel
5333187ab1 2012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> 
* s390-opc.txt: Set instruction type of pku to SS_L2RDRD.

2012-03-08  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* gas/s390/esa-g5.d: Move length field to the second operand.
	* gas/s390/esa-g5.s: Likewise.
 2012-03-08 17:22:18 +00:00
Alan Modra
a597d2d3d2 cpu/ 
* mt.opc (print_dollarhex): Trim values to 32 bits.
opcodes/
	* mt-dis.c: Regenerate.
 2012-02-27 06:57:57 +00:00
Alan Modra
3f26eb3af9 * v850-opc.c (extract_v8): Rearrange to make it obvious this 
is the inverse of corresponding insert function.
	(extract_d22, extract_u9, extract_r4): Likewise.
	(extract_d9): Correct sign extension.
	(extract_d16_15): Don't assume "long" is 32 bits, and don't
	rely on implementation defined behaviour for shift right of
	signed types.
	(extract_d16_16, extract_d17_16, extract_i9): Likewise.
	(extract_d23): Likewise, and correct mask.
 2012-02-27 06:55:39 +00:00
Alan Modra
1f42f8b31d gas/ 
* config/tc-crx.c: Include bfd_stdint.h.
	(getconstant): Remove irrelevant comment.  Don't fail due to
	sign-extension of int mask.
	(check_range): Rewrite using unsigned arithmetic throughout.
opcodes/
	* crx-dis.c (print_arg): Mask constant to 32 bits.
	* crx-opc.c (cst4_map): Use int array.
include/opcode/
	* crx.h (cst4_map): Update declaration.
 2012-02-27 06:37:40 +00:00