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* metag-dis.c (REG_WIDTH): Increase to 64.

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* gas/metag/metadsp21.d: Fix expected MMOV disassembly.
This commit is contained in:
Nick Clifton 2013-01-14 11:22:06 +00:00
parent 442e4d9c87
commit a4533ed80a
4 changed files with 15 additions and 7 deletions
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4
gas/testsuite/ChangeLog
View file

@ -1,3 +1,7 @@
2013-01-14 Will Newton <will.newton@imgtec.com>
* gas/metag/metadsp21.d: Fix expected MMOV disassembly.
2013-01-14 Alan Modra <amodra@gmail.com>
* gas/ppc/htm.s: Use .text rather than .section ".text".

12
gas/testsuite/gas/metag/metadsp21.d
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@ -26203,14 +26203,14 @@ Disassembly of section \.text:
.*: 03 c1 ff aa D XSDW \[D1BW\.1\+D1BWI\.1\+\+\],\[D1BR\.1\+D1BRI\.1\+\+\]
.*: 19 c1 ff aa DL XSDSB \[D1BW\.1\+D1BWI\.1\+\+\],\[D1BR\.1\+D1BRI\.1\+\+\]
.*: c1 03 b0 ca DB MMOVD RAM8X32,RAM8X32,RAM8X32,RAM8X32,\[D1Re0\+\+\]
.*: c1 3f b0 ca DB MMOVD RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RA,\[D1Re0\+\+\]
.*: c1 3f b0 ca DB MMOVD RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,\[D1Re0\+\+\]
.*: e1 47 b0 ca DB MMOVD RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,\[A0FrP\+\+\]
.*: a1 c0 b1 ca DB MMOVD RAM8X32,RAM8X32,\[D0\.7\+\+\]
.*: a1 c3 b1 ca DB MMOVD RAM8X32,RAM8X32,RAM8X32,RAM8X32,\[D0\.7\+\+\]
.*: a1 cf b1 ca DB MMOVD RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,\[D0\.7\+\+\]
.*: a1 ff b1 ca DB MMOVD RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RA,\[D0\.7\+\+\]
.*: a1 ff b1 ca DB MMOVD RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,\[D0\.7\+\+\]
.*: e1 03 b2 ca DB MMOVD RAM8X32,RAM8X32,RAM8X32,RAM8X32,\[A0\.8\+\+\]
.*: e1 3f b2 ca DB MMOVD RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RA,\[A0\.8\+\+\]
.*: e1 3f b2 ca DB MMOVD RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,\[A0\.8\+\+\]
.*: c1 07 b4 ca DB MMOVD RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,\[D1\.16\+\+\]
.*: c1 00 b8 ca DB MMOVD RAM8X,RAM8X,\[D1Re0\+\+\]
.*: c1 0f b8 ca DB MMOVD RAM8X,RAM8X,RAM8X,RAM8X,RAM8X,RAM8X,\[D1Re0\+\+\]
@ -26245,14 +26245,14 @@ Disassembly of section \.text:
.*: c1 01 fc ca DW MMOVD RAMX,RAMX,RAMX,\[D1\.16\+\+\]
.*: c1 1f fc ca DW MMOVD RAMX,RAMX,RAMX,RAMX,RAMX,RAMX,RAMX,\[D1\.16\+\+\]
.*: c1 03 b0 cb DB MMOVL RAM8X32,RAM8X32,RAM8X32,RAM8X32,\[D1Re0\+\+\]
.*: c1 3f b0 cb DB MMOVL RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RA,\[D1Re0\+\+\]
.*: c1 3f b0 cb DB MMOVL RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,\[D1Re0\+\+\]
.*: e1 47 b0 cb DB MMOVL RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,\[A0FrP\+\+\]
.*: a1 c0 b1 cb DB MMOVL RAM8X32,RAM8X32,\[D0\.7\+\+\]
.*: a1 c3 b1 cb DB MMOVL RAM8X32,RAM8X32,RAM8X32,RAM8X32,\[D0\.7\+\+\]
.*: a1 cf b1 cb DB MMOVL RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,\[D0\.7\+\+\]
.*: a1 ff b1 cb DB MMOVL RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RA,\[D0\.7\+\+\]
.*: a1 ff b1 cb DB MMOVL RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,\[D0\.7\+\+\]
.*: e1 03 b2 cb DB MMOVL RAM8X32,RAM8X32,RAM8X32,RAM8X32,\[A0\.8\+\+\]
.*: e1 3f b2 cb DB MMOVL RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RA,\[A0\.8\+\+\]
.*: e1 3f b2 cb DB MMOVL RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,\[A0\.8\+\+\]
.*: c1 07 b4 cb DB MMOVL RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,\[D1\.16\+\+\]
.*: c1 00 b8 cb DB MMOVL RAM8X,RAM8X,\[D1Re0\+\+\]
.*: c1 0f b8 cb DB MMOVL RAM8X,RAM8X,RAM8X,RAM8X,RAM8X,RAM8X,\[D1Re0\+\+\]

4
opcodes/ChangeLog
View file

@ -1,3 +1,7 @@
2013-01-14 Will Newton <will.newton@imgtec.com>
* metag-dis.c (REG_WIDTH): Increase to 64.
2013-01-10 Peter Bergner <bergner@vnet.ibm.com>
* ppc-dis.c (ppc_opts): Add "power8", "pwr8" and "htm" entries.

2
opcodes/metag-dis.c
View file

@ -33,7 +33,7 @@
#define OPERAND_WIDTH 92
#define ADDR_WIDTH 20
#define REG_WIDTH 50
#define REG_WIDTH 64
#define DSP_PREFIX_WIDTH 17
/* Value to print if we fail to parse a register name. */