* ppc-dis.c (ppc_opts) <altivec>: Use PPC_OPCODE_ALTIVEC2;
	* ppc-opc.c (VBA): New define.
	(powerpc_opcodes) <vcuxwfp, vcsxwfp, vcfpuxws, vcfpsxsw, vmr, vnot,
	mfppr, mfppr32, mtppr, mtppr32>: New extended mnemonics.

gas/testsuite/
	* gas/ppc/power7.d: Add tests for mfppr, mfppr32, mtppr and mtppr32.
	* gas/ppc/power7.s: Likewise.
	* gas/ppc/altivec.d: Add tests for all legacy Altivec instructions.
	* gas/ppc/altivec.s: Likewise.
	* gas/ppc/altivec2.d: New test file.
	* gas/ppc/altivec2.s: Likewise.
	* gas/ppc/ppc.exp: Run it.
This commit is contained in:
Peter Bergner 2012-10-05 14:06:20 +00:00
parent c9824451ad
commit c7a5aa9c64
11 changed files with 534 additions and 1 deletions

View file

@ -1,3 +1,13 @@
2012-10-05 Peter Bergner <bergner@vnet.ibm.com>
* gas/ppc/power7.d: Add tests for mfppr, mfppr32, mtppr and mtppr32.
* gas/ppc/power7.s: Likewise.
* gas/ppc/altivec.d: Add tests for all legacy Altivec instructions.
* gas/ppc/altivec.s: Likewise.
* gas/ppc/altivec2.d: New test file.
* gas/ppc/altivec2.s: Likewise.
* gas/ppc/ppc.exp: Run it.
2012-10-04 Nick Clifton <nickc@redhat.com>
* gas/v850/v850e1.d: Fix expected disassembly of clr1, not1, set1

View file

@ -13,3 +13,194 @@ Disassembly of section \.text:
c: 7e 08 3a ac dstt r8,r7,0
10: 7c 65 32 ec dstst r5,r6,3
14: 7e 44 2a ec dststt r4,r5,2
18: 7f d6 c0 0e lvebx v30,r22,r24
1c: 7e a0 c0 0e lvebx v21,0,r24
20: 7d 50 10 4e lvehx v10,r16,r2
24: 7e 80 b8 4e lvehx v20,0,r23
28: 7e 24 90 8e lvewx v17,r4,r18
2c: 7e e0 40 8e lvewx v23,0,r8
30: 7c c0 c8 0c lvsl v6,0,r25
34: 7c 40 30 0c lvsl v2,0,r6
38: 7e d0 60 4c lvsr v22,r16,r12
3c: 7c 00 e8 4c lvsr v0,0,r29
40: 7d e5 6a ce lvxl v15,r5,r13
44: 7e 60 ba ce lvxl v19,0,r23
48: 7e c1 10 ce lvx v22,r1,r2
4c: 7e 40 88 ce lvx v18,0,r17
50: 7f e0 42 a6 mfvrsave r31
54: 13 00 06 04 mfvscr v24
58: 7d 40 43 a6 mtvrsave r10
5c: 10 00 ce 44 mtvscr v25
60: 7e 5b 51 0e stvebx v18,r27,r10
64: 7e 00 31 0e stvebx v16,0,r6
68: 7e 2d 81 4e stvehx v17,r13,r16
6c: 7e e0 a1 4e stvehx v23,0,r20
70: 7d 73 f9 8e stvewx v11,r19,r31
74: 7f e0 09 8e stvewx v31,0,r1
78: 7f 55 8b ce stvxl v26,r21,r17
7c: 7d a0 b3 ce stvxl v13,0,r22
80: 7d 7f f9 ce stvx v11,r31,r31
84: 7f c0 81 ce stvx v30,0,r16
88: 13 07 e1 80 vaddcuw v24,v7,v28
8c: 10 7e 58 0a vaddfp v3,v30,v11
90: 11 1c 4b 00 vaddsbs v8,v28,v9
94: 10 e5 23 40 vaddshs v7,v5,v4
98: 12 da db 80 vaddsws v22,v26,v27
9c: 12 0e e0 00 vaddubm v16,v14,v28
a0: 10 c1 ca 00 vaddubs v6,v1,v25
a4: 10 44 30 40 vadduhm v2,v4,v6
a8: 13 55 42 40 vadduhs v26,v21,v8
ac: 13 bf 08 80 vadduwm v29,v31,v1
b0: 12 ed 22 80 vadduws v23,v13,v4
b4: 13 d0 4c 44 vandc v30,v16,v9
b8: 10 6d dc 04 vand v3,v13,v27
bc: 10 86 8d 02 vavgsb v4,v6,v17
c0: 12 fc 9d 42 vavgsh v23,v28,v19
c4: 11 0f fd 82 vavgsw v8,v15,v31
c8: 10 c7 cc 02 vavgub v6,v7,v25
cc: 13 36 54 42 vavguh v25,v22,v10
d0: 10 77 ec 82 vavguw v3,v23,v29
d4: 11 c6 13 ca vctsxs v14,v2,6
d8: 11 34 fb 8a vctuxs v9,v31,20
dc: 13 03 f3 4a vcfsx v24,v30,3
e0: 12 3d ab 0a vcfux v17,v21,29
e4: 12 5c 03 c6 vcmpbfp v18,v28,v0
e8: 12 7a 1f c6 vcmpbfp\. v19,v26,v3
ec: 12 02 58 c6 vcmpeqfp v16,v2,v11
f0: 12 ed 6c c6 vcmpeqfp\. v23,v13,v13
f4: 13 33 50 06 vcmpequb v25,v19,v10
f8: 12 4b 14 06 vcmpequb\. v18,v11,v2
fc: 11 39 38 46 vcmpequh v9,v25,v7
100: 11 d8 ac 46 vcmpequh\. v14,v24,v21
104: 13 0c 28 86 vcmpequw v24,v12,v5
108: 12 70 0c 86 vcmpequw\. v19,v16,v1
10c: 12 f1 81 c6 vcmpgefp v23,v17,v16
110: 12 7d 8d c6 vcmpgefp\. v19,v29,v17
114: 12 1c 6a c6 vcmpgtfp v16,v28,v13
118: 11 d8 3e c6 vcmpgtfp\. v14,v24,v7
11c: 12 16 33 06 vcmpgtsb v16,v22,v6
120: 10 4c 77 06 vcmpgtsb\. v2,v12,v14
124: 13 83 eb 46 vcmpgtsh v28,v3,v29
128: 12 13 6f 46 vcmpgtsh\. v16,v19,v13
12c: 11 e0 2b 86 vcmpgtsw v15,v0,v5
130: 12 ad 07 86 vcmpgtsw\. v21,v13,v0
134: 10 aa f2 06 vcmpgtub v5,v10,v30
138: 10 ed 56 06 vcmpgtub\. v7,v13,v10
13c: 13 0f 82 46 vcmpgtuh v24,v15,v16
140: 13 35 de 46 vcmpgtuh\. v25,v21,v27
144: 12 3b 32 86 vcmpgtuw v17,v27,v6
148: 11 15 de 86 vcmpgtuw\. v8,v21,v27
14c: 10 2e 0b 4a vcfsx v1,v1,14
150: 10 99 7b ca vctsxs v4,v15,25
154: 13 8e bb 8a vctuxs v28,v23,14
158: 10 c0 33 0a vcfux v6,v6,0
15c: 10 00 41 8a vexptefp v0,v8
160: 12 c0 d9 ca vlogefp v22,v27
164: 12 f2 91 6e vmaddfp v23,v18,v5,v18
168: 11 ad dc 0a vmaxfp v13,v13,v27
16c: 11 17 71 02 vmaxsb v8,v23,v14
170: 12 71 01 42 vmaxsh v19,v17,v0
174: 12 63 b1 82 vmaxsw v19,v3,v22
178: 12 fe e0 02 vmaxub v23,v30,v28
17c: 11 34 b8 42 vmaxuh v9,v20,v23
180: 12 b3 08 82 vmaxuw v21,v19,v1
184: 12 cd 2d a0 vmhaddshs v22,v13,v5,v22
188: 13 e0 1c a1 vmhraddshs v31,v0,v3,v18
18c: 10 55 c4 4a vminfp v2,v21,v24
190: 12 86 53 02 vminsb v20,v6,v10
194: 12 5b d3 42 vminsh v18,v27,v26
198: 10 64 0b 82 vminsw v3,v4,v1
19c: 10 e0 6a 02 vminub v7,v0,v13
1a0: 10 0c 32 42 vminuh v0,v12,v6
1a4: 10 c3 0a 82 vminuw v6,v3,v1
1a8: 10 7d 1e a2 vmladduhm v3,v29,v3,v26
1ac: 12 a5 f8 0c vmrghb v21,v5,v31
1b0: 12 b8 00 4c vmrghh v21,v24,v0
1b4: 12 00 b0 8c vmrghw v16,v0,v22
1b8: 10 31 81 0c vmrglb v1,v17,v16
1bc: 11 c8 79 4c vmrglh v14,v8,v15
1c0: 13 f5 29 8c vmrglw v31,v21,v5
1c4: 13 09 4c 84 vmr v24,v9
1c8: 13 09 4c 84 vmr v24,v9
1cc: 10 18 7d e5 vmsummbm v0,v24,v15,v23
1d0: 10 24 3e 68 vmsumshm v1,v4,v7,v25
1d4: 11 28 6f e9 vmsumshs v9,v8,v13,v31
1d8: 12 ff 67 a4 vmsumubm v23,v31,v12,v30
1dc: 13 a0 d5 66 vmsumuhm v29,v0,v26,v21
1e0: 13 6e c9 67 vmsumuhs v27,v14,v25,v5
1e4: 11 59 73 08 vmulesb v10,v25,v14
1e8: 10 32 43 48 vmulesh v1,v18,v8
1ec: 12 2e 4a 08 vmuleub v17,v14,v9
1f0: 10 ba 4a 48 vmuleuh v5,v26,v9
1f4: 12 b2 31 08 vmulosb v21,v18,v6
1f8: 10 85 41 48 vmulosh v4,v5,v8
1fc: 10 49 98 08 vmuloub v2,v9,v19
200: 13 a5 20 48 vmulouh v29,v5,v4
204: 11 02 29 af vnmsubfp v8,v2,v6,v5
208: 13 e9 55 04 vnor v31,v9,v10
20c: 13 3f fd 04 vnot v25,v31
210: 13 3f fd 04 vnot v25,v31
214: 12 e7 14 84 vor v23,v7,v2
218: 10 1c b6 6b vperm v0,v28,v22,v25
21c: 12 19 8b 0e vpkpx v16,v25,v17
220: 11 90 89 8e vpkshss v12,v16,v17
224: 10 33 b9 0e vpkshus v1,v19,v23
228: 13 27 69 ce vpkswss v25,v7,v13
22c: 10 98 51 4e vpkswus v4,v24,v10
230: 11 3b 60 0e vpkuhum v9,v27,v12
234: 12 ca c8 8e vpkuhus v22,v10,v25
238: 13 d2 00 4e vpkuwum v30,v18,v0
23c: 10 e3 b0 ce vpkuwus v7,v3,v22
240: 13 00 e1 0a vrefp v24,v28
244: 12 20 9a ca vrfim v17,v19
248: 13 00 ca 0a vrfin v24,v25
24c: 10 60 2a 8a vrfip v3,v5
250: 11 00 52 4a vrfiz v8,v10
254: 13 52 f0 04 vrlb v26,v18,v30
258: 12 11 c8 44 vrlh v16,v17,v25
25c: 12 fe 48 84 vrlw v23,v30,v9
260: 10 40 91 4a vrsqrtefp v2,v18
264: 12 8e 92 aa vsel v20,v14,v18,v10
268: 13 39 61 04 vslb v25,v25,v12
26c: 11 29 61 ec vsldoi v9,v9,v12,7
270: 11 c2 59 44 vslh v14,v2,v11
274: 13 c5 34 0c vslo v30,v5,v6
278: 12 de 49 c4 vsl v22,v30,v9
27c: 13 5a 19 84 vslw v26,v26,v3
280: 10 26 a2 0c vspltb v1,v20,6
284: 12 03 92 4c vsplth v16,v18,3
288: 13 33 03 0c vspltisb v25,-13
28c: 12 ca 03 4c vspltish v22,10
290: 11 ad 03 8c vspltisw v13,13
294: 11 22 92 8c vspltw v9,v18,2
298: 11 d6 03 04 vsrab v14,v22,v0
29c: 11 8c 93 44 vsrah v12,v12,v18
2a0: 10 42 6b 84 vsraw v2,v2,v13
2a4: 10 fb 2a 04 vsrb v7,v27,v5
2a8: 10 eb ea 44 vsrh v7,v11,v29
2ac: 12 5e fc 4c vsro v18,v30,v31
2b0: 10 49 e2 c4 vsr v2,v9,v28
2b4: 10 19 02 84 vsrw v0,v25,v0
2b8: 13 02 55 80 vsubcuw v24,v2,v10
2bc: 12 d8 a0 4a vsubfp v22,v24,v20
2c0: 11 56 6f 00 vsubsbs v10,v22,v13
2c4: 13 11 e7 40 vsubshs v24,v17,v28
2c8: 11 5a 07 80 vsubsws v10,v26,v0
2cc: 12 0b c4 00 vsububm v16,v11,v24
2d0: 11 75 0e 00 vsububs v11,v21,v1
2d4: 10 cc c4 40 vsubuhm v6,v12,v24
2d8: 13 cb 4e 40 vsubuhs v30,v11,v9
2dc: 12 74 6c 80 vsubuwm v19,v20,v13
2e0: 12 59 36 80 vsubuws v18,v25,v6
2e4: 13 2a 96 88 vsum2sws v25,v10,v18
2e8: 11 b0 af 08 vsum4sbs v13,v16,v21
2ec: 12 e8 26 48 vsum4shs v23,v8,v4
2f0: 13 8d f6 08 vsum4ubs v28,v13,v30
2f4: 12 ca 47 88 vsumsws v22,v10,v8
2f8: 13 00 73 4e vupkhpx v24,v14
2fc: 10 40 b2 0e vupkhsb v2,v22
300: 12 00 12 4e vupkhsh v16,v2
304: 11 40 d3 ce vupklpx v10,v26
308: 11 e0 e2 8e vupklsb v15,v28
30c: 11 00 42 ce vupklsh v8,v8
310: 13 20 1c c4 vxor v25,v0,v3

View file

@ -8,3 +8,194 @@ start:
dstt 8,7,0
dstst 5,6,3
dststt 4,5,2
lvebx 30,22,24
lvebx 21,0,24
lvehx 10,16,2
lvehx 20,0,23
lvewx 17,4,18
lvewx 23,0,8
lvsl 6,0,25
lvsl 2,0,6
lvsr 22,16,12
lvsr 0,0,29
lvxl 15,5,13
lvxl 19,0,23
lvx 22,1,2
lvx 18,0,17
mfvrsave 31
mfvscr 24
mtvrsave 10
mtvscr 25
stvebx 18,27,10
stvebx 16,0,6
stvehx 17,13,16
stvehx 23,0,20
stvewx 11,19,31
stvewx 31,0,1
stvxl 26,21,17
stvxl 13,0,22
stvx 11,31,31
stvx 30,0,16
vaddcuw 24,7,28
vaddfp 3,30,11
vaddsbs 8,28,9
vaddshs 7,5,4
vaddsws 22,26,27
vaddubm 16,14,28
vaddubs 6,1,25
vadduhm 2,4,6
vadduhs 26,21,8
vadduwm 29,31,1
vadduws 23,13,4
vandc 30,16,9
vand 3,13,27
vavgsb 4,6,17
vavgsh 23,28,19
vavgsw 8,15,31
vavgub 6,7,25
vavguh 25,22,10
vavguw 3,23,29
vcfpsxsw 14,2,6
vcfpuxws 9,31,20
vcfsx 24,30,3
vcfux 17,21,29
vcmpbfp 18,28,0
vcmpbfp. 19,26,3
vcmpeqfp 16,2,11
vcmpeqfp. 23,13,13
vcmpequb 25,19,10
vcmpequb. 18,11,2
vcmpequh 9,25,7
vcmpequh. 14,24,21
vcmpequw 24,12,5
vcmpequw. 19,16,1
vcmpgefp 23,17,16
vcmpgefp. 19,29,17
vcmpgtfp 16,28,13
vcmpgtfp. 14,24,7
vcmpgtsb 16,22,6
vcmpgtsb. 2,12,14
vcmpgtsh 28,3,29
vcmpgtsh. 16,19,13
vcmpgtsw 15,0,5
vcmpgtsw. 21,13,0
vcmpgtub 5,10,30
vcmpgtub. 7,13,10
vcmpgtuh 24,15,16
vcmpgtuh. 25,21,27
vcmpgtuw 17,27,6
vcmpgtuw. 8,21,27
vcsxwfp 1,1,14
vctsxs 4,15,25
vctuxs 28,23,14
vcuxwfp 6,6,0
vexptefp 0,8
vlogefp 22,27
vmaddfp 23,18,5,18
vmaxfp 13,13,27
vmaxsb 8,23,14
vmaxsh 19,17,0
vmaxsw 19,3,22
vmaxub 23,30,28
vmaxuh 9,20,23
vmaxuw 21,19,1
vmhaddshs 22,13,5,22
vmhraddshs 31,0,3,18
vminfp 2,21,24
vminsb 20,6,10
vminsh 18,27,26
vminsw 3,4,1
vminub 7,0,13
vminuh 0,12,6
vminuw 6,3,1
vmladduhm 3,29,3,26
vmrghb 21,5,31
vmrghh 21,24,0
vmrghw 16,0,22
vmrglb 1,17,16
vmrglh 14,8,15
vmrglw 31,21,5
vmr 24,9,
vor 24,9,9
vmsummbm 0,24,15,23
vmsumshm 1,4,7,25
vmsumshs 9,8,13,31
vmsumubm 23,31,12,30
vmsumuhm 29,0,26,21
vmsumuhs 27,14,25,5
vmulesb 10,25,14
vmulesh 1,18,8
vmuleub 17,14,9
vmuleuh 5,26,9
vmulosb 21,18,6
vmulosh 4,5,8
vmuloub 2,9,19
vmulouh 29,5,4
vnmsubfp 8,2,6,5
vnor 31,9,10
vnor 25,31,31
vnot 25,31,
vor 23,7,2
vperm 0,28,22,25
vpkpx 16,25,17
vpkshss 12,16,17
vpkshus 1,19,23
vpkswss 25,7,13
vpkswus 4,24,10
vpkuhum 9,27,12
vpkuhus 22,10,25
vpkuwum 30,18,0
vpkuwus 7,3,22
vrefp 24,28
vrfim 17,19
vrfin 24,25
vrfip 3,5
vrfiz 8,10
vrlb 26,18,30
vrlh 16,17,25
vrlw 23,30,9
vrsqrtefp 2,18
vsel 20,14,18,10
vslb 25,25,12
vsldoi 9,9,12,7
vslh 14,2,11
vslo 30,5,6
vsl 22,30,9
vslw 26,26,3
vspltb 1,20,6
vsplth 16,18,3
vspltisb 25,-13
vspltish 22,10
vspltisw 13,13
vspltw 9,18,2
vsrab 14,22,0
vsrah 12,12,18
vsraw 2,2,13
vsrb 7,27,5
vsrh 7,11,29
vsro 18,30,31
vsr 2,9,28
vsrw 0,25,0
vsubcuw 24,2,10
vsubfp 22,24,20
vsubsbs 10,22,13
vsubshs 24,17,28
vsubsws 10,26,0
vsububm 16,11,24
vsububs 11,21,1
vsubuhm 6,12,24
vsubuhs 30,11,9
vsubuwm 19,20,13
vsubuws 18,25,6
vsum2sws 25,10,18
vsum4sbs 13,16,21
vsum4shs 23,8,4
vsum4ubs 28,13,30
vsumsws 22,10,8
vupkhpx 24,14
vupkhsb 2,22
vupkhsh 16,2
vupklpx 10,26
vupklsb 15,28
vupklsh 8,8
vxor 25,0,3

View file

@ -0,0 +1,60 @@
#as: -maltivec
#objdump: -dr -Maltivec
#name: Altivec ISA 2.07 instructions
.*: +file format elf(32)?(64)?-powerpc.*
Disassembly of section \.text:
0+00 <start>:
0: 7c 60 e2 0e lvepxl v3,0,r28
4: 7e 64 92 0e lvepxl v19,r4,r18
8: 7f 60 9a 4e lvepx v27,0,r19
c: 7c 39 92 4e lvepx v1,r25,r18
10: 7f e0 da 0a lvexbx v31,0,r27
14: 7f 81 62 0a lvexbx v28,r1,r12
18: 7f e0 72 4a lvexhx v31,0,r14
1c: 7e 30 fa 4a lvexhx v17,r16,r31
20: 7e c0 ea 8a lvexwx v22,0,r29
24: 7e f9 2a 8a lvexwx v23,r25,r5
28: 7c 60 66 0a lvsm v3,0,r12
2c: 7f 7d 0e 0a lvsm v27,r29,r1
30: 7c e0 36 ca lvswxl v7,0,r6
34: 7c f0 46 ca lvswxl v7,r16,r8
38: 7d c0 94 ca lvswx v14,0,r18
3c: 7f 9c 84 ca lvswx v28,r28,r16
40: 7f 60 66 8a lvtlxl v27,0,r12
44: 7f 7c 06 8a lvtlxl v27,r28,r0
48: 7e e0 cc 8a lvtlx v23,0,r25
4c: 7c 39 74 8a lvtlx v1,r25,r14
50: 7e 80 c6 4a lvtrxl v20,0,r24
54: 7e dd c6 4a lvtrxl v22,r29,r24
58: 7f 00 44 4a lvtrx v24,0,r8
5c: 7d b7 e4 4a lvtrx v13,r23,r28
60: 7d 9c 60 dc mvidsplt v12,r28,r12
64: 7d 5b 00 5c mviwsplt v10,r27,r0
68: 7f 60 6e 0e stvepxl v27,0,r13
6c: 7c 42 fe 0e stvepxl v2,r2,r31
70: 7c 60 56 4e stvepx v3,0,r10
74: 7f 7c 06 4e stvepx v27,r28,r0
78: 7d a0 33 0a stvexbx v13,0,r6
7c: 7d b9 1b 0a stvexbx v13,r25,r3
80: 7e c0 0b 4a stvexhx v22,0,r1
84: 7e 2e 53 4a stvexhx v17,r14,r10
88: 7e a0 db 8a stvexwx v21,0,r27
8c: 7f f2 0b 8a stvexwx v31,r18,r1
90: 7f 40 6f 8a stvflxl v26,0,r13
94: 7e cd af 8a stvflxl v22,r13,r21
98: 7c a0 4d 8a stvflx v5,0,r9
9c: 7e b8 0d 8a stvflx v21,r24,r1
a0: 7d a0 57 4a stvfrxl v13,0,r10
a4: 7d b1 cf 4a stvfrxl v13,r17,r25
a8: 7e 20 55 4a stvfrx v17,0,r10
ac: 7d 0c fd 4a stvfrx v8,r12,r31
b0: 7e 40 ef ca stvswxl v18,0,r29
b4: 7f 4e 47 ca stvswxl v26,r14,r8
b8: 7c 00 7d ca stvswx v0,0,r15
bc: 7d b7 3d ca stvswx v13,r23,r7
c0: 10 d1 84 03 vabsdub v6,v17,v16
c4: 12 b2 24 43 vabsduh v21,v18,v4
c8: 13 34 4c 83 vabsduw v25,v20,v9

View file

@ -0,0 +1,52 @@
start:
lvepxl 3,0,28
lvepxl 19,4,18
lvepx 27,0,19
lvepx 1,25,18
lvexbx 31,0,27
lvexbx 28,1,12
lvexhx 31,0,14
lvexhx 17,16,31
lvexwx 22,0,29
lvexwx 23,25,5
lvsm 3,0,12
lvsm 27,29,1
lvswxl 7,0,6
lvswxl 7,16,8
lvswx 14,0,18
lvswx 28,28,16
lvtlxl 27,0,12
lvtlxl 27,28,0
lvtlx 23,0,25
lvtlx 1,25,14
lvtrxl 20,0,24
lvtrxl 22,29,24
lvtrx 24,0,8
lvtrx 13,23,28
mvidsplt 12,28,12
mviwsplt 10,27,0
stvepxl 27,0,13
stvepxl 2,2,31
stvepx 3,0,10
stvepx 27,28,0
stvexbx 13,0,6
stvexbx 13,25,3
stvexhx 22,0,1
stvexhx 17,14,10
stvexwx 21,0,27
stvexwx 31,18,1
stvflxl 26,0,13
stvflxl 22,13,21
stvflx 5,0,9
stvflx 21,24,1
stvfrxl 13,0,10
stvfrxl 13,17,25
stvfrx 17,0,10
stvfrx 8,12,31
stvswxl 18,0,29
stvswxl 26,14,8
stvswx 0,0,15
stvswx 13,23,7
vabsdub 6,17,16
vabsduh 21,18,4
vabsduw 25,20,9

View file

@ -117,3 +117,7 @@ Disassembly of section \.text:
1ac: 7f bd eb 78 mdoio
1b0: 7f de f3 78 mdoom
1b4: 7f de f3 78 mdoom
1b8: 7d 40 e2 a6 mfppr r10
1bc: 7d 62 e2 a6 mfppr32 r11
1c0: 7d 80 e3 a6 mtppr r12
1c4: 7d a2 e3 a6 mtppr32 r13

View file

@ -108,3 +108,7 @@ power7:
or 29,29,29
mdoom
or 30,30,30
mfppr 10
mfppr32 11
mtppr 12
mtppr32 13

View file

@ -36,6 +36,7 @@ if { [istarget powerpc*-*-*] } then {
run_dump_test "altivec_xcoff64"
} else {
run_dump_test "altivec"
run_dump_test "altivec2"
run_dump_test "altivec_and_spe"
run_dump_test "booke"
run_dump_test "e500"

View file

@ -1,3 +1,10 @@
2012-10-05 Peter Bergner <bergner@vnet.ibm.com>
* ppc-dis.c (ppc_opts) <altivec>: Use PPC_OPCODE_ALTIVEC2;
* ppc-opc.c (VBA): New define.
(powerpc_opcodes) <vcuxwfp, vcsxwfp, vcfpuxws, vcfpsxsw, vmr, vnot,
mfppr, mfppr32, mtppr, mtppr32>: New extended mnemonics.
2012-10-04 Nick Clifton <nickc@redhat.com>
* v850-dis.c (disassemble): Place square parentheses around second

View file

@ -88,7 +88,7 @@ struct ppc_mopt ppc_opts[] = {
| PPC_OPCODE_A2),
0 },
{ "altivec", (PPC_OPCODE_PPC),
PPC_OPCODE_ALTIVEC },
PPC_OPCODE_ALTIVEC | PPC_OPCODE_ALTIVEC2 },
{ "any", 0,
PPC_OPCODE_ANY },
{ "booke", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE),

View file

@ -156,6 +156,9 @@ const struct powerpc_operand powerpc_operands[] =
/* The BB field in an XL form instruction when it must be the same
as the BA field in the same instruction. */
#define BBA BB + 1
/* The VB field in a VX form instruction when it must be the same
as the VA field in the same instruction. */
#define VBA BBA
{ 0x1f, 11, insert_bba, extract_bba, PPC_OPERAND_FAKE },
/* The BD field in a B form instruction. The lower two bits are
@ -3106,6 +3109,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"vmulesb", VX (4, 776), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
{"evlhhesplat", VX (4, 777), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, EVUIMM_2, RA}},
{"vcfux", VX (4, 778), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VB, UIMM}},
{"vcuxwfp", VX (4, 778), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VB, UIMM}},
{"evlhhousplatx",VX(4, 780), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
{"vspltisb", VX (4, 780), VXVB_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, SIMM}},
{"evlhhousplat",VX (4, 781), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, EVUIMM_2, RA}},
@ -3146,6 +3150,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"vcmpgtsh", VXR(4, 838,0), VXR_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
{"vmulesh", VX (4, 840), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
{"vcfsx", VX (4, 842), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VB, UIMM}},
{"vcsxwfp", VX (4, 842), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VB, UIMM}},
{"vspltish", VX (4, 844), VXVB_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, SIMM}},
{"vupkhpx", VX (4, 846), VXVA_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VB}},
{"mullhw", XRC(4, 424,0), X_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
@ -3159,11 +3164,13 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"vsraw", VX (4, 900), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
{"vcmpgtsw", VXR(4, 902,0), VXR_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
{"vctuxs", VX (4, 906), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VB, UIMM}},
{"vcfpuxws", VX (4, 906), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VB, UIMM}},
{"vspltisw", VX (4, 908), VXVB_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, SIMM}},
{"maclhwsu", XO (4, 460,0,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
{"maclhwsu.", XO (4, 460,0,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
{"vcmpbfp", VXR(4, 966,0), VXR_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
{"vctsxs", VX (4, 970), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VB, UIMM}},
{"vcfpsxsw", VX (4, 970), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VB, UIMM}},
{"vupklpx", VX (4, 974), VXVA_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VB}},
{"maclhws", XO (4, 492,0,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
{"maclhws.", XO (4, 492,0,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
@ -3234,6 +3241,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"vsubuwm", VX (4,1152), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
{"vavguw", VX (4,1154), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
{"vabsduw", VX (4,1155), VX_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}},
{"vmr", VX (4,1156), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VBA}},
{"vor", VX (4,1156), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
{"vcmpequw.", VXR(4, 134,1), VXR_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
{"udi2fcm.", APU(4, 579,0), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
@ -3268,6 +3276,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"vavgsb", VX (4,1282), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
{"evmhessfaaw", VX (4,1283), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
{"evmhousiaaw", VX (4,1284), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
{"vnot", VX (4,1284), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VBA}},
{"vnor", VX (4,1284), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
{"evmhossiaaw", VX (4,1285), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
{"udi4fcm.", APU(4, 643,0), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
@ -4818,6 +4827,8 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"mfdvlim", XSPR(31,339,883), XSPR_MASK, TITAN, PPCNONE, {RT}},
{"mfclcsr", XSPR(31,339,884), XSPR_MASK, TITAN, PPCNONE, {RT}},
{"mfccr1", XSPR(31,339,888), XSPR_MASK, TITAN, PPCNONE, {RT}},
{"mfppr", XSPR(31,339,896), XSPR_MASK, POWER7, PPCNONE, {RT}},
{"mfppr32", XSPR(31,339,898), XSPR_MASK, POWER7, PPCNONE, {RT}},
{"mfrstcfg", XSPR(31,339,923), XSPR_MASK, TITAN, PPCNONE, {RT}},
{"mfdcdbtrl", XSPR(31,339,924), XSPR_MASK, TITAN, PPCNONE, {RT}},
{"mfdcdbtrh", XSPR(31,339,925), XSPR_MASK, TITAN, PPCNONE, {RT}},
@ -5121,6 +5132,8 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"mtdvlim", XSPR(31,467,883), XSPR_MASK, TITAN, PPCNONE, {RS}},
{"mtclcsr", XSPR(31,467,884), XSPR_MASK, TITAN, PPCNONE, {RS}},
{"mtccr1", XSPR(31,467,888), XSPR_MASK, TITAN, PPCNONE, {RS}},
{"mtppr", XSPR(31,467,896), XSPR_MASK, POWER7, PPCNONE, {RS}},
{"mtppr32", XSPR(31,467,898), XSPR_MASK, POWER7, PPCNONE, {RS}},
{"mtummcr0", XSPR(31,467,936), XSPR_MASK, PPC750, PPCNONE, {RS}},
{"mtupmc1", XSPR(31,467,937), XSPR_MASK, PPC750, PPCNONE, {RS}},
{"mtupmc2", XSPR(31,467,938), XSPR_MASK, PPC750, PPCNONE, {RS}},