Commit graph

312 commits

Author SHA1 Message Date
Frank Ch. Eigler
da040f2a6c * Early check-in of tx3904 timer sim implementation for ECC.
It is not yet properly tested.
Thu Jun  4 15:37:33 1998  Frank Ch. Eigler  <fche@cygnus.com>
	* dv-tx3904tmr.c: New file - implements tx3904 timer.
	* dv-tx3904{irc,cpu}.c: Mild reformatting.
	* configure.in: Include tx3904tmr in hw_device list.
	* configure: Rebuilt.
	* interp.c (sim_open): Instantiate three timer instances.
	Fix address typo of tx3904irc instance.
1998-06-04 12:43:45 +00:00
Andrew Cagney
0e797366ef The r5900 doesn't have HI/LO DIV/MUL register problems. Hobble
checks on hi/lo usage but retain functions so that they can be used
for HI/LO stall counting code.
1998-06-04 08:46:56 +00:00
Ian Carmichael
4979c0a271 * Move the sanitize comments to the right place. 1998-06-02 21:04:49 +00:00
Ian Carmichael
8e3a0b599f * SYSCALL now uses exception vector.
* SKY: New memory mapping rules for k1seg, k0seg.
* Modified Files: ChangeLog.sky ChangeLog interp.c sim-main.c
1998-06-02 19:53:36 +00:00
Frank Ch. Eigler
29b5afe9af * Small TX39-only patch for ECC.
Mon Jun  1 18:18:26 1998  Frank Ch. Eigler  <fche@cygnus.com>
	* interp.c (decode_coproc): For TX39, add stub COP0 register #3,
	to allay warnings.
1998-06-01 16:29:43 +00:00
Jeff Law
fb0ea2b9e1 * r5900.igen (rsqrt.s): Update based on r5900 ISA manual version 2.1.
(sqrt.s): Likewise.
1998-06-01 16:29:42 +00:00
Andrew Cagney
df26156d68 Match mips*tx39 not mipst*tx39. 1998-05-29 01:42:20 +00:00
Andrew Cagney
ce82378189 Fix mips SWL on 64bit ISA when 32 bit word appears in second half of
64 bit bus.
Test.
1998-05-25 05:48:34 +00:00
Ron Unrau
aa81c3ca99 * Initial support for "sim list vif[01]" 1998-05-24 13:06:09 +00:00
Andrew Cagney
f872d0d643 Only enable H/W on some mips targets.
Move common hw-obj to Make-common
Pacify GCC
1998-05-22 05:23:04 +00:00
Andrew Cagney
32d41f6ddb Sanity clause 1998-05-22 02:08:26 +00:00
Gavin Romig-Koch
5e34097b8b gencode.c: Mark BEGEZALL as LIKELY. 1998-05-21 18:26:38 +00:00
Patrick Macdonald
fab0ee0d0b * interp.c: modified name of GIF device
* sky-gpuif.[ch]:  IMT burst support and queue manipulation ( see
	                   ChangeLog.sky for complete details )
	* sky-gs.c: modified name of GIF device
1998-05-21 15:41:35 +00:00
Andrew Cagney
26feb3a83d Fix sign extension on 32 bit add/sub instructions. 1998-05-21 09:32:07 +00:00
Andrew Cagney
8404825993 * interp.c (sim_fetch_register): Convert internal r5900 regs to
target byte order
1998-05-21 08:18:21 +00:00
Frank Ch. Eigler
3fa454e95f * Monster patch - may destablize MIPS sims for a little while.
* Followup patch for SCEI PR 15853
* First check-in of TX3904 interrupt controller devices for ECC. [sanitized]
* First implementation of MIPS hardware interrupt emulation.
Mon May 18 18:22:42 1998  Frank Ch. Eigler  <fche@cygnus.com>
	* configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
 	modules.  Recognize TX39 target with "mips*tx39" pattern.
	* configure: Rebuilt.
	* sim-main.h (*): Added many macros defining bits in
 	TX39 control registers.
	(SignalInterrupt): Send actual PC instead of NULL.
	(SignalNMIReset): New exception type.
	* interp.c (board): New variable for future use to identify
	a particular board being simulated.
	(mips_option_handler,mips_options): Added "--board" option.
	(interrupt_event): Send actual PC.
	(sim_open): Make memory layout conditional on board setting.
	(signal_exception): Initial implementation of hardware interrupt
 	handling.  Accept another break instruction variant for simulator
 	exit.
	(decode_coproc): Implement RFE instruction for TX39.
	(mips.igen): Decode RFE instruction as such.
start-sanitize-tx3904
	* configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
	* interp.c: Define "jmr3904" and "jmr3904debug" board types and
	bbegin to implement memory map.
	* dv-tx3904cpu.c: New file.
	* dv-tx3904irc.c: New file.
end-sanitize-tx3904
1998-05-18 15:55:05 +00:00
Gavin Romig-Koch
7d2c0e8c97 * r5900.igen: Replace the calls and the definition of the
function check_op_hilo_hi1lo1 with the pair
	check_mult_hilo_hi1lo1 and check_mult_hilo_hi1lo1.
1998-05-13 18:30:15 +00:00
Gavin Romig-Koch
afc5e7f23a * tx.igen (madd,maddu): Replace calls to check_op_hilo
with calls to check_div_hilo.
1998-05-13 18:14:09 +00:00
Gavin Romig-Koch
94dda41a0c * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
Replace check_op_hilo with check_mult_hilo and check_div_hilo.
	Add special r3900 version of do_mult_hilo.
	(do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
	with calls to check_mult_hilo.
	(do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
	with calls to check_div_hilo.
1998-05-13 14:00:56 +00:00
Andrew Cagney
1a89994e08 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
Document a replacement.
1998-05-12 05:36:47 +00:00
Frank Ch. Eigler
24abdc9d31 * Fixing typo that caused infinite loop upon PKE MPG. 1998-05-11 16:15:22 +00:00
Patrick Macdonald
55470cc7ef * Roll Alpha modifications into devo for sky-gpuif*/ sky-gs*/ interp.c
* Complete and informative details can be found in ChangeLog.sky
1998-05-07 19:14:28 +00:00
Frank Ch. Eigler
a1d609b4fe * Changes to sky PKE sim to calculate word-precision source-addresses
for VU memory tracking tables.

Thu May  7 12:15:41 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* sky-pke.c (pke_pcrel_operand_bits): Compute word-resolution
	source address for UNPACK into VU MEM.
	(pke_code_mpg): Ditto for MPG into VU uMEM.
1998-05-07 17:50:18 +00:00
Ron Unrau
c939ffeb80 Initial Breakpoint support:
* sim-main.h: (struct _sim_cpu): add cur_device field.
          Define cur_device values, breakpoint value, and SIM_ENGINE_HALT_HOOK
        * interp.c (sim_open): initialize cur_device
        * sky-engine.c (engine_run): use cur_device to set current_cpu
        * sky-libvpe.c (vpecallms_cycle): add check for breakpoint
        * sky-hardware.h: delete NUMBER_CPUS
        * sky-hardware.c (attach_devices): create a memory mapped comm
          area for GDB/SIM interactions

misc:
        * sky-vu.c ({read,write}_vu_misc_reg): do default behavior for
          unknown regs instead of sim_io_error. MP reg is float (was missing
          cast).
1998-05-07 14:36:42 +00:00
Doug Evans
eb00d70698 * sim-main.h (INSN_NAME): New arg `cpu'. 1998-05-07 02:45:07 +00:00
James Lemke
60372a3f96 * sim-main.h, sky-libvpe.c: r59fp_op* functions were called with
1st parm of wrong type.  Converted remaining "/" to "FDiv".
	* interp.c: Make "--float-type host" the default.
1998-04-29 21:17:53 +00:00
Geoffrey Noer
9d45df1b8c Tue Apr 28 18:28:58 1998 Geoffrey Noer <noer@cygnus.com>
* common/aclocal.m4: call AM_EXEEXT in SIM_AC_COMMON, define
        AM_CYGWIN32 and AM_EXEEXT.
        * common/Make-common.in: set EXEEXT, add missing EXEEXTs
        to run and install-common rules.
        * common/configure: regenerate

And update all subdirectory ChangeLogs and configure files.
1998-04-29 01:44:23 +00:00
Tom Tromey
5da9ce07eb * configure: Regenerated to track ../common/aclocal.m4 changes.
* config.in: Ditto.
	* acconfig.h: New file.
	* configure.in: Reverted change of Apr 24; use sinclude again.
1998-04-26 22:03:55 +00:00
Tom Tromey
b1df34b9ed * configure: Regenerated to track ../common/aclocal.m4 changes.
* config.in: Ditto.
	* configure.in: Don't call sinclude.
1998-04-24 20:39:48 +00:00
Andrew Cagney
ca61710bde * mips.igen (do_store_left): Pass 0 not NULL to store_memory. 1998-04-24 09:57:17 +00:00
James Lemke
aefd02b523 Move target specific stuff from sim/common/sim-base.h to sim/mips/sim-main.h 1998-04-22 20:41:04 +00:00
James Lemke
8c8dd0c471 r5900.igen, sim-main.h, sky-libvpe.c: Add run-time option --float-type 1998-04-21 21:33:44 +00:00
James Lemke
2b1d91ab62 configure.in, interp.c: Add configure option --with-sim-funit. 1998-04-21 21:24:24 +00:00
James Lemke
3e5fbf91b5 Add configure option --with-sim-funit for sim & gdb. 1998-04-21 21:14:09 +00:00
Jason Molenda
5fe24ce03a Fix sanitize tag. The proper keyword is "start-sanitize-*", not
"begin-sanitize-*".
1998-04-21 17:55:06 +00:00
Andrew Cagney
515125b709 Entry about changing sim_open missing from changelog. 1998-04-21 05:25:56 +00:00
Andrew Cagney
97f4d18341 Implement ERET instruction.
Add {signed,unsigned}_address type.
1998-04-21 04:30:27 +00:00
Andrew Cagney
421cbaae98 For new IGEN simulators, rewrite checks validating correct use of the
HI/LO registers.  For old gencode simulator, delete all checks.
1998-04-21 01:17:58 +00:00
Frank Ch. Eigler
f8998e7780 * Fixed data mangling problems in R5900 COP2 LQC2/SQC2 instructions. 1998-04-17 19:04:53 +00:00
Frank Ch. Eigler
fc4e5b84c8 * Adapted R5900 COP2 interface code to clarified micro-mode interlock
behavior.
1998-04-16 19:27:55 +00:00
Andrew Cagney
7d93d53871 o CVT.S.W and CVT.W.S were reversed
o When unpacking an r5900 FP value,
  was not treating IEEE-NaN's as very
  large values.
o When packing an r5900 FP result from an infinite
  precision intermediate value was saturating
  to IEEE-MAX instead of r5900-MAX
o The least significant bit of the FP status
  register did not stick to one.
1998-04-16 07:49:58 +00:00
Andrew Cagney
c58fa2cc43 TX19 uses igen by default. 1998-04-15 23:17:16 +00:00
Frank Ch. Eigler
46399a00e8 * Changes to make interp.c compile under mips64r5900-sky-elf target.
Wed Apr 15 12:41:18 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* interp.c (decode_coproc): Make COP2 branch code compile after
 	igen signature changes.
1998-04-15 19:02:04 +00:00
Andrew Cagney
74025eeea7 Re-fix 32 bit DSRAV instruction.
Fix mips16 BRANCH, unsigned ADD/SUB and SRAV instructions.
1998-04-15 14:04:01 +00:00
Andrew Cagney
f3bdd368ea Debug tx19 built from igen sources.
Rework ifetch{16,32} to match the more recent do_load function.
1998-04-15 07:23:28 +00:00
Ian Carmichael
ac137dc872 * Added interactive debugging for vector units, and a bunch of minor
* things.  See ChangeLog.sky for details.
*
* Modified Files:
*    .Sanitize ChangeLog.sky Makefile.in sky-libvpe.c sky-vu.c
*    sky-vu.h sky-vudis.c sky-vudis.h
* Added Files:
*    sky-indebug.c sky-indebug.h sky-interact.c sky-interact.h
*    sky-console.c sky-console.h
1998-04-14 19:58:36 +00:00
Andrew Cagney
c0a4c3ba17 Implement 32 bit MIPS16 instructions listed in m16.igen. 1998-04-14 14:34:48 +00:00
Frank Ch. Eigler
96a4eb30da * Fixed a one-character typo in COP2 instruction synthesis.
[ChangeLog]
	Mon Apr 13 16:28:52 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* interp.c (decode_coproc): Add proper 1000000 bit-string at top
	of VU lower instruction.
1998-04-13 20:31:29 +00:00
Frank Ch. Eigler
b0b39eb2de * Backed out week-old attempt at enabling quadword memory access on
MIPS sim; added PKE sim code fixes.  No COP2 testing progress today.

[ChangeLog]

Thu Apr  9 16:38:23 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* r5900.igen (LQC,SQC): Adapted code to DOUBLEWORD accesses
	instead of QUADWORD.

	* sim-main.h: Removed attempt at allowing 128-bit access.

[ChangeLog.sky]

Thu Apr  9 16:42:54 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* sky-pke.c (read_pke_pc): Corrected PKE PC calculation
	to word granularity.
1998-04-09 20:56:00 +00:00
Ian Carmichael
7dba069e20 * Fixed up blank lines in file. 1998-04-09 03:24:13 +00:00