old-cross-binutils/sim/mips
Frank Ch. Eigler 96a4eb30da * Fixed a one-character typo in COP2 instruction synthesis.
[ChangeLog]
	Mon Apr 13 16:28:52 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* interp.c (decode_coproc): Add proper 1000000 bit-string at top
	of VU lower instruction.
1998-04-13 20:31:29 +00:00
..
.Sanitize * Add sky-vudis.h, sky-vudis.c. 1998-04-08 20:14:44 +00:00
ChangeLog * Fixed a one-character typo in COP2 instruction synthesis. 1998-04-13 20:31:29 +00:00
config.in Get configure to define RETSIGTYPE 1997-04-07 05:58:59 +00:00
configure aclocal.m4: Don't enable inlining when cross-compiling. 1998-04-05 07:16:54 +00:00
configure.in aclocal.m4: Don't enable inlining when cross-compiling. 1998-04-05 07:16:54 +00:00
gencode.c * mips.igen (MSUB): Fix to work like MADD. 1997-12-11 00:11:04 +00:00
interp.c * Fixed a one-character typo in COP2 instruction synthesis. 1998-04-13 20:31:29 +00:00
m16.dc New files, update .Sanitize 1998-02-05 22:08:33 +00:00
m16.igen Separate r5900 specifoc and mips16 instructions. 1997-10-27 07:55:24 +00:00
Makefile.in * R5900 sky COP2 testing continuing. Today only small 1998-04-08 22:22:58 +00:00
mdmx.igen Add generic sim-info.c:sim_info() function using module mechanism. 1998-02-28 02:51:06 +00:00
mips.dc MIPS/IGEN checkpoint - doesn't build. 1997-10-08 04:16:01 +00:00
mips.igen * R5900 COP2 function nearly complete. PKE sim now aware of new GPUIF 1998-04-05 16:40:03 +00:00
README.Cygnus Document existence of old (gencode) and new (igen) MIPS ISA simulators. 1998-01-16 01:09:15 +00:00
sim-main.c aclocal.m4: Don't enable inlining when cross-compiling. 1998-04-05 07:16:54 +00:00
sim-main.h * Backed out week-old attempt at enabling quadword memory access on 1998-04-09 20:56:00 +00:00
sky-pke.c * Backed out week-old attempt at enabling quadword memory access on 1998-04-09 20:56:00 +00:00
sky-pke.h * R5900 COP2 function nearly complete. PKE sim now aware of new GPUIF 1998-04-05 16:40:03 +00:00
tconfig.in * Makefile.in: Delete stuff moved to ../common/Make-common.in. 1996-11-20 10:00:42 +00:00
tx.igen Re-do load/store operations so that they work for both 32 and 64 bit 1998-04-02 19:35:39 +00:00
vr4320.igen * interp.c (Max, Min): Comment out functions. Not yet used. 1998-03-24 23:16:57 +00:00
vr5400.igen For MADD et.al. instructions sign extend 32 bit result assigned to a 1997-12-13 04:23:31 +00:00

This directory contains two very different simulators:

	o	gencode (old)

		Gencode.c outputs a single monolithic file that is
		#included by interp.c

	o	igen (new)

		The *.igen files are used as inputs to ../igen/igen.
		A number of separate, fairly modula files, are created.

The new simulator has a number of advantages:

	o	builtin support for multi-simming (single simulator
		image supporting a number of different instruction
		set architectures).

	o	Easier maintenance. The input files are not confused
		by an intermixing with the generator code.

gencode continues to exist so that old architectures can be emulated.
*.igen should be used when adding new architectures or adding
instructions to an existing ISA.

Known bugs?

A mips16 simulator cannot be built using igen.  A custom mips16
engine.c needs to be written.

In mips.igen, the semantics for many of the instructions were created
using code generated by gencode.  Those semantic segments could be
greatly simplified.


----

Old README.Cygnus ...

> README.Cygnus
-------------------------------------------------------------------------------

The following are the main reasons for constructing the simulator as a
generator:

1) Avoid large fixed decode source file, with lots of #ifs controlling
   the compilation. i.e. keep the source cleaner, smaller and easier
   to parse.

2) Allow optimum code to be created, without run-time checks on
   instruction types. Ensure that the simulator engine only includes
   code for the architecture being targetted. e.g. This avoids
   run-time checks on ISA conformance, aswell as increasing
   throughput.

3) Allow updates to the instruction sets to be added quickly. Having a
   table means that the information is together, and is easier to
   manipulate. Having the table generate the engine, rather than the
   run-time parse the table gives higher performance at simulation
   time.

4) Keep all the similar simulation code together. i.e. have a single
   place where, for example, the addition code is held. This ensures that
   updates to the simulation are not spread over a large flat source
   file maintained by the developer.

-------------------------------------------------------------------------------

To keep the simulator simple (and to avoid the slight chance of
mis-matched files) the manifests describing an engine, and the
simulator engine itself, are held in the same source file.

This means that the engine must be included twice, with the first pass
controlled by the SIM_MANIFESTS definition.

-------------------------------------------------------------------------------
> EOF README.Cygnus