Fri Sep 4 10:37:57 1998 Frank Ch. Eigler <fche@cygnus.com>
* r5900.igen (mtsab): Correct typo in input register.
* sim-main.h (TMP_*): New macros for accessing local 128-bit
temporary for multimedia instructions.
* r5900.igen (*): Convert most instructions to use new TMP
macros to store output result during computation.
Hack sanitize so that it doesn't sanitize vrXXX when either of
keep-vr5400 or keep-vr4320 are specified.
Move two basic vr4100 instructions from mips.igen to vr.igen.
Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
* dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
register upon non-zero interrupt event level, clear upon zero
event value.
* dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
by passing zero event value.
(*_io_{read,write}_buffer): Endianness fixes.
* dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
(deliver_*_tick): Reduce sim event interval to 75% of count interval.
* interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
serial I/O and timer module at base address 0xFFFF0000.
It is not yet properly tested.
Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
* dv-tx3904tmr.c: New file - implements tx3904 timer.
* dv-tx3904{irc,cpu}.c: Mild reformatting.
* configure.in: Include tx3904tmr in hw_device list.
* configure: Rebuilt.
* interp.c (sim_open): Instantiate three timer instances.
Fix address typo of tx3904irc instance.
* Followup patch for SCEI PR 15853
* First check-in of TX3904 interrupt controller devices for ECC. [sanitized]
* First implementation of MIPS hardware interrupt emulation.
Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
* configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
modules. Recognize TX39 target with "mips*tx39" pattern.
* configure: Rebuilt.
* sim-main.h (*): Added many macros defining bits in
TX39 control registers.
(SignalInterrupt): Send actual PC instead of NULL.
(SignalNMIReset): New exception type.
* interp.c (board): New variable for future use to identify
a particular board being simulated.
(mips_option_handler,mips_options): Added "--board" option.
(interrupt_event): Send actual PC.
(sim_open): Make memory layout conditional on board setting.
(signal_exception): Initial implementation of hardware interrupt
handling. Accept another break instruction variant for simulator
exit.
(decode_coproc): Implement RFE instruction for TX39.
(mips.igen): Decode RFE instruction as such.
start-sanitize-tx3904
* configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
* interp.c: Define "jmr3904" and "jmr3904debug" board types and
bbegin to implement memory map.
* dv-tx3904cpu.c: New file.
* dv-tx3904irc.c: New file.
end-sanitize-tx3904
Replace check_op_hilo with check_mult_hilo and check_div_hilo.
Add special r3900 version of do_mult_hilo.
(do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
with calls to check_mult_hilo.
(do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
with calls to check_div_hilo.
* common/aclocal.m4: call AM_EXEEXT in SIM_AC_COMMON, define
AM_CYGWIN32 and AM_EXEEXT.
* common/Make-common.in: set EXEEXT, add missing EXEEXTs
to run and install-common rules.
* common/configure: regenerate
And update all subdirectory ChangeLogs and configure files.
o When unpacking an r5900 FP value,
was not treating IEEE-NaN's as very
large values.
o When packing an r5900 FP result from an infinite
precision intermediate value was saturating
to IEEE-MAX instead of r5900-MAX
o The least significant bit of the FP status
register did not stick to one.
[ChangeLog]
Mon Apr 13 16:28:52 1998 Frank Ch. Eigler <fche@cygnus.com>
* interp.c (decode_coproc): Add proper 1000000 bit-string at top
of VU lower instruction.
