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Author SHA1 Message Date
H.J. Lu
58abc3ebf6 2008-02-26 H.J. Lu <hongjiu.lu@intel.com> 
* gas/i386/jump.d: Updated for COFF.
 2008-02-26 16:18:16 +00:00
H.J. Lu
849830bdfb gas/testsuite/ 
2008-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/jump.s: Add tests for far branches.
	* gas/i386/jump16.s: Likewise.

	* gas/i386/jump.d: Updated.
	* gas/i386/jump16.d: Likewise.
	* gas/i386/x86-64-inval.l: Likewise.

	* gas/i386/x86-64-inval.s: Add tests for 16-bit near indirect
	branches.

opcodes/

2008-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Disallow 16-bit near indirect branches for
	x86-64.
	* i386-tbl.h: Regenerated.
 2008-02-23 17:29:17 +00:00
Nick Clifton
a696b49ec5 * gas/m68hc11/bug-1825.d: Update to match changes in the 
information generated with source-in-disassembly listings.
  * gas/m68hc11/indexed12.d: Likewise.
  * gas/m68hc11/insns-dwarf2.d: Likewise.
  * gas/m68hc11/lbranch-dwarf2.d: Likewise.
 2008-02-22 15:33:31 +00:00
H.J. Lu
785d276e24 Correct year. 2008-02-20 23:32:33 +00:00
H.J. Lu
b646068837 2008-02-18 H.J. Lu <hongjiu.lu@intel.com> 
* cfi/cfi.exp (gas_x86_64_check): New.
	(gas_x86_32_check): Likewise.
	Run 32bit and 64bit tests for x86 targets if they are supportd.
 2008-02-18 21:05:07 +00:00
Jan Beulich
192dc9c6fd gas/ 
2008-02-18  Jan Beulich  <jbeulich@novell.com>

	* config/tc-i386.c (match_template): Disallow 'l' suffix when
	currently selected CPU has no 32-bit support.
	(parse_real_register): Do not return registers not available on
	currently selected CPU.

gas/testsuite/
2008-02-18  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/att-regs.s, gas/i386/att-regs.d,
	gas/i386/intel-regs.s, gas/i386/intel-regs.d: New.
	* gas/i386/i386.exp: Run new tests.
 2008-02-18 08:44:38 +00:00
Nick Clifton
93ac268764 PR gas/5712 
* config/tc-arm.c (s_arm_unwind_save): Advance the input line
        pointer past the comma after parsing a floating point register
        name.

        * gas/arm/fp-save.s: New test.
        * gas/arm/fp-save.d: Expected disassembly.
 2008-02-14 16:35:51 +00:00
Adam Nemet
9579d38232 * gas/mips/branch-misc-2pic-64.d (#name): Have a unique name 
different from the branch-misc-2-64.d test.
 2008-02-13 17:22:43 +00:00
Jan Beulich
b7240065b3 gas/ 
2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* config/tc-i386.c (parse_real_register): Don't return 'FLAT'
	if not in Intel mode.
	(i386_intel_operand): Ignore segment overrides in immediate and
	offset operands.
	(intel_e11): Range-check i.mem_operands before use as array
	index. Filter out FLAT for uses other than as segment override.
	(intel_get_token): Remove broken promotion of "FLAT:" to mean
	"offset FLAT:".

gas/testsuite/
2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/intelok.s: Replace invalid offset expression with
	valid ones.
	* gas/i386/x86_64.s: Likewise.

opcodes/
2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* i386-opc.h (RegFlat): New.
	* i386-reg.tbl (flat): Add.
	* i386-tbl.h: Re-generate.
 2008-02-13 13:41:26 +00:00
Jan Beulich
34b772a651 gas/ 
2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* config/tc-i386.c (intel_e09): Also special-case 'bound'.

gas/testsuite/
2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/intelbad.s, gas/i386/intelok.s: Add 'bound' tests.
	* gas/i386/intelbad.l, gas/i386/intelok.l, gas/i386/intelok.e,
	gas/i386/opcode-intel.d: Adjust.

opcodes/
2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (a_mode): New.
	(cond_jump_mode): Adjust.
	(Ma): Change to a_mode.
	(intel_operand_size): Handle a_mode.
	* i386-opc.tbl: Allow Dword and Qword for bound.
	* i386-tbl.h: Re-generate.
 2008-02-13 13:29:31 +00:00
Jan Beulich
a60de03c61 gas/ 
2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* config/tc-i386.c (allow_pseudo_reg): New.
	(parse_real_register): Check for NULL just once. Allow all
	register table entries when allow_pseudo_reg is non-zero.
	Don't allow any registers without type when allow_pseudo_reg
	is zero.
	(tc_x86_regname_to_dw2regnum): Replace with ...
	(tc_x86_parse_to_dw2regnum): ... this.
	(tc_x86_frame_initial_instructions): Adjust for above change.
	* config/tc-i386.h (tc_regname_to_dw2regnum): Remove.
	(tc_parse_to_dw2regnum): New.
	(tc_x86_regname_to_dw2regnum): Replace with ...
	(tc_x86_parse_to_dw2regnum): ... this.
	* dw2gencfi.c (tc_parse_to_dw2regnum): New, broken out of ...
	(cfi_parse_reg): ... this. Use tc_parse_to_dw2regnum. Adjust
	error handling.

gas/testsuite/
2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* gas/cfi/cfi-i386.s: Add code testing use of all registers.
	Fix a few comments.
	* gas/cfi/cfi-x86_64.s: Likewise.
	* gas/cfi/cfi-i386.d, gas/cfi/cfi-x86_64.d: Adjust.

opcodes/
2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* i386-gen.c (process_i386_registers): Process new fields.
	* i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
	unsigned char. Add dw2_regnum and Dw2Inval.
	* i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
	register names.
	* i386-tbl.h: Re-generate.
 2008-02-13 10:14:40 +00:00
H.J. Lu
e8efc4d9fd 2002-02-12 H.J. Lu <hongjiu.lu@intel.com> 
* gas/i386/i386.exp: Run x86-64-arch-2 instead of
	x86-64-arch-10.

	* gas/i386/x86-64-arch-10.d: Removed.

	* gas/i386/x86-64-arch-2.d: New.
	* gas/i386/x86-64-arch-2.s: Likewise.
 2008-02-12 18:56:12 +00:00
H.J. Lu
a3ac9d5899 2008-02-12 H.J. Lu <hongjiu.lu@intel.com> 
* gas/i386/x86-64-xsave.d: Remove prefix.
 2008-02-12 15:35:29 +00:00
H.J. Lu
f03fe4c110 gas/ 
2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (cpu_arch): Add .xsave.
	(md_show_usage): Add .xsave.

	* doc/c-i386.texi: Add xsave to -march=.

gas/testsuite/

2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/arch-10.s: Add xgetbv.

	* gas/i386/arch-10.d: Updated.
	* gas/i386/arch-10-1.l: Likewise.
	* gas/i386/arch-10-2.l: Likewise.
	* gas/i386/arch-10-3.l: Likewise.
	* gas/i386/arch-10-4.l: Likewise.
	* gas/i386/x86-64-arch-10.d: Likewise.

opcodes/

2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c  (cpu_flag_init): Add CPU_XSAVE_FLAGS.
	* i386-init.h: Updated.
 2008-02-12 05:35:36 +00:00
H.J. Lu
475a2301db gas/testsuite/ 
2002-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run xsave, xsave-intel, x86-64-xsave
	and x86-64-xsave-intel.

	* gas/i386/x86-64-xsave-intel.d: New file.
	* gas/i386/x86-64-xsave.d: Likewise.
	* gas/i386/x86-64-xsave.s: Likewise.
	* gas/i386/xsave-intel.d: Likewise.
	* gas/i386/xsave.d: Likewise.
	* gas/i386/xsave.s: Likewise.

opcodes/

2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flags): Add CpuXsave.

	* i386-opc.h (CpuXsave): New.
	(Cpu64): Updated.
	(i386_cpu_flags): Add cpuxsave.

	* i386-dis.c (MOD_0FAE_REG_4): New.
	(RM_0F01_REG_2): Likewise.
	(MOD_0FAE_REG_5): Updated.
	(RM_0F01_REG_3): Likewise.
	(reg_table): Use MOD_0FAE_REG_4.
	(mod_table): Use RM_0F01_REG_2.  Add MOD_0FAE_REG_4.  Updated
	for xrstor.
	(rm_table): Add RM_0F01_REG_2.

	* i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
 2008-02-12 00:04:45 +00:00
Adam Nemet
0797561a54 * gas/mips/mips.exp: Invoke the tests smartmips, mips32-dsp, 
mips32-dspr2, mips64-dsp and mips32-mt with run_dump_test instead
	of run_dump_test_arches.
	* gas/mips/smartmips.d: Pass -mips32.
	* gas/mips/mips64-dsp.d: Pass -mips64r2.
	* gas/mips/mips32-dsp.d: Pass -mips32r2.
	* gas/mips/mips32-dspr2.d: Likewise.
	* gas/mips/mips32-mt.d: Likewise.
 2008-02-06 05:29:03 +00:00
Adam Nemet
61d4e56d1b * gas/mips/mips.exp: Call mips_arch_create for Octeon. Invoke 
Octeon tests.
	* gas/mips/octeon.s, gas/mips/octeon.d: New test.
 2008-02-04 19:19:43 +00:00
Bob Wilson
f8a52b5923 2008-01-31 Marc Gauthier <marc@tensilica.com> 
bfd/
	* config.bfd (xtensa*-*-*): Recognize processor variants.
gas/
	* configure.tgt (xtensa*-*-*): Recognize processor variants.
gas/testsuite/
	* gas/all/gas.exp: Recognize Xtensa processor variants.
	* gas/elf/elf.exp: Likewise.
	* gas/lns/lns.exp: Likewise.
ld/
	* configure.tgt (xtensa*-*-*): Recognize processor variants.
ld/testsuite/
	* ld-elf/merge.d: Recognize Xtensa processor variants.
	* ld-xtensa/coalesce.exp: Likewise.
	* ld-xtensa/lcall.exp: Likewise.
 2008-02-01 17:58:48 +00:00
H.J. Lu
2dc4cec1f3 binutils/ 
2008-01-28  H.J. Lu  <hongjiu.lu@intel.com>

	* dwarf.c: Include "elf/common.h".
	(eh_addr_size): Changed to int.
	(dwarf_regnames_i386): New.
	(dwarf_regnames_x86_64): Likewise.
	(dwarf_regnames): Likewise.
	(dwarf_regnames_count): Likewise.
	(init_dwarf_regnames): Likewise.
	(regname): Likewise.
	(frame_display_row): Properly support different address size.
	Call regname to get register name.
	(display_debug_frames): Call regname to get register name.
	Display DW_CFA_def_cfa_register as DW_CFA_def_cfa_register
	instead of DW_CFA_def_cfa_reg.

	* dwarf.h (init_dwarf_regnames): New.

	* objdump.c: Include "elf-bfd.h".
	(dump_dwarf): Call init_dwarf_regnames on ELF input.

	* readelf.c (guess_is_rela): Change argument to int.
	(parse_args): Remove the undocumented upper case options for
	-wX.
	(process_file_header): Call init_dwarf_regnames if
	do_dwarf_register is true.

gas/testsuite/

2008-01-28  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/cfi/cfi-alpha-1.d: Replace DW_CFA_def_cfa_reg with
	DW_CFA_def_cfa_register.
	* gas/cfi/cfi-alpha-3.d: Likewise.
	* gas/cfi/cfi-hppa-1.d: Likewise.
	* gas/cfi/cfi-i386.d: Likewise.
	* gas/cfi/cfi-m68k.d: Likewise.
	* gas/cfi/cfi-mips-1.d: Likewise.
	* gas/cfi/cfi-sh-1.d: Likewise.
	* gas/cfi/cfi-sparc-1.d: Likewise.
	* gas/cfi/cfi-sparc64-1.d: Likewise.
	* gas/cfi/cfi-x86_64.d: Likewise.

	* gas/cfi/cfi-common-1.d: Updated for i386/x86-64 register
	names.
	* gas/cfi/cfi-common-2.d: Likewise.
	* gas/cfi/cfi-common-5.d: Likewise.
	* gas/cfi/cfi-i386.d: Likewise.
	* gas/cfi/cfi-x86_64.d: Likewise.

ld/testsuite/

2008-01-28  H.J. Lu  <hongjiu.lu@intel.com>

	* ld-elf/eh1.d: Replace DW_CFA_def_cfa_reg with
	DW_CFA_def_cfa_register. Updated for i386/x86-64 register
	names.
	* ld-elf/eh2.d: Likewise.
	* ld-elf/eh3.d: Likewise.
	* ld-elf/eh4.d: Likewise.
	* ld-elf/eh5.d: Likewise.
 2008-01-28 15:15:32 +00:00
H.J. Lu
82c18208b8 gas/testsuite/ 
2008-01-24  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/x86-64-sib.s: Add tests for r12.

	* gas/i386/x86-64-sib-intel.d: Updated.
	* gas/i386/x86-64-sib.d: Likewise.

opcodes/

2008-01-24  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (OP_E_extended): Handle r12 like rsp.
 2008-01-24 15:11:35 +00:00
H.J. Lu
599121aa77 gas/ 
2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (md_show_usage): Replace tabs with spaces.

gas/testsuite/

2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp : Run x86-64-arch-1 and x86-64-arch-10.

	* gas/i386/x86-64-arch-1.d: New.
	* gas/i386/x86-64-arch-1.s: Likewise.
	* gas/i386/x86-64-arch-10.d: Likewise.

opcodes/

2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
	* i386-init.h: Regenerated.
 2008-01-23 19:05:12 +00:00
Tristan Gingold
73f4030dfa 2008-01-23 Tristan Gingold <gingold@adacore.com> 
* gas/ia64/regs.d: Updated as the ia64 disassembler now displays
        symbolic names for all ar registers.
 2008-01-23 08:57:11 +00:00
H.J. Lu
115c7c25fe gas/ 
2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (i386_target_format): Remove cpummx2.

gas/testsuite/

2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/arch-10.d: New.
	* gas/i386/arch-11.s: Likewise.
	* gas/i386/arch-12.d: Likewise.
	* gas/i386/arch-12.s: Likewise.

	* gas/i386/i386.exp: Run arch-11 and arch-12.

opcodes/

2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Remove CpuMMX2.
	(cpu_flags): Likewise.

	* i386-opc.h (CpuMMX2): Removed.
	(CpuSSE): Updated.

	* i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
 2008-01-22 19:57:30 +00:00
H.J. Lu
6305a20382 gas/ 
2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (XXX_PREFIX): Moved from tc-i386.h.
	(XXX_MNEM_SUFFIX): Likewise.
	(END_OF_INSN): Likewise.
	(templates): Likewise.
	(modrm_byte): Likewise.
	(rex_byte): Likewise.
	(DREX_XXX): Likewise.
	(drex_byte): Likewise.
	(sib_byte): Likewise.
	(processor_type): Likewise.
	(arch_entry): Likewise.
	(cpu_sub_arch_name): Remove const.
	(cpu_arch): Add .vmx and .smx.
	(set_cpu_arch): Append cpu_sub_arch_name.
	(md_parse_option): Support -march=CPU[,+EXTENSION...].
	(md_show_usage): Updated.

	* config/tc-i386.h (XXX_PREFIX): Moved to tc-i386.c.
	(XXX_MNEM_SUFFIX): Likewise.
	(END_OF_INSN): Likewise.
	(templates): Likewise.
	(modrm_byte): Likewise.
	(rex_byte): Likewise.
	(DREX_XXX): Likewise.
	(drex_byte): Likewise.
	(sib_byte): Likewise.
	(processor_type): Likewise.
	(arch_entry): Likewise.

	* doc/as.texinfo: Update i386 -march option.

	* doc/c-i386.texi: Update -march= for ISA.

gas/testsuite/

2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/arch-10-1.l: New.
	* gas/i386/arch-10-1.s: Likewise.
	* gas/i386/arch-10-2.l: Likewise.
	* gas/i386/arch-10-2.s: Likewise.
	* gas/i386/arch-10-3.l: Likewise.
	* gas/i386/arch-10-3.s: Likewise.
	* gas/i386/arch-10-4.l: Likewise.
	* gas/i386/arch-10-4.s: Likewise.
	* gas/i386/arch-10.d: Likewise.
	* gas/i386/arch-10.s: Likewise.

	* gas/i386/i386.exp: Run arch-10, arch-10-1, arch-10-2,
	arch-10-3 and arch-10-4.

	* gas/i386/nops-2.s: Use movsbl instead of cmove.
	* gas/i386/nops-2-i386.d: Updated.
	* gas/i386/nops-2-merom.d: Likewise.
	* gas/i386/nops-2.d: Likewise.
	* gas/i386/x86-64-nops-2.d: Likewise.

opcodes/

2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
	CPU_SMX_FLAGS.
	* i386-init.h: Regenerated.
 2008-01-22 19:16:45 +00:00
H.J. Lu
fd07a1c880 gas/testsuite/ 
2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/prescott.s: Add tests for movddup in Intel syntax.
	* gas/i386/x86-64-prescott.s: Likewise.

	* gas/i386/prescott.d: Updated.
	* gas/i386/x86-64-prescott.d: Likewise.

opcodes/

2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Use Qword on movddup.
	* i386-tbl.h: Regenerated.
 2008-01-16 00:05:56 +00:00
H.J. Lu
321fd21e2f gas/ 
2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (md_assemble): Also zap movzx and movsx
	suffix for AT&T syntax.

gas/testsuite/

2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.s: Add more tests for movsx and movzx.
	* gas/i386/x86_64.s: Likewise.

	* gas/i386/inval.s: Remove tests for movsxw and movzxw.

	* gas/i386/x86-64-inval.s: Remove tests for movsxb, movsxw,
	movsxl, movzxb and movzxw.

	* gas/i386/i386.d: Updated.
	* gas/i386/inval.l: Likewise.
	* gas/i386/x86_64.d: Likewise.
	* gas/i386/x86-64-inval.l: Likewise.

opcodes/

2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
	* i386-tbl.h: Regenerated.
 2008-01-15 18:50:44 +00:00
H.J. Lu
5c07affcae gas/ 
2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (match_reg_size): New.
	(match_mem_size): Likewise.
	(operand_size_match): Likewise.
	(operand_type_match): Also clear all size fields.
	(match_template): Skip Intel syntax when in AT&T syntax.
	Call operand_size_match to check operand size.
	(i386_att_operand): Set the mem field to 1 for memory
	operand.
	(i386_intel_operand): Likewise.

gas/testsuite/

2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.s: Add tests for movsx, movzx and movnti.
	* gas/i386/inval.s: Likewise.
	* gas/i386/x86_64.s: Likewise.
	* gas/i386/x86-64-inval.s: Likewise.

	* gas/i386/i386.d: Updated.
	* gas/i386/inval.l: Likewise.
	* gas/i386/x86_64.d: Likewise.
	* gas/i386/x86-64-inval.l: Likewise.

opcodes/

2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Add IntelSyntax.
	(operand_types): Add Mem.

	* i386-opc.h (IntelSyntax): New.
	* i386-opc.h (Mem): New.
	(Byte): Updated.
	(Opcode_Modifier_Max): Updated.
	(i386_opcode_modifier): Add intelsyntax.
	(i386_operand_type): Add mem.

	* i386-opc.tbl: Remove Reg16 from movnti.  Add sizes to more
	instructions.

	* i386-reg.tbl: Add size for accumulator.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
 2008-01-15 01:37:56 +00:00
H.J. Lu
7d5e4556a3 gas/testsuite/ 
2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/5534
	* gas/i386/i386.s: Add tests for fnstsw and fstsw.
	* gas/i386/inval.s: Likewise.
	* gas/i386/x86_64.s: Likewise.

	* gas/i386/intel.s: Use word instead of dword on ss.

	* gas/i386/x86-64-inval.s: Add tests for fnstsw, fstsw, in
	and out.

	* gas/i386/prefix.s: Remove invalid fstsw.

	* gas/i386/inval.l: Updated.
	* gas/i386/intelbad.l: Likewise.
	* gas/i386/i386.d: Likewise.
	* gas/i386/x86_64.d: Likewise.
	* gas/i386/x86-64-inval.l: Likewise.
	* gas/i386/prefix.d: Updated.

gas/

2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/5534
	* config/tc-i386.c (_i386_insn): Update comment.
	(operand_type_match): Also clear unspecified.
	(operand_type_register_match): Likewise.
	(parse_operands): Initialize unspecified.
	(i386_intel_operand): Likewise.
	(match_template): Check memory and accumulator operand size.
	(i386_att_operand): Clear unspecified on register operand.
	(intel_e11): Likewise.
	(intel_e09): Set operand size and clean unspecified for
	"XXX PTR".

opcodes/

2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/5534
	* i386-gen.c (operand_type_init): Add Dword to
	OPERAND_TYPE_ACC32.  Add Qword to OPERAND_TYPE_ACC64.
	(opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
	Qword and Xmmword.
	(operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
	Xmmword, Unspecified and Anysize.
	(set_bitfield): Make Mmword an alias of Qword.  Make Oword
	an alias of Xmmword.

	* i386-opc.h (CheckSize): Removed.
	(Byte): Updated.
	(Word): Likewise.
	(Dword): Likewise.
	(Qword): Likewise.
	(Xmmword): Likewise.
	(FWait): Updated.
	(OTMax): Likewise.
	(i386_opcode_modifier): Remove checksize, byte, word, dword,
	qword and xmmword.
	(Fword): New.
	(TBYTE): Likewise.
	(Unspecified): Likewise.
	(Anysize): Likewise.
	(i386_operand_type): Add byte, word, dword, fword, qword,
	tbyte xmmword, unspecified and anysize.

	* i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
	Tbyte, Xmmword, Unspecified and Anysize.

	* i386-reg.tbl: Add size for accumulator.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
 2008-01-12 16:05:42 +00:00
H.J. Lu
b5b1fc4fc8 gas/testsuite/ 
2008-01-10  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/nops.s: Add more tests with opcodes from 0x0f19
	to 0x0f1f.
	* gas/i386/x86-64-nops.s: Likewise.

	* gas/i386/nops.d: Updated.
	* gas/i386/x86-64-nops.d: Likewise.

opcodes/

2008-01-10  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
	(REG_0F18): Updated.
	(reg_table): Updated.
	(dis386_twobyte): Updated.  Use "nopQ" on 0x19 to 0x1e.
	(twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
 2008-01-10 14:52:35 +00:00
Bob Wilson
7ddd14deff gas/ 
* dwarf2dbg.c (out_sleb128): Delete.
	(size_fixed_inc_line_addr, emit_fixed_inc_line_addr): New.
	(out_fixed_inc_line_addr): Delete.
	(relax_inc_line_addr, dwarf2dbg_estimate_size_before_relax): Call new
	size_fixed_inc_line_addr if DWARF2_USE_FIXED_ADVANCE_PC is set.
	(dwarf2dbg_convert_frag): Likewise for emit_fixed_inc_line_addr.
	(process_entries): Remove calls to out_fixed_inc_line_addr.  When
	DWARF2_USE_FIXED_ADVANCE_PC is set, call relax_inc_line_addr.
	* read.h (emit_expr_fix): New prototype.
	* read.c (emit_expr): Move code to emit_expr_fix and use it here.
	(emit_expr_fix): New.
testsuite/
	* gas/lns/lns.exp: Run new lns-big-delta test for targets that set
	DWARF2_USE_FIXED_ADVANCE_PC.
	* gas/lns/lns-big-delta.s: New.
	* gas/lns/lns-big-delta.d: New.
 2008-01-09 17:30:59 +00:00
Nick Clifton
9396508db2 PR gas/5322 
* lib/gas-defs.exp (gas_host_run): Add fourth argument to regsub command.
 2008-01-08 08:37:13 +00:00
H.J. Lu
e1d4d8936f gas/ 
2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>

	* doc/c-i386.texi: Update .att_mnemonic and .intel_mnemonic.

	* config/tc-i386.c (set_intel_mnemonic): Set intel_mnemonic
	only.
	(md_assemble): Remove Intel mode workaround.
	(match_template): Check support for old gcc, AT&T mnemonic
	and Intel Syntax.
	(md_parse_option): Don't set intel_mnemonic to 0 for
	OPTION_MOLD_GCC.

gas/testsuite/

2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/intel.s: Add tests for fadd, faddp, fdiv, fdivp,
	fdivr, fdivrp, fmul, fmulp, fsub, fsubp, fsubr and fsubrp.

	* gas/i386/intel.d: Updated.
	* gas/i386/intel.e: Likewise.

opcodes/

2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
	ATTSyntax.

	* i386-opc.h (IntelMnemonic): Renamed to ..
	(ATTSyntax): This
	(Opcode_Modifier_Max): Updated.
	(i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
	and intelsyntax.

	* i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
	on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
	* i386-tbl.h: Regenerated.
 2008-01-05 17:07:25 +00:00
H.J. Lu
c6add5371c gas/testsuite/ 
2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/rexw.d: New.
	* gas/i386/rexw.s: Likewise.

	* gas/i386/x86-64-sse4_1-intel.d: Updated.
	* gas/i386/x86-64-sse4_1.d: Likewise.

opcodes/

2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
	pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
	* i386-tbl.h: Regenerated.
 2008-01-04 18:03:02 +00:00
Nick Clifton
b0e34bfe93 * config/tc-ppc.c (parse_cpu): Preserve the settings of the 
PPC_OPCODE_ALTIVEC and PPC_OPCODE_SPE flags.

* gas/ppc/altivec_and_spe.s: New test - checks that ISA extension
  command line options (-maltivec, -mspe) can be specified before
  CPU selection command line options.
* gas/ppc/altivec_and_spe.d: Expected disassembly.
* gas/ppc/ppc.exp: Run the new test
 2008-01-04 14:53:50 +00:00
H.J. Lu
3629bb00a8 gas/ 
2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/config/tc-i386.c (cpu_arch_flags_not): Removed.
	(cpu_flags_not): Likewise.
	(cpu_flags_match): Updated to check 64bit and arch.
	(set_code_flag): Remove cpu_arch_flags_not.
	(set_16bit_gcc_code_flag): Likewise.
	(set_cpu_arch): Likewise.
	(md_begin): Likewise.
	(parse_insn): Call cpu_flags_match to check 64bit and arch.
	(match_template): Likewise.

gas/testsuite/

2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/arch-9.d: New file.
	* gas/i386/arch-9.s: Likewise.

	* gas/i386/i386.exp: Run arch-9.

opcodes/

2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
	CpuSSE4_2_Or_ABM.
	(cpu_flags): Likewise.

	* i386-opc.h (CpuSSE4_1_Or_5): Removed.
	(CpuSSE4_2_Or_ABM): Likewise.
	(CpuLM): Updated.
	(i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.

	* i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
	Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
	and CpuPadLock, respectively.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
 2008-01-04 01:05:45 +00:00
H.J. Lu
e0329a2266 gas/testsuite/ 
2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/arch-5.d: New file.
	* gas/i386/arch-5.s: Likewise.
	* gas/i386/arch-6.d: Likewise.
	* gas/i386/arch-6.s: Likewise.
	* gas/i386/arch-7.d: Likewise.
	* gas/i386/arch-7.s: Likewise.
	* gas/i386/arch-8.d: Likewise.
	* gas/i386/arch-8.s: Likewise.

	* gas/i386/i386.exp: Run arch-5, arch-6, arch-7 and arch-8.

opcodes/

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
	CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
	CPU_SSE5_FLAGS.
	(cpu_flags): Add CpuSSE4_2_Or_ABM.

	* i386-opc.h (CpuSSE4_2_Or_ABM): New.
	(CpuLM): Updated.
	(i386_cpu_flags): Add cpusse4_2_or_abm.

	* i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
	CpuABM|CpuSSE4_2 on popcnt.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
 2008-01-03 05:29:53 +00:00
H.J. Lu
f2a9c676b7 gas/testsuite/ 
2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.s: Add tests for movq.
	* gas/i386/x86_64.s: Likewise.

	* gas/i386/i386.d Updated.
	* gas/i386/x86_64.d: Likewise.

opcodes/

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h: Update comments.
 2008-01-03 03:28:35 +00:00
H.J. Lu
582d5eddfe gas/ 
2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/5534
	* config/tc-i386.c (match_template): Handle XMMWORD_MNEM_SUFFIX.
	Check memory size in Intel mode.
	(process_suffix): Handle XMMWORD_MNEM_SUFFIX.
	(intel_e09): Likewise.

	* config/tc-i386.h (XMMWORD_MNEM_SUFFIX): New.

gas/testsuite/

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/5534
	* gas/i386/intel.s: Use QWORD on movq instead of DWORD.

	* gas/i386/inval.s: Add tests for movq.
	* gas/i386/x86-64-inval.s: Likewise.

	* gas/i386/inval.l: Updated.
	* gas/i386/x86-64-inval.l: Likewise.

opcodes/

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/5534
	* i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
	Byte, Word, Dword, QWord and Xmmword.

	* i386-opc.h (No_xSuf): New.
	(CheckSize): Likewise.
	(Byte): Likewise.
	(Word): Likewise.
	(Dword): Likewise.
	(QWord): Likewise.
	(Xmmword): Likewise.
	(FWait): Updated.
	(i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
	Dword, QWord and Xmmword.

	* i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
	used.
	* i386-tbl.h: Regenerated.
 2008-01-02 21:43:34 +00:00
H.J. Lu
6c7ac64e17 Move 2007 ChangeLog entries to ChangeLog-2007. 2008-01-02 21:41:02 +00:00
Catherine Moore
e7c604dd09 * gas/mips/jalr.s: New test. 
* gas/mips/jalr.l: New test output.
    * gas/mips/mips.exp: Run new test.
 2008-01-02 20:59:47 +00:00
H.J. Lu
14f13750ff Expect cvtsi2ssl instead of cvtsi2ss. 2007-12-31 16:02:07 +00:00
H.J. Lu
98b528ac84 gas/testsuite/ 
2007-12-31  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/inval.s: Add test for cvtsi2ss/cvtsi2sd.
	* gas/i386/simd.s: Likewise.
	* gas/i386/x86-64-simd.s: Likewise.

	* gas/i386/inval.l: Updated.
	* gas/i386/simd-intel.d: Likewise.
	* gas/i386/simd-suffix.d: Likewise.
	* gas/i386/simd.d: Likewise.
	* gas/i386/sse2.d: Likewise.
	* gas/i386/x86-64-opcode.d: Likewise.
	* gas/i386/x86-64-simd-intel.d: Likewise.
	* gas/i386/x86-64-simd-suffix.d: Likewise.
	* gas/i386/x86-64-simd.d: Likewise.

opcodes/

2007-12-31  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (prefix_table): Use "%LQ" on cvtpi2ps/cvtsi2sd.
	(putop): Handle '%' and "LQ".

	* i386-opc.tbl: Remove IgnoreSize from cvtpi2ps/cvtsi2sd.
	* i386-tbl.h: Regenerated.
 2007-12-31 15:42:22 +00:00
Dave Anglin
17b939cdc8 * gas/all/gas.exp: Skip relax test on hppa*-*-hpux*. 2007-12-29 01:57:08 +00:00
H.J. Lu
8d79a8c8d5 gas/testsuite/ 
2007-12-28  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/arch-1.d: New file.
	* gas/i386/arch-1.s: Likewise.
	* gas/i386/arch-2.d: Likewise.
	* gas/i386/arch-2.s: Likewise.
	* gas/i386/arch-3.d: Likewise.
	* gas/i386/arch-3.s: Likewise.
	* gas/i386/arch-4.d: Likewise.
	* gas/i386/arch-4.s: Likewise.

	* gas/i386/i386.exp: Run arch-1, arch-2, arch-3 and arch-4.

opcodes/

2007-12-28  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CpuSSE4_1_Or_5 to
	CPU_SSE4_1_FLAGS, CPU_SSE4_2_FLAGS and CPU_SSE5_FLAGS.
	(cpu_flags): Add CpuSSE4_1_Or_5.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

	* i386-opc.h (CpuSSE4_1_Or_5): New.
	(CpuLM): Updated.
	(i386_cpu_flags): Add cpusse4_1_or_5.

	* i386-opc.tbl: Use CpuSSE4_1_Or_5 instead of CpuSSE4_1|CpuSSE5
	on ptest roundpd, roundps, roundsd and roundss.
 2007-12-28 16:04:41 +00:00
H.J. Lu
1efbbeb461 gas/ 
2007-12-23  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (set_intel_mnemonic): New.
	(intel_mnemonic): Likewise.
	(old_gcc): Likewise.
	(OPTION_MMNEMONIC): Likewise.
	(OPTION_MSYNTAX): Likewise.
	(OPTION_MINDEX_REG): Likewise.
	(OPTION_MNAKED_REG): Likewise.
	(OPTION_MOLD_GCC): Likewise.
	(md_pseudo_table): Add .intel_mnemonic and .att_mnemonic.
	(match_template): Don't allow AT&T/Intel mnemonic if Intel/AT&T
	mnemonic is specified.  Don't allow old gcc support if old_gcc
	is 0.
	(md_longopts): Add -mmnemonic, -msyntax, -mindex-reg,
	-mmnaked-reg and -mold-gcc.
	(md_parse_option): Handle OPTION_MMNEMONIC, OPTION_MSYNTAX,
	OPTION_MINDEX_REG, OPTION_MNAKED_REG and OPTION_MOLD_GCC.

	* doc/c-i386.texi: Docoument -mmnemonic, -msyntax, --mnaked-reg
	and AT&T mnemonic vs. Intel mnemonic.

gas/testsuite/

2007-12-23  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/compat-intel.d: Pass -mmnemonic=att to assembler.
	* gas/i386/compat.d: Likewise.

	* gas/i386/i386.exp: Pass -mmnemonic=att to assembler for
	"float".  Pass -mold-gcc to assembler for  "general".

opcodes/

2007-12-23  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Add OldGcc, ATTMnemonic and
	IntelMnemonic.

	* i386-opc.h (OldGcc): New.
	(ATTMnemonic): Likewise.
	(IntelMnemonic): Likewise.
	(Opcode_Modifier_Max): Updated.
	(i386_opcode_modifier): Add oldgcc, attmnemonic and
	intelmnemonic.

	* i386-opc.tbl: Update fadd, fdiv, fdivp, fdivr, fdivrp, fmul,
	fsub, fsubp, fsubr and fsubrp with OldGcc, ATTMnemonic and
	IntelMnemonic.
	* i386-tbl.h: Regeneratd.
 2007-12-24 05:27:39 +00:00
H.J. Lu
9d14166966 binutils/ 
2007-12-22  H.J. Lu  <hongjiu.lu@intel.com>

	* doc/binutils.texi: Document the new intel-mnemonic and
	intel-mnemonic options for i386 disassembler.

gas/testsuite/

2007-12-22  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/compat-intel.d: New file.
	* gas/i386/compat.d: Likewise.
	* gas/i386/compat.s: Likewise.

	* gas/i386/i386.exp: Run compat.

opcodes/

2007-12-22  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (intel_mnemonic): New.
	(print_i386_disassembler_options): Display att-mnemonic and
	intel-mnemonic options.
	(print_insn): Handle att-mnemonic and intel-mnemonic.
	(float_reg): Replace SYSV386_COMPAT with "!M" and "M".
	(putop): Handle "!M" and "M".
 2007-12-22 14:06:31 +00:00
Bob Wilson
38f9cb7fe1 gas/ 
* config/tc-xtensa.c (xg_symbolic_immeds_fit): Relax for weak
	references but not weak definitions.
gas/testsuite/
	* gas/xtensa/all.exp: Run new weak-call test.
	* gas/xtensa/weak-call.d: New.
	* gas/xtensa/weak-call.s: New.
 2007-12-13 19:03:45 +00:00
Catherine Moore
8424d8f538 * bfd/elf.c (_bfd_elf_copy_private_symbol_data): Don't copy shndx if 
the symbol's section is the undefined section.
        * gas/testsuite/gas/elf/symtab.s: New test.
        gas/testsuite/gas/elf/symtab.d: New expected output.
        gas/testsuite/gas/elf/elf.exp: Run the new symbtab test.
 2007-12-11 13:13:59 +00:00
Richard Sandiford
742a56fee5 gas/ 
* config/tc-mips.h (mips_nop_opcode): Declare.
	(NOP_OPCODE): Define.
	(mips_segment_info): New structure.
	(TC_SEGMENT_INFO_TYPE): Use it instead of insn_label_list.
	* config/tc-mips.c (label_list): Adjust for new TC_SEGMENT_INFO_TYPE.
	(mips_record_mips16_mode): New function.
	(install_insn): Call it.
	(mips_align): Likewise.  Turn the fill argument into an "int *".
	Use frag_align_code for code segments if no fill data is given.
	(s_align): Adjust call accordingly.
	(mips_nop_opcode): New function.
	(mips_handle_align): Use the first variable byte to decide which
	nop sequence is needed.  Use md_number_to_chars and mips16_nop_insn.

gas/testsuite/
	* gas/mips/align2.s, gas/mips/align2.d, gas/mips/align2-el.d: New
	tests.
	* gas/mips/mips.exp: Run them.
 2007-12-10 10:36:00 +00:00
Bob Wilson
1bbb5f219c 2007-12-07 Bob Wilson <bob.wilson@acm.org> 
include/elf/
	* xtensa.h (R_XTENSA_32_PCREL): New.

bfd/
	* elf32-xtensa.c (elf_howto_table): Add R_XTENSA_32_PCREL.
	(elf_xtensa_reloc_type_lookup): Handle BFD_RELOC_32_PCREL.
	(elf_xtensa_check_relocs): Use default case for all relocations that
	need nothing done here.
	(elf_xtensa_do_reloc): Compute self_address for all relocation types.
	Handle R_XTENSA_32_PCREL.
	(elf_xtensa_relocate_section): Check for R_XTENSA_32_PCREL for dynamic
	symbols.
	(check_section_ebb_pcrels_fit): Ignore R_XTENSA_32_PCREL relocations.

gas/
	* config/tc-xtensa.c (O_pcrel): Define.
	(suffix_relocs): Add pcrel suffix.
	(md_pseudo_table): Add 4byte and 2byte directives.
	(xtensa_elf_cons): Pass correct pcrel argument to fix_new_exp.
	(xg_assemble_literal): Likewise.  Check for O_pcrel.
	(expression_maybe_register): Reorganize.  Handle BFD_RELOC_32_PCREL.
	(xg_valid_literal_expression): Allow O_pcrel.
	(md_pcrel_from, md_apply_fix): Handle BFD_RELOC_32_PCREL.
	(tc_gen_reloc): Fix punctuation in error message.

gas/testsuite/
	* gas/xtensa/all.exp: Run new pcrel test.
	* gas/xtensa/err-pcrel.s: New.
	* gas/xtensa/pcrel.d: New.
	* gas/xtensa/pcrel.s: New.
	* gas/xtensa/xtensa-err.exp: New.
 2007-12-07 22:52:10 +00:00