Commit graph

3360 commits

Author SHA1 Message Date
Mike Frysinger
abcee8fd25 sim: rx: fix warnings with AC_DEFINE
This lets `autoheader` work again.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-23 04:00:59 +00:00
Mike Frysinger
ac0aacdffa sim: sync build_warnings handling with gdb
The sim code gets the logic for SIM_AC_OPTION_WARNINGS from gdb, but
it hasn't been updated in a good long while.  Sync with the latest
gdb code.

There is a sim specific change in here: we disable -Werror for now.
This is because all sim code atm contains warnings.  Will probably
have to slowly add a white list of targets which can tolerate this
until everyone is updated.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-23 03:27:44 +00:00
Mike Frysinger
af209c380f sim: cris: update testsuite output after strsignal change 2012-03-21 04:50:01 +00:00
Mike Frysinger
5c73fae010 sim/testsuite/: split up arch-specific changelogs 2012-03-21 04:46:59 +00:00
Mike Frysinger
565904581b sim: bfin: add exhaustive parallel-insn tests 2012-03-19 05:39:45 +00:00
Mike Frysinger
5f2804c950 sim: bfin: unify se_all*opcodes tests
The current se_all*opcodes tests are very similar in how they work.
In preparation for adding more tests along these lines, unify the
common bits into a framework that others can include and build off
of easily.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-19 05:34:30 +00:00
Mike Frysinger
6aafca16ed sim: bfin: add tests for new shift behavior 2012-03-19 05:25:50 +00:00
Mike Frysinger
dbe9145095 sim: bfin: add tests for new shift behavior 2012-03-19 05:17:50 +00:00
Mike Frysinger
e62bb22a4b sim: bfin: fix corner case Logical shift issues
From: Robin Getz <robin.getz@analog.com>

Overflow with shift operations happens independently of saturation, but
we have the logic merged.  Extend the lshift function so that callers
can tell it when to handle each independently, and then do so when it's
needed.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-19 05:06:23 +00:00
Mike Frysinger
509deab2dc sim: use character classes rather than ranges
A-Z ranges don't work in all locales, so use character classes instead.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-19 04:54:48 +00:00
Mike Frysinger
9a5e0c494c sim: nrun: decode signal when crashing
This isn't entirely correct in that it assumes the signal numbering of
the target and host match, but seeing as we already make that assumption
in a few places, this patch doesn't make the situation any worse.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-19 03:58:36 +00:00
Mike Frysinger
026789b1f8 sim: tests: ignore generated tests 2012-03-19 03:51:09 +00:00
Mike Frysinger
8dbfaed8e2 sim: bfin: ebiu_amc: push down hardcoded base addresses
To make it easier to support ebiu banks at other addresses, move the base to
a runtime parameter rather than structure.  Future work will make this more
dynamic, but I'm waiting for more details first.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-19 03:09:20 +00:00
Mike Frysinger
191a54be54 sim: bfin: import optimizations from 32bit test into 16bit test
The 32bit allopcodes test had quite a bit of optimization added to it
so that it ran in a reasonable amount of time out of uncached memory.
Port those changes over to the 16bit test so the two share common code.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-19 02:49:18 +00:00
Mike Frysinger
410bbc9498 sim: bfin: use ARRAY_SIZE
Rather than hardcode the constant, use ARRAY_SIZE to get it.  Should be no
functional changes here.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-19 01:16:25 +00:00
Mike Frysinger
51e40b125f sim: ppc: fix compilation on AIX 7.1 due to st_pad name collisions
AIX 7.1 defines st_pad[123] to st_[amc]tim.tv_pad, respectively,
breaking declaration of st_pad[123] members in struct solaris_stat.
Undefine them as this is no less terrible than other solutions (like
renaming the fields and losing the binding to Solaris' names).

From: Michael Haubenwallner <haubi@s01en24.gentoo.org>
2012-03-14 05:04:18 +00:00
Mike Frysinger
84de2f06d8 sim: bfin: drop old linux/mii.h workarounds
We had some workarounds for old linux/mii.h headers, but it breaks with
newer ones.  So tweak the checks a bit to work with newer ones.  We'll
worry about older systems once someone complains.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-04 19:56:57 +00:00
Kevin Buettner
d98bfeb023 Update rx sim so that it'll print load statistics. 2012-03-03 01:23:45 +00:00
Kevin Buettner
f95586a44d Update sim_fetch_register, sim_store_register for sh and mn10300.
Fix compile warnings for sh built on 64-bit hosts.
2012-02-16 23:17:27 +00:00
Kevin Buettner
9058f767a5 Add support to GDB for the Renesas rl78 architecture. 2012-02-04 06:05:50 +00:00
Mike Frysinger
96cdfef033 sim: headers: use abs_srcdir to find helper scripts
Trying to run `headers` in an out-of-tree build fails atm due to the
relative srcdir paths being used in a location other than where they
were setup to be used from.  Get abs_srcdir from configure and use
that instead where applicable.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-01-06 06:43:48 +00:00
Joel Brobecker
c5a5708100 Copyright year update in most files of the GDB Project.
gdb/ChangeLog:

        Copyright year update in most files of the GDB Project.
2012-01-04 08:28:28 +00:00
Joel Brobecker
12c3e59c33 Update the copyright header of various files...
... to follow the correct syntax (according to the gospel of
gnulib's update-copyright). In other words:
  - no comma after the last year;
  - FSF spelled exactly "Free Software Foundation, Inc.", with
    the comma and the period at the end.

sim/common/ChangeLog:

	* dv-sockser.h, sim-assert.h, sim-fpu.c: Reformat the copyright
	header.

sim/m32c/ChangeLog:

	* blinky.S, gloss.S, sample.S: Reformat copyright header.

sim/mn10300/ChangeLog:

	* sim-main.h: Reformat copyright header.

sim/ppc/ChangeLog:

	* dp-bit.c: Reformat copyright header.

gdb/ChangeLog:

        * gdb/common/gdb_thread_db.h, gdb/dbxread.c, gdb/environ.c,
        gdb/gcore.h, gdb/rs6000-tdep.h, gdb/s390-nat.c, gdb/tic6x-tdep.c:
        Reformat the copyright header.

gdb/gdbserver/ChangeLog:

	* terminal.h: Reformat copyright header.

gdb/testsuite/ChangeLog:

	* dg-extract-results.sh, gdb.arch/gcore.c, gdb.arch/gdb1558.c,
	gdb.arch/i386-gnu-cfi.c, gdb.base/complex.c, gdb.base/cvexpr.c,
	gdb.base/gcore.c, gdb.base/gdb1555-main.c, gdb.base/gdb1555.c,
	gdb.base/gdb1821.c, gdb.base/long_long.c, gdb.base/restore.c,
	gdb.base/sepdebug.c, gdb.base/type-opaque-lib.c,
	gdb.base/type-opaque-main.c, gdb.cp/maint.exp, gdb.cp/namespace1.cc,
	gdb.cp/pr9631.cc, gdb.cp/psmang1.cc, gdb.cp/psmang2.cc,
	gdb.cp/try_catch.cc, gdb.cp/virtfunc.cc, gdb.hp/gdb.base-hp/reg.exp,
	gdb.mi/basics.c, gdb.mi/mi-stack.c, gdb.mi/mi-var-child.c,
	gdb.mi/mi2-var-child.exp, gdb.mi/var-cmd.c,
	gdb.threads/thread_check.c: Reformat copyright header.
2012-01-02 15:37:37 +00:00
Mike Frysinger
b909d38dfa sim: erc32: fix linking against local readline on modern (ncurses) systems
The current erc32 configure script only searches for -ltermcap to provide
any termcap funcs (which readlines needs).  When building against a local
readline (which is static), we hit link failures like so:
  gcc ...-I/-D flags... -o sis \
    sis.o exec.o erc32.o func.o help.o float.o \
    ../../bfd/libbfd.a ../../opcodes/libopcodes.a \
    ../../libiberty/libiberty.a -lz -lnsl \
    ../../readline/libreadline.a -lm
  ../../readline/libreadline.a(display.o): In function 'cr':
  .../readline/display.c:2486: undefined reference to 'tputs'
  collect2: ld returned 1 exit status
  make[2]: *** [sis] Error 1

Use AC_SEARCH_LIBS from gdb's configure.ac as suggested by Joel Brobecker
to check for additional termcap providers.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-12-31 07:06:47 +00:00
Mike Frysinger
9220438ca5 sim: cr16: add ifdefs around undefined syscalls
The cr16 libgloss port does not define these syscall numbers, so trying
to use them results in build failures [1].  The cr16 code already uses
ifdefs around a bunch of syscalls, so extend that style to cover the
ones that are currently missing.  Now we can at least compile.

[1] http://sourceware.org/ml/gdb-patches/2011-06/msg00118.html
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-12-30 09:12:36 +00:00
Joel Brobecker
96987c2b7f Work around Solaris bourne shell limitation when building the sim
Building the sim on a sparc-solaris 2.8 machine fails when configured
with no extra sim hardware:

> for hw in  ; do \
>         echo "extern const struct hw_descriptor
>         dv_${hw}_descriptor[];" ; \
>       done >> tmp-hw.h
> echo 'const char version[] = "'"`sed q
> /[...]/../../gdb/version.in`"'";'
> >> version.c-tmp
> /bin/sh: -c: line 1: syntax error near unexpected token `;'
> /bin/sh: -c: line 1: `for hw in  ; do \'
> make[3]: *** [hw-config.h] Error 2

The same thing happens with the version of bash that we got from
Sun as well (which is very old: 2.03.0(1)-release).

The problems comes from the fact that both shells are buggy, and
reject the following script:

    for hw in ; do
      [...]
    done

The above is what sim/common/Makefile.in tries to execute when
generating hw-config.h.

In order to allow users to build out of the box on these machines,
this patch works around this bug.  It does rely on the fact that
none of the tokens in SIM_HW contain whitespaces.

sim/common/ChangeLog:

        * Make-common.in (hw-config.h): Work around bug in Solaris 2.8
        system bourne shell.
2011-12-19 04:33:39 +00:00
Mike Frysinger
cc5add8c1c sim: bfin: lookup target strings when tracing system calls
Parsing target addresses is hard if not generally useless, so use the new
cb_get_string function to lookup the associated strings as well.  Now the
trace output is quickly useful instead of just marginally so.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-12-03 19:05:15 +00:00
Mike Frysinger
7171232768 sim: export cb_get_string for people to use
The common sim code provides a useful "get_string" function which reads
a C string out of the target's memory space.  So rename and export it
for other people to use.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-12-03 18:39:43 +00:00
Mike Frysinger
db2e4d67e7 sim: generate build dependencies on the fly
Lift the code that GDB is using to generate dependencies on the fly and
port it over to the sim.  Now people shouldn't have to manually maintain
these in their Makefile's.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-12-03 18:23:51 +00:00
Joel Brobecker
c36260c737 Record Mike Frysinger as a sim Global Maintainer.
sim/ChangeLog:

	* maintainers (global maintainers): new section.  add mike
	frysinger.
2011-11-29 06:25:05 +00:00
DJ Delorie
87326c782a [sim]
* configure.tgt: Add rl78 support.
* configure: Regenerate.
* rl78: New directory.
* MAINTAINERS: Add myself as RL78 maintainer.
[gdb]
* NEWS: Mention RL78 simulator.
2011-11-29 03:49:09 +00:00
Mike Frysinger
a13852d936 sim: dv-cfi: check for posix_fallocate
Some systems (like OS X) do not have posix_fallocate.  Add a configure
check for it before we try to use it.  This is less work than trying
to support old systems.

URL: http://sourceware.org/bugzilla/show_bug.cgi?id=13161
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-11-07 16:28:52 +00:00
Mike Frysinger
481d79819e sim: mn10300: fix typo in if check
The code looks like it should be doing a bit check, not logical.

URL: http://sourceware.org/bugzilla/show_bug.cgi?id=9302
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-11-07 16:26:05 +00:00
Tom Tromey
c35599f82f 2011-02-11 Ben Golding <ben_golding@yahoo.co.uk>
* events.c: add #include <stdlib.h> for free(). Fix PR build/13372.
2011-11-03 15:48:17 +00:00
Mike Frysinger
4399a56be2 sim: dv-cfi: check for log2 support in libm when enabled
The dv-cfi model uses log2() internally, so make sure we automatically
link in libm when required.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-10-19 21:28:27 +00:00
Joel Brobecker
f1a81b376a [sim]: Only print the profile info title once.
sim/common/ChangeLog:

        From John Wehle  <john@feith.com>  (tiny patch)
	* sim-profile.c (profile_info): Only print the title once.
2011-10-19 00:54:03 +00:00
Mike Frysinger
9c082ca86e sim: rename common/aclocal.m4 to common/acinclude.m4
Automake likes to dump macros automatically used into the aclocal.m4
file, but the common/aclocal.m4 naming prevents that.  So rename it
to the more normal "acinclude.m4" so the aclocal tool can work.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-10-18 00:31:00 +00:00
Mike Frysinger
6ffe910a7e sim: move from common.m4 to SIM_AC_COMMON
Now that the sourceware tree generally requires autoconf-2.64, update
the sim tree to require that too.

This allows us to drop the long standing SIM_AC_COMMON/common.m4
workaround as autoconf 2.64+ seems to work for me.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-10-18 00:17:24 +00:00
Mike Frysinger
783981cfd6 sim: testsuite: regenerate configure
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-10-18 00:16:14 +00:00
Tom Tromey
59c0b43d75 2011-10-14 Alexey Makhalov <makhaloff@gmail.com>
* sim-alu.h (ALU32_AND): Clear carry flag.
	(ALU32_AND): Clear carry flag.
2011-10-14 19:31:46 +00:00
Mike Frysinger
66f8d9935e sim: dv-cfi: include stdbool.h
The dv-cfi code uses the bool type but doesn't include the stdbool.h
header.  I didn't notice for Blackfin targets as the core Blackfin
header will include stdbool.h, but most targets don't do this.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-10-10 02:41:54 +00:00
Mike Frysinger
d56a2aaedd sim: dv-cfi: include common headers only
The "devices.h" header is Blackfin-specific, so trying to build dv-cfi
for any other target fails.  Include the specific hw headers this file
needs directly.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-10-10 02:41:07 +00:00
Mike Frysinger
4a99173dc3 sim: merge changes from common.m4 back into SIM_AC_COMMON
Seems some fixes were added to the common.m4 file but not the
SIM_AC_COMMON macro.  Keep the two in sync since they're supposed
to be the same thing.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-10-05 02:32:25 +00:00
Mike Frysinger
39c1f96aef sim: bfin: use store buffer for VIT_MAX insns
The VIT_MAX insns can be used in parallel, so we need to use the store
buffer so we don't clobber the output register before we get a chance
to do a memory store with it.

Reported-by: Kai Iskratsch <kai@stella.at>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-09-29 03:19:47 +00:00
Mike Frysinger
10915d9a18 sim: include sim-options.h for command prototype
The sim_args_command prototype is in sim-options.h, so pull it in
directly rather than assuming a common header does it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-12 20:21:28 +00:00
Mike Frysinger
6304252490 sim: fix broken skel configure.ac example
Shell code before AC_INIT will be silently culled, and since the common
aclocal.m4 includes inline shell code, the file cannot be included before
AC_INIT.  So update the example to show people including the file after
that rather than before to avoid random breakage.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-12 20:20:32 +00:00
Mike Frysinger
24a6c33d74 sim: use AC_REQUIRE with AC_PROG_CC
The autoconf guys point out that our usage of AC_PROG_CC in the
SIM_AC_COMMON does not jive with their intended use.
	http://www.gnu.org/software/autoconf/manual/autoconf.html#Expanded-Before-Required

So utilize AC_REQUIRE to make the warnings go away and generate
the correct code with different autoconf versions.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-12 20:19:49 +00:00
Mike Frysinger
89ab8a15e5 sim: m32c/rx: rename configure.in to match rest of the tree
The sim dir has 30 configure.ac files and 2 configure.in files.
So rename the minority to be consistent.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-11 19:00:17 +00:00
Mike Frysinger
31a27ee801 sim: m32c/rx: fix typo in copyright updating 2011-07-11 18:45:45 +00:00
Hans-Peter Nilsson
ae9cd41118 * ld-insn.c (print_insn_words): For fields, print conditionals. 2011-07-08 08:37:27 +00:00
Hans-Peter Nilsson
f72344f7a1 Tweak heading of last entry 2011-07-08 06:26:14 +00:00
Hans-Peter Nilsson
af34255838 Correct handling of constant fields.
* gen.c (insn_field_cmp): Tweak comment about neither field
	being an insn_field_string with a cond_eq-to-value condition.
	(insns_bit_useless) <case insn_field_string, case
	decode_find_mixed>: Handle cond_eq-to-value fields as
	insn_field_int.
	* gen-idecode.c (print_idecode_validate): Handle
	insn_field_string cond-equal-to-value fields as insn_field_int.
	* gen-icache.c (print_icache_body): Add comment why constant
	string fields are handled.
2011-07-08 06:24:11 +00:00
Hans-Peter Nilsson
3faa01e34f * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
$(SIM_EXTRA_DEPS).
2011-07-08 03:41:13 +00:00
Hans-Peter Nilsson
31b28250dc * Makefile.in (tmp-mach-multi): Exit early when igen fails. 2011-07-08 03:18:56 +00:00
Hans-Peter Nilsson
7e60d30187 Remove all #if 0'd code.
* filter.c: Remove #if 0'd function it_is.
	(main): Remove #if 0'd code.
	* gen-engine.c: Remove #if 0'd functions print_jump,
	print_jump_insn, print_jump_definition,
	print_jump_internal_function, print_jump_body.
	(gen_engine_c): Remove #if 0'd code.
	* gen-idecode.c: Remove #if 0'd functions print_jump print_jump,
	print_jump_insn, print_jump_definition,
	print_jump_internal_function, print_jump_until_stop_body.
	* gen-model.c: Remove #if 0'd functions model_c_or_h_data,
	model_c_or_h_function, gen_model_h, model_c_insn,
	model_c_function, gen_model_c and types model_c_passed_data
	and struct _model_c_passed_data.
	* gen.c: Remove #if 0'd type constant_field_types and function
	insn_field_is_constant.
	(gen_entry_find_opcode_field): Remove #if 0'd code.
	* ld-insn.c (parse_insn_model_record): Remove #if 0'd code.
	* misc.h (STRDUP, STRNDUP): Remove #if 0'd macros.
2011-07-08 02:27:18 +00:00
Hans-Peter Nilsson
26e0f8dbd8 * MAINTAINERS: Remove Thiemo Seufer. 2011-07-08 01:43:09 +00:00
Mike Frysinger
2419798b80 sim: start a unified sim_do_command
Since sim_do_command for many people simply calls sim_args_command, start
a unified version of it.  For people who handle their own options, they
could switch to this by using sim_add_option_table instead.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-05 19:06:38 +00:00
Mike Frysinger
a931db6a07 sim: bfin: implement stat_map for virtual environments (libgloss)
The stat syscalls cannot work without a stat map, so declare one that
matches libgloss for virtual environments.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-01 21:53:03 +00:00
Nick Clifton
9294f12bf1 PR sim/12737
* sim/arm/iwmmxt/wcmpgt.cgs: Remove expectation of failure.
	* sim/arm/iwmmxt/wmac.cgs: Remove expectation of failure.
	* sim/arm/iwmmxt/wsra.cgs: Remove expectation of failure.
	* sim/arm/xscale/blx.cgs: Remove expectation of failure.
2011-07-01 12:15:17 +00:00
Nick Clifton
161fc45276 PR sim/12737
* iwmmxt.c (WCMPGT): Sign extend 32-bit values before performing a
	signed compare.
	(WMAC): Extend computed result before adding to result register.
	(WRSA): Sign extend 32-bit values before shifting.
2011-07-01 12:12:16 +00:00
Mike Frysinger
ce2486ab20 sim: bfin: pass up result2/errcode with libgloss syscalls
Now that the Blackfin libgloss code extracts the 2nd result and the
error code from the R1/R2 registers, have the sim fill them up.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-22 04:21:29 +00:00
Nick Clifton
be07a3d39e * am33.igen (sub Rm,Rn,Rd): Fix computation of carry flag. 2011-06-20 16:50:51 +00:00
Mike Frysinger
1f20b1457b sim: bfin: set ASTAT AV/AVS when shifting accumulators overflow
The LSHIFT/ASHIFT insns that work with accumulators lacked AV/AVS
handling in the ASTAT register, so add it to match the hardware.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-18 22:03:10 +00:00
Mike Frysinger
b4876e0485 sim: bfin: do not touch ASTAT[V] when shifting accumulators
If we're shifting accumulators, we don't want to touch the V bit in
ASTAT, so add size checks to the ashiftrt/lshiftrt helpers.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-18 21:59:38 +00:00
Mike Frysinger
d5fcd950e4 sim: bfin: do not extend accumulator in LSHIFT insns
The logical shift insn does not sign extend before shifting, so
we shouldn't either.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-18 21:58:08 +00:00
Mike Frysinger
a56a195412 sim: bfin: tweak saturation handling with TFU/FU modes and MM bit
This too should have been squashed into an earlier change.  It covers
a few more cases in the V/VS saturation patch when working with TFU
and FU modes of dsp insns.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-18 21:22:50 +00:00
Mike Frysinger
90e13d65c1 sim: bfin: handle large shift values with accumulator shift insns
When the shift magnitude exceeds 32 bits, the values rotate around (since
the hardware is actually a barrel shifter).  So handle this edge case,
update the corresponding AV bit in ASTAT which was missing previously,
and tweak the AZ setting based on how the hardware behaves.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-18 20:59:54 +00:00
Mike Frysinger
99dcc4dc65 sim: bfin: handle odd shift values with shift insns
The shift magnitude is a 5-bit signed value.  When it is between 0 and
15, then we do the requested shift, but when it is outside of that, we
have to do the opposite.

That means we flip between lshift and ashiftrt to match the hardware.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-18 20:59:24 +00:00
Mike Frysinger
4bd2c0c31c sim: bfin: add tests for recent dsp fixes
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-18 20:27:26 +00:00
Mike Frysinger
a0a71a7f8b sim: bfin: fix M_IH saturation size
This reverts the previous commit and does it right.  This change got
lost in the shuffle of patches I have pending.

Basically the logic is to change the 32bit saturation (and then masked
to 16bits) to a proper 16bit saturation.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-18 20:10:57 +00:00
Mike Frysinger
388aa9fe20 sim: bfin: handle V/VS saturation in dsp mac insns
Some saturation cases with dsp mac insns were not setting the V flag.
So implement that part and split up the logic between the dual macs.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-18 20:04:32 +00:00
Mike Frysinger
f2a56d0ad7 sim: bfin: handle the MM flag in M_IU/M_TFU modes with dsp insns
Our handling of the M_IU/M_TFU modes are missing signed saturation when
the MM flag is set, so add it to match the hardware behavior.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-18 19:44:14 +00:00
Mike Frysinger
ef26d60eba sim: bfin: fix sign extension in dsp insns with MM flag
After testing the hardware with all the different dsp flags, the MM flag
triggers sign extension in all modes.  So drop the limited use of it, and
the local custom helper that was also extending unsigned values.  We also
can see that the flag checks in the mult/mac insns have the same behavior
with sign extending, so add a helper func to keep the logic the same in
both places.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-18 19:42:55 +00:00
Mike Frysinger
075a845a92 sim: bfin: fix dsp insns IH saturation/rounding behavior
When using the IH modifier, we need to first saturate the value before
rounding it, and then further saturate it a bit more.  This makes the
sim match the hardware behavior with these insns.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-18 19:24:57 +00:00
Mike Frysinger
b02cc5b9df sim: bfin: fix inverted changelog entry 2011-06-18 18:09:35 +00:00
Mike Frysinger
73aae8efb2 sim: bfin: fix accumulator edge case saturation
When the accumulator saturates, it needs to be greater than, but not
equal to, the largest unsigned value as this is what the hardware does.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-18 17:27:01 +00:00
Mike Frysinger
886ea33b69 sim: bfin: use freeargv for freeing argvs
Since the argv array was allocated with dupargv, it needs to be freed
with freeargv to avoid leaks.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-18 17:20:38 +00:00
Mike Frysinger
ce6f492fff sim: erc32: ignore --sysroot that gdb passes down 2011-06-09 15:33:03 +00:00
Joel Brobecker
94e4274dc0 sim/ppc: Fix check for --sysroot= option
Fixes an error reported by Tristan and which can be evidenced by
doing:

        % powerpc-elf-gdb
        (gdb) target sim --sysroot=var
        Invalid option: --sysroot=/var
        [...]

sim/ppc/ChangeLog:

        * psim.c (psim_options): Fix length of comparison when checking
        for --sysroot= option.
2011-06-09 14:21:43 +00:00
Joel Brobecker
807b48afa0 Spelling fixes in ChangeLog. 2011-06-09 14:21:36 +00:00
Joel Brobecker
11eef9ed35 ppc sim: Improve invalid option error message
This patch improves the error message when an invalid option is
detected, by also printing the option that actually caused the error.
For instance, from GDB:

        (gdb) target sim --hello
        Invalid option: --hello
        Usage:
        [...]

We also added the usage after an invalid long-name option (Eg: --hello)
to be in line with what's being done for all other invalid options
being detected.

sim/ppc/ChangeLog:

        * psim.c (psim_options): Add option that cause the error
        in invalid-option error messages. Print the usage when
        detecting an invalid long-name option.
2011-06-08 16:44:28 +00:00
Joel Brobecker
8294052ca9 ppc sim: Allow --sysroot command-line option
There was a recent change that cuased the "target sim" command
to add a --sysroot option to the argument vector passed down to
the simulator.  This caused a failure in the powerpc simulator,
as it did not recognize it.  This patch fixes the problem by adding
support for the --sysroot option (it ignores it).

sim/ppc/ChangeLog:

        * psim.c (psim_options): Accept and ignore `--sysroot=...'.
2011-06-08 16:44:20 +00:00
Mike Frysinger
6248039b9e sim: bfin: add missing gitignore file 2011-06-05 21:32:34 +00:00
Mike Frysinger
1d7b4a7037 sim: bfin: import testsuite
Now that the common sim testsuite code supports .S and .c files, we
can import the Blackfin testsuite.  There are about ~800 tests here,
so I'm only attaching a compressed patch of them.  Other than adding
files to sim/testsuite/sim/bfin/, the sim/configure.tgt file was
updated to mark Blackfin as having a testsuite, and sim/configure
regenerated.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-04 17:44:22 +00:00
Mike Frysinger
eb3243445a sim: bfin: add support for glued SIC interrupt lines
The BF537 family glues a bunch of peripherals into single interrupt lines
that run into the SIC.  To model this same behavior in the sim, we need to
use the glue-or device, and in order to use that, we need to tweak things
a bit in the mach code to allow declaring of these new devices.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-04 17:18:04 +00:00
Mike Frysinger
082e1c4a87 sim: bfin: push SIC mappings to device tree
The machs.c file is the best place for holding cpu-specific details, so
restructure the way the SIC manages its ports to do just that.  Now the
SIC's have a standard set of input pins and the different line routing
from peripherals is kept in the device tree only.  This better models
the hardware where the SIC doesn't care about the exact peripheral that
is sending it stuff, just which input pin it gets it on.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-04 17:11:19 +00:00
Joel Brobecker
91c6776727 Spelling fixe in sim/ppc/vm.c
From Stephen Kitt  <steve@sk2.org>
        * vm.c (vm_synchronize_context): Spelling fix in function
        documentation.
2011-06-03 23:47:04 +00:00
Joel Brobecker
d009417cdb Minor spelling fix in ChangeLog. 2011-06-03 23:46:46 +00:00
Mike Frysinger
36f3e98103 sim: bfin: dma: fix indentation 2011-06-03 05:03:31 +00:00
Joel Brobecker
248d2a8fdc Add `sim_complete_command' definition to erc32 sim
This patch fixes a build failure at link time due to
sim_complete_command being undefined.  There was a recent change
that added this function to all the ports that do not use the
common/ subdir.  But somehow, the erc32 port got missed.

sim/erc32/ChangeLog:

        * interf.c (sim_complete_command): New stub function.
2011-06-01 17:35:02 +00:00
Mike Frysinger
440db57552 sim: fix minor --sysroot mem leak
The current --sysroot parsing attempts to keep from leaking memory by
treating the empty string specially (sine this is the initial value),
but it ends up leaking memory when the arg is an empty string.  So if
someone uses --sysroot "", the old value is leaked, as is the new one.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-27 18:05:16 +00:00
Mike Frysinger
3ddcae71bb sim: common: add back Blackfin syscalls
A semi-recent change which regenerated nltvals.def somehow missed all of
the Blackfin syscalls.  So regenerate against the latest tree to get them
back.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-26 18:20:13 +00:00
Mike Frysinger
ea1f7d4c8e sim: bfin: switch to new syscall trace level
Now that the common code supports the syscall trace level, change the
Blackfin code from using the event level to the syscall level.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-26 00:14:43 +00:00
Mike Frysinger
3a49ea9fac sim: add syscall tracing level
It's useful to be able to trace just the system calls the simulated
program is calling, so add a new --trace-syscall option for ports to
leverage if they choose.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-26 00:09:59 +00:00
Mike Frysinger
f2db709f4f sim: bfin: move model data into machs.h
Pull the model data (register addresses/sizes) out of the different model
files and into the machs.h header.  The models themselves don't care about
where they're mapped, only the mach code does.  This allows us to keep the
model headers from being included in the mach code which can cause issues
with model-specific names colliding.  Such as when a newer device model is
created, but with incompatible register names/layouts.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-25 12:54:19 +00:00
Mike Frysinger
c43aadcaa6 sim: bfin: add a performance monitor stub
No counters get updated, but there is enough here for software to
poke things and work.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-25 12:41:29 +00:00
Mike Frysinger
dfb61fb66f sim: bfin: add bf526-0.2/bf54x-0.4 rom regions
Add regions for the on-chip roms on some newer Blackfin parts.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-25 12:35:05 +00:00
Mike Frysinger
dd931b2ff2 sim: glue: allow bitwise devices to only glue ints
Some Blackfin parts tie a bunch of interrupt lines into a single OR
gate before feeding the result into the SIC.  The glue-or device in
the sim provides a nice way of modeling this exact behavior.  At the
moment though, it requires the device to be mapped into the address
space so that things could write to it directly.  This is not needed
for the Blackfin usage, so make it optional.  Now the glue devices
can be used to simply tie interrupt lines together.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-23 23:00:35 +00:00
Mike Frysinger
0e31da218e sim: glue: implement or/xor funcs
The glue device has a bunch of "todos" for the misc bitwise devices.
So implement two for fun -- the glue-or and glue-xor.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-23 22:59:54 +00:00
Mike Frysinger
0641104b2e sim: tests: support .S/.c files
Rather than requiring all sim tests to be preprocessed .s files, add
support for .S and .c files so we can easily write code using a higher
level language like C.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-16 18:48:31 +00:00
Mike Frysinger
efac2223c4 sim: bfin: allow pushing of SP
The hardware respects this insn, and some code (like the on-chip bootrom)
uses it, so allow it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-14 16:00:37 +00:00
Mike Frysinger
28fe96b798 sim: bfin: implement loop back support in the UARTs
The UART has a LOOP_ENA bit in its MCR register where writes to the THR
go to the RBR.  Implement support for this mode.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-14 15:59:09 +00:00
Mike Frysinger
34b47c3828 sim: fix func call style (space before paren)
Committed this as obvious:
	-foo(...);
	+foo (...);

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-11 20:02:42 +00:00
Hans-Peter Nilsson
3fc8ee5409 PR sim/12737
* sim/arm/iwmmxt/wcmpgt.cgs, sim/arm/iwmmxt/wmac.cgs,
	sim/arm/iwmmxt/wsra.cgs, sim/arm/xscale/blx.cgs: Kfail.
2011-05-11 04:59:28 +00:00
Mike Frysinger
b44f3f638e sim: bfin: fix UART LSR read-only bit saturation
A few bits in the newer UART LSR register are not sticky, so make sure
we clear them when returning updated status rather than leaving them
always set.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-09 18:14:01 +00:00
Joseph Myers
4d393d60c4 gdb:
* configure.host (xscale*): Don't handle target.
	* configure.tgt (thumb*-*-* | strongarm*-*-* | xscale-*-*): Don't
	handle targets.

gdb/gdbserver:
	* README: Don't mention xscale*-*-linux*.
	* configure.srv (xscale*-*-linux*): Don't handle target.

gdb/testsuite:
	* gdb.base/a2-run.exp (strongarm-*-coff): Don't handle target.
	* gdb.base/float.exp (xscale*-*-*, strongarm*-*-*): Don't handle
	targets.
	* gdb.base/long_long.exp (xscale*-*-*, strongarm*-*-*): Don't
	handle targets.

sim:
	* configure.tgt (thumb*-*-* | strongarm*-*-* | xscale-*-*): Don't
	handle targets.
	* configure: Regenerate.

sim/testsuite:
	* configure: Regenerate.
	* sim/arm/allinsn.exp (xscale*-*-*): Don't handle target.
	* sim/arm/misc.exp (thumb*-*-*, xscale*-*-*): Don't handle
	targets.
	* sim/arm/iwmmxt/iwmmxt.exp: Test for arm*-*-* instead of
	xscale*-*-*.
	* sim/arm/thumb/allthumb.exp (thumb*-*-*): Don't handle target.
	* sim/arm/xscale/xscale.exp: Test for arm*-*-* instead of
	xscale*-*-*.
2011-05-04 19:28:16 +00:00
Mike Frysinger
2613074f8f sim: bfin: constify dmac pmap arrays
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-27 21:29:03 +00:00
Mike Frysinger
054c055baf sim: gpio: add output support
Make all of the pins bidirectional, and support sending signals when
software drives the pins as outputs.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-26 05:47:14 +00:00
Mike Frysinger
5e0ba1a39e sim: gpio: update mask a/b signals better
When the mask a/b MMRs are written, the output signal might change levels
(as pins are [un]masked), so make sure we update the output level.

Further, make sure we handle edge ints correctly by first sending a high
signal followed by a low signal.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-26 05:46:02 +00:00
Mike Frysinger
af9f7da78b sim: add sim_complete_command stubs for non-common-using ports
For the ports that don't use the common/ subdir, we need to add stub funcs
to them to avoid build failures with gdb and command completion.  These do
not implement the actual completion functionality ... any port that wants
that can either convert to the common/ subdir, or fill out the function on
their own time.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-16 18:16:36 +00:00
Mike Frysinger
0427acfba0 sim: bfin: use store buffer with more 32bit insns
A bunch of 32bit insns were not using the store buffer, so when they were
used in parallel insns, they would incorrectly clobber a register early.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-16 17:37:55 +00:00
Mike Frysinger
5592f70ec8 gdb: sim: add style fixes lost between git->cvs 2011-04-15 16:23:19 +00:00
Mike Frysinger
56a9aa1d10 gdb: sim: add command line completion
For now, only the sub-command name is completed.  No support yet for
completing options to that command.  But even this is a huge step as
currently, nothing is completed, and the basic "help sim" is fairly
obtuse as to what exactly the "sim" command accepts.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-15 03:43:46 +00:00
Mike Frysinger
d2cfa400a1 sim: bfin: handle implicit DISALGNEXCPT with video insns
When most video related insns are used in parallel with Ireg loads, the
DISALGNEXCPT insn behavior is implicitly in effect.

Reported-by: Anton Shokurov <shokurov.anton.v@yandex.ru>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-15 01:21:21 +00:00
Mike Frysinger
e10d6db33d sim: bfin: respect the port level on signals to the SIC
The SIC latches ints from peripherals to the CEC, but the peripherals
need to be able to tell the SIC when to stop.  So use the incoming level
to figure out when to set the int bits and when to clear it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-11 05:23:26 +00:00
Mike Frysinger
8aacdaf48d sim: bfin: add missing GPIO pin 15
Each GPIO block has 16 pins, and I only added 15 in the original
port list.  So add the missing 16th.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-11 05:22:23 +00:00
Mike Frysinger
d45bea91ec sim: dv-glue: fix up style a bit
This touches up the code a bit to match GNU style.  No functional changes.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-02 06:02:51 +00:00
Mike Frysinger
12c4cbd553 sim: fix up style a bit
This touches up the code a bit to match GNU style.  No functional changes.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-02 05:30:16 +00:00
Mike Frysinger
2b12772f43 sim: bfin: add OTP output port
This doesn't currently generate any interrupts (as there doesn't appear
to be any documentation to *when* it would even do so), but since the
HRM does say an interrupt line exists between the OTP and the SIC, add
one for completeness sake.  This will make a follow up patch easier.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-01 22:32:04 +00:00
Mike Frysinger
6294f8ea1e sim: bfin: regen configure to include new cfi device 2011-03-29 18:39:51 +00:00
Mike Frysinger
66ee273116 sim: cfi: new flash device simulation
This simulates a CFI flash.  Its pretty configurable via the device
tree.  For now, only basic read/write/erase operations are supported
for the Intel command set, but it's easy enough to extend support.
It's certainly enough to trick Das U-Boot into using it for probing,
reading, writing, and erasing.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-29 17:57:21 +00:00
Mike Frysinger
1a3af0bfc3 sim: bfin: fix sign extension with 16bit acc add insns
The current implementation attempts to handle the 16bit sign extension
itself.  Unfortunately, it gets it right in some cases.  So rather than
fix that logic, just drop it in favor of using 16bit signed casts.  Now
gcc will take care of getting the logic right.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-29 01:41:49 +00:00
Mike Frysinger
36aef94270 sim: bfin: handle saturation with RND12 sub insns
The current handling of the subtraction insn with the RND12 modifier
works when saturation isn't involved.  So add handling for this edge
case to match the hardware.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-27 04:03:05 +00:00
Mike Frysinger
fcd1ee07d3 sim: bfin: add missing VS set with add/sub insns
The 16bit add/sub insns missed setting the VS bit in ASTAT whenever the
V bit was also set.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-26 06:02:41 +00:00
Mike Frysinger
a31d4fd99d sim: bfin: add hw tracing to gpio/sic port events
Makes it a lot easier to find out what's going on with interrupt lines
if the ports have tracing output.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-25 00:13:57 +00:00
Mike Frysinger
b72cc8e145 sim: bfin: fix GPIO logic bugs when processing events
We need the DIR bit cleared, not set, in order for the pin to be treated
as an input.

When looking up the data value, we need to shift the "level" value over by
"my_port" rather than "bit" as the latter has already been shifted over.
We also should normalize the "level" coming in from the outside worlds to
the set of {0,1} since those are the only values that matter to GPIOs.

We need the BOTH bit set, not cleared, in order for the pin to trigger
on both edges.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-25 00:13:23 +00:00
Mike Frysinger
eaf863cd1e sim: bfin: fix clear/set/toggle GPIO handling
The clear/set/toggle MMRs aren't backed by "real" data; they implicitly
perform bit operations on the associated data register.  So when we go
to process writes to them, we need to adjust the pointer accordingly so
that the actual backing data is modified.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-25 00:12:47 +00:00
Mike Frysinger
b16a1f4c4f sim: bfin: document SIC limitation
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-24 03:18:17 +00:00
Mike Frysinger
9922f80319 sim: bfin: fix inverted W1C logic
When I originally wrote the w1c helper funcs, I used it in a few places.
Then I forgot how it worked and when I later documented it, I described
the 3rd arg in the exact opposite way it is actually used.  This error
propagated to a bunch of devices registers that were not explicitly
tested (a bunch of the devices are stubs which merely exist to say "no
device is connected" to make device drivers happy).

So once the documentation is unscrewed, fix all of the broken call sites.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-24 03:17:14 +00:00
Mike Frysinger
2d2bab5b21 sim: bfin: define more UART LSR bits
We'll need these bits in an upcoming patch, so map out the whole
LSR MMR now.

Fix up indentation style while we're here.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-24 03:16:50 +00:00
Mike Frysinger
972dbc8ade sim: bfin: fix typo in TWI stat reg
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-24 03:16:22 +00:00
Mike Frysinger
8e670c0a3f sim: bfin: update VIT_MAX behavior to match hardware when Acc.X bits are set
The Blackfin PRM says that the top 8 bits of the accumulator must be
cleared when using the VIT_MAX insn, so the sim has followed this spec.
Matching the hardware behavior though when the high bits are not cleared
is easy to do and doesn't break existing behavior, so go for it.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-24 03:14:20 +00:00
Mike Frysinger
de0addfbef sim: bfin: always do 16bit sign extension with the SEARCH insn
The Blackfin PRM does not cover this case, but the hardware is clear: even
if the search criteria is not met (and thus a new 16bit value is loaded up
into the accumulator), the accumulator undergoes 16bit sign extension.  So
simply reload the low signed 16bits in that case.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-24 03:13:32 +00:00
Mike Frysinger
beb378a5f2 sim: bfin: update AV and AC ASTAT bits with acc negation
The Acc=-Acc insn can overflow or carry with edge values, so make sure
we update the ASTAT bits accordingly to match the hardware.  Also fix
a thinko where we always updated AC0 even when working with A1 regs.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-24 03:12:16 +00:00
Mike Frysinger
e4a861d14b sim: bfin: fix thinko in SIC pin encoding
When encoding the SIC/pin info into unique input port ids, I used bases
of 100 when I meant to use 0x100.  Rather than simply fix the decoding
math in the different functions, create a few helper macros to simplify
the SIC/pin encoding and decoding steps.  This makes the resulting tables
nice & clear.

And now that pins are clear, the 533 and 537 port_event handlers may
easily be merged into one.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-24 03:11:08 +00:00
Mike Frysinger
8d8a97461a sim: bfin: allow byteop[123]p src regs to be the same
The hardware allows the byteop[123]p insns to use the same src reg pair,
so remove the combination check in the sim.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-24 03:08:15 +00:00
Mike Frysinger
a9c3ef4760 sim: bfin: fix thinko in bfin_gpio bus addresses
The bus addresses have to be valid numbers, so 'g' and 'h' won't work.
Oddly, the common code silently ignored this which is why I didn't notice
in the first place.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-24 03:07:33 +00:00
Kevin Buettner
165b70ea60 * gennltvals.sh: Search sys/_default_fcntl.h, in addition to
fcntl.h and sys/fcntl.h, for constants.
	* nltvals.def: Regenerate.
	* sim-io.c (sim_io_stat, sim_io_fstat): New functions.
	* sim-io.h (sys/types.h, sys/stat.h): Include.
	(sim_io_stat, sim_io_fstat): Declare.
2011-03-21 22:06:55 +00:00
Kevin Buettner
d0f0baa272 * simops (OP_10007E0): Update errno handling as most traps
do not invoke the host's functionality directly.  Invoke
	sim_io_stat() instead of stat() for implementing TARGET_SYS_stat.
	Implement TARGET_SYS_fstat, TARGET_SYS_rename, and TARGET_SYS_unlink.
2011-03-21 22:05:56 +00:00
Mike Frysinger
9e6584c9a0 sim: bfin: check for kill/pread
If the host system (like Windows) doesn't support these functions,
then make sure we don't use them.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-17 19:03:30 +00:00
Mike Frysinger
b5215db0ff sim: bfin: add GPIO device simulation
This takes care of the MMR interface and pushing up interrupts.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-15 21:01:45 +00:00
Mike Frysinger
81d126c3be sim: bfin: fix brace style 2011-03-15 20:55:11 +00:00
Mike Frysinger
990d19fd6d sim: bfin: fix brace style 2011-03-15 20:44:11 +00:00
Mike Frysinger
227d265839 sim: bfin: handle AZ updates with 16bit adds/subs
We weren't updating AZ when doing a 16bit add or sub insn.  Implement it.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-15 20:10:40 +00:00
Mike Frysinger
e3809a37d4 sim: bfin: skip acc/ASTAT updates for moves
No point in moving unchanged acc values to the acc regs, and avoid
updating the acc ASTAT bits when only reading.  This fixes incorrect
changing of the ASTAT bits when they're only being read.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-15 20:10:12 +00:00
Mike Frysinger
86d3d8de68 sim: bfin: handle AN (negative overflows) in dsp mult insns
The current dsp mult handler does not take care of overflows which turn
values negative (and thus set AN in ASTAT).  So implement it.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-15 20:09:39 +00:00
Mike Frysinger
9b7509d900 sim: bfin: handle V overflows in dsp mult insns
The current dsp mult handler does not take care of overflows and updating
the V ASTAT bit.  So implement it.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-15 20:09:09 +00:00
Mike Frysinger
bf416ccded sim: bfin: decode ASTAT on failure
When testing ASTAT regs, specific bit differences carry a lot more meaning
than when checking the value of a data register.  So automatically decode
the bits of the two values and print things out so that people don't have
to manually do it themselves every time.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-15 20:08:27 +00:00
Mike Frysinger
c9329594d4 sim: bfin: handle saturation with fract multiplications
The saturation behavior with fract modes differs from non-fract modes.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-15 20:04:04 +00:00
Mike Frysinger
028f651542 sim: common: trim trailing whitespace 2011-03-15 03:16:17 +00:00