sim: cfi: new flash device simulation
This simulates a CFI flash. Its pretty configurable via the device tree. For now, only basic read/write/erase operations are supported for the Intel command set, but it's easy enough to extend support. It's certainly enough to trick Das U-Boot into using it for probing, reading, writing, and erasing. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This commit is contained in:
Mike Frysinger
parent
53832f3147
commit
66ee273116
7 changed files with 875 additions and 1 deletions
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@ -1,3 +1,7 @@
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2011-03-29 Mike Frysinger <vapier@gentoo.org>
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* NEWS: Mention new cfi device simulation.
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2011-03-29 Tom Tromey <tromey@redhat.com>
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* dwarf2read.c (fixup_partial_die): Handle linkage name on
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2
gdb/NEWS
2
gdb/NEWS
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@ -182,6 +182,8 @@ Analog Devices, Inc. Blackfin Processor bfin-*
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** The --map-info flag lists all known core mappings.
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** CFI flashes may be simulated via the "cfi" device.
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*** Changes in GDB 7.2
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* Shared library support for remote targets by default
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@ -1,3 +1,9 @@
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2011-03-29 Mike Frysinger <vapier@gentoo.org>
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* aclocal.m4 (SIM_AC_OPTION_HARDWARE): Add cfi to default list.
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* Make-common.in (dv-cfi.o): New rule.
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* dv-cfi.c, dv-cfi.h: New files.
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2011-03-21 Kevin Buettner <kevinb@redhat.com>
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* gennltvals.sh: Search sys/_default_fcntl.h, in addition to
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@ -575,6 +575,9 @@ hw-tree.o: $(srccom)/hw-tree.c $(hw_main_headers) $(hw-tree_h)
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# Devices.
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dv-cfi.o: $(srccom)/dv-cfi.c $(hw_main_headers) $(sim_main_headers)
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$(CC) -c $(srccom)/dv-cfi.c $(ALL_CFLAGS)
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dv-core.o: $(srccom)/dv-core.c $(hw_main_headers) $(sim_main_headers)
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$(CC) -c $(srccom)/dv-core.c $(ALL_CFLAGS)
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2
sim/common/aclocal.m4
vendored
2
sim/common/aclocal.m4
vendored
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@ -573,7 +573,7 @@ fi
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if test "[$2]"; then
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hardware="[$2]"
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else
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hardware="core pal glue"
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hardware="cfi core pal glue"
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fi
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hardware="$hardware [$3]"
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sim_hw_cflags="-DWITH_HW=1"
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799
sim/common/dv-cfi.c
Normal file
799
sim/common/dv-cfi.c
Normal file
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@ -0,0 +1,799 @@
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/* Common Flash Memory Interface (CFI) model.
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http://www.spansion.com/Support/AppNotes/CFI_Spec_AN_03.pdf
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http://www.spansion.com/Support/AppNotes/cfi_100_20011201.pdf
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Copyright (C) 2010-2011 Free Software Foundation, Inc.
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Contributed by Analog Devices, Inc.
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This file is part of simulators.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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/* TODO: support vendor query tables. */
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#include "cconfig.h"
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#include <math.h>
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#include <errno.h>
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#include <fcntl.h>
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#include <unistd.h>
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#ifdef HAVE_SYS_MMAN_H
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#include <sys/mman.h>
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#endif
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#include "sim-main.h"
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#include "devices.h"
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#include "dv-cfi.h"
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/* Flashes are simple state machines, so here we cover all the
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different states a device might be in at any particular time. */
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enum cfi_state
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{
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CFI_STATE_READ,
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CFI_STATE_READ_ID,
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CFI_STATE_CFI_QUERY,
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CFI_STATE_PROTECT,
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CFI_STATE_STATUS,
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CFI_STATE_ERASE,
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CFI_STATE_WRITE,
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CFI_STATE_WRITE_BUFFER,
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CFI_STATE_WRITE_BUFFER_CONFIRM,
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};
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/* This is the structure that all CFI conforming devices must provided
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when asked for it. This allows a single driver to dynamically support
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different flash geometries without having to hardcode specs.
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If you want to start mucking about here, you should just grab the
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CFI spec and review that (see top of this file for URIs). */
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struct cfi_query
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{
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/* This is always 'Q' 'R' 'Y'. */
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unsigned char qry[3];
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/* Primary vendor ID. */
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unsigned char p_id[2];
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/* Primary query table address. */
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unsigned char p_adr[2];
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/* Alternate vendor ID. */
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unsigned char a_id[2];
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/* Alternate query table address. */
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unsigned char a_adr[2];
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union
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{
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/* Voltage levels. */
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unsigned char voltages[4];
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struct
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{
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/* Normal min voltage level. */
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unsigned char vcc_min;
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/* Normal max voltage level. */
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unsigned char vcc_max;
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/* Programming min volage level. */
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unsigned char vpp_min;
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/* Programming max volage level. */
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unsigned char vpp_max;
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};
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};
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union
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{
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/* Operational timeouts. */
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unsigned char timeouts[8];
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struct
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{
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/* Typical timeout for writing a single "unit". */
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unsigned char timeout_typ_unit_write;
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/* Typical timeout for writing a single "buffer". */
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unsigned char timeout_typ_buf_write;
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/* Typical timeout for erasing a block. */
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unsigned char timeout_typ_block_erase;
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/* Typical timeout for erasing the chip. */
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unsigned char timeout_typ_chip_erase;
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/* Max timeout for writing a single "unit". */
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unsigned char timeout_max_unit_write;
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/* Max timeout for writing a single "buffer". */
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unsigned char timeout_max_buf_write;
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/* Max timeout for erasing a block. */
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unsigned char timeout_max_block_erase;
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/* Max timeout for erasing the chip. */
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unsigned char timeout_max_chip_erase;
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};
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};
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/* Flash size is 2^dev_size bytes. */
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unsigned char dev_size;
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/* Flash device interface description. */
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unsigned char iface_desc[2];
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/* Max length of a single buffer write is 2^max_buf_write_len bytes. */
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unsigned char max_buf_write_len[2];
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/* Number of erase regions. */
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unsigned char num_erase_regions;
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/* The erase regions would now be an array after this point, but since
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it is dynamic, we'll provide that from "struct cfi" when requested. */
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/*unsigned char erase_region_info;*/
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};
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/* Flashes may have regions with different erase sizes. There is one
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structure per erase region. */
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struct cfi_erase_region
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{
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unsigned blocks;
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unsigned size;
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unsigned start;
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unsigned end;
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};
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struct cfi;
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/* Flashes are accessed via commands -- you write a certain number to
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a special address to change the flash state and access info other
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than the data. Diff companies have implemented their own command
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set. This structure abstracts the different command sets so that
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we can support multiple ones with just a single sim driver. */
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struct cfi_cmdset
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{
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unsigned id;
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void (*setup) (struct hw *me, struct cfi *cfi);
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bool (*write) (struct hw *me, struct cfi *cfi, const void *source,
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unsigned offset, unsigned value, unsigned nr_bytes);
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bool (*read) (struct hw *me, struct cfi *cfi, void *dest,
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unsigned offset, unsigned shifted_offset, unsigned nr_bytes);
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};
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/* The per-flash state. Much of this comes from the device tree which
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people declare themselves. See top of attach_cfi_regs() for more
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info. */
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struct cfi
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{
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unsigned width, dev_size, status;
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enum cfi_state state;
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unsigned char *data, *mmap;
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struct cfi_query query;
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const struct cfi_cmdset *cmdset;
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unsigned char *erase_region_info;
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struct cfi_erase_region *erase_regions;
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};
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/* Helpful strings which are used with HW_TRACE. */
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static const char * const state_names[] =
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{
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"READ", "READ_ID", "CFI_QUERY", "PROTECT", "STATUS", "ERASE", "WRITE",
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"WRITE_BUFFER", "WRITE_BUFFER_CONFIRM",
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};
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/* Erase the block specified by the offset into the given CFI flash. */
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static void
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cfi_erase_block (struct hw *me, struct cfi *cfi, unsigned offset)
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{
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unsigned i;
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struct cfi_erase_region *region;
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/* If no erase regions, then we can only do whole chip erase. */
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/* XXX: Is this within spec ? Or must there always be at least one ? */
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if (!cfi->query.num_erase_regions)
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memset (cfi->data, 0xff, cfi->dev_size);
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for (i = 0; i < cfi->query.num_erase_regions; ++i)
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{
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region = &cfi->erase_regions[i];
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if (offset >= region->end)
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continue;
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/* XXX: Does spec require the erase addr to be erase block aligned ?
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Maybe this is check is overly cautious ... */
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offset &= ~(region->size - 1);
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memset (cfi->data + offset, 0xff, region->size);
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break;
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}
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}
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/* Depending on the bus width, addresses might be bit shifted. This
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helps us normalize everything without cluttering up the rest of
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the code. */
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static unsigned
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cfi_unshift_addr (struct cfi *cfi, unsigned addr)
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{
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switch (cfi->width)
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{
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case 4: addr >>= 1; /* fallthrough. */
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case 2: addr >>= 1;
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}
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return addr;
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}
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/* CFI requires all values to be little endian in its structure, so
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this helper writes a 16bit value into a little endian byte buffer. */
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static void
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cfi_encode_16bit (unsigned char *data, unsigned num)
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{
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data[0] = num;
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data[1] = num >> 8;
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}
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/* The functions required to implement the Intel command set. */
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static bool
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cmdset_intel_write (struct hw *me, struct cfi *cfi, const void *source,
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unsigned offset, unsigned value, unsigned nr_bytes)
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{
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switch (cfi->state)
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{
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case CFI_STATE_READ:
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case CFI_STATE_READ_ID:
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switch (value)
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{
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case INTEL_CMD_ERASE_BLOCK:
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cfi->state = CFI_STATE_ERASE;
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break;
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case INTEL_CMD_WRITE:
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case INTEL_CMD_WRITE_ALT:
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cfi->state = CFI_STATE_WRITE;
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break;
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case INTEL_CMD_STATUS_CLEAR:
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cfi->status = INTEL_SR_DWS;
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break;
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case INTEL_CMD_LOCK_SETUP:
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cfi->state = CFI_STATE_PROTECT;
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break;
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default:
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return false;
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}
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break;
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case CFI_STATE_ERASE:
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if (value == INTEL_CMD_ERASE_CONFIRM)
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{
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cfi_erase_block (me, cfi, offset);
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cfi->status &= ~(INTEL_SR_PS | INTEL_SR_ES);
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}
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else
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cfi->status |= INTEL_SR_PS | INTEL_SR_ES;
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cfi->state = CFI_STATE_STATUS;
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break;
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case CFI_STATE_PROTECT:
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switch (value)
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{
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case INTEL_CMD_LOCK_BLOCK:
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case INTEL_CMD_UNLOCK_BLOCK:
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case INTEL_CMD_LOCK_DOWN_BLOCK:
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/* XXX: Handle the command. */
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break;
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default:
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/* Kick out. */
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cfi->status |= INTEL_SR_PS | INTEL_SR_ES;
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break;
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}
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cfi->state = CFI_STATE_STATUS;
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break;
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default:
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return false;
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}
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return true;
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}
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static bool
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cmdset_intel_read (struct hw *me, struct cfi *cfi, void *dest,
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unsigned offset, unsigned shifted_offset, unsigned nr_bytes)
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{
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unsigned char *sdest = dest;
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switch (cfi->state)
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{
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case CFI_STATE_STATUS:
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case CFI_STATE_ERASE:
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*sdest = cfi->status;
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break;
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case CFI_STATE_READ_ID:
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switch (shifted_offset & 0x1ff)
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{
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case 0x00: /* Manufacturer Code. */
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cfi_encode_16bit (dest, INTEL_ID_MANU);
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break;
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case 0x01: /* Device ID Code. */
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/* XXX: Push to device tree ? */
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cfi_encode_16bit (dest, 0xad);
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break;
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case 0x02: /* Block lock state. */
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/* XXX: This is per-block ... */
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*sdest = 0x00;
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break;
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case 0x05: /* Read Configuration Register. */
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cfi_encode_16bit (dest, (1 << 15));
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break;
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default:
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return false;
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}
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break;
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default:
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return false;
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}
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return true;
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}
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static void
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cmdset_intel_setup (struct hw *me, struct cfi *cfi)
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{
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cfi->status = INTEL_SR_DWS;
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}
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static const struct cfi_cmdset cfi_cmdset_intel =
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{
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CFI_CMDSET_INTEL, cmdset_intel_setup, cmdset_intel_write, cmdset_intel_read,
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};
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|
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/* All of the supported command sets get listed here. We then walk this
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array to see if the user requested command set is implemented. */
|
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static const struct cfi_cmdset * const cfi_cmdsets[] =
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{
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&cfi_cmdset_intel,
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};
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|
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/* All writes to the flash address space come here. Using the state
|
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machine, we figure out what to do with this specific write. All
|
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common code sits here and if there is a request we can't process,
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we hand it off to the command set-specific write function. */
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static unsigned
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cfi_io_write_buffer (struct hw *me, const void *source, int space,
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address_word addr, unsigned nr_bytes)
|
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{
|
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struct cfi *cfi = hw_data (me);
|
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const unsigned char *ssource = source;
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enum cfi_state old_state;
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unsigned offset, shifted_offset, value;
|
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offset = addr & (cfi->dev_size - 1);
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shifted_offset = cfi_unshift_addr (cfi, offset);
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|
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if (cfi->width != nr_bytes)
|
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{
|
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HW_TRACE ((me, "write 0x%08lx length %u does not match flash width %u",
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(unsigned long) addr, nr_bytes, cfi->width));
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return nr_bytes;
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}
|
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|
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if (cfi->state == CFI_STATE_WRITE)
|
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{
|
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/* NOR flash can only go from 1 to 0. */
|
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unsigned i;
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|
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HW_TRACE ((me, "program %#x length %u", offset, nr_bytes));
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for (i = 0; i < nr_bytes; ++i)
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cfi->data[offset + i] &= ssource[i];
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|
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cfi->state = CFI_STATE_STATUS;
|
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|
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return nr_bytes;
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}
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|
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value = ssource[0];
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|
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old_state = cfi->state;
|
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|
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if (value == CFI_CMD_READ || value == CFI_CMD_RESET)
|
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{
|
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cfi->state = CFI_STATE_READ;
|
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goto done;
|
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}
|
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|
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switch (cfi->state)
|
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{
|
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case CFI_STATE_READ:
|
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case CFI_STATE_READ_ID:
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if (value == CFI_CMD_CFI_QUERY)
|
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{
|
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if (shifted_offset == CFI_ADDR_CFI_QUERY_START)
|
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cfi->state = CFI_STATE_CFI_QUERY;
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goto done;
|
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}
|
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|
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if (value == CFI_CMD_READ_ID)
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{
|
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cfi->state = CFI_STATE_READ_ID;
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goto done;
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}
|
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|
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/* Fall through. */
|
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default:
|
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if (!cfi->cmdset->write (me, cfi, source, offset, value, nr_bytes))
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HW_TRACE ((me, "unhandled command %#x at %#x", value, offset));
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break;
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}
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done:
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HW_TRACE ((me, "write 0x%08lx command {%#x,%#x,%#x,%#x}; state %s -> %s",
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(unsigned long) addr, ssource[0],
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nr_bytes > 1 ? ssource[1] : 0,
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nr_bytes > 2 ? ssource[2] : 0,
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nr_bytes > 3 ? ssource[3] : 0,
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state_names[old_state], state_names[cfi->state]));
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return nr_bytes;
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}
|
||||
|
||||
/* All reads to the flash address space come here. Using the state
|
||||
machine, we figure out what to return -- actual data stored in the
|
||||
flash, the CFI query structure, some status info, or something else ?
|
||||
Any requests that we can't handle are passed to the command set-
|
||||
specific read function. */
|
||||
static unsigned
|
||||
cfi_io_read_buffer (struct hw *me, void *dest, int space,
|
||||
address_word addr, unsigned nr_bytes)
|
||||
{
|
||||
struct cfi *cfi = hw_data (me);
|
||||
unsigned char *sdest = dest;
|
||||
unsigned offset, shifted_offset;
|
||||
|
||||
offset = addr & (cfi->dev_size - 1);
|
||||
shifted_offset = cfi_unshift_addr (cfi, offset);
|
||||
|
||||
/* XXX: Is this OK to enforce ? */
|
||||
#if 0
|
||||
if (cfi->state != CFI_STATE_READ && cfi->width != nr_bytes)
|
||||
{
|
||||
HW_TRACE ((me, "read 0x%08lx length %u does not match flash width %u",
|
||||
(unsigned long) addr, nr_bytes, cfi->width));
|
||||
return nr_bytes;
|
||||
}
|
||||
#endif
|
||||
|
||||
HW_TRACE ((me, "%s read 0x%08lx length %u",
|
||||
state_names[cfi->state], (unsigned long) addr, nr_bytes));
|
||||
|
||||
switch (cfi->state)
|
||||
{
|
||||
case CFI_STATE_READ:
|
||||
memcpy (dest, cfi->data + offset, nr_bytes);
|
||||
break;
|
||||
|
||||
case CFI_STATE_CFI_QUERY:
|
||||
if (shifted_offset >= CFI_ADDR_CFI_QUERY_RESULT &&
|
||||
shifted_offset < CFI_ADDR_CFI_QUERY_RESULT + sizeof (cfi->query) +
|
||||
(cfi->query.num_erase_regions * 4))
|
||||
{
|
||||
unsigned char *qry;
|
||||
|
||||
shifted_offset -= CFI_ADDR_CFI_QUERY_RESULT;
|
||||
if (shifted_offset >= sizeof (cfi->query))
|
||||
{
|
||||
qry = cfi->erase_region_info;
|
||||
shifted_offset -= sizeof (cfi->query);
|
||||
}
|
||||
else
|
||||
qry = (void *) &cfi->query;
|
||||
|
||||
sdest[0] = qry[shifted_offset];
|
||||
memset (sdest + 1, 0, nr_bytes - 1);
|
||||
|
||||
break;
|
||||
}
|
||||
|
||||
default:
|
||||
if (!cfi->cmdset->read (me, cfi, dest, offset, shifted_offset, nr_bytes))
|
||||
HW_TRACE ((me, "unhandled state %s", state_names[cfi->state]));
|
||||
break;
|
||||
}
|
||||
|
||||
return nr_bytes;
|
||||
}
|
||||
|
||||
/* Clean up any state when this device is removed (e.g. when shutting
|
||||
down, or when reloading via gdb). */
|
||||
static void
|
||||
cfi_delete_callback (struct hw *me)
|
||||
{
|
||||
#ifdef HAVE_MMAP
|
||||
struct cfi *cfi = hw_data (me);
|
||||
|
||||
if (cfi->mmap)
|
||||
munmap (cfi->mmap, cfi->dev_size);
|
||||
#endif
|
||||
}
|
||||
|
||||
/* Helper function to easily add CFI erase regions to the existing set. */
|
||||
static void
|
||||
cfi_add_erase_region (struct hw *me, struct cfi *cfi,
|
||||
unsigned blocks, unsigned size)
|
||||
{
|
||||
unsigned num_regions = cfi->query.num_erase_regions;
|
||||
struct cfi_erase_region *region;
|
||||
unsigned char *qry_region;
|
||||
|
||||
/* Store for our own usage. */
|
||||
region = &cfi->erase_regions[num_regions];
|
||||
region->blocks = blocks;
|
||||
region->size = size;
|
||||
if (num_regions == 0)
|
||||
region->start = 0;
|
||||
else
|
||||
region->start = region[-1].end;
|
||||
region->end = region->start + (blocks * size);
|
||||
|
||||
/* Regions are 4 bytes long. */
|
||||
qry_region = cfi->erase_region_info + 4 * num_regions;
|
||||
|
||||
/* [0][1] = number erase blocks - 1 */
|
||||
if (blocks > 0xffff + 1)
|
||||
hw_abort (me, "erase blocks %u too big to fit into region info", blocks);
|
||||
cfi_encode_16bit (&qry_region[0], blocks - 1);
|
||||
|
||||
/* [2][3] = block size / 256 bytes */
|
||||
if (size > 0xffff * 256)
|
||||
hw_abort (me, "erase size %u too big to fit into region info", size);
|
||||
cfi_encode_16bit (&qry_region[2], size / 256);
|
||||
|
||||
/* Yet another region. */
|
||||
cfi->query.num_erase_regions = num_regions + 1;
|
||||
}
|
||||
|
||||
/* Device tree options:
|
||||
Required:
|
||||
.../reg <addr> <len>
|
||||
.../cmdset <primary; integer> [alt; integer]
|
||||
Optional:
|
||||
.../size <device size (must be pow of 2)>
|
||||
.../width <8|16|32>
|
||||
.../write_size <integer (must be pow of 2)>
|
||||
.../erase_regions <number blocks> <block size> \
|
||||
[<number blocks> <block size> ...]
|
||||
.../voltage <vcc min> <vcc max> <vpp min> <vpp max>
|
||||
.../timeouts <typ unit write> <typ buf write> \
|
||||
<typ block erase> <typ chip erase> \
|
||||
<max unit write> <max buf write> \
|
||||
<max block erase> <max chip erase>
|
||||
.../file <file> [ro|rw]
|
||||
Defaults:
|
||||
size: <len> from "reg"
|
||||
width: 8
|
||||
write_size: 0 (not supported)
|
||||
erase_region: 1 (can only erase whole chip)
|
||||
voltage: 0.0V (for all)
|
||||
timeouts: typ: 1µs, not supported, 1ms, not supported
|
||||
max: 1µs, 1ms, 1ms, not supported
|
||||
|
||||
TODO: Verify user args are valid (e.g. voltage is 8 bits). */
|
||||
static void
|
||||
attach_cfi_regs (struct hw *me, struct cfi *cfi)
|
||||
{
|
||||
address_word attach_address;
|
||||
int attach_space;
|
||||
unsigned attach_size;
|
||||
reg_property_spec reg;
|
||||
bool fd_writable;
|
||||
int i, ret, fd;
|
||||
signed_cell ival;
|
||||
|
||||
if (hw_find_property (me, "reg") == NULL)
|
||||
hw_abort (me, "Missing \"reg\" property");
|
||||
if (hw_find_property (me, "cmdset") == NULL)
|
||||
hw_abort (me, "Missing \"cmdset\" property");
|
||||
|
||||
if (!hw_find_reg_array_property (me, "reg", 0, ®))
|
||||
hw_abort (me, "\"reg\" property must contain three addr/size entries");
|
||||
|
||||
hw_unit_address_to_attach_address (hw_parent (me),
|
||||
®.address,
|
||||
&attach_space, &attach_address, me);
|
||||
hw_unit_size_to_attach_size (hw_parent (me), ®.size, &attach_size, me);
|
||||
|
||||
hw_attach_address (hw_parent (me),
|
||||
0, attach_space, attach_address, attach_size, me);
|
||||
|
||||
/* Extract the desired flash command set. */
|
||||
ret = hw_find_integer_array_property (me, "cmdset", 0, &ival);
|
||||
if (ret != 1 && ret != 2)
|
||||
hw_abort (me, "\"cmdset\" property takes 1 or 2 entries");
|
||||
cfi_encode_16bit (cfi->query.p_id, ival);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE (cfi_cmdsets); ++i)
|
||||
if (cfi_cmdsets[i]->id == ival)
|
||||
cfi->cmdset = cfi_cmdsets[i];
|
||||
if (cfi->cmdset == NULL)
|
||||
hw_abort (me, "cmdset %u not supported", ival);
|
||||
|
||||
if (ret == 2)
|
||||
{
|
||||
hw_find_integer_array_property (me, "cmdset", 1, &ival);
|
||||
cfi_encode_16bit (cfi->query.a_id, ival);
|
||||
}
|
||||
|
||||
/* Extract the desired device size. */
|
||||
if (hw_find_property (me, "size"))
|
||||
cfi->dev_size = hw_find_integer_property (me, "size");
|
||||
else
|
||||
cfi->dev_size = attach_size;
|
||||
cfi->query.dev_size = log2 (cfi->dev_size);
|
||||
|
||||
/* Extract the desired flash width. */
|
||||
if (hw_find_property (me, "width"))
|
||||
{
|
||||
cfi->width = hw_find_integer_property (me, "width");
|
||||
if (cfi->width != 8 && cfi->width != 16 && cfi->width != 32)
|
||||
hw_abort (me, "\"width\" must be 8 or 16 or 32, not %u", cfi->width);
|
||||
}
|
||||
else
|
||||
/* Default to 8 bit. */
|
||||
cfi->width = 8;
|
||||
/* Turn 8/16/32 into 1/2/4. */
|
||||
cfi->width /= 8;
|
||||
|
||||
/* Extract optional write buffer size. */
|
||||
if (hw_find_property (me, "write_size"))
|
||||
{
|
||||
ival = hw_find_integer_property (me, "write_size");
|
||||
cfi_encode_16bit (cfi->query.max_buf_write_len, log2 (ival));
|
||||
}
|
||||
|
||||
/* Extract optional erase regions. */
|
||||
if (hw_find_property (me, "erase_regions"))
|
||||
{
|
||||
ret = hw_find_integer_array_property (me, "erase_regions", 0, &ival);
|
||||
if (ret % 2)
|
||||
hw_abort (me, "\"erase_regions\" must be specified in sets of 2");
|
||||
|
||||
cfi->erase_region_info = HW_NALLOC (me, unsigned char, ret / 2);
|
||||
cfi->erase_regions = HW_NALLOC (me, struct cfi_erase_region, ret / 2);
|
||||
|
||||
for (i = 0; i < ret; i += 2)
|
||||
{
|
||||
unsigned blocks, size;
|
||||
|
||||
hw_find_integer_array_property (me, "erase_regions", i, &ival);
|
||||
blocks = ival;
|
||||
|
||||
hw_find_integer_array_property (me, "erase_regions", i + 1, &ival);
|
||||
size = ival;
|
||||
|
||||
cfi_add_erase_region (me, cfi, blocks, size);
|
||||
}
|
||||
}
|
||||
|
||||
/* Extract optional voltages. */
|
||||
if (hw_find_property (me, "voltage"))
|
||||
{
|
||||
unsigned num = ARRAY_SIZE (cfi->query.voltages);
|
||||
|
||||
ret = hw_find_integer_array_property (me, "voltage", 0, &ival);
|
||||
if (ret > num)
|
||||
hw_abort (me, "\"voltage\" may have only %u arguments", num);
|
||||
|
||||
for (i = 0; i < ret; ++i)
|
||||
{
|
||||
hw_find_integer_array_property (me, "voltage", i, &ival);
|
||||
cfi->query.voltages[i] = ival;
|
||||
}
|
||||
}
|
||||
|
||||
/* Extract optional timeouts. */
|
||||
if (hw_find_property (me, "timeout"))
|
||||
{
|
||||
unsigned num = ARRAY_SIZE (cfi->query.timeouts);
|
||||
|
||||
ret = hw_find_integer_array_property (me, "timeout", 0, &ival);
|
||||
if (ret > num)
|
||||
hw_abort (me, "\"timeout\" may have only %u arguments", num);
|
||||
|
||||
for (i = 0; i < ret; ++i)
|
||||
{
|
||||
hw_find_integer_array_property (me, "timeout", i, &ival);
|
||||
cfi->query.timeouts[i] = ival;
|
||||
}
|
||||
}
|
||||
|
||||
/* Extract optional file. */
|
||||
fd = -1;
|
||||
fd_writable = false;
|
||||
if (hw_find_property (me, "file"))
|
||||
{
|
||||
const char *file;
|
||||
|
||||
ret = hw_find_string_array_property (me, "file", 0, &file);
|
||||
if (ret > 2)
|
||||
hw_abort (me, "\"file\" may take only one argument");
|
||||
if (ret == 2)
|
||||
{
|
||||
const char *writable;
|
||||
|
||||
hw_find_string_array_property (me, "file", 1, &writable);
|
||||
fd_writable = !strcmp (writable, "rw");
|
||||
}
|
||||
|
||||
fd = open (file, fd_writable ? O_RDWR : O_RDONLY);
|
||||
if (fd < 0)
|
||||
hw_abort (me, "unable to read file `%s': %s", file, strerror (errno));
|
||||
}
|
||||
|
||||
/* Figure out where our initial flash data is coming from. */
|
||||
if (fd != -1 && fd_writable)
|
||||
{
|
||||
#ifdef HAVE_MMAP
|
||||
posix_fallocate (fd, 0, cfi->dev_size);
|
||||
|
||||
cfi->mmap = mmap (NULL, cfi->dev_size,
|
||||
PROT_READ | (fd_writable ? PROT_WRITE : 0),
|
||||
MAP_SHARED, fd, 0);
|
||||
|
||||
if (cfi->mmap == MAP_FAILED)
|
||||
cfi->mmap = NULL;
|
||||
else
|
||||
cfi->data = cfi->mmap;
|
||||
#else
|
||||
sim_io_eprintf (hw_system (me),
|
||||
"cfi: sorry, file write support requires mmap()\n");
|
||||
#endif
|
||||
}
|
||||
if (!cfi->data)
|
||||
{
|
||||
size_t read_len;
|
||||
|
||||
cfi->data = HW_NALLOC (me, unsigned char, cfi->dev_size);
|
||||
|
||||
if (fd != -1)
|
||||
{
|
||||
/* Use stdio to avoid EINTR issues with read(). */
|
||||
FILE *fp = fdopen (fd, "r");
|
||||
|
||||
if (fp)
|
||||
read_len = fread (cfi->data, 1, cfi->dev_size, fp);
|
||||
else
|
||||
read_len = 0;
|
||||
|
||||
/* Don't need to fclose() with fdopen("r"). */
|
||||
}
|
||||
else
|
||||
read_len = 0;
|
||||
|
||||
memset (cfi->data, 0xff, cfi->dev_size - read_len);
|
||||
}
|
||||
|
||||
close (fd);
|
||||
}
|
||||
|
||||
/* Once we've been declared in the device tree, this is the main
|
||||
entry point. So allocate state, attach memory addresses, and
|
||||
all that fun stuff. */
|
||||
static void
|
||||
cfi_finish (struct hw *me)
|
||||
{
|
||||
struct cfi *cfi;
|
||||
|
||||
cfi = HW_ZALLOC (me, struct cfi);
|
||||
|
||||
set_hw_data (me, cfi);
|
||||
set_hw_io_read_buffer (me, cfi_io_read_buffer);
|
||||
set_hw_io_write_buffer (me, cfi_io_write_buffer);
|
||||
set_hw_delete (me, cfi_delete_callback);
|
||||
|
||||
attach_cfi_regs (me, cfi);
|
||||
|
||||
/* Initialize the CFI. */
|
||||
cfi->state = CFI_STATE_READ;
|
||||
memcpy (cfi->query.qry, "QRY", 3);
|
||||
cfi->cmdset->setup (me, cfi);
|
||||
}
|
||||
|
||||
/* Every device is required to declare this. */
|
||||
const struct hw_descriptor dv_cfi_descriptor[] =
|
||||
{
|
||||
{"cfi", cfi_finish,},
|
||||
{NULL, NULL},
|
||||
};
|
||||
60
sim/common/dv-cfi.h
Normal file
60
sim/common/dv-cfi.h
Normal file
|
|
@ -0,0 +1,60 @@
|
|||
/* Common Flash Memory Interface (CFI) model.
|
||||
|
||||
Copyright (C) 2010 Free Software Foundation, Inc.
|
||||
Contributed by Analog Devices, Inc.
|
||||
|
||||
This file is part of simulators.
|
||||
|
||||
This program is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
This program is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>. */
|
||||
|
||||
#ifndef DV_CFI_H
|
||||
#define DV_CFI_H
|
||||
|
||||
/* CFI standard. */
|
||||
#define CFI_CMD_CFI_QUERY 0x98
|
||||
#define CFI_ADDR_CFI_QUERY_START 0x55
|
||||
#define CFI_ADDR_CFI_QUERY_RESULT 0x10
|
||||
|
||||
#define CFI_CMD_READ 0xFF
|
||||
#define CFI_CMD_RESET 0xF0
|
||||
#define CFI_CMD_READ_ID 0x90
|
||||
|
||||
/* Intel specific. */
|
||||
#define CFI_CMDSET_INTEL 0x0001
|
||||
#define INTEL_CMD_STATUS_CLEAR 0x50
|
||||
#define INTEL_CMD_STATUS_READ 0x70
|
||||
#define INTEL_CMD_WRITE 0x40
|
||||
#define INTEL_CMD_WRITE_ALT 0x10
|
||||
#define INTEL_CMD_WRITE_BUFFER 0xE8
|
||||
#define INTEL_CMD_WRITE_BUFFER_CONFIRM 0xD0
|
||||
#define INTEL_CMD_LOCK_SETUP 0x60
|
||||
#define INTEL_CMD_LOCK_BLOCK 0x01
|
||||
#define INTEL_CMD_UNLOCK_BLOCK 0xD0
|
||||
#define INTEL_CMD_LOCK_DOWN_BLOCK 0x2F
|
||||
#define INTEL_CMD_ERASE_BLOCK 0x20
|
||||
#define INTEL_CMD_ERASE_CONFIRM 0xD0
|
||||
|
||||
/* Intel Status Register bits. */
|
||||
#define INTEL_SR_BWS (1 << 0) /* BEFP Write. */
|
||||
#define INTEL_SR_BLS (1 << 1) /* Block Locked. */
|
||||
#define INTEL_SR_PSS (1 << 2) /* Program Suspend. */
|
||||
#define INTEL_SR_VPPS (1 << 3) /* Vpp. */
|
||||
#define INTEL_SR_PS (1 << 4) /* Program. */
|
||||
#define INTEL_SR_ES (1 << 5) /* Erase. */
|
||||
#define INTEL_SR_ESS (1 << 6) /* Erase Suspend. */
|
||||
#define INTEL_SR_DWS (1 << 7) /* Device Write. */
|
||||
|
||||
#define INTEL_ID_MANU 0x89
|
||||
|
||||
#endif
|
||||
Loading…
Reference in a new issue