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sim: bfin: fix thinko in bfin_gpio bus addresses

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The bus addresses have to be valid numbers, so 'g' and 'h' won't work.
Oddly, the common code silently ignored this which is why I didn't notice
in the first place.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This commit is contained in:
Mike Frysinger 2011-03-24 03:07:33 +00:00
parent 3aa9e43366
commit a9c3ef4760
2 changed files with 38 additions and 30 deletions
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7
sim/bfin/ChangeLog
View file

@ -1,3 +1,10 @@
2011-03-23 Mike Frysinger <vapier@gentoo.org>
* machs.c (bf50x_dev, bf512_dev, bf516_dev, bf522_dev, bf526_dev,
bf533_dev, bf534_dev, bf537_dev, bf538_dev, bf561_dev, bf592_dev):
Change bfin_gpio addresses from f/g/h to 5/6/7.
(bfin_model_hw_tree_init): Add the bfin_gpio address base to 'a'.
2011-03-17 Mike Frysinger <vapier@gentoo.org>
* configure.ac (AC_CHECK_FUNCS): Check for kill and pread.

61
sim/bfin/machs.c
View file

@ -122,12 +122,12 @@ static const struct bfin_dev_layout bf50x_dev[] =
DEVICE (0xFFC00650, BFIN_MMR_GPTIMER_SIZE, "bfin_gptimer@5"),
DEVICE (0xFFC00660, BFIN_MMR_GPTIMER_SIZE, "bfin_gptimer@6"),
DEVICE (0xFFC00670, BFIN_MMR_GPTIMER_SIZE, "bfin_gptimer@7"),
DEVICE (0xFFC00700, BFIN_MMR_GPIO_SIZE, "bfin_gpio@f"),
DEVICE (0xFFC00700, BFIN_MMR_GPIO_SIZE, "bfin_gpio@5"),
DEVICE (0xFFC00A00, BF50X_MMR_EBIU_AMC_SIZE, "bfin_ebiu_amc"),
DEVICE (0xFFC01000, BFIN_MMR_PPI_SIZE, "bfin_ppi@0"),
DEVICE (0xFFC01400, BFIN_MMR_TWI_SIZE, "bfin_twi@0"),
DEVICE (0xFFC01500, BFIN_MMR_GPIO_SIZE, "bfin_gpio@g"),
DEVICE (0xFFC01700, BFIN_MMR_GPIO_SIZE, "bfin_gpio@h"),
DEVICE (0xFFC01500, BFIN_MMR_GPIO_SIZE, "bfin_gpio@6"),
DEVICE (0xFFC01700, BFIN_MMR_GPIO_SIZE, "bfin_gpio@7"),
DEVICE (0xFFC02000, BFIN_MMR_UART2_SIZE, "bfin_uart2@1"),
DEVICE (0xFFC03400, BFIN_MMR_SPI_SIZE, "bfin_spi@1"),
};
@ -178,13 +178,13 @@ static const struct bfin_dev_layout bf512_dev[] =
DEVICE (0xFFC00650, BFIN_MMR_GPTIMER_SIZE, "bfin_gptimer@5"),
DEVICE (0xFFC00660, BFIN_MMR_GPTIMER_SIZE, "bfin_gptimer@6"),
DEVICE (0xFFC00670, BFIN_MMR_GPTIMER_SIZE, "bfin_gptimer@7"),
DEVICE (0xFFC00700, BFIN_MMR_GPIO_SIZE, "bfin_gpio@f"),
DEVICE (0xFFC00700, BFIN_MMR_GPIO_SIZE, "bfin_gpio@5"),
DEVICE (0xFFC00A00, BFIN_MMR_EBIU_AMC_SIZE, "bfin_ebiu_amc"),
DEVICE (0xFFC00A10, BFIN_MMR_EBIU_SDC_SIZE, "bfin_ebiu_sdc"),
DEVICE (0xFFC01000, BFIN_MMR_PPI_SIZE, "bfin_ppi@0"),
DEVICE (0xFFC01400, BFIN_MMR_TWI_SIZE, "bfin_twi@0"),
DEVICE (0xFFC01500, BFIN_MMR_GPIO_SIZE, "bfin_gpio@g"),
DEVICE (0xFFC01700, BFIN_MMR_GPIO_SIZE, "bfin_gpio@h"),
DEVICE (0xFFC01500, BFIN_MMR_GPIO_SIZE, "bfin_gpio@6"),
DEVICE (0xFFC01700, BFIN_MMR_GPIO_SIZE, "bfin_gpio@7"),
DEVICE (0xFFC02000, BFIN_MMR_UART_SIZE, "bfin_uart@1"),
DEVICE (0xFFC03400, BFIN_MMR_SPI_SIZE, "bfin_spi@1"),
DEVICE (0xFFC03600, BFIN_MMR_OTP_SIZE, "bfin_otp"),
@ -204,13 +204,13 @@ static const struct bfin_dev_layout bf516_dev[] =
DEVICE (0xFFC00650, BFIN_MMR_GPTIMER_SIZE, "bfin_gptimer@5"),
DEVICE (0xFFC00660, BFIN_MMR_GPTIMER_SIZE, "bfin_gptimer@6"),
DEVICE (0xFFC00670, BFIN_MMR_GPTIMER_SIZE, "bfin_gptimer@7"),
DEVICE (0xFFC00700, BFIN_MMR_GPIO_SIZE, "bfin_gpio@f"),
DEVICE (0xFFC00700, BFIN_MMR_GPIO_SIZE, "bfin_gpio@5"),
DEVICE (0xFFC00A00, BFIN_MMR_EBIU_AMC_SIZE, "bfin_ebiu_amc"),
DEVICE (0xFFC00A10, BFIN_MMR_EBIU_SDC_SIZE, "bfin_ebiu_sdc"),
DEVICE (0xFFC01000, BFIN_MMR_PPI_SIZE, "bfin_ppi@0"),
DEVICE (0xFFC01400, BFIN_MMR_TWI_SIZE, "bfin_twi@0"),
DEVICE (0xFFC01500, BFIN_MMR_GPIO_SIZE, "bfin_gpio@g"),
DEVICE (0xFFC01700, BFIN_MMR_GPIO_SIZE, "bfin_gpio@h"),
DEVICE (0xFFC01500, BFIN_MMR_GPIO_SIZE, "bfin_gpio@6"),
DEVICE (0xFFC01700, BFIN_MMR_GPIO_SIZE, "bfin_gpio@7"),
DEVICE (0xFFC02000, BFIN_MMR_UART_SIZE, "bfin_uart@1"),
DEVICE (0xFFC03000, BFIN_MMR_EMAC_SIZE, "bfin_emac"),
DEVICE (0, 0x20, "bfin_emac/eth_phy"),
@ -264,13 +264,13 @@ static const struct bfin_dev_layout bf522_dev[] =
DEVICE (0xFFC00650, BFIN_MMR_GPTIMER_SIZE, "bfin_gptimer@5"),
DEVICE (0xFFC00660, BFIN_MMR_GPTIMER_SIZE, "bfin_gptimer@6"),
DEVICE (0xFFC00670, BFIN_MMR_GPTIMER_SIZE, "bfin_gptimer@7"),
DEVICE (0xFFC00700, BFIN_MMR_GPIO_SIZE, "bfin_gpio@f"),
DEVICE (0xFFC00700, BFIN_MMR_GPIO_SIZE, "bfin_gpio@5"),
DEVICE (0xFFC00A00, BFIN_MMR_EBIU_AMC_SIZE, "bfin_ebiu_amc"),
DEVICE (0xFFC00A10, BFIN_MMR_EBIU_SDC_SIZE, "bfin_ebiu_sdc"),
DEVICE (0xFFC01000, BFIN_MMR_PPI_SIZE, "bfin_ppi@0"),
DEVICE (0xFFC01400, BFIN_MMR_TWI_SIZE, "bfin_twi@0"),
DEVICE (0xFFC01500, BFIN_MMR_GPIO_SIZE, "bfin_gpio@g"),
DEVICE (0xFFC01700, BFIN_MMR_GPIO_SIZE, "bfin_gpio@h"),
DEVICE (0xFFC01500, BFIN_MMR_GPIO_SIZE, "bfin_gpio@6"),
DEVICE (0xFFC01700, BFIN_MMR_GPIO_SIZE, "bfin_gpio@7"),
DEVICE (0xFFC02000, BFIN_MMR_UART_SIZE, "bfin_uart@1"),
DEVICE (0xFFC03600, BFIN_MMR_OTP_SIZE, "bfin_otp"),
DEVICE (0xFFC03700, BFIN_MMR_NFC_SIZE, "bfin_nfc"),
@ -292,13 +292,13 @@ static const struct bfin_dev_layout bf526_dev[] =
DEVICE (0xFFC00650, BFIN_MMR_GPTIMER_SIZE, "bfin_gptimer@5"),
DEVICE (0xFFC00660, BFIN_MMR_GPTIMER_SIZE, "bfin_gptimer@6"),
DEVICE (0xFFC00670, BFIN_MMR_GPTIMER_SIZE, "bfin_gptimer@7"),
DEVICE (0xFFC00700, BFIN_MMR_GPIO_SIZE, "bfin_gpio@f"),
DEVICE (0xFFC00700, BFIN_MMR_GPIO_SIZE, "bfin_gpio@5"),
DEVICE (0xFFC00A00, BFIN_MMR_EBIU_AMC_SIZE, "bfin_ebiu_amc"),
DEVICE (0xFFC00A10, BFIN_MMR_EBIU_SDC_SIZE, "bfin_ebiu_sdc"),
DEVICE (0xFFC01000, BFIN_MMR_PPI_SIZE, "bfin_ppi@0"),
DEVICE (0xFFC01400, BFIN_MMR_TWI_SIZE, "bfin_twi@0"),
DEVICE (0xFFC01500, BFIN_MMR_GPIO_SIZE, "bfin_gpio@g"),
DEVICE (0xFFC01700, BFIN_MMR_GPIO_SIZE, "bfin_gpio@h"),
DEVICE (0xFFC01500, BFIN_MMR_GPIO_SIZE, "bfin_gpio@6"),
DEVICE (0xFFC01700, BFIN_MMR_GPIO_SIZE, "bfin_gpio@7"),
DEVICE (0xFFC02000, BFIN_MMR_UART_SIZE, "bfin_uart@1"),
DEVICE (0xFFC03000, BFIN_MMR_EMAC_SIZE, "bfin_emac"),
DEVICE (0, 0x20, "bfin_emac/eth_phy"),
@ -359,7 +359,7 @@ static const struct bfin_dev_layout bf533_dev[] =
DEVICE (0xFFC00600, BFIN_MMR_GPTIMER_SIZE, "bfin_gptimer@0"),
DEVICE (0xFFC00610, BFIN_MMR_GPTIMER_SIZE, "bfin_gptimer@1"),
DEVICE (0xFFC00620, BFIN_MMR_GPTIMER_SIZE, "bfin_gptimer@2"),
DEVICE (0xFFC00700, BFIN_MMR_GPIO_SIZE, "bfin_gpio@f"),
DEVICE (0xFFC00700, BFIN_MMR_GPIO_SIZE, "bfin_gpio@5"),
DEVICE (0xFFC00A00, BFIN_MMR_EBIU_AMC_SIZE, "bfin_ebiu_amc"),
DEVICE (0xFFC00A10, BFIN_MMR_EBIU_SDC_SIZE, "bfin_ebiu_sdc"),
DEVICE (0xFFC01000, BFIN_MMR_PPI_SIZE, "bfin_ppi@0"),
@ -430,13 +430,13 @@ static const struct bfin_dev_layout bf534_dev[] =
DEVICE (0xFFC00650, BFIN_MMR_GPTIMER_SIZE, "bfin_gptimer@5"),
DEVICE (0xFFC00660, BFIN_MMR_GPTIMER_SIZE, "bfin_gptimer@6"),
DEVICE (0xFFC00670, BFIN_MMR_GPTIMER_SIZE, "bfin_gptimer@7"),
DEVICE (0xFFC00700, BFIN_MMR_GPIO_SIZE, "bfin_gpio@f"),
DEVICE (0xFFC00700, BFIN_MMR_GPIO_SIZE, "bfin_gpio@5"),
DEVICE (0xFFC00A00, BFIN_MMR_EBIU_AMC_SIZE, "bfin_ebiu_amc"),
DEVICE (0xFFC00A10, BFIN_MMR_EBIU_SDC_SIZE, "bfin_ebiu_sdc"),
DEVICE (0xFFC01000, BFIN_MMR_PPI_SIZE, "bfin_ppi@0"),
DEVICE (0xFFC01400, BFIN_MMR_TWI_SIZE, "bfin_twi@0"),
DEVICE (0xFFC01500, BFIN_MMR_GPIO_SIZE, "bfin_gpio@g"),
DEVICE (0xFFC01700, BFIN_MMR_GPIO_SIZE, "bfin_gpio@h"),
DEVICE (0xFFC01500, BFIN_MMR_GPIO_SIZE, "bfin_gpio@6"),
DEVICE (0xFFC01700, BFIN_MMR_GPIO_SIZE, "bfin_gpio@7"),
DEVICE (0xFFC02000, BFIN_MMR_UART_SIZE, "bfin_uart@1"),
};
static const struct bfin_dev_layout bf537_dev[] =
@ -453,13 +453,13 @@ static const struct bfin_dev_layout bf537_dev[] =
DEVICE (0xFFC00650, BFIN_MMR_GPTIMER_SIZE, "bfin_gptimer@5"),
DEVICE (0xFFC00660, BFIN_MMR_GPTIMER_SIZE, "bfin_gptimer@6"),
DEVICE (0xFFC00670, BFIN_MMR_GPTIMER_SIZE, "bfin_gptimer@7"),
DEVICE (0xFFC00700, BFIN_MMR_GPIO_SIZE, "bfin_gpio@f"),
DEVICE (0xFFC00700, BFIN_MMR_GPIO_SIZE, "bfin_gpio@5"),
DEVICE (0xFFC00A00, BFIN_MMR_EBIU_AMC_SIZE, "bfin_ebiu_amc"),
DEVICE (0xFFC00A10, BFIN_MMR_EBIU_SDC_SIZE, "bfin_ebiu_sdc"),
DEVICE (0xFFC01000, BFIN_MMR_PPI_SIZE, "bfin_ppi@0"),
DEVICE (0xFFC01400, BFIN_MMR_TWI_SIZE, "bfin_twi@0"),
DEVICE (0xFFC01500, BFIN_MMR_GPIO_SIZE, "bfin_gpio@g"),
DEVICE (0xFFC01700, BFIN_MMR_GPIO_SIZE, "bfin_gpio@h"),
DEVICE (0xFFC01500, BFIN_MMR_GPIO_SIZE, "bfin_gpio@6"),
DEVICE (0xFFC01700, BFIN_MMR_GPIO_SIZE, "bfin_gpio@7"),
DEVICE (0xFFC02000, BFIN_MMR_UART_SIZE, "bfin_uart@1"),
DEVICE (0xFFC03000, BFIN_MMR_EMAC_SIZE, "bfin_emac"),
DEVICE (0, 0x20, "bfin_emac/eth_phy"),
@ -501,7 +501,7 @@ static const struct bfin_dev_layout bf538_dev[] =
DEVICE (0xFFC00A10, BFIN_MMR_EBIU_SDC_SIZE, "bfin_ebiu_sdc"),
DEVICE (0xFFC01000, BFIN_MMR_PPI_SIZE, "bfin_ppi@0"),
DEVICE (0xFFC01400, BFIN_MMR_TWI_SIZE, "bfin_twi@0"),
DEVICE (0xFFC00700, BFIN_MMR_GPIO_SIZE, "bfin_gpio@f"),
DEVICE (0xFFC00700, BFIN_MMR_GPIO_SIZE, "bfin_gpio@5"),
_DEVICE (0xFFC02000, BFIN_MMR_UART_SIZE, "bfin_uart@1", 1),
_DEVICE (0xFFC02100, BFIN_MMR_UART_SIZE, "bfin_uart@2", 1),
DEVICE (0xFFC02200, BFIN_MMR_TWI_SIZE, "bfin_twi@1"),
@ -674,18 +674,18 @@ static const struct bfin_dev_layout bf561_dev[] =
DEVICE (0xFFC00650, BFIN_MMR_GPTIMER_SIZE, "bfin_gptimer@5"),
DEVICE (0xFFC00660, BFIN_MMR_GPTIMER_SIZE, "bfin_gptimer@6"),
DEVICE (0xFFC00670, BFIN_MMR_GPTIMER_SIZE, "bfin_gptimer@7"),
DEVICE (0xFFC00700, BFIN_MMR_GPIO_SIZE, "bfin_gpio@f"),
DEVICE (0xFFC00700, BFIN_MMR_GPIO_SIZE, "bfin_gpio@5"),
DEVICE (0xFFC00A00, BFIN_MMR_EBIU_AMC_SIZE, "bfin_ebiu_amc"),
DEVICE (0xFFC00A10, BFIN_MMR_EBIU_SDC_SIZE, "bfin_ebiu_sdc"),
_DEVICE (0xFFC01000, BFIN_MMR_PPI_SIZE, "bfin_ppi@0", 1),
DEVICE (0xFFC01200, BFIN_MMR_WDOG_SIZE, "bfin_wdog@1"),
_DEVICE (0xFFC01300, BFIN_MMR_PPI_SIZE, "bfin_ppi@1", 1),
DEVICE (0xFFC01500, BFIN_MMR_GPIO_SIZE, "bfin_gpio@g"),
DEVICE (0xFFC01500, BFIN_MMR_GPIO_SIZE, "bfin_gpio@6"),
DEVICE (0xFFC01600, BFIN_MMR_GPTIMER_SIZE, "bfin_gptimer@8"),
DEVICE (0xFFC01610, BFIN_MMR_GPTIMER_SIZE, "bfin_gptimer@9"),
DEVICE (0xFFC01620, BFIN_MMR_GPTIMER_SIZE, "bfin_gptimer@10"),
DEVICE (0xFFC01630, BFIN_MMR_GPTIMER_SIZE, "bfin_gptimer@11"),
DEVICE (0xFFC01700, BFIN_MMR_GPIO_SIZE, "bfin_gpio@h"),
DEVICE (0xFFC01700, BFIN_MMR_GPIO_SIZE, "bfin_gpio@7"),
};
static const struct bfin_dmac_layout bf561_dmac[] =
{
@ -711,11 +711,11 @@ static const struct bfin_dev_layout bf592_dev[] =
DEVICE (0xFFC00600, BFIN_MMR_GPTIMER_SIZE, "bfin_gptimer@0"),
DEVICE (0xFFC00610, BFIN_MMR_GPTIMER_SIZE, "bfin_gptimer@1"),
DEVICE (0xFFC00620, BFIN_MMR_GPTIMER_SIZE, "bfin_gptimer@2"),
DEVICE (0xFFC00700, BFIN_MMR_GPIO_SIZE, "bfin_gpio@f"),
DEVICE (0xFFC00700, BFIN_MMR_GPIO_SIZE, "bfin_gpio@5"),
DEVICE (0xFFC01000, BFIN_MMR_PPI_SIZE, "bfin_ppi@0"),
DEVICE (0xFFC01300, BFIN_MMR_SPI_SIZE, "bfin_spi@1"),
DEVICE (0xFFC01400, BFIN_MMR_TWI_SIZE, "bfin_twi@0"),
DEVICE (0xFFC01500, BFIN_MMR_GPIO_SIZE, "bfin_gpio@g"),
DEVICE (0xFFC01500, BFIN_MMR_GPIO_SIZE, "bfin_gpio@6"),
};
static const struct bfin_dmac_layout bf592_dmac[] =
{
@ -858,10 +858,11 @@ bfin_model_hw_tree_init (SIM_DESC sd, SIM_CPU *cpu)
}
else if (!strncmp (dev->dev, "bfin_gpio", 9))
{
char port = 'a' + strtol(&dev->dev[10], NULL, 0);
sim_hw_parse (sd, "/core/%s > mask_a port%c_irq_a /core/bfin_sic",
dev->dev, dev->dev[10]);
dev->dev, port);
sim_hw_parse (sd, "/core/%s > mask_b port%c_irq_b /core/bfin_sic",
dev->dev, dev->dev[10]);
dev->dev, port);
}
}