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Author SHA1 Message Date
Ian Lance Taylor
ea6c562019 * mips16-opc.c: Add "abs". 1996-12-30 16:38:24 +00:00
Fred Fish
a79d0193ec * Makefile.in (ALL_MACHINES): Add tic80-dis.o and tic80-opc.o. 
* disassemble.c (ARCH_tic80): Define if ARCH_all is defined.
	(disassembler): Add bfd_arch_tic80 support to set disassemble
 	to print_insn_tic80.
	* tic80-dis.c (print_insn_tic80): Add stub.
 1996-12-29 18:01:29 +00:00
Fred Fish
6357e7f68e (Laying groundwork (that will be incrementally fleshed out) for TIc80 support) 
* configure.in (arch in $selarchs): Add bfd_tic80_arch entry.
	* configure: Regenerate with autoconf.
	* tic80-dis.c: Add file.
	* tic80-opc.c: Add file.
 1996-12-28 05:36:52 +00:00
Martin Hunt
b5baebe405 Fri Dec 20 14:30:19 1996 Martin M. Hunt <hunt@pizza.cygnus.com> 
* d10v-opc.c (pre_defined_registers):  Add cr[0-15], dpc, dpsw, link.
 1996-12-20 22:32:16 +00:00
Jeff Law
e098bae8e7 * mn10200-opc.c (mn10200_operands): Add SIMM16N. 
(mn10200_opcodes): Use it for some logicals and btst insns.
        Add "break" and "trap" instructions.
 1996-12-18 17:12:16 +00:00
Jeff Law
374cb3020b * mn10300-opc.c (mn10300_opcodes): Add "break" instruction. 
For gdb.
 1996-12-16 22:28:24 +00:00
Jeff Law
d21f1eae7d * mn10200-opc.c: Add pseudo-ops for "mov (an),am" and "mov an,(am)". 1996-12-16 20:05:07 +00:00
Ian Lance Taylor
39e5bea281 * mips-dis.c (print_mips16_insn_arg): The base address of a PC 
relative load or add now depends upon whether the instruction is
	in a delay slot.
 1996-12-15 03:37:08 +00:00
Jeff Law
c6b62ad1d7 * mn10200-dis.c: Finish writing disassembler. 
* mn10200-opc.c (mn10200_opcodes): Fix mask for "mov imm8,dn".
        Fix mask for "jmp (an)".
mn10200 disassembler works!
 1996-12-12 08:09:27 +00:00
Jeff Law
77955104ba * mn10300-dis.c (disassemble, print_insn_mn10300): Corrently 
handle endianness issues for mn10300.
 1996-12-11 17:34:15 +00:00
Jeff Law
532700fc31 * mn10200-opc.c (mn10200_opcodes): Fix operands for "movb dm,(an)". 
Yoshihiro Adachi sez the manual was wrong for this insn.
 1996-12-11 16:29:02 +00:00
Jeff Law
7bfc95d917 * mn10200-opc.c (mn10200_opcodes): "mov imm8,d0" is a format 2 
instruction.  Fix opcode field for "movb (imm24),dn".
Stuff found by the testsuite.
 1996-12-10 20:34:14 +00:00
Jeff Law
0888b4a38a * mn10200-opc.c (mn10200_operands): Fix insertion position 
for DI operand.
Found by gas testsuite.
 1996-12-10 19:13:07 +00:00
Jeff Law
781766e7e1 * mn10200-opc.c: Create mn10200 opcode table. 
* mn10200-dis.c: Flesh out mn10200 disassembler.  Not ready,
        but moving along nicely.
Checkpointing today's mn10200 work.
 1996-12-09 23:48:15 +00:00
Peter Schauer
b65415a446 * Makefile.in (ALL_MACHINES): Add mips16-opc.o. 1996-12-08 12:35:28 +00:00
J.T. Conklin
6827a1c758 * m68k-opc.c (m68k_opcodes): Revert change to use < and > 
specifiers for fmovem* instructions.
 1996-12-07 00:54:51 +00:00
Jeff Law
4db788a664 * mn10300-dis.c (disassemble): Remove '$' register prefixing. 1996-12-06 22:40:31 +00:00
Ian Lance Taylor
34212ec3f6 * mips16-opc.c: Change opcode for entry/exit to avoid conflicting 
with dsrl.
 1996-12-06 22:35:01 +00:00
Jeff Law
8329699005 * mn10300-opc.c: Add some comments explaining the various 
operands and such.

        * mn10300-dis.c (disassemble): Fix minor gcc -Wall warnings.
 1996-12-06 22:04:12 +00:00
J.T. Conklin
e72d5a50f9 * m68k-dis.c (print_insn_arg): Handle new < and > operand 
specifiers.
* m68k-opc.c (m68k_opcodes): Simplify table by using < and >
operand specifiers in fmovm* instructions.
 1996-12-05 20:12:47 +00:00
Ian Lance Taylor
70eb6bdd65 * ppc-opc.c (insert_li): Give an error if the offset has the two 
least significant bits set.
PR 11201.
 1996-12-04 19:53:09 +00:00
Jeff Law
069279b34a * mn10300-dis.c (disasemble): Finish conversion to '$' as 
register prefix.
Fixes improper disassembly of movm instructions.
 1996-11-26 23:04:02 +00:00
Ian Lance Taylor
0e809bba05 * configure: Rebuild with autoconf 2.12. 1996-11-26 21:59:23 +00:00
Jeff Law
23b01150f5 * mn10300-opc.c (mn10300_opcodes): Fix mask field for 
mov am,(imm32,sp).
Found during initial simulator work.
 1996-11-26 20:28:34 +00:00
Ian Lance Taylor
8d67dc3077 Add support for mips16 (16 bit MIPS implementation): 
* mips16-opc.c: New file.
	* mips-dis.c: Include "elf-bfd.h" and "elf/mips.h".
	(mips16_reg_names): New static array.
	(print_insn_big_mips): Use print_insn_mips16 in 16 bit mode or
	after seeing a 16 bit symbol.
	(print_insn_little_mips): Likewise.
	(print_insn_mips16): New static function.
	(print_mips16_insn_arg): New static function.
	* mips-opc.c: Add jalx instruction.
	* Makefile.in (mips16-opc.o): New target.
	* configure.in: Use mips16-opc.o for bfd_mips_arch.
	* configure: Rebuild.
 1996-11-26 15:59:18 +00:00
J.T. Conklin
520e44a15a * m68k-opc.c (m68k_opcodes): Simplify table by using < and > 
operand specifiers in *save, *restore and movem* instructions.
 1996-11-26 03:24:55 +00:00
J.T. Conklin
da34628ad8 * m68k-opc.c (m68k-opcodes): Fix move and movem instructions for 
the coldfire.
 1996-11-26 01:54:16 +00:00
J.T. Conklin
0dd19a8f36 * m68k-opc.c (m68k-opcodes): Fix many forms of the move 
instruction for the coldfire.
 1996-11-26 00:17:17 +00:00
J.T. Conklin
09d205d155 * m68k-opc.c (m68k-opcodes): The coldfire (mcf5200) can only use 
register operands for immediate arithmetic, not, neg, negx, and
set according to condition instructions.
 1996-11-25 22:33:46 +00:00
J.T. Conklin
1852237cf4 * m68k-opc.c (m68k_opcodes): Consistantly Use "s" as the storage 
specifier of the effective-address operand in immediate forms of
arithmetic instructions.  The specifier for the immediate operand
notes how and where the constant will be stored.
 1996-11-25 21:39:55 +00:00
Jeff Law
731c7b4bb8 * mn10300-opc.c (mn10300_opcodes): Remove redundant "lcc" 
opcode.
 1996-11-25 19:46:21 +00:00
Jeff Law
76783aa31c * mn10300-dis.c (disassemble): Use '$' instead of '%' for 
register prefix.
It's easier for the assembler...
 1996-11-25 18:46:06 +00:00
Jeff Law
11cd057a41 * mn10300-dis.c (disassemble): Prefix registers with '%'. 1996-11-25 18:21:08 +00:00
Jeff Law
f0e98103c5 * mn10300-dis.c (disassemble): Handle register lists. 
More disassembler stuff.
 1996-11-20 18:39:48 +00:00
Jeff Law
f039819018 * mn10300-opc.c: Fix handling of register list operand for 
"call", "ret", and "rets" instructions.
Stuff noticed while working on disasembler.
 1996-11-20 18:32:44 +00:00
Jeff Law
aa9c04cd55 * mn10300-dis.c (disassemble): Print PC-relative and memory 
addresses symbolically if possible.
        * mn10300-opc.c: Distinguish between absolute memory addresses,
        pc-relative offsets & random immediates.
More disassembler work.
 1996-11-20 18:02:31 +00:00
Jeff Law
f497f3ae7c * mn10300-dis.c (print_insn_mn10300): Fix fetch of last byte 
in 7 byte insns.
        (disassemble): Handle SPLIT and EXTENDED operands.
 1996-11-20 17:36:31 +00:00
Jeff Law
d91028d2c7 * mn10300-dis.c: Rough cut at printing some operands. 1996-11-20 00:55:22 +00:00
Jeff Law
4aa92185f8 * mn10300-dis.c: Start working on disassembler support. 
* mn10300-opc.c (mn10300_opcodes): Fix masks on several insns.
Selects opcodes & consumes bytes.  Breaks badly if given data instead of
code.  No operands yet.
 1996-11-19 23:59:27 +00:00
Jeff Law
99246e03f9 * mn10300-opc.c (mn10300_operands): Add "REGS" for a register 
list.
        (mn10300_opcodes): Use REGS for register list in "movm" instructions.
 1996-11-19 20:32:31 +00:00
Michael Meissner
b337f8691f Add3 sets the carry 1996-11-18 20:21:55 +00:00
Jeff Law
54dfaf0a65 * mn10300-opc.c (mn10300_opcodes): Demand parens around 
register argument is calls and jmp instructions.
Found trying to build libgcc2 for the mn10300 :-)
 1996-11-15 20:43:44 +00:00
Jeff Law
f2ab9a7505 * mn10300-opc.c (mn10300_opcodes): Use DN01 for putx and 
getx operand.  Fix opcode for mulqu imm,dn.
Fix bugs exposed by gas testsuite (extended instructions).
 1996-11-07 07:26:25 +00:00
Jeff Law
26433754cc * mn10300-opc.c (mn10300_operands): Hijack "bits" field 
in MN10300_OPERAND_SPLIT operands for how many bits
        appear in the basic insn word.  Add IMM32_HIGH24,
        IMM32_HIGH24_LOWSHIFT8, IMM8E_SHIFT8.
        (mn10300_opcodes): Use new operands as needed.
Support for everything in the basic instruction manual (yippie!)
 1996-11-06 21:58:21 +00:00
Jeff Law
64ce06688d * mn10300-opc.c (mn10300_operands): Add IMM32_LOWSHIFT8 
for bset, bclr, btst instructions.
        (mn10300_opcodes): Use new IMM32_LOWSHIFT8 as needed.
For btst, bclr & bset.
 1996-11-06 21:18:27 +00:00
Jeff Law
fdef41f30b * mn10300-opc.c (mn10300_operands): Remove many redundant 
operands.  Update opcode table as appropriate.
        (IMM32): Add MN10300_OPERAND_SPLIT flag.
        (mn10300_opcodes): Fix single bit error in mov imm32,dn insn.
Cleaning up a little.
Attempting to insert most 32bit operands.
And a bug found by assembler testsuite.
 1996-11-06 20:44:58 +00:00
Jeff Law
bb5e141ab4 * mn10300-opc.c (mn10300_operands): Add DN2, DM2, AN2, AM2 
operands (for indexed load/stores).  Fix bitpos for DI
        operand.  Add SN8N_SHIFT8, IMM8_SHIFT8, and D16_SHIFT for the
        few instructions that insert immediates/displacements in the
        middle of the instruction.  Add IMM8E for 8 bit immediate in
        the extended part of an instruction.
        (mn10300_operands): Use new opcodes as appropriate.
Opcode table changes so we can correctly insert everything except
32bit operands.
 1996-11-05 20:29:31 +00:00
Martin Hunt
733861650a Tue Nov 5 10:30:51 1996 Martin M. Hunt <hunt@pizza.cygnus.com> 
* d10v-opc.c (d10v_opcodes): Declare the trap instruction
 	sequential so the assembler never parallelizes it with
	other instructions.
 1996-11-05 18:34:19 +00:00
Jeff Law
e85c140a27 * mn10300-opc.c (mn10300_operands): Add DN01 and AN01 for 
a data/address register that appears in register field 0
        and register field 1.
        (mn10300_opcodes): Use DN01 and AN01 for mov/cmp imm8,DN/AN

Hacking Matsushita again.  Yippie!
 1996-11-04 19:51:31 +00:00
Ian Lance Taylor
03e9562378 Fri Nov 1 10:29:11 1996 Richard Henderson <rth@tamu.edu> 
* alpha-dis.c (print_insn_alpha): Use new NOPAL mask for
	standard disassembly.

	* alpha-opc.c (alpha_operands): Rearrange flags slot.
	(alpha_opcodes): Add new BWX, CIX, and MAX instructions.
	Recategorize PALcode instructions.
 1996-11-01 18:30:43 +00:00
Jeff Law
7d2759fc5b * v850-opc.c (v850_opcodes): Add relaxing "jbr". 1996-10-30 23:52:31 +00:00
Ian Lance Taylor
b56c3d6cee * mips-dis.c (_print_insn_mips): Don't print a trailing tab if 
there are no operand types.
 1996-10-29 21:31:22 +00:00
Jeff Law
244558e354 * v850-opc.c (D9_RELAX): Renamed from D9, all references 
changed.
        (v850_operands): Make sure D22 immediately follows D9_RELAX.
 1996-10-29 19:25:35 +00:00
Jeff Law
0f02ae6e5a * v850-opc.c (v850_opcodes): Add "jCC" instructions (aliases for 
"bCC"instructions).
Because quantum's code uses jnz, jcc, etc etc etc.
 1996-10-24 23:55:11 +00:00
Ian Lance Taylor
4f6d7c2c30 * mips-dis.c (_print_insn_mips): Use a tab between the instruction 
and the arguments.
 1996-10-24 21:21:37 +00:00
Ian Lance Taylor
de145351e8 * ppc-opc.c (PPCPWR2): Define. 
(powerpc_opcodes): Use PPCPWR2 for fsqrt, rather than duplicating
	it.
 1996-10-23 03:34:07 +00:00
Jeff Law
63dc694d29 * mn10300-opc.c (mn10300_opcodes): Fix typo in opcode 
field for movhu instruction.
Bug found by gas testsuite.

        * v850-dis.c (disassemble): For V850_OPERAND_SIGNED operands,
        cast value to "long" not "signed long" to keep hpux10
        compiler quiet.
Found in an attempt to build the v850 on hpux10 with the HP
compiler.
 1996-10-11 22:06:47 +00:00
Jeff Law
02d4ad193b * mn10300-opc.c (mn10300_opcodes): Fix typo in opcode field 
for mov (abs16),DN.
Bug found by gas testsuite.  Matsushita.
 1996-10-10 21:42:01 +00:00
Jeff Law
ba8ed10c7e * mn10300-opc.c (FMT*): Remove definitions. 
Moved into opcode/mn10300.h
 1996-10-10 20:31:06 +00:00
Jeff Law
1e5ddd3be4 * mn10300-opc.c (mn10300_opcodes): Fix destination register 
for shift-by-register opcodes.
Bug found by testsuite.
 1996-10-10 19:08:46 +00:00
Jeff Law
36b34aa4a9 * mn10300-opc.c (mn10300_operands): Break DN, DM, AN, AM 
into [AD][MN][01] for encoding the position of the register
        in the opcode.
Matsushita.
 1996-10-10 16:28:14 +00:00
Jeff Law
344d6417bb * mn10300-opc.c (mn10300_opcodes): Add "extended" instructions, 
"putx", "getx", "mulq", "mulqu", "sat16", "sat24", "bsch".
Matsushita.
 1996-10-09 17:20:59 +00:00
Jeff Law
db22905430 * mn10300-opc.c (mn10300_operands): Remove "REGS" operand. 
Fix various typos.  Add "PAREN" operand.
        (MEM, MEM2): Define.
        (mn10300_opcodes): Surround all memory addresses with "PAREN"
        operands.  Fix several typos.
Should parse all opcodes in the instruction specification, except the
"user extension instructions".
 1996-10-08 21:09:57 +00:00
Jeff Law
06b796584d * mn10300-opc.c (mn10300_opcodes): Fix typos in yesterday's 
changes.
Matsushita.
 1996-10-08 17:56:40 +00:00
Jeff Law
5ab7bce62d * mn10300-opc.c (FMT_XX): Renumber starting at one. 
(mn10300_operands): Rough cut.  Enough to parse "mov" instructions
        at this time.
        (mn10300_opcodes): Break opcode format out into its own field.
        Update many operand fields to deal with signed vs unsigned
        issues.  Fix one or two typos in the "mov" instruction
        opcode, mask and/or operand fields.
Checkpointing today's work.  Matsushita.
 1996-10-07 22:52:18 +00:00
Ian Lance Taylor
6ba7ecd4eb Mon Oct 7 11:39:49 1996 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de> 
* m68k-opc.c (plusha): Prefer encoding for m68040up, in case
	m68851 wasn't reset.
 1996-10-07 15:41:56 +00:00
Jeff Law
99777c0bfb * mn10300-opc.c (mn10300_opcodes): Add opcode & masks for 
all opcodes.  Very rough cut at operands for all opcodes.
Matsushita.
 1996-10-04 22:02:43 +00:00
Jeff Law
cd8a9026b9 * mn10300-opc.c (mn10300_opcodes): Start fleshing out the 
opcode table.
Checkpointint 10300 work.
 1996-10-04 19:20:19 +00:00
Ian Lance Taylor
6c9370db2a * Makefile.in (ALL_MACHINES): Add mn10200-dis.o, mn10200-opc.o, 
mn10300-dis.o, and mn10300-opc.o.
Also add d10v and v850 files, with appropriate sanitization.
 1996-10-03 21:17:46 +00:00
Jeff Law
ae1b99e42d Grrr. The mn10200 and mn10300 are _not_ similar enough to easily support 
with a single generic configuration.  So break them up into two different
configurations.  See the individual ChangeLogs for additional detail.
 1996-10-03 16:42:22 +00:00
Jason Molenda
42b4add910 * Makefile.in (MOSTLYCLEAN): Move config.log to distclean. 1996-10-03 06:58:15 +00:00
Jeff Law
e7c50ceffd * mn10x00-opc.c, mn10x00-dis.c: New files for Matsushita 
MN10x00 processors.
        * disassemble (ARCH_mn10x00): Define.
        (disassembler): Handle bfd_arch_mn10x00.
        * configure.in: Recognize bfd_mn10x00_arch.
        * configure: Rebuilt.
Continue stubbing out for Matsushita work.
 1996-10-03 05:31:01 +00:00
Jeff Law
072b27ea5e Add missing copyright. 1996-10-03 04:48:16 +00:00
Ian Lance Taylor
a5cb84dd6f * i386-dis.c (op_rtn): Change to be a pointer. Adjust uses 
accordingly.  Don't declare functions using op_rtn.
Remove ANSI C constructs.
 1996-10-01 14:50:19 +00:00
Ian Lance Taylor
800bda836e * mips-opc.c: Add a case for "div" and "divu" with two registers 
and a destination of $0.
PR 10654.
 1996-09-17 16:07:41 +00:00
Fred Fish
d7deed257c * mips-dis.c (print_insn_arg): Add prototype. 
(_print_insn_mips): Ditto.
 1996-09-11 04:26:58 +00:00
Ian Lance Taylor
30b1724cc8 * mips-dis.c (print_insn_arg): Print condition code registers as 
$fccN.
 1996-09-09 18:27:10 +00:00
Jeff Law
eb5c28e173 * v850-dis.c (disassemble): Make static. Provide prototype. 1996-09-03 18:05:25 +00:00
Ian Lance Taylor
44789bee66 whoops--typo 1996-09-02 16:41:29 +00:00
Ian Lance Taylor
01d34e4be3 file was really removed a long time ago 1996-09-02 16:41:28 +00:00
Jeff Law
09478dc331 * v850-dis.c (disassemble): Handle insertion of ',', '[' and 
']' characters into the output stream.
        * v850-opc.c (v850_opcodes: Remove size field from all opcodes.
        Add "memop" field to all opcodes (for the disassembler).
        Reorder opcodes so that "nop" comes before "mov" and "jr"
        comes before "jarl".
Should give us a functional disassembler.
 1996-08-31 22:00:45 +00:00
Jeff Law
e05cae190b * v850-dis.c (print_insn_v850): Properly handle disassembling 
a two byte insn at the end of a memory region when the memory
        region's size is only two byte aligned.
 1996-08-31 21:21:27 +00:00
Jeff Law
a5f2a4e50e * v850-dis.c (v850_cc_names): Fix stupid thinkos. 1996-08-31 21:10:43 +00:00
Jeff Law
502535cff7 * v850-dis.c (v850_reg_names): Define. 
(v850_sreg_names, v850_cc_names): Likewise.
        (disassemble): Very rough cut at printing operands (unformatted).
One step at a time.

        * v850-opc.c (BOP_MASK): Fix.
        (v850_opcodes): Fix mask for jarl and jr.
Bugs exposed by disassembler testing.
 1996-08-31 20:56:05 +00:00
Jeff Law
529418ddc4 * v850-dis.c: New file. Skeleton for disassembler support. 
* Makefile.in Remove v850 references, they're not needed here
        and they weren't being sanitized away.
        * configure.in: Add v850-dis.o when building v850 toolchains.
        * configure: Rebuilt.
        * disassemble.c (disassembler): Call v850 disassembler.
 1996-08-31 19:22:11 +00:00
Jeff Law
ba39d3dde1 * v850-dis.c: New file. Skeleton for disassembler support. 
* Makefile.in Remove v850 references, they're not needed here
        and they weren't being sanitized away.
        * configure.in: Add v850-dis.o when building v850 toolchains.
        * configure: Rebuilt.
        * disassemble.c (disassembler): Call v850 disassembler.
Skeleton support for V850 disassembler.
 1996-08-31 19:20:28 +00:00
Jeff Law
b219416478 * v850-opc.c (insert_d8_7, extract_d8_7): New functions. 
(insert_d8_6, extract_d8_6): New functions.
        (v850_operands): Rename D7S to D7; operand for D7 is unsigned.
        Rename D8 to D8_7, use {insert,extract}_d8_7 routines.
        Add D8_6.
        (IF4A, IF4B): Use "D7" instead of "D7S".
        (IF4C, IF4D): Use "D8_7" instead of "D8".
        (IF4E, IF4F): New.  Use "D8_6".
        (v850_opcodes): Use IF4A/IF4B for sld.b/sst.b.  Use IF4C/IF4D for
        sld.h/sst.h.  Use IF4E/IF4F for sld.w/sst.w.
So we can assemble sst/sld instructions correctly.
 1996-08-31 18:23:02 +00:00
Jeff Law
c6b9c13532 * v850-opc.c (insert_d16_15, extract_d16_15): New functions. 
(v850_operands): Change D16 to D16_15, use special insert/extract
        routines.  New new D16 that uses the generic insert/extract code.
        (IF7A, IF7B): Use D16_15.
        (IF7C, IF7D): New.  Use D16.
        (v850_opcodes): Use IF7C and IF7D for ld.b and st.b.
 1996-08-31 17:43:28 +00:00
Jeff Law
fb8c25a3e4 * v850-opc.c (insert_d9, insert_d22): Slightly improve error 
message.  Issue an error if the branch offset is odd.
 1996-08-31 17:23:49 +00:00
Jeff Law
69ae4b82dc * v850-opc.c: Add notes about needing special insert/extract 
for all the load/store insns, except "ld.b" and "st.b".
So we don't forget!
 1996-08-31 07:32:01 +00:00
Jeff Law
574b9cb3d3 * v850-opc.c (insert_d22, extract_d22): New functions. 
(v850_operands): Use insert_d22 and extract_d22 for
        D22 operands.
        (insert_d9): Fix range check.
 1996-08-31 07:28:22 +00:00
J.T. Conklin
d44b697b78 * v850-opc.c (v850_operands): Add V850_OPERAND_SIGNED flag 
and set bits field to D9 and D22 operands.
 1996-08-31 01:04:39 +00:00
Jeff Law
e9ebb36451 * v850-opc.c (v850_operands): Define SR2 operand. 
(v850_opcodes): "ldsr" uses R1,SR2.
ldsr is kinda weird.
 1996-08-30 19:44:42 +00:00
Jeff Law
e7f3e5fbbf * v850-opc.c (v850_opcodes): Fix opcode specs for 
sld.w, sst.b, sst.h, sst.w, and nop.
 1996-08-29 17:11:13 +00:00
Jeff Law
e7dd77751d * v850-opc.c (v850_opcodes): Add null opcode to mark the 
end of the opcode table.
For the simulator
 1996-08-28 21:56:03 +00:00
J.T. Conklin
c6d5c52650 Remove v850-opc.c from things-to-keep 1996-08-26 17:36:45 +00:00
Jeff Law
d3edb57f12 * v850-opc.c (v850_operands): Define EP operand. 
(IF4A, IF4B, IF4C, IF4D): Use EP.
 1996-08-23 20:55:15 +00:00
Jeff Law
18c97701b4 * v850-opc.c (v850_opcodes): Fix opcode numbers for "mov" 
with immediate operand, "movhi".  Tweak "ldsr".
More fixes.
 1996-08-23 20:27:25 +00:00
Jeff Law
fb6da8680e * v850-opc.c (v850_opcodes): Get ld.[bhw] and st.[bhw] 
correct.  Get sld.[bhw] and sst.[bhw] closer.
 1996-08-23 19:32:41 +00:00
Jeff Law
38c7a4504d * v850-opc.c (v850_operands): "not" is a two byte insn. 1996-08-23 19:12:05 +00:00
Jeff Law
6c1fc4d3fa * v850-opc.c (v850_opcodes): Correct bit pattern for setf. 1996-08-23 18:58:57 +00:00
Jeff Law
9ab069eadc * v850-opc.c (v850_operands): D16 inserts at offset 16! 1996-08-23 18:27:43 +00:00
Jeff Law
b1e897a97d * v850-opc.c (two): Get order of words correct. 1996-08-23 18:17:31 +00:00
Jeff Law
9ad8ddf1bd * v850-opc.c (v850_operands): I16 inserts at offset 16! 
Should get immediate 16bit operands into the right place
 1996-08-23 17:52:00 +00:00
Jeff Law
e41c99bd11 * v850-opc.c (v850_operands): Add "SR1" and "SR2" for system 
register source and destination operands.
        (v850_opcodes): Use SR1 and SR2 for "ldsr" and "stsr".
More parsing fixes.
 1996-08-23 17:35:11 +00:00
Jeff Law
c262d7d8f4 * v850-opc.c (v850_opcodes): Fix thinko in "jmp" opcode. Fix 
same thinko in "trap" opcode.
 1996-08-23 17:09:28 +00:00
Jeff Law
85b5201342 * v850-opc.c (v850_opcodes): Fix thinko in "jmp" opcode. 1996-08-23 17:07:21 +00:00
Jeff Law
280d40df39 * v850-opc.c (v850_opcodes): Add initializer for size field 
on all opcodes.
 1996-08-23 16:40:15 +00:00
Jeff Law
4be84c4951 * v850-opc.c (v850_operands): D6 -> DS7. References changed. 
Add D8 for 8-bit unsigned field in short load/store insns.
        (IF4A, IF4D): These both need two registers.
        (IF4C, IF4D): Define.  Use 8-bit unsigned field.
        (v850_opcodes): For "sld.h", "sld.w", "sst.h", "sst.w", use
        IF4C & IF4D.  For "trap" use I5U, not I5.  Add IF1 operand
        for "ldsr" and "stsr".
        * v850-opc.c (v850_operands): 3-bit immediate for bit insns
        is unsigned.
Fixing up the parser again.
 1996-08-23 15:41:30 +00:00
Jeff Law
3c72ab7035 * v850-opc.c (v850_operansd): 3-bit immediate for bit insns 
is unsigned.
 1996-08-23 06:56:44 +00:00
J.T. Conklin
dbc6a8f6b3 Add V850_OPERAND_SIGNED flag as appropriate, create new unsigned IMM5 operand 1996-08-23 06:29:55 +00:00
Jeff Law
cc6e50b5b2 * v850-opc.c (v850_opcodes): Correct short store half (sst.h) and 
short store word (sst.w).
 1996-08-23 06:27:37 +00:00
J.T. Conklin
4f23511029 start writing functions for extracting and inserting unusual operands 1996-08-23 02:35:16 +00:00
J.T. Conklin
69463cbb2b * v850-opc.c (v850_operands): Added insert and extract fields, 
pointers to functions that handle unusual operand encodings.
 1996-08-23 00:00:18 +00:00
Jeff Law
9c201b1fab * v850-opc.c (v850_opcodes): Enable "trap". 1996-08-22 23:08:03 +00:00
Jeff Law
0bdf3144c6 * v850-opc.c (v850_opcodes): Fix order of displacement 
and register for "set1", "clr1", "not1", and "tst1".
 1996-08-22 07:06:13 +00:00
J.T. Conklin
088d5b7309 minimal setf support 1996-08-22 06:33:27 +00:00
J.T. Conklin
e89a42c117 Stub in load and store insns. Fix order of jarl operands 1996-08-22 05:29:14 +00:00
Jeff Law
fa6761106f Arggh. B3. shift counts are from the start of each half-word apparently. 1996-08-22 02:20:08 +00:00
Jeff Law
4cd595fcdd Fix thinko in B3. 1996-08-22 02:18:07 +00:00
Jeff Law
7c8157dd48 * v850-opc.c (v850_operands): Add "B3" support. 
(v850_opcodes): Fix and enable "set1", "clr1", "not1"
        and "tst1".
 1996-08-22 02:08:02 +00:00
Jeff Law
fed1d21fc0 * v850-ope.c ("jmp"): R1 is only operand. 1996-08-22 01:39:22 +00:00
Jeff Law
b10e29f4b8 * v850-opc.c: Close unterminated comment. 
Something -Wall caught.
 1996-08-22 00:46:47 +00:00
J.T. Conklin
6bc33c7fa5 * v850-opc.c: Add flags field to struct v850_operands, add move 
opcodes to opcode table.
 1996-08-22 00:35:28 +00:00
J.T. Conklin
6d1e1ee875 * Makefile.in (ALL_MACHINES): Add v850-opc.o. 
* configure: (bfd_v850v_arch) Add new case.
* configure.in: (bfd_v850_arch) Add new case.
* v850-opc.c: New file.
 1996-08-20 21:45:02 +00:00
David Edelsohn
5751b0d72d * sparc-dis.c (print_insn_sparc): Handle little endian sparcs. 1996-08-19 22:22:11 +00:00
Stan Shebs
a952ea1cb8 * mpw-make.sed: Update editing of include pathnames to be 
more general.
 1996-08-15 20:13:38 +00:00
Jackie Smith Cashion
5247a22a88 Thu Aug 15 16:28:41 1996 James G. Smith <jsmith@cygnus.co.uk> 
* arm-opc.h: Added "bx" instruction definition.
 1996-08-15 15:29:41 +00:00
Ian Lance Taylor
375d76efcc Wed Aug 14 17:00:04 1996 Richard Henderson <rth@tamu.edu> 
* alpha-opc.c (EV4EXTHWINDEX): Field width should be 8 not 5.
 1996-08-15 00:01:21 +00:00
Martin Hunt
ed36b6cd33 Mon Aug 12 14:30:37 1996 Martin M. Hunt <hunt@pizza.cygnus.com> 
* d10v-opc.c (d10v_opcodes): Minor fixes to addi and bl.l.
 1996-08-12 21:32:03 +00:00
Martin Hunt
cff827d7df Fri Aug 9 13:21:59 1996 Martin M. Hunt <hunt@pizza.cygnus.com> 
* d10v-opc.c (d10v_opcodes): Correct 'mv' unit entry to EITHER.
 1996-08-09 20:25:12 +00:00
Ian Lance Taylor
0f38eaa09f Thu Aug 8 12:43:52 1996 Klaus Kaempf <kkaempf@progis.de> 
* makefile.vms: Update for alpha-opc changes.
 1996-08-08 16:45:05 +00:00
Ian Lance Taylor
484c464505 * i386-dis.c (print_insn_i386): Actually return the correct value. 
(ONE, OP_ONE): #ifdef out; not used.
 1996-08-07 15:56:13 +00:00
Martin Hunt
c5e1996f55 Fri Aug 2 17:47:03 1996 Martin M. Hunt <hunt@pizza.cygnus.com> 
* d10v-opc.c (d10v_operands): Added 2 accumulator sub instructions.
	Changed subi operand type to treat 0 as 16.
 1996-08-03 00:49:00 +00:00
Ian Lance Taylor
82e8213e4e * m68k-opc.c: Add cpushl for the mcf5200. From Ken Rose 
<rose@netcom.com>.
 1996-07-31 20:22:50 +00:00
Jackie Smith Cashion
50569deeb5 Wed Jul 31 14:39:27 1996 James G. Smith <jsmith@cygnus.co.uk> 
* arm-opc.h: (arm_opcodes): Added halfword and sign-extension
 	memory transfer instructions. Add new format string entries %h and %s.
	* arm-dis.c: (print_insn_arm): Provide decoding of the new
	formats %h and %s.
 1996-07-31 13:43:51 +00:00
Martin Hunt
3dd5a8d337 Fri Jul 26 11:45:04 1996 Martin M. Hunt <hunt@pizza.cygnus.com> 
* d10v-opc.c (d10v_operands): Added UNUM4S; a 4-bit accumulator shift.
 	(d10v_opcodes): Modified accumulator shift instructions to use UNUM4S.
 1996-07-26 18:59:21 +00:00
Ian Lance Taylor
239ce44d9c * alpha-dis.c (print_insn_alpha_osf): Remove. 
(print_insn_alpha_vms): Remove.
	(print_insn_alpha): Make globally visible.  Chose the register
	names based on info->flavour.
	* disassemble.c: Always return print_insn_alpha for the alpha.
 1996-07-26 18:06:35 +00:00
Martin Hunt
ab0a229408 Thu Jul 25 15:24:17 1996 Martin M. Hunt <hunt@pizza.cygnus.com> 
* d10v-dis.c (dis_long): Handle unknown opcodes.
 1996-07-25 22:28:10 +00:00
Martin Hunt
0be715623f Thu Jul 25 12:08:09 1996 Martin M. Hunt <hunt@pizza.cygnus.com> 
* d10v-opc.c: Changes to support signed and unsigned numbers.
	All instructions with the same name that have long and short forms
	now end in ".l" or ".s".  Divs added.
	* d10v-dis.c: Changes to support signed and unsigned numbers.
 1996-07-25 19:16:34 +00:00
Martin Hunt
687c3cc863 start-sanitize-d10v 
Tue Jul 23 11:02:53 1996  Martin M. Hunt  <hunt@pizza.cygnus.com>

	* d10v-dis.c: Change all functions to use info->print_address_func.

end-sanitize-d10v
 1996-07-23 18:11:55 +00:00
Ian Lance Taylor
354447a435 Mon Jul 22 15:38:53 1996 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de> 
* m68k-opc.c (m68k_opcodes): Make opcode masks for the ColdFire
 	move ccr/sr insns more strict so that the disassembler only
 	selects them when the addressing mode is data register.
 1996-07-22 19:49:24 +00:00
Martin Hunt
95e3e73328 start-sanitize-d10v 
Mon Jul 22 11:25:24 1996  Martin M. Hunt  <hunt@pizza.cygnus.com>
        * d10v-opc.c (pre_defined_registers):  Declare.
        * d10v-dis.c (print_operand): Now uses pre_defined_registers
        to pick a better name for the registers.

end-sanitize-d10v
 1996-07-22 18:57:20 +00:00
Ian Lance Taylor
d82a4ac0aa fix last patch 1996-07-22 18:38:50 +00:00
Ian Lance Taylor
e4024966b2 * sparc-opc.c: Fix opcode values for fpack16, and fpackfix. Fix 
operands for fexpand and fpmerge.  From Christian Kuehnke
	<Christian.Kuehnke@arbi.informatik.uni-oldenburg.de>.
 1996-07-22 17:58:19 +00:00
Ian Lance Taylor
e7bc7bc3fc Mon Jul 22 13:17:06 1996 Richard Henderson <rth@tamu.edu> 
* alpha-dis.c (print_insn_alpha): No longer the user-visible
	print routine.  Take new regnames and cpumask arguments.
	Kill the environment variable nonsense.
	(print_insn_alpha_osf): New function.  Do OSF/1 style regnames.
	(print_insn_alpha_vms): New function.  Do VMS style regnames.
	* disassemble.c (disassembler): Test bfd flavour to pick
	between OSF and VMS routines.  Default to OSF.
 1996-07-22 17:19:09 +00:00
Ian Lance Taylor
8ec904659e * configure.in: Call AC_SUBST (INSTALL_SHLIB). 
* configure: Rebuild.
	* Makefile.in (install): Use @INSTALL_SHLIB@.
 1996-07-18 21:20:15 +00:00
Martin Hunt
e3659cbf49 start-sanitize-d10v 
Wed Jul 17 14:39:05 1996  Martin M. Hunt  <hunt@pizza.cygnus.com>
        * configure: (bfd_d10v_arch) Add new case.
        * configure.in: (bfd_d10v_arch) Add new case.
        * d10v-dis.c: New file.
        * d10v-opc.c: New file.
        * disassemble.c (disassembler) Add entry for d10v.
end-sanitize-d10v
 1996-07-18 00:49:26 +00:00
J.T. Conklin
dec678d6ca Wed Jul 17 10:12:05 1996 J.T. Conklin <jtc@rtl.cygnus.com> 
* m68k-opc.c (m68k_opcodes): Fix bugs in coldfire insns relating
        to bcc, trapfl, subxl, and wddata discovered by Andreas Schwab.
 1996-07-17 17:18:13 +00:00
Stu Grossman
9498be1a05 oops! 1996-07-16 00:03:38 +00:00
Stu Grossman
d9ad578c49 * i386-dis.c (print_insn_i8086): New routine to disassemble using 
the 8086 instruction set.
	* i386-dis.c:  General cleanups.  Make most things static.  Add
	prototypes.  Get rid of static variables aflags and dflags.  Pass
	them as args (to almost everything).
 1996-07-16 00:01:50 +00:00
Stu Grossman
be0c8b0508 * i386-dis.c (print_insn_i8086): New routine to disassemble using 
the 8086 instruction set.
	* i386-dis.c:  General cleanups.  Make most things static.  Add
	prototypes.  Get rid of static variables aflags and dflags.  Pass
	them as args (to almost everything).
 1996-07-12 17:15:38 +00:00
Jeff Law
3b2a7894d8 * h8300-dis.c (bfd_h8_disassemble): Handle macregs in ldmac insns. 
More HMSE.
 1996-07-11 19:06:21 +00:00
Jeff Law
8e9c1f74c9 * h8300-dis.c (bfd_h8_disassemble): Handle "ldm.l" and "stm.l". 
More disassembler fixes.  HMSE.
 1996-07-11 18:59:57 +00:00
Jeff Law
52aa53362e * h8300-dis.c (bfd_h8_disassemble): "abs" is implicitly two 
if the next arg is marked with SRC_IN_DST.  Gross.
Gross hack so that shift-by-two insns are disassembled correctly.
 1996-07-11 18:46:41 +00:00
Jeff Law
b3ef936e6b * h8300-dis.c (bfd_h8_disassemble): Print "exr" when 
we're looking for and find EXR.
So we disassemble andc/orc/xorc with exr correctly.
 1996-07-11 18:30:02 +00:00
Jeff Law
81fc72a71a * h8300-dis.c (bfd_h8_disassemble): We don't have a match 
if we're looking for KBIT and we don't find it.
So we don't disassemble "inc" instructions as "adds" instructions.
 1996-07-11 18:24:59 +00:00
Jeff Law
bf0b880f39 * h8300-dis.c (bfd_h8_disassemble): Mask off unwanted bits 
for L_3 and L_2.
So we only get values in the right range for L_3 (0..7) and L_2 (0..3).
 1996-07-11 18:07:31 +00:00
Jeff Law
0decb7fde3 * h8300-dis.c (bfd_h8_disassemble): Don't set plen for 
3bit immediate operands.
So we disassemble bXXX #IMM,@ADDRESS insns correctly.
 1996-07-11 17:58:43 +00:00
Ian Lance Taylor
1695403700 * alpha-opc.c: Add new case of "mov". From Klaus Kaempf 
<kkaempf@progis.ac-net.de>.
 1996-07-09 14:57:34 +00:00
Jeff Law
25b344a4a2 No longer need to sanitize away h8s stuff. 1996-07-05 18:59:31 +00:00
Ian Lance Taylor
972b1bb03e * alpha-opc.c: Correct second case of "mov" to use OPRL. 1996-07-04 15:43:31 +00:00
Stu Grossman
eb2c851803 * sparc-dis.c (print_insn_sparclite): New routine to print 
sparclite instructions.
 1996-07-04 00:50:29 +00:00
J.T. Conklin
9070eaffef * m68k-opc.c (m68k_opcodes): Add coldfire support. 1996-07-03 21:28:05 +00:00
David Edelsohn
b1dd184ef7 * sparc-opc.c (asi_table): Add #ASI_N, #ASI_N_L, #ASI_NUCLEUS, 
#ASI_NUCLEUS_LITTLE.  Rename #ASI_AS_IF_USER_{PRIMARY,SECONDARY}_L
	to #ASI_AS_IF_USER_{PRIMARY,SECONDARY}_LITTLE.
 1996-06-28 22:56:17 +00:00
Jason Molenda
2f70f660a6 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir): 
Use autoconf-set values.
        (docdir, oldincludedir): Removed.
        * configure.in (AC_PREREQ): autoconf 2.5 or higher.
 1996-06-25 14:00:47 +00:00
Ian Lance Taylor
96926bf0f6 Fri Jun 21 13:53:36 1996 Richard Henderson <rth@tamu.edu> 
* alpha-opc.c: New file.
	* alpha-opc.h: Remove.
	* alpha-dis.c: Complete rewrite to use new opcode table.
	* configure.in: For bfd_alpha_arch, use alpha-opc.o.
	* configure: Rebuild with autoconf 2.10.
	* Makefile.in (ALL_MACHINES): Add alpha-opc.o.
	(alpha-dis.o): Depend upon $(INCDIR)/opcode/alpha.h, not
	alpha-opc.h.
	(alpha-opc.o): New target.
 1996-06-21 17:58:07 +00:00
Ian Lance Taylor
4264a46e65 * sparc-dis.c (print_insn_sparc): Remove unused local variable i. 
Set imm_added_to_rs1 even if the source and destination register
	are not the same.
 1996-06-20 01:18:47 +00:00
Ian Lance Taylor
c635473f30 * sparc-opc.c: Add some two operand forms of the wr instruction. 1996-06-19 19:56:51 +00:00
Jeff Law
cc97381776 * h8300-dis.c (bfd_h8_disassemble): Rename "hmode" argument 
to just "mode".

start-sanitize-h8s
        * disassemble.c (disassembler): Handle H8/S.
        * h8300-dis.c (print_insn_h8300s): New function for H8/S.
end-sanitize-h8s

Even more H8/S goo.
 1996-06-18 23:00:38 +00:00
Ian Lance Taylor
1b5dbf7446 * ppc-opc.c: Fix fcmpo opcode. From Sergei Steshenko 
<sergei@msil.sps.mot.com>.
 1996-06-18 22:08:44 +00:00
Ian Lance Taylor
03496c49d4 Tue Jun 18 15:08:54 1996 Klaus Kaempf <kkaempf@progis.de> 
* makefile.vms: New file.

	* alpha-dis.c (print_insn_alpha): Print lda ra,lit(rz) as mov.
 1996-06-18 19:10:42 +00:00
Jim Wilson
ed381b6719 Kill r16/rce/acp stuff. 1996-06-08 03:18:15 +00:00
Michael Meissner
366323cfeb Silence warnings from Solaris PowerPC cc 1996-05-23 19:20:33 +00:00
David Edelsohn
ec680fc594 * saprc-dis.c (compute_arch_mask): Replace ANSI style def with K&R. 1996-04-17 21:21:09 +00:00
Ian Lance Taylor
1dd37c4885 * sparc-opc.c: Set F_FBR on floating point branch instructions. 
Set F_FLOAT on other floating point instructions.
PR 355.
 1996-04-11 21:31:03 +00:00
Michael Meissner
95bc20ec8d Add 860 specific registers 1996-04-08 21:07:28 +00:00
Ian Lance Taylor
571177859d Use BFD_PICLIST. 1996-04-08 18:33:43 +00:00
Ian Lance Taylor
639b5a093c * configure.in: Permit --enable-shared to specify a list of 
directories.
	* configure: Rebuild.
 1996-04-08 18:01:49 +00:00
Jeff Law
d2f6ce6ac2 * h8300-dis.c (bfd_h8_disassemble): Use "bit" for L_3 immediates, 
not "abs", which may be needed for the absolute in something
        like btst #0,@10:8.  Print L_3 immediates separately from other
        immediates.  Change ABSMOV reference to ABS8MEM.
One day we'll actually disassemble btst #0,@10:8 correctly...  But not
yet.  hmse.
 1996-04-06 00:14:04 +00:00
David Edelsohn
d302b5f240 * sparc-dis.c (opcodes_initialized): Move inside print_insn_sparc. 
(current_arch_mask): New static global.
	(compute_arch_mask): New static function.
	(print_insn_sparc): Delete sparc_v9_p.  New static local
	current_mach.  Resort opcode table if current_mach changes.
	Generalize "insn not supported" test.
	(compare_opcodes): Prefer supported opcodes to nonsupported ones.
	Delete test for v9/!v9.
	* sparc-opc.c (MASK_*): Use SPARC_OPCODE_ARCH_MASK.
	(v6notlet): Define.
	(brfc): Split into CBR and FBR for coprocessor/fp branches.
	(brfcx): Renamed to FBRX.
	(condfc): Renamed to CONDFC.  Pass v6notlet to CBR (standard
	coprocessor mnemonics are not supported on the sparclet).
	(condf): Renamed to CONDF.
	(SLCBCC2): Delete F_ALIAS flag.
 1996-04-03 18:54:49 +00:00
David Edelsohn
02e7ece3ca (COMMUTEOP,SLCBCC,SLCBCC2 macros): Make uppercase. 1996-03-31 06:15:40 +00:00
David Edelsohn
03481f0e5f * sparc-opc.c (sparc_opcodes): rd must be 0 for 
mov foo,{%y,%psr,%wim,%tbr}.  Support mov foo,%asrX.
 1996-03-31 05:52:03 +00:00
Ian Lance Taylor
c830327122 * Makefile.in (config.status): Depend upon BFD VERSION file, so 
that the shared library version number is set correctly.
 1996-03-29 18:11:21 +00:00
Ian Lance Taylor
7919b9ec41 * configure.in: Use AC_CHECK_TOOL to find ar and ranlib. From 
Miles Bader <miles@gnu.ai.mit.edu>.
	* configure: Rebuild.
 1996-03-26 21:12:59 +00:00
Ian Lance Taylor
ea2488ad2e * configure: Rebuild with autoconf 2.8. 1996-03-12 17:22:07 +00:00
Ian Lance Taylor
8f218e05fc * configure.in: Don't set SHLIB or SHLINK to an empty string, 
since they appear as targets in Makefile.in.
	* configure: Rebuild.
 1996-03-05 20:52:52 +00:00
Stan Shebs
c8f388e7ed * mpw-make.sed: Edit out shared library support bits. 1996-02-27 01:31:28 +00:00
David Edelsohn
38399547ba * sparc-opc.c (v8,v6notv9): Add MASK_SPARCLET. 
(sparc_opcode_archs): Add MASK_V8 to sparclet entry.
	(sparc_opcodes): Add sparclet insns.
	(sparclet_cpreg_table): New static local.
	(sparc_{encode,decode}_sparclet_cpreg): New functions.
	* sparc-dis.c (print_insn_sparc): Handle sparclet cpregs.
 1996-02-21 05:47:27 +00:00
Ian Lance Taylor
a9c5cc539e * configure.in: Set and substitute SHLIB_DEP. 
* configure: Rebuild.
	* Makefile.in (SHLIB_DEP): New variable.
	(LIBIBERTY_LISTS, BFD_LIST): New variables.
	(stamp-piclist): Depend upon LIBIBERTY_LISTS and BFD_LIST.  If
	COMMON_SHLIB, add them to piclist with appropriate modifications.
	($(SHLIB)): Depend upon $(SHLIB_DEP).  Don't check COMMON_SHLIB
	here: just use piclist.
 1996-02-19 17:34:43 +00:00
David Edelsohn
b62e64e9da * sparc-dis.c (MASK_V9,V9_ONLY_P,V9_P): Define. 
(print_insn_sparc): Rewrite v9/not-v9 tests.
	(compare_opcodes): Likewise.
	* sparc-opc.c (MASK_<ARCH>): Define.
	(v6,v7,v8,sparclite,v9,v9a): Redefine.
	(sparclet,v6notv9): Define.
	(sparc_opcode_archs): Delete member `conflicts'.  Add `supported'.
	(sparc_opcodes): Delete F_NOTV9, use v6notv9 instead.
 1996-02-19 10:15:15 +00:00
Ian Lance Taylor
315f88096f fix up i960xl sanitization 1996-02-16 17:43:56 +00:00
Ian Lance Taylor
46bcd2ec35 * configure.in: Call AC_PROG_CC before configure.host. 
* configure: Rebuild.
 1996-02-15 22:10:41 +00:00
Ian Lance Taylor
6d76c71f5e * Makefile.in (SONAME): Remove leading ../bfd/ from $(SHLIB). 1996-02-15 19:45:45 +00:00
Ian Lance Taylor
03db5a9303 Wed Feb 14 19:01:27 1996 Alan Modra <alan@spri.levels.unisa.edu.au> 
* i386-dis.c (onebyte_has_modrm): New static array.
	(twobyte_has_modrm): New static array.
	(print_insn_i386): Only fetch the mod/reg/rm byte if it is needed.
 1996-02-15 00:08:45 +00:00
Michael Meissner
222e3f6e66 Undef PPC before use 1996-02-12 22:17:39 +00:00
Ian Lance Taylor
c07dc45948 * Makefile.in (SONAME): New variable. 
($(SHLINK)): Make a link to the transformed name, as well.
	(stamp-tshlink): New target.
	(install): Skip stamp-tshlink during install.
 1996-02-07 19:00:52 +00:00
Ian Lance Taylor
1a4dd30e54 * i960-dis.c (mem): Add HX dcinva instruction. 
(reg): Add HX instructions.
	start-sanitize-i960xl
	The HX instructions are the XL instructions, so this just involves
	arranges for them to not be sanitized.
	end-sanitize-i960xl
 1996-02-05 23:54:25 +00:00
Ian Lance Taylor
9b17e0eae1 tipo 1996-02-05 23:32:23 +00:00
Ian Lance Taylor
e0bf1022dd Support for building as a shared library, based on patches from 
Alan Modra <alan@spri.levels.unisa.edu.au>:
	* configure.in: Add AC_ARG_ENABLE for shared and commonbfdlib.
	New substitutions: ALLLIBS, PICFLAG, SHLIB, SHLIB_CC,
	SHLIB_CFLAGS, COMMON_SHLIB, SHLINK.
	* configure: Rebuild.
	* Makefile.in (ALLLIBS): New variable.
	(PICFLAG, SHLIB, SHLIB_CC, SHLIB_CFLAGS): New variables.
	(COMMON_SHLIB, SHLINK): New variables.
	(.c.o): If PICFLAG is set, compile twice, once PIC, once normal.
	(STAGESTUFF): Remove variable.
	(all): Depend upon $(ALLLIBS) rather than $(TARGETLIB).
	(stamp-piclist, piclist): New targets.
	($(SHLIB), $(SHLINK)): New targets.
	($(OFILES)): Depend upon stamp-picdir.
	(disassemble.o): Build twice if PICFLAG is set.
	(MOSTLYCLEAN): Add pic/*.o.
	(clean): Remove $(SHLIB), $(SHLINK), piclist, and stamp-piclist.
	(distclean): Remove pic and stamp-picdir.
	(install): Install shared libraries.
	(stamp-picdir): New target.
 1996-02-05 21:17:52 +00:00
Ian Lance Taylor
9fcea7ef3b * dis-buf.c: Include "sysdep.h" before "dis-asm.h". 1996-01-30 19:09:20 +00:00
Ian Lance Taylor
931c53ab74 * i386-dis.c (print_insn_i386): Only fetch the mod/reg/rm byte 
when necessary.  From Ulrich Drepper
	<drepper@myware.rz.uni-karlsruhe.de>.
 1996-01-25 16:57:52 +00:00
David Edelsohn
ca4cb8bca2 * sparc-dis.c (print_insn_sparc): NUMOPCODES replaced with 
sparc_num_opcodes.  Update architecture enum values.
	* sparc-opc.c (sparc_opcode_archs): Replaces architecture_pname.
	(sparc_opcode_lookup_arch): New function.
	(sparc_num_opcodes): Renamed from bfd_sparc_num_opcodes.
	(sparc_opcodes): Add v9a shutdown insn.
 1996-01-25 11:42:18 +00:00
David Edelsohn
986c92a711 * sparc-dis.c (print_insn_sparc): Renamed from print_insn. 
If DISASM_RAW_INSN, print insn in hex.  Handle v9a as opcode
	architecture.
	(print_insn_sparc64): Deleted.
	* disassemble.c (disassembler, case bfd_arch_sparc): Always use
	print_insn_sparc.
 1996-01-23 00:55:40 +00:00
David Edelsohn
79ae32abcc * disassemble.c (disassembler, case bfd_arch_sparc): bfd_mach_sparc64 
renamed to bfd_mach_sparc_v9.  Check for bfd_mach_sparc_v9a.
 1996-01-22 23:19:04 +00:00
David Edelsohn
187fddf78c * sparc-opc.c (architecture_pname): Add v9a. 
The actual insns haven't been added yet.
 1996-01-22 16:34:01 +00:00
Jim Wilson
48573afd23 Remove SH3e sanitization. 1996-01-16 20:13:27 +00:00
Ian Lance Taylor
6ddc0baaf9 Fri Jan 12 14:35:58 1996 David Mosberger-Tang <davidm@AZStarNet.com> 
* alpha-opc.h (alpha_insn_set): VAX floating point opcode was
 	incorrectly defined as 0x16 when it should be 0x15.
	(FLOAT_FORMAT_MASK): function code is 11 bits, not just 7 bits!
	(alpha_insn_set): added cvtst and cvttq float ops.  Also added
 	excb (exception barrier) which is defined in the Alpha
 	Architecture Handbook version 2.
	* alpha-dis.c (print_insn_alpha): Fixed special-case decoding for
 	OPERATE_FORMAT_CODE type instructions.  The bug caused mulq to be
 	disassembled as or, for example.
 1996-01-12 19:37:58 +00:00
Ian Lance Taylor
fef0b65b71 * mips-dis.c (print_insn_arg): Print cases 'i' and 'u' in hex. 
(_print_insn_mips): Change i from int to unsigned int.
 1996-01-10 17:37:58 +00:00
Michael Meissner
3cf013f81b Fix tlb for PowerPC 1996-01-05 17:46:25 +00:00
Michael Meissner
1d935cf62c Add Pentium Pro support 1996-01-03 16:51:46 +00:00
Ian Lance Taylor
ab0ec5d046 * disassemble.c (disassembler): Use new bfd_big_endian macro. 1995-12-15 21:45:00 +00:00
Ian Lance Taylor
1d77631329 * Makefile.in (distclean): Remove stamp-h. From Ronald 
F. Guilmette <rfg@monkeys.com>.
 1995-12-12 17:23:11 +00:00
Stan Shebs
211eda6694 From David Mosberger-Tang <davidm@azstarnet.com>: 
* alpha-dis.c (print_insn_alpha): fixed decoding of cpys
        instruction.
 1995-12-05 21:55:18 +00:00
J.T. Conklin
60da007931 * sh-opc.h (sh_arg_type): Added A_SSR and A_SPC. 
(sh_table): Added many SH3 opcodes.
* sh-dis.c (print_insn_shx): Added cases for A_SSR and A_SPC.
 1995-12-04 20:32:44 +00:00
Michael Meissner
695b028f51 Fix subfc.,subfco,subco,subco. to be in the proper classifications 1995-12-01 12:40:39 +00:00
Ian Lance Taylor
bd22cd1e3f * configure: Rebuild with autoconf 2.7. 1995-11-27 18:11:02 +00:00
Ian Lance Taylor
00103dfa57 * configure: Rebuild with autoconf 2.6. 1995-11-21 23:28:45 +00:00
Ian Lance Taylor
a3cf92e5b2 * a29k-dis.c (print_special): Change num to unsigned int. 
Wed Nov  8 20:10:35 1995  Eric Freudenthal <freudenthal@nyu.edu>

	* a29k-dis.c (print_insn): Cast insn24 to unsigned long when
	shifting it.
 1995-11-09 01:20:32 +00:00
Ian Lance Taylor
6a46885044 * configure.in: Call AC_CHECK_PROG to find and cache AR. 
* configure: Rebuilt.
 1995-11-07 20:21:37 +00:00
Ian Lance Taylor
f98c336946 Mon Nov 6 17:39:47 1995 Harry Dolan <dolan@ssd.intel.com> 
* configure.in: Add case for bfd_i860_arch.
	* configure: Rebuild.
 1995-11-06 22:42:13 +00:00
Ian Lance Taylor
681447c6cf * m68k-opc.c (m68k_opcodes): Correct fmoveml operands. 
* m68k-dis.c (NEXTSINGLE): Change i to unsigned int.
	(NEXTDOUBLE): Likewise.
	(print_insn_m68k): Don't match fmoveml if there is more than one
	register in the list.
	(print_insn_arg): Handle a place of '8' for a type of 'L'.
 1995-11-03 17:56:30 +00:00
Ian Lance Taylor
dbf7e45f16 * m68k-opc.c: Use #W rather than #w. 
* m68k-dis.c (print_insn_arg): Handle new 'W' place.
 1995-11-03 04:07:21 +00:00
Ian Lance Taylor
681bbcf570 * m68k-opc.c (m68k_opcode_aliases): Add dbfw as an alias for dbf, 
and likewise for all the dbxx opcodes.
 1995-11-01 18:34:56 +00:00
Fred Fish
76ab264518 * arc-dis.c: Include elf-bfd.h rather than libelf.h. 1995-11-01 00:01:39 +00:00
Jackie Smith Cashion
a2bdba3135 mips-opc.c: Added shorthand (V1) for INSN_4100 manifest. Added the 
VR4100 specific instructions to the mips_opcodes structure.
 1995-10-23 11:14:17 +00:00
Stan Shebs
0d0c3cc58a * mpw-config.in, mpw-make.sed: Remove ugly workaround for 
ugly Metrowerks bug in CW6, is fixed in CW7.
 1995-10-19 18:11:54 +00:00
Michael Meissner
d75c2e0f5e Add flags for common/any support 1995-10-16 17:00:16 +00:00
Ken Raeburn
9e0b0ae7fa Mon Sep 25 22:49:32 1995 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de> 
* m68k-dis.c (print_insn_m68k): Recognize all two-word instructions that take
no args by looking at the match mask.
(print_insn_arg): Always print "%" before register names.
[case 'c']: Use "nc" for the no-cache case, as recognized by gas.
[case '_']: Don't print "@#" before address.
[case 'J']: Use "%s" as format string, not register name.
[case 'B']: Treat place == 'C' like 'l' and 'L'.
 1995-10-06 20:59:33 +00:00
Ken Raeburn
726257a8b8 * i386-dis.c: Describe cmpxchg8b operand, and spell the opcode name correctly. 1995-10-06 02:17:12 +00:00
Steve Chamberlain
e521d840f4 From David Mosberger-Tang <davidm@azstarnet.com> 
* alpha-opc.h (MEMORY_FUNCTION_FORMAT_MASK): added.
  	(alpha_insn_set): added definitions for VAX floating point
 	instructions (Unix compilers don't generate these, but handcoded
 	assembly might still use them).

	* alpha-dis.c (print_insn_alpha): added support for disassembling
 	the miscellaneous instructions in the Alpha instruction set.
 1995-10-03 15:35:55 +00:00
Stan Shebs
077bd46ae3 mpw-make.in is out, mpw-make.sed is in. 1995-09-27 02:05:39 +00:00
Stan Shebs
cf9dcb11d0 * mpw-config.in: Add m68k-opc.c.o to BFD_MACHINES for m68k, 
no longer create sysdep.h, sed ppc-opc.c to work around a
	serious Metrowerks C bug.
	* mpw-make.in: Remove.
	* mpw-make.sed: New file, used by mpw-configure to edit
	Makefile.in into an MPW makefile.
 1995-09-27 01:53:07 +00:00
Ian Lance Taylor
1cd3bab3a0 * Makefile.in (maintainer-clean): New synonym for realclean. 1995-09-20 16:58:57 +00:00
Ian Lance Taylor
a4a879cde2 * m68k-opc.c: Split pmove patterns which use 'P' into patterns 
which use '0', '1', and '2' instead.  Specify the proper size for
	a pmove immediate operand.  Correct the pmovefd patterns to be
	moves to a register, not from a register.
	* m68k-dis.c (print_insn_arg): Replace 'P' with '0', '1', '2'.
 1995-09-19 19:31:25 +00:00
David Edelsohn
4814df240e * sparc-opc.c (sparc_opcodes): Mark all insns that reference 
%psr, %wim, %tbr as F_NOTV9.
 1995-09-14 19:00:40 +00:00
Ian Lance Taylor
824155e843 * Makefile.in (Makefile): Just rebuild Makefile when running 
config.status.
	(config.h, stamp-h): New targets.
	* configure.in: Call AC_CONFIG_HEADER and AC_CANONICAL_SYSTEM
	earlier.  Don't bother to call AC_ARG_PROGRAM.  Touch stamp-h when
	rebuilding config.h.
	* configure: Rebuild.
 1995-09-08 15:30:49 +00:00
Ian Lance Taylor
84c1534f02 * mips-opc.c: Change unaligned loads and stores with "t,A" 
operands to use "t,A(b)".
PR 7947.
 1995-09-08 05:08:38 +00:00
Ian Lance Taylor
40db611884 * Makefile.in (ALL_CFLAGS): Define. 
(.c.o, disassemble.o): Use $(ALL_CFLAGS).
	(MOSTLYCLEAN): Add config.log.
	(distclean): Don't remove config.log.
	* configure.in: Substitute HDEFINES.
	* configure: Rebuild.
 1995-09-07 01:23:22 +00:00
Jim Wilson
dd6ed5ab2d Fix gas bugs in SH3e handling of fmac instruction. 1995-09-06 22:12:14 +00:00
David Edelsohn
49cb62cd75 * sparc-dis.c: Remove all references to NO_V9. 1995-09-06 01:28:55 +00:00
Ian Lance Taylor
beb926c072 * aclocal.m4: Just include ../bfd/aclocal.m4. 
* configure: Rebuild.
 1995-09-06 00:03:55 +00:00
David Edelsohn
fdd7e4eff1 * sparc-dis.c (X_DISP19): Define. 
(print_insn, case 'G'): Use it.
	(print_insn, case 'L'): Sign extend displacement.
 1995-09-05 23:12:27 +00:00
Ian Lance Taylor
9b65d5229b * configure.in: Run ../bfd/configure.host before AC_PROG_CC. 
Subsitute CFLAGS and AR.  Call AC_PROG_INSTALL.  Don't substitute
	host_makefile_frag or frags.
	* aclocal.m4: New file.
	* configure: Rebuild.
	* Makefile.in (INSTALL): Set to @INSTALL@.
	(INSTALL_PROGRAM): Set to @INSTALL_PROGRAM@.
	(INSTALL_DATA): Set to @INSTALL_DATA@.
	(AR): Set to @AR@.
	(AR_FLAGS): Set to rc rather than qc.
	(CC): Define as @CC@.
	(CFLAGS): Set to @CFLAGS@.
	(@host_makefile_frag@): Remove.
	(config.status): Remove dependency upon @frags@.
 1995-09-04 21:13:22 +00:00
Ian Lance Taylor
c62d12746b * configure.in: ../bfd/config.bfd now just sets shell variables. 
Use them rather than looking through target Makefile fragments.
	* configure: Rebuild.
 1995-09-04 18:31:33 +00:00
Jim Wilson
db29ae72fc Fix bug in SH3e ftrc instruction. 1995-08-31 19:37:41 +00:00
David Edelsohn
90c45f319f * sparc-opc.c (sparc_opcodes): Delete duplicate wr %y insn. 
Add clrx, iprefetch, signx, clruw, cas, casl, casx, casxl synthetic
	sparc64 insns.
 1995-08-30 23:17:12 +00:00
David Edelsohn
a69d3a7286 sparc prefetch insn stuff. 1995-08-30 20:57:07 +00:00
David Edelsohn
a52f75a078 * sparc-opc.c (sparc_opcodes, prefetcha insn): Fix. 
(lookup_{name,value}): New functions.
	(prefetch_table): New static local.
	(sparc_{encode,decode}_prefetch): New functions.
	* sparc-dis.c (print_insn): Handle '*' arg (prefetch function).
 1995-08-30 20:55:51 +00:00
Jim Wilson
9b39b1a8f7 Add some blank lines to improve readability. 1995-08-30 18:13:26 +00:00
Jim Wilson
66f6448d40 Correct comment on first line of file. 1995-08-30 18:10:51 +00:00
David Edelsohn
201bf50690 * disassemble.c (disassembler): Handle bfd_mach_sparc64. 1995-08-30 01:02:59 +00:00
David Edelsohn
7ec658304a * sparc-opc.c (asi): New static local. 
(sparc_{encode,decode}_asi): New functions.
	* sparc-dis.c (print_insn): Call sparc_decode_asi.
 1995-08-29 22:44:00 +00:00
Ian Lance Taylor
259d19c2be * m68k-opc.c (m68k_opcode_aliases): Add bhib as an alias for bhis, 
and likewise for the other branches.  Add bhs as an alias for bcc,
	and likewise for the size variants.  Add dbhs as an alias for
	dbcc.
 1995-08-21 21:34:54 +00:00
Ian Lance Taylor
3d915dd29d * m68k-dis.c: (fpcr_names): Add % before all register names. 
(reg_names): Likewise.
	(print_insn_arg): Don't explicitly print % before register names.
	Add % before register names in static array names.  In case 'r',
	print data registers as `@(Dn)', not `Dn@'.  When printing a
	memory address, don't print @# before it.
	(print_indexed): Change base_disp and outer_disp from int to
	bfd_vma.  Print using MIT syntax, not mutant invalid Motorola
	syntax.  Sign extend 8 byte displacement correctly.
	(print_base): Print using MIT syntax.  Print zpc when appropriate.
	Change parameter disp from int to bfd_vma.
 1995-08-07 20:22:13 +00:00
Jeff Law
1ca31557f5 * sh-dis.c (print_insn_shx): Handle new operand types F_REG_N, 
F_REG_M, FPSCR_M, FPSCR_N, FPUL_M and FPUL_N.
        * sh-opc.h (sh_arg_type): Add new operand types.
        (sh_table): Add new opcodes from SH3E Floating Point ISA.

sh3e stuff.  Sanitized out for now.
 1995-08-07 08:39:42 +00:00
Ian Lance Taylor
85093dcae3 * m68k-opc.c: New file, holding tables from include/opcode/m68k.h. 
Clean up tables.
	* m68k-dis.c: Remove BREAK_UP_BIG_DECL stuff.
	(opcode): Remove.
	(print_insn_m68k): Change d to be const.  Use m68k_numopcodes
	rather than numopcodes.  Use m68k_opcodes rather than removed
	opcode function.  Don't check F_ALIAS.
	(print_insn_arg): Change first parameter to be const char *.
	* Makefile.in (ALL_MACHINES): Add m68k-opc.o.
	(m68k-opc.o): New target.
	* configure.in: Build m68k-opc.o for bfd_m68k_arch.
	* configure: Rebuild.
 1995-08-02 22:38:58 +00:00
David Edelsohn
9a84bc052a Rewritten so table is only sorted/hashed once, even if switching 
between sparc32/sparc64 in one executable.
 1995-08-02 22:35:22 +00:00
David Edelsohn
28661653c7 (build_hash_table): Fix memory leak. 
(print_insn_sparc, print_insn_sparc64): Clean up comments regarding
switching between sparc32 and sparc64.
 1995-08-02 17:15:07 +00:00
David Edelsohn
1a67b3b682 (build_hash_table): Allocate all entries at once. 1995-08-02 16:48:02 +00:00
David Edelsohn
f069afb4eb * sparc-dis.c (HASH_SIZE, HASH_INSN): Define. 
(opcode_bits, opcode_hash_table, sparc64_p): New variables.
	(opcodes_initialized): Renamed from opcodes_sorted.
	(build_hash_table): New function.
	(is_delayed_branch): Use hash table.
	(print_insn): Renamed from print_insn_sparc, made static.
	Build and use hash table.
	(print_insn_sparc, print_insn_sparc64): New functions.
	(compare_opcodes): If !sparc64, move sparc64 opcodes to end,
	and vice-versa if sparc64.
	* sparc-opc.c (all non-v9 insns): Use flag F_NOTV9 instead of F_ALIAS.
 1995-08-02 16:06:17 +00:00
Ken Raeburn
50982f7f9d Initial autoconfiscation; attempting also to remove use of bfd's sysdep.h file. 1995-07-12 05:07:49 +00:00
Ian Lance Taylor
89abbf9d2c Tue Jul 11 14:23:37 1995 Jeff Spiegel <jeffs@lsil.com> 
* mips-opc.c (L1): Define.
	(mips_opcodes): Add R4010 instructions: flushi, flushd, flushid,
	addciu, madd, maddu, ffc, ffs, msub, msubu, selsi, selsr, waiti,
	and wb.

Tue Jul 11 11:49:49 1995  Ian Lance Taylor  <ian@cygnus.com>

	* mips-opc.c (mips_opcodes): For the move pseudo-op, prefer daddu
	if ISA 3 and addu otherwise, replacing or, since some MIPS chips
	have multiple add units but only a single logical unit.
 1995-07-11 18:25:27 +00:00
Ian Lance Taylor
141b9f1bbe * ppc-opc.c (powerpc_operands): Change CR to use a bitsize of 3, 
shifted by 18, without any insertion or extraction function.
	(insert_cr, extract_cr): Remove.
 1995-07-11 15:52:03 +00:00
Ken Raeburn
943fbd5bd5 fsf address update, but not in COPYING files 1995-07-07 22:49:42 +00:00
Ian Lance Taylor
4a674fd49b Sanitize arc stuff from Makefile.in. 1995-07-04 19:43:44 +00:00
Ian Lance Taylor
d7ace3071e start-sanitize-arc 
Mon Jul  3 11:54:31 1995  Ian Lance Taylor  <ian@cygnus.com>

	* Makefile.in (ALL_MACHINES): Add arc-dis.o and arc-opc.o.

end-sanitize-arc
 1995-07-03 15:55:12 +00:00
Stan Shebs
6efe6dc578 * mpw-config.in: Add sh and i386 configs, remove sparc config. 
* sh-opc.h: Add copyright.
 1995-06-16 00:45:31 +00:00
Jim Wilson
856253d4d8 Unsanitize SH3 support. 1995-05-25 00:00:03 +00:00
Steve Chamberlain
1ff71ed037 Wed May 24 14:16:08 1995 Steve Chamberlain <sac@slash.cygnus.com> 
* sh-opc.h: Added bsrf and braf.
 1995-05-24 21:16:02 +00:00
Ken Raeburn
ff15324f63 Bunch of changes from Richard Earnshaw for generic bi-endian ARM aout targets. 
Details in change logs.
 1995-05-18 22:21:18 +00:00
Jason Molenda
8f96fa0e7d * sh-opc.c (sh_nibble_type, sh_arg_type): remove trailing , from 
enum list.

some native cc's barf on this (and K&R says it's naughty)
 1995-04-24 21:21:58 +00:00
Michael Meissner
4121273fa7 Fix April 17th change. 1995-04-19 18:14:20 +00:00
Ken Raeburn
6a37aaf186 * mips-dis.c (print_insn_little_mips): Cast return value from bfd_getl32 from 
bfd_vma to unsigned long, because _print_insn_mips expects an unsigned long,
and that might be fewer words of argument storage (e.g., if bfd_vma is long
long on a 32-bit machine).
(print_insn_big_mips): Likewise with bfd_getb32 value.
(_print_insn_mips): Now static.
 1995-04-18 16:24:09 +00:00
Stan Shebs
7a4f107d38 always keep MPW support files 1995-04-10 22:59:42 +00:00
Stan Shebs
1e0956858e Merge MPW ChangeLog with generic ChangeLog 1995-04-10 22:59:03 +00:00
David Edelsohn
1a56be5c4f * arc-dis.c (print_insn): New parameter `big_p'. Callers updated. 
Call arc_get_opcode_mach to map bfd mach number to opcode value.
	(print_insn_*): Pass bfd mach number, not opcode version.
	* arc-opc.c (arc_get_opcode_mach): New function.
 1995-04-07 03:54:08 +00:00
Ken Raeburn
c024cc1110 Changes from Klaus Kaempf: 
* alpha-opc.h (OSF_ASMCODE): define print pal-code names as defined in App C of
the Alpha Architecture Reference Manual

* alpha-dis.c: cleaned up output print stylized code forms as defined in App
A.4.3 of the Alpha Architecture Reference Manual
 1995-03-14 07:17:20 +00:00
David Edelsohn
8dbed89e06 arc-dis.c (print_insn): Put "+ 4" of relative addresses back. Oops. 1995-03-12 13:21:07 +00:00
Ken Raeburn
8cf2e6ebbc * m68k-dis.c (BREAK_UP_BIG_DECL): Make secondary array static and const. 
(reg_names): Now const.
(print_insn_arg): Arrays cacheFieldName and names now const.
(print_indexed): Array scales now const.
 1995-03-08 08:23:24 +00:00
Ken Raeburn
029e2524db Avoid bogus assumption that the two parts of the split m68k opcode table 
are going to be adjacent in memory.
 1995-03-08 07:57:05 +00:00
David Edelsohn
3aa44a1d92 * arc-dis.c (print_insn_arc_base): Split into big and little fns. 
(print_insn_arc_{host,graphics,audio}): Likewise.
	(print_insn): Add prototype.
	Delete "+ 4" addition to relative branch address.
	(arc_get_disassembler): New arg `big_p'.  Return little or big
	print fn accordingly.
	* arc-opc.c (arc_opcode_init_tables): Init arc_operand_map once.
	(arc_opcode_supported): Use ARC_OPCODE_CPU to ignore byte order.
	(arc_opval_supported): Likewise.
	* disassemble.c (disassembler): Pass big endian flag to
	arc_get_disassembler.
 1995-03-08 05:19:46 +00:00
Ian Lance Taylor
ab204453e6 * ppc-opc.c: Sort recently added instructions by minor opcode 
number within major opcode number.
 1995-03-07 21:48:27 +00:00
Jeff Law
3f073f06cd * hppa-dis.c: Include libhppa.h. 1995-03-06 17:05:20 +00:00
Peter Schauer
f1cb5ff2b4 * Makefile.in (ALL_MACHINES): Add w65-dis.o. 1995-02-21 07:56:45 +00:00
David Edelsohn
07f27bb80c * arc-dis.c (arc_get_disassembler): Change argument to int, 
one of bfd_mach_arc_xxx.  All callers updated.
 1995-02-17 20:44:32 +00:00
Ian Lance Taylor
f27ab33041 * mips-opc.c: Add r4650 mul instruction. 1995-02-16 22:35:36 +00:00
Ian Lance Taylor
470feacfab * mips-opc.c: Add uld and usd macros for unaligned double load and 
store.
 1995-02-15 20:47:31 +00:00
David Edelsohn
c81a2ce3bf (arc_get_disassembler): Renamed from arc_disassembler. 1995-02-10 03:55:34 +00:00
David Edelsohn
9f05921fb7 * disassemble.c (disassembler, case bfd_arch_arc): Call 
arc_disassembler to get disassembler routine.
 1995-02-10 03:42:43 +00:00
David Edelsohn
6acc9345e1 Lotsa arc stuff. 1995-02-10 03:38:14 +00:00
David Edelsohn
ecec4df3e8 * arc-opc.c (MULTSHIFT operand): Delete. 
(UNSIGNED, SATURATION): New operands.
	(mac, mul, mul64, mulu64): New insns.
	(ext. asl, asr, lsr, ror): Only available on host and graphics cpus.
	(padc, padd, pmov, pand, psbc, psub, swap): New insns.
	(host,graphics,audio extended and auxiliary regs): Define.
	(ss, sc, mh, ml): New suffixes.
	(arc_opcode_supported, arc_opval_supported): New functions.
	(insert_multshift, extract_multshift): Deleted.
 1995-02-10 03:37:57 +00:00
David Edelsohn
98d42df90d * arc-dis.c (print_insn_arc): Rename to print_insn and make static. 
New argument `cpu', pass it to arc_opcode_init_tables.
	Document byte order dependencies.  Ignore unsupported insns.
	(arc_disassembler): New function.
	(print_insn_arc_base, print_insn_arc_host, print_insn_arc_graphics,
	print_insn_arc_audio): New functions.
 1995-02-10 03:23:16 +00:00
Stan Shebs
7010c43a6e * i960-dis.c (struct tabent, struct sparse_tabent): Change the 
signed char fields to shorts, more portable.
 1995-02-09 22:46:54 +00:00
Stan Shebs
ce2349c52d * i960-dis.c (struct tabent, struct sparse_tabent): Declare the 
char fields as signed chars, since they may have negative values.

Fixes PR 6290.
 1995-02-09 01:32:35 +00:00
J.T. Conklin
9ce4de1912 * i386-dis.c (dis386_twobyte): Add cpuid, From Charles Hannum 
(mycroft@netbsd.org).
 1995-02-06 18:56:53 +00:00
Ian Lance Taylor
1af6f4bb6f tipo 1995-01-30 04:23:50 +00:00
Ian Lance Taylor
669124ef4f * ppc-opc.c: Changes based on patch from David Edelsohn 
<edelsohn@npac.syr.edu>.
	(powerpc_operands): Add operands SPRBAT and SPRG. Split TBR out of
	SPR.
	(FXM_MASK): Define.
	(insert_tbr): New static function.
	(extract_tbr): New static function.
	(XFXFXM_MASK, XFXM): Define.
	(XSPRBAT_MASK, XSPRG_MASK): Define.
	(powerpc_opcodes): Add instructions to access special registers by
	name.  Add mtcr and mftbu.
 1995-01-26 23:35:32 +00:00
Steve Chamberlain
9f744f9110 * configure.in: Add W65 support. 
* disassemble.c: Likewise.
	* w65-opc.h, w65-dis.c: New files.
 1995-01-16 00:35:55 +00:00
Stan Shebs
d3d74a94e9 * mpw-config.in (archname): Compute from the config. 
(BFD_MACHINES, ARCHDEFS): Put into mk.tmp.
 1995-01-04 23:05:52 +00:00
Steve Chamberlain
d383e289df * h8300-dis.c (bfd_h8_disassemble): Add support for 2 bit 
immediates.
 1994-12-29 06:16:23 +00:00
Ian Lance Taylor
27faaa41e6 * mips-opc.c: Add dli as a synonym for li. 1994-12-20 16:27:45 +00:00
David Edelsohn
edb35c135b * arc-opc.c (insertion fns): Pass pointer to value's table entry. 
All uses changed.
	(extraction fns): Insn argument now array of two words.  Return pointer
	to value's table entry.  All uses changed.
	(arc_opcode_lookup_suffix): Exported for arc-dis.c.
	(insert_multshift, extract_multshift): New fns.
	(arc_operands): Add support for cache bypass suffix.  Add support for
	predefined aux regs.  Modifier bits moved to flags field.
	(arc_opcodes): Likewise.
	Add mul/mulu/shift insns.  Syntax of zero/sign extension insns changed.
	New insn rlc.  Update to syntax in programmer's manual.
	(arc_reg_names): Fix typo in lp_count.  Add predefined aux regs.
	(arc_suffixes): New synonyms lo,hs for cs,cc.  New suffix for cache
	bypass.
	(arc_opcode_init_tables): New argument to indicate cpu type.
	(insert_reg): Handle predefined aux regs.
	(extract_reg): Likewise.
	(lookup_register): New fn.
	* arc-dis.c (arc_condition_codes): Deleted.
	(print_insn_arc): Handle insns with 32 bit immediate constants better.
	Clean up modifier handling.  Handle predefined aux regs.
 1994-12-19 20:55:13 +00:00
Ken Raeburn
28a2119fba don't sanitize arc files that have already been deleted 1994-12-19 16:08:48 +00:00
Ken Raeburn
a8732972ae alpha, mips, m68k fixes 1994-12-08 23:28:05 +00:00
Steve Chamberlain
7014c55e40 Clean the sh3 stuff out the right way. 1994-12-06 23:29:54 +00:00
Michael Tiemann
0041db5a97 Switch r3 to scratch register, r0 to stack register. 
Other misc changes before beta shipment to customer.
 1994-12-06 02:04:58 +00:00
David Edelsohn
8515dbe235 Initial ARC support. 1994-11-30 02:06:04 +00:00
Michael Tiemann
fb870b50a7 Add changes from customer since last work. 1994-11-26 00:17:52 +00:00
Steve Chamberlain
a4d44f7ac9 remove sh3 stuff. 1994-11-25 06:15:19 +00:00
Michael Tiemann
de582ad676 *** empty log message *** 1994-11-25 02:28:15 +00:00
Michael Tiemann
03c4ce2fcc Rename r16 files to rce, and fix some more .Sanitize typos. 1994-11-25 00:01:26 +00:00
Michael Tiemann
9f554efd62 *** empty log message *** 1994-11-24 21:48:21 +00:00
Michael Tiemann
5c680afdc4 Fix .Sanitize scrips so that r16 is truly scrubbed out. 
Also, report errors if any traces of sanitize remain after sanitizing.
 1994-11-24 21:36:00 +00:00
Michael Tiemann
d94aca1aff Safely check in r16 targets for binutils. 1994-11-24 20:30:11 +00:00
Steve Chamberlain
17775ffbca * disasseble.c (disassebler): Cope with little endian SH. 1994-11-24 06:37:05 +00:00
Steve Chamberlain
a90a64c168 * sh-opc.h (mov.l gbr): Get direction right. 
* sh-dis.c (print_insn_shx): New function.
	(print_insn_shl, print_insn_sh): Call print_insn_shx to
	print opcodes with right byte order.
 1994-11-24 06:36:28 +00:00
Ian Lance Taylor
dded3d1406 * hppa-dis.c (print_insn_hppa): Read the instruction using 
bfd_getb32, so that it works on a little endian or 64 bit host.
	Remove unused local variable op.
 1994-11-01 00:02:52 +00:00
Ian Lance Taylor
cd4b8926ce * mips-opc.c: Use or instead of addu for pseudo-op move, since 
addu does not work correctly if -mips3.
PR 5832.
 1994-10-25 21:09:08 +00:00
Ian Lance Taylor
009946c974 * a29k-dis.c (print_special): Add special register names defined 
on 29030, 29040 and 29050.
	(print_insn): Handle new operand type 'I'.
 1994-10-19 17:41:18 +00:00
Ian Lance Taylor
995b0d3ff3 * configure.in: Use ${config_shell} when running config.bfd. 1994-10-04 16:18:19 +00:00
Ian Lance Taylor
e96a2b1d46 * a29k-dis.c (print_insn): Print the opcode. 
PR 4779.
 1994-09-15 20:46:46 +00:00
Ian Lance Taylor
8490907307 * mips-opc.c (mips_opcodes): Set WR_t for sc and scd. 
PR 5632
 1994-09-14 21:53:14 +00:00
Jeff Law
da233e6ed3 * hppa-dis.c (reg_names): Use r26-r23 for arg0-arg3. 1994-09-12 04:33:24 +00:00
Ken Raeburn
ba08215a8c keep arm files 1994-09-09 18:51:10 +00:00
Ian Lance Taylor
942a4965b7 * mips-opc.c: Set INSN_STORE_MEMORY flag for all instructions 
which store a value into memory.
PR 5433.
 1994-09-06 15:42:11 +00:00
Ken Raeburn
318b02b6b9 ARM Acorn/RISCiX target and host patches from Richard Earnshaw 1994-09-05 10:53:00 +00:00
Ken Raeburn
c4396c87e9 * sparc-dis.c (print_insn_sparc): Handle new operand type 'x'. 
* sparc-opc.c: Added sparclite extended FP operations, and versions of v9
impdep* instructions permitting specification of the OPF field.
 1994-07-28 23:46:19 +00:00
Ken Raeburn
2a097d73b7 i960xl changes (sanitized); keep ns32k-dis.c 1994-07-26 23:13:34 +00:00
Ken Raeburn
f61ca5fae4 fix from dj delorie for disassembler config in djgpp 1994-07-20 16:34:25 +00:00
Ken Raeburn
60a70a7b0e ns32k-dis.c (invalid_float): Changed to take char* argument, and test for 
explicitly specified sizes, instead of using sizeof() on host CPU types.
(INVALID_FLOAT): Cast first argument.
 1994-07-13 22:38:03 +00:00
Ken Raeburn
69bb683c6d Wed Jul 13 18:01:58 1994 Ken Raeburn (raeburn@cujo.cygnus.com) 
* ns32k-dis.c: Deleted all code in "#ifdef GDB".
	(invalid_float): Enabled general version, doesn't require running
	on ns32k host.

Sun Jul 10 00:27:47 1994  Ian Dall  (dall@hfrd.dsto.gov.au)

	* opcodes/ns32k-dis.c: Semi-new file.  Had apparently been dropped
	from distribution. A ns32k-dis.c from a previous distribution has
	been brought up to date and supports the new interface.

	* disaaemble.c: define ARCH_ns32k and add case bfd_arch_ns32k.

	* configure.in: add bfd_ns32k_arch target support.

	* Makefile.in: add ns32k-dis.o to ALL_MACHINES.
	Add ns32k-dis.c to CFILES. Add dependencies for ns32k-dis.o.
 1994-07-13 22:05:52 +00:00
Stan Shebs
10f1b5978b Elim dup of file names 1994-06-30 23:19:26 +00:00
Stan Shebs
fea3fe6407 * h8300-dis.c, mips-dis.c: Don't use true and false. 1994-06-28 20:27:02 +00:00
Ian Lance Taylor
72fcd790ad * mips-dis.c (_print_insn_mips): Build a static hash table mapping 
opcodes to the first instruction with that opcode, to speed
	disassembly of large files.  From ralphc@pyramid.com (Ralph
	Campbell).
 1994-06-22 17:41:05 +00:00
Ken Raeburn
2e4ebfe2b0 sparc v9 unsanitization 1994-06-16 00:36:48 +00:00
Stan Shebs
67c2d8c8d7 Tue Jun 7 18:45:39 1994 Stan Shebs (shebs@andros.cygnus.com) 
* mpw-config.in (target_arch): Compute from canonical target.
	(m68k, mips, powerpc, sparc): Add architectures.
	* mpw-make.in (disassemble.c.o): Add.
	(ALL_CFLAGS): Remove special flags (-mc68020 -mc68881 -model far).
 1994-06-08 01:53:20 +00:00
Ken Raeburn
fc984fdb33 keep configure.bat 1994-06-05 16:49:49 +00:00
Ken Raeburn
c06e55d99a changes from gas-2.3/binutils-2.4 dist (details in branch log msgs, changelogs) 1994-05-27 16:58:05 +00:00
Steve Chamberlain
ab678720c7 * a29k-dis.c (print_insn): Print 'x' type operand in hex. 
* h8300-dis.c (bfd_h8_disassemble): Print 16bit rels correctly.
	* sh-dis.c (print_insn_sh): Don't recur endlessly if delay
	slot insn is in a delay slot.
	* z8k-opc.h: (resflg): Fix patterns.
	* h8500-opc.h Fix CR insn patterns.
 1994-05-08 00:19:06 +00:00
Ken Raeburn
204c914803 keep disassemble.c 1994-04-29 15:46:36 +00:00
Ken Raeburn
7495f83bd4 * m68k-dis.c (print_insn_m68k): If F_ALIAS flag is set, skip the opcode being 
examined.
 1994-04-28 22:59:09 +00:00
Ian Lance Taylor
8c546dedc3 * ppc-opc.c (powerpc_opcodes): Correct fcir. From David Edelsohn 
(edelsohn@npac.syr.edu).
 1994-04-17 03:43:18 +00:00
Ian Lance Taylor
76336d506d * mips-opc.c (mips_opcodes): Correct operands of "nor" with an 
immediate argument.
 1994-04-06 21:12:40 +00:00
David Edelsohn
8055d512fb * sparc-opc.c (sparc_opcodes): Fix "rd %fprs,%l0". 1994-04-04 23:37:46 +00:00
Ian Lance Taylor
749a663dba * ppc-opc.c (powerpc_operands): The signedp field has been 
removed, so don't initialize it.  Set the PPC_OPERAND_SIGNED flag
	instead.  Add new operand SISIGNOPT.
	(powerpc_opcodes): For lis, liu, addis, and cau use SISIGNOPT.
	Based on patch from David Edelsohn (edelsohn@npac.syr.edu).
	* ppc-dis.c (print_insn_powerpc): Check PPC_OPERAND_SIGNED rather
	than signedp field.
 1994-04-04 17:32:02 +00:00
Stan Shebs
8f24553567 Wed Mar 30 15:31:55 1994 Stan Shebs (shebs@andros.cygnus.com) 
* mpw-xconfig.in (opcode/mips.h): Don't forward-include here.
	(BFD_MACHINES): Set appropriately.
 1994-03-30 23:43:52 +00:00
Stan Shebs
72e11c95da Wed Mar 30 15:30:44 1994 Stan Shebs (shebs@andros.cygnus.com) 
* mpw-config.in (BFD_MACHINES): Set to a default value.
	* mpw-make.in (BFD_MACHINES): Remove wired-in value.
 1994-03-30 23:33:44 +00:00
Peter Schauer
878db64d3f * i386-dis.c (struct private): Renamed to dis_private. `private' 
is a reserved word for dynix cc.
 1994-03-30 09:17:49 +00:00
Ian Lance Taylor
934ec70a4e * configure.in: Change error message to refer to bfd/config.bfd 
rather than bfd/configure.in.
 1994-03-28 18:05:12 +00:00
Ian Lance Taylor
541924955f Mon Mar 28 12:28:30 1994 David Edelsohn (edelsohn@npac.syr.edu) 
* ppc-opc.c: Define POWER2 as short alias flag.
	(powerpc_opcodes): Add POWER/2 opcodes lfq*, stfq*, fcir[z], and
	fsqrt.
 1994-03-28 17:30:29 +00:00
Ian Lance Taylor
c0386c7a9f * m68881-ext.c: Removed; no longer used. 
* Makefile.in: Changed accordingly.
 1994-03-14 20:23:05 +00:00
Ian Lance Taylor
448ff99268 * m68k-dis.c (ext_format_68881): Don't declare. 
(print_insn_m68k): If an instruction uses place 'i', it uses at
	least four fixed bytes.
	(print_insn_arg): Don't bump p by 2 for case 'I', place 'i'.  For
	extended float, convert to double using floatformat_to_double, not
	ieee_extended_to_double, and fetch the data before converting it.
 1994-03-14 20:00:34 +00:00
Ian Lance Taylor
d75eb68cf2 * mips-opc.c: It's sqrt.s, not sqrt.w. From 
davidj@ICSI.Berkeley.EDU (David Johnson).
 1994-03-08 23:13:30 +00:00
Ian Lance Taylor
9a458b67a4 Set Emacs local variables to never use version control. 1994-03-08 18:41:54 +00:00
Peter Schauer
4dd4933e7c Change inclusion of <string.h> to sysdep.h. 1994-02-08 19:01:45 +00:00
Peter Schauer
5c9b5f58f3 * dis-buf.c, i386-dis.c: Include <string.h>. 1994-02-08 09:12:06 +00:00
Stan Shebs
e320f644a3 Mon Feb 7 15:53:02 1994 Stan Shebs (shebs@andros.cygnus.com) 
* mpw-make.in (CSEARCH): Add extra-include to search path.
 1994-02-07 23:55:53 +00:00
Jim Kingdon
9f80c72bb1 * i960-dis.c (reg, mem): Just use a static array instead of 
calling xmalloc.
 1994-02-06 15:49:03 +00:00
Jeff Law
0bb364c6b3 * hppa-dis.c (print_insn_hppa): For '?' and '@' only adjust the 
condition name index if this is for a negated condition.
 1994-02-05 19:15:20 +00:00
Jeff Law
e59f322778 * hppa-dis.c (print_insn_hppa): No space before 'H' operand. 
Floating point format for 'H' operand is backwards from normal
        case (0 == double, 1 == single).  For '4', '6', '7', '9', and '8'
        operands (fmpyadd and fmpysub), handle bizarre register translation
        correctly for single precision format.
 1994-02-05 18:18:49 +00:00
Jeff Law
e3960b9610 * hppa-dis.c (print_insn_hppa): Do not emit a space after 'F' 
or 'I' operands if the next format specifier is 'M' (fcmp
        condition completer).
 1994-02-05 08:04:45 +00:00
Ian Lance Taylor
1c214e4ceb * ppc-opc.c (powerpc_operands): New operand type MBE to handle a 
single number giving a bitmask for the MB and ME fields of an M
	form instruction.  Change NB to accept 32, and turn it into 0;
	also turn 0 into 32 when disassembling.  Seperated SH from NB.
	(insert_mbe, extract_mbe): New functions.
	(insert_nb, extract_nb): New functions.
	(SC_MASK): Mask out SA and LK bits.
	(powerpc_opcodes): Change "cal" to use RT, D, RA rather than RT,
	RA, SI.  Change "liu" and "cau" to use UI rather than SI.  Mark
	"bctr" and "bctrl" as accepted by POWER.  Change "rlwimi",
	"rlimi", "rlwimi.", "rlimi.", "rlwinm", "rlinm", "rlwinm.",
	"rlinm.", "rlmi", "rlmi.", "rlwnm", "rlnm", "rlwnm.", "rlnm." to
	use MBE rather than MB.  Add "mfmq" and "mtmq" POWER instructions.
	(powerpc_macros): Define table of macro definitions.
	(powerpc_num_macros): Define.
 1994-02-05 04:46:34 +00:00
Ian Lance Taylor
e7285169f8 * ppc-dis.c (print_insn_powerpc): Don't skip optional operands 
if PPC_OPERAND_NEXT is set.
 1994-02-05 04:45:24 +00:00
Stan Shebs
5e7eed8d82 Mon Jan 24 12:09:35 1994 Stan Shebs (shebs@andros.cygnus.com) 
* mpw-xconfig.in (opcode/mips.h): Create using forward-include.
 1994-01-24 20:40:04 +00:00
Stan Shebs
8ab5883476 Mon Jan 24 12:07:22 1994 Stan Shebs (shebs@andros.cygnus.com) 
* mpw-config.in (varargs.h): Don't create.
	(sysdep.h): Create using forward-include.
	* mpw-make.in (CSEARCH): Add include/mpw to search path.
 1994-01-24 20:39:06 +00:00
Ian Lance Taylor
89221bd5f4 Added ppc-opc.c and ppc-dis.c. 1994-01-22 00:11:37 +00:00
Ian Lance Taylor
1211751d0b * ppc-opc.c: New file. Opcode table for PowerPC, including 
opcodes for POWER (RS/6000).
	* ppc-dis.c: New file.  PowerPC and Power (RS/6000) disassembler.
	* Makefile.in (ALL_MACHINES): Add ppc-dis.o and ppc-opc.o.
	(CFILES): Add ppc-dis.c.
	(ppc-dis.o, ppc-opc.o): New targets.
	* configure.in: Build ppc-dis.o and ppc-opc.o for bfd_rs6000_arch.
 1994-01-22 00:04:49 +00:00
Ian Lance Taylor
85dcf36d72 PowerPC opcode table and disassembler. 1994-01-22 00:01:27 +00:00
Jeff Law
f037e5b0a4 * hppa-dis.c (print_insn_hppa): Handle 'N' in assembler template. 
No space before 'u', 'f', or 'N'.
 1994-01-18 04:06:52 +00:00
Jim Kingdon
4baf1a8c9e * i386-dis.c (print_insn_i386): Add FIXME comment regarding reading 
farther than we should.
 1994-01-17 00:47:38 +00:00
Jim Kingdon
a279b1f5ff * i386-dis.c (dis386): Use Yb and Yv for scasb and scasS. 1994-01-17 00:38:56 +00:00
Stan Shebs
e4c7516baa Set lose_these_too correctly 1994-01-11 01:15:02 +00:00
Stan Shebs
d1463af1d1 Fri Jan 7 11:26:29 1994 Stan Shebs (shebs@andros.cygnus.com) 
* mpw-make.in: Replace 8-bit chars with their names.
 1994-01-07 19:27:21 +00:00
David MacKenzie
4b2febd355 fix comments 1994-01-06 20:37:47 +00:00
Stan Shebs
e7c4e61cc9 Mon Jan 3 11:44:29 1994 Stan Shebs (shebs@andros.cygnus.com) 
* mpw-config.in:  New file, MPW version of configure.in.
	* mpw-make.in:	  New file, MPW version of Makefile.in.

Mon Jan  3 12:54:35 1994  Stan Shebs  (shebs@andros.cygnus.com)

 	* mpw-xconfig.in: New file, mpw x mips configuration bits.
 1994-01-03 20:58:02 +00:00
Peter Schauer
ba936a2ef5 * alpha-opc.h, alpha-dis.c (print_insn_alpha): Add 
FLOAT_MEMORY_FORMAT_CODE, FLOAT_BRANCH_FORMAT_CODE, correct
	FLOAT_FORMAT_CODE to put out floating point register names.
 1993-11-08 07:53:45 +00:00
Jim Kingdon
de807a9b6a Remove v9-specific entry 1993-11-01 20:08:35 +00:00
Jim Kingdon
bf04fba0f3 Add missing entry for change by Ian 1993-10-31 19:51:54 +00:00
Ian Lance Taylor
d75a406d3c * a29k-dis.c (print_insn): Use 0x%08x, not 0x%8x. 1993-10-28 21:43:14 +00:00
Ian Lance Taylor
70643dbc13 * mips-opc.c (dsll, dsra, dsrl): Added '>' cases for shift counts 
larger than 32.  Moved dsxx32 variants first for disassembler.
 1993-10-27 15:52:00 +00:00
Steve Chamberlain
07bf1ce5b2 Add full lda information 1993-10-25 18:34:00 +00:00
Peter Schauer
bb959d0ab9 * alpha-opc.h: Add ldl_l, fix typo for ldq_u. 
* alpha-dis.c (print_insn_alpha):  Add code for PAL_FORMAT_CODE.
 1993-10-08 09:43:36 +00:00
Ian Lance Taylor
9978cd4dc9 * mips-opc.c: Correct lwu opcode value (book had it wrong). 1993-10-05 21:49:04 +00:00
K. Richard Pixley
cb79d01dcf * m88k-dis.c (m88kdis): comment change. Remove space after 
printing mnemonic.
	  (printop): handle new arg types DEC and XREG for m88110.
 1993-09-29 23:26:42 +00:00
Jim Kingdon
a0ad6c0f18 Tue Sep 28 19:20:16 1993 Jeffrey A Law (law@snake.cs.utah.edu) 
* hppa-dis.c (print_insn_hppa): Handle 'z' operand
	type for absolute branch addresses.  Delete special
	"ble" and "be" code in 'W' operand code.
 1993-09-29 00:25:04 +00:00
Peter Schauer
3c6c7e4456 * alpha-dis.c (print_insn_alpha), alpha-opc.h: Fix bugs, use 
info->fprintf_func for printing and info->print_address_func for
	address output.
 1993-09-17 11:47:59 +00:00
Ian Lance Taylor
44647fcc26 * mips-dis.c, m88k-dis.c: Don't include libbfd.h. Changed calls 
to BFD swapping routines to correspond to BFD name changes.
 1993-09-07 18:27:18 +00:00
Ian Lance Taylor
547998d2c8 * mips-opc.c: Change div machine instruction to be z,s,t rather 
than s,t.  Change div macro to be d,v,t rather than d,s,t.
	Likewise for divu, ddiv, ddivu.  Added z,s,t case for drem, dremu,
	rem and remu which generates only the corresponding div
	instruction.  This is for compatibility with the MIPS assembler,
	which only generates the simple machine instruction when an
	explicit destination of $0 is used.
	* mips-dis.c (print_insn_arg): Handle 'z' (always register zero).
 1993-09-02 17:14:10 +00:00
Ian Lance Taylor
a9c686adf5 * mips-opc.c: Move div machine instruction after macro forms. 
Change d,s,t form to d,v,t.  Likewise for divu, ddiv and ddivu.
	This is for compatibility with the MIPS assembler, which only
	generates the simple machine instruction when an explicit
	destination of $0 is used.
 1993-09-02 14:42:31 +00:00
Ian Lance Taylor
a5ba0d3f48 * mips-opc.c: From davidj@ICSI.Berkeley.EDU (David Johnson): Set 
WR_31 hazard for bal, bgezal, bltzal.
 1993-08-27 14:55:22 +00:00
Ian Lance Taylor
320cdccfb1 * mips-opc.c ("absu"): Removed. 
("dabs"): Added.
 1993-08-23 17:02:50 +00:00
Ian Lance Taylor
2bef2d3e57 * mips-opc.c: Added r6000 and r4000 instructions and macros. 
Changed hazard information to distinguish between memory load
	delays and coprocessor load delays.
 1993-08-20 15:40:51 +00:00
Ian Lance Taylor
45b1470513 * mips-opc.c: li.d uses "T,L", not "S,F". Added li.s. 1993-08-18 19:40:37 +00:00
David MacKenzie
ed2fe80fb5 don't pass cpu to config.bfd 1993-08-17 16:45:41 +00:00
Ian Lance Taylor
e9a3035799 * m88k-dis.c (m88kdis): Make class unsigned. 1993-08-17 16:24:38 +00:00
Ian Lance Taylor
786e4f1a5f * mips-opc.c: Added lwc1 E,A(b) to go with lwc1 T,A(b). Similarly 
for swc1.
 1993-08-12 16:07:37 +00:00
Ian Lance Taylor
11a0aaa785 * mips-opc.c: From davidj@ICSI.Berkeley.EDU (David Johnson): Took 
coprocessor instructions out of #if 0, and made them use new
	argument type "C".
 1993-08-06 15:20:49 +00:00
Jim Kingdon
071689e1ad * sparc-dis.c: Include ansidecl.h before opcodes/sparc.h. 1993-08-05 22:16:40 +00:00
David Edelsohn
eea92b2442 Rename sigm insn to sir. 
Change impdep insn from [1+2],d to 1,2,d.
 1993-08-04 05:12:50 +00:00
Fred Fish
b5ed6e32c2 Remove '.Sanitize' from explicit list of Things-to-lose. It is now implicitly 
added to the list by Sanitize, unless Sanitize knows it needs to keep it.
 1993-08-02 23:29:32 +00:00
Fred Fish
775d4a4096 Add .Sanitize to Things-to-lose list. 1993-07-30 16:46:19 +00:00
Jim Kingdon
18de15d82e * hppa-dis.c: Move floating registers from reg_names to fp_reg_names. 
(fput_fp_reg_r): Renamed from fput_reg_r.
	(fput_fp_reg): New function.
	(print_insn_hppa): Use fput_fp_reg{,_r} where appropriate.
 1993-07-21 18:54:49 +00:00
Jim Kingdon
4d135f1c5a * hppa-dis.c (print_insn_hppa, cases 'a', 'd'): Print space afterwards. 
* hppa-dis.c (print_insn_hppa, case 'd'): Use GET_COND not GET_FIELD.
 1993-07-21 18:44:40 +00:00
Jim Kingdon
69135a69b6 * mips-opc.c: New file, containing opcode table from 
../include/opcode/mips.h.
 1993-07-20 22:55:21 +00:00
Jim Kingdon
b2ad2e6473 * hppa-dis.c (print_insn_hppa): Use extract_5r_store for 'r'. 1993-07-20 00:22:35 +00:00
Jim Kingdon
981b3a2794 * hppa-dis.c (print_insn_hppa, case '>'): If next character is 'n', 
don't output a space.
 1993-07-19 21:39:36 +00:00
Jim Kingdon
17068960cb * hppa-dis.c (float_format_names): 10 is undefined, and 11 is quad. 1993-07-19 20:54:04 +00:00
Jim Kingdon
32d2052a0d * mips-opc.c: New file, containing opcode table from 
../include/opcode/mips.h.
	* Makefile.in: Add it.
 1993-07-19 02:25:39 +00:00
Ian Lance Taylor
a4c0129924 * m88k-dis.c: New file, moved in from gdb and changed to use the 
new dis-asm.h disassembler interface.
	* Makefile.in (DIS_LIBS): Added m88k-dis.o.
	(m88k-dis.o): New target.
 1993-07-15 16:40:49 +00:00
Ian Lance Taylor
37609724c6 * mips-dis.c (print_insn_arg, _print_insn_mips): Made pointer to 
argument string const char * to correspond to opcode/mips.h.
 1993-07-13 17:06:07 +00:00
Ian Lance Taylor
fde326fbc9 * mips-dis.c: Updated to account for name changes in new version 
of opcode/mips.h.
	* Makefile.in: Added header file dependencies.
 1993-07-07 17:37:11 +00:00
David Edelsohn
a5b5f81d79 (bfd_h8_disassemble): Correct fetching of instruction. 1993-07-04 06:49:43 +00:00
David Edelsohn
9c06680d28 Fix typo. 1993-07-03 00:40:35 +00:00
Per Bothner
5b6c633678 * m68k-dis.c (print_insn_arg): Change return value to byte count 
or error code.
	* m68k-dis.c:  Re-write to detect invalid operands before
	printing anything, so we can handle this the same way we
	handle invalid opcodes.
 1993-06-18 21:18:53 +00:00
Steve Chamberlain
219cf23283 Understand more opcodes. 1993-06-17 22:02:49 +00:00
Ian Lance Taylor
91ea6ab0b1 * hppa-dis.c: Include <ansidecl.h> and sysdep.h before other 
header files.
 1993-06-16 20:49:36 +00:00
Ken Raeburn
0a3c15c302 sparc-dis, configure/Makefile changes 1993-06-16 02:05:13 +00:00
Ken Raeburn
5edfb67cac search ../include, and not ../bfd 1993-06-16 01:46:54 +00:00
David D. Zuhn
193dc897c7 remove parentdir support 1993-06-16 00:24:54 +00:00
Stu Grossman
5aef7c67a3 Changes from Jeff Law, law@cs.utah.edu: 
* hppa-dis.c: Fix typo.  'a' and 'd' were reversed.
	Do not print a space before the completers specified by
	'a' and 'd'.
 1993-06-15 20:37:37 +00:00
Ken Raeburn
998f2ef343 mips-dis.c needn't choke on HOST_64_BIT 1993-06-11 23:39:25 +00:00
Ken Raeburn
112087edcc Lots of changes from Jeff Law for HPPA support: 
Clean up cruft in opcode table; improve opcodes library disassembler; make
gdb use opcodes library disassembler.
 1993-06-11 23:20:54 +00:00
Jim Kingdon
e6fb7139ee * m68k-dis.c (print_insn_{m68k,arg}): Add MMU codes. 1993-06-11 16:23:55 +00:00
Steve Chamberlain
3b4cc5ecfb * h8300-dis.c: New file, removed from bfd/cpu-h8300.c, with 
H8/300-H opcodes.
 1993-06-08 19:26:23 +00:00
Per Bothner
e0a8bcfb54 * Makefile.in (CSEARCH): Add -I../bfd for sysdep.h and bfd.h. 
* configure.in:  No longer need to configure to get sysdep.h.
 1993-06-07 19:59:50 +00:00
K. Richard Pixley
87756e15db added things-to-lose sections 1993-05-27 06:44:29 +00:00
K. Richard Pixley
7b85349fe8 honor verbose flag 1993-05-27 03:22:48 +00:00
Stu Grossman
b7b184a125 * z8k-dis.c (fetch_data): Use unsigned char to make ancient gcc's 
happy.
 1993-05-19 22:37:08 +00:00
Ken Raeburn
d698222b58 note a hppa-dis.c change i forgot to list before 1993-05-14 12:10:41 +00:00
Ken Raeburn
cfa8d0617d add hppa disassembly code 1993-05-14 11:41:02 +00:00
David Edelsohn
261d3247f9 Macroize all conditional move insns. 
Fix generated code of fmovcc insns (opf field was wrong).
 1993-05-11 21:16:39 +00:00
Fred Fish
0e57a49587 * a29k-dis.c, alpha-dis.c, i960-dis.c, sparc-dis.c, z8k-dis.c: 
Cast second arg to read_memory_func to "bfd_byte *", as necessary.
 1993-05-07 03:55:10 +00:00
Steve Chamberlain
8679a71fc8 SH support 1993-04-27 01:19:25 +00:00
Steve Chamberlain
5f8f6d56f2 Support for the alpha 1993-04-24 02:10:09 +00:00
John Gilmore
d802b9481b Make "ta" the default trap instruction, "t" the alias. 1993-04-06 00:38:25 +00:00
Ian Lance Taylor
e9aff87e19 Maybe we should change ansidecl.h to define const as well as CONST? 
* a29k-dis.c, sparc-dis.c, sparc-opc.c: Use CONST rather than
	const.
 1993-04-02 15:27:17 +00:00
Jim Kingdon
720b3aed42 New print_address for disassemblers, merge a29k and i960 disassemblers 1993-04-02 00:18:47 +00:00
Jim Kingdon
3245e377e4 * sparc-dis.c: Use fprintf_func a few places where I forgot, 
and double percent signs a few places.
 1993-04-01 23:24:57 +00:00
Jim Kingdon
e08c332141 Make circumvention of sun make VPATH bug include all relevant files 1993-04-01 18:56:02 +00:00
Jim Kingdon
117733ad8d make it work with recent sparc changes 1993-04-01 18:42:39 +00:00
Jim Kingdon
a6cead71cd Fix prototype problems related to recent disassembler changes 1993-04-01 18:04:51 +00:00
Jim Kingdon
3ac166b105 this is part of the binutils/gdb sparc disassembler merge 1993-04-01 16:58:41 +00:00
Jim Kingdon
f7ed13c7d5 merge binutils and gdb sparc disassemblers 1993-04-01 16:56:06 +00:00
K. Richard Pixley
05545edc03 * h8500-dis.c, i386-dis.c, m68k-dis.c, z8k-dis.c (fetch_data): 
deliberately return non-zero to setjmp from longjmp.  Otherwise
  this code fails to compile.
 1993-04-01 04:52:59 +00:00
Stu Grossman
cbe61cc651 * m68k-dis.c: Fix prototype for fetch_arg(). 1993-04-01 01:05:39 +00:00
Jim Kingdon
aff22f452f New file dis-buf.c; part of read_memory_func changes just checked it 1993-03-31 21:45:59 +00:00
Jim Kingdon
5d0734a7d7 provide a new interface (using read_memory_func) to call the disassemblers 
which copes with errors in a plausible way
 1993-03-31 21:43:25 +00:00
John Gilmore
2cb563e6f4 Update for h8500-dis.c. (Avoid Sun Make vpath bug) 1993-03-23 02:55:56 +00:00
Steve Chamberlain
337110eab7 New file 1993-03-19 22:39:35 +00:00