Commit graph

182 commits

Author SHA1 Message Date
Nick Clifton
7378e198a5 Thumb BL instruction: Do not set LR to pc + 2, it has already been advanced. 2002-05-27 13:30:36 +00:00
Nick Clifton
2984e11475 When decoding a BLX(1) instruction do not add in the second bit of the base
address - this has already been accounted for.
2002-05-23 12:38:31 +00:00
Nick Clifton
8b2440b731 Simulate XScale BCUMOD register 2002-05-21 20:28:26 +00:00
Nick Clifton
de4112fa38 Add support for target specific command line switches to old-style simualtors.
Make use of this support in the ARM simulator to add a --swi-support= switch
to select whcih SWI protocols to emulate.
2002-05-20 14:32:50 +00:00
Nick Clifton
ace4f296f5 Uses sim callback interface for system calls in RedBoot SWI support. 2002-05-09 10:29:08 +00:00
Nick Clifton
d8512e6afd Support the RedBoot SWI in ARM mode and some of its system calls. 2002-05-09 10:14:12 +00:00
Anthony Green
ae60d3ddec Increase default memory size to 8MB. 2002-03-18 21:43:15 +00:00
Keith Seitz
b3ba81f8ee * armos.c (SWIWrite0): Use generic host_callback mechanism
for supported OS functions "open", "close", "write", etc.
	(SWIopen): Likewise.
	(SWIread): Likewise.
	(SWIwrite): Likewise.
	(SWIflen): Likewise.
	(ARMul_OSHandleSWI): Likewise.
2002-02-21 20:22:49 +00:00
Nick Clifton
c17aa31873 Modify previous patch so that it is only triggered for COFF format executables. 2002-02-05 11:22:26 +00:00
Nick Clifton
25180f8aef If a v5 architecture is detected, assume it might be an XScale binary, since
there is no way to distinguish between    the two in the COFF file format.
2002-02-04 16:27:22 +00:00
Nick Clifton
57165fb4bb Fix parameters passed to CPRead[13] and CPRead[14]. 2002-01-10 11:14:57 +00:00
Nick Clifton
86c735a526 General format tidy ups 2002-01-09 15:08:21 +00:00
Nick Clifton
272fcdcd59 Fix bug detected by GDB testsuite - when fetching registers more than 4
bytes wide return 0 for the other bytes.
2002-01-09 14:59:22 +00:00
Ben Harris
6746a76a70 2001-11-16 Ben Harris <bjh21@netbsd.org>
* Makefile.in (armemu32.o): Replace $< with autoconf recommended
	$(srcdir)/....
	(armemu26.o): Ditto.
2001-11-16 18:56:01 +00:00
Nick Clifton
ff44f8e352 Add support for XScale's coprocessor access check register.
Fix formatting.
2001-10-18 12:20:49 +00:00
Nick Clifton
fb7a8ef0df Fix handling of XScale LDRD and STRD instructions with post indexed addressing modes. 2001-05-11 21:51:07 +00:00
Nick Clifton
dac07255f9 Check Mode not Bank in order to determine rocesor mode. 2001-05-08 08:28:28 +00:00
Matthew Green
c3ae2f98d0 * XScale coprocessor support.
2001-04-18  matthew green  <mrg@redhat.com>

	* armcopro.c (write_cp15_reg): Set CHANGEMODE if endianness changes.
	(read_cp15_reg): Make non-static.
	(XScale_cp15_LDC): Update for write_cp15_reg() change.
	(XScale_cp15_MCR): Likewise.
	(XScale_cp15_write_reg): Likewise.
	(XScale_check_memacc): New function. Check for breakpoints being
	activated by memory accesses.  Does not support the Branch Target
	Buffer.
	(XScale_set_fsr_far): New function. Set FSR and FAR for XScale.
	(XScale_debug_moe): New function. Set the debug Method Of Entry,
	if configured.
	(write_cp14_reg): Reset count counter if requested.
	* armdefs.h (struct ARMul_State): New members `LastTime' and
	`CP14R0_CCD' used for the timer/counters.
	(ARMul_CP13_R0_FIQ, ARMul_CP13_R0_IRQ, ARMul_CP13_R8_PMUS,
	ARMul_CP14_R0_ENABLE, ARMul_CP14_R0_CLKRST, ARMul_CP14_R0_CCD,
	ARMul_CP14_R0_INTEN0, ARMul_CP14_R0_INTEN1, ARMul_CP14_R0_INTEN2,
	ARMul_CP14_R0_FLAG0, ARMul_CP14_R0_FLAG1, ARMul_CP14_R0_FLAG2,
	ARMul_CP14_R10_MOE_IB, ARMul_CP14_R10_MOE_DB, ARMul_CP14_R10_MOE_BT,
	ARMul_CP15_R1_ENDIAN, ARMul_CP15_R1_ALIGN, ARMul_CP15_R5_X,
	ARMul_CP15_R5_ST_ALIGN, ARMul_CP15_R5_IMPRE, ARMul_CP15_R5_MMU_EXCPT,
	ARMul_CP15_DBCON_M, ARMul_CP15_DBCON_E1, ARMul_CP15_DBCON_E0): New
	defines for XScale registers.
	(XScale_check_memacc, XScale_set_fsr_far, XScale_debug_moe): Prototype.
	(ARMul_Emulate32, ARMul_Emulate26): Clean up function definition.
	(ARMul_Emulate32): Handle the clock counter and hardware instruction
	breakpoints.  Call XScale_set_fsr_far() for software breakpoints and
	software interrupts.
	(LoadMult): Call XScale_set_fsr_far() for data aborts.
	(LoadSMult): Likewise.
	(StoreMult): Likewise.
	(StoreSMult): Likewise.
	* armemu.h (write_cp15_reg): Update prototype.
	* arminit.c (ARMul_NewState): Initialise CP14R0_CCD and LastTime.
	(ARMul_Abort): If XScale, check for FIQ and IRQ being enabled in CP13
	register 0.
	* armvirt.c (GetWord): Call XScale_check_memacc().
	(PutWord): Likewise.
2001-04-18 16:39:37 +00:00
Nick Clifton
3cf84db9ef Do not enable alignment checking when loading unaligned thumb instructions. 2001-03-20 17:48:02 +00:00
Nick Clifton
4f3c3dbb37 Fix BLX(1) for Thumb 2001-03-06 22:33:47 +00:00
Nick Clifton
917bca4f21 Add support for disabling alignment checks when performing GDB interface
calls or SWI emulaiton routines.  (Alignment checking code has not yet been
contributed).
2001-02-28 01:04:24 +00:00
Nick Clifton
2ef048fc9f Remove Prefetch abort for breakpoints. Instead set the state to RESUME. 2001-02-16 22:04:22 +00:00
Nick Clifton
44e23e575b Add code to preserve processor mode when a prefetch
abort is signalled after processing a breakpoint.
2001-02-15 02:38:15 +00:00
Nick Clifton
5f7d0a33db Reset processor into ARM mode for any machine type except the early ARMs. 2001-02-14 22:21:20 +00:00
Nick Clifton
94ab9d7b9e remove spurious whitespace 2001-02-14 03:55:57 +00:00
Nick Clifton
1e5d4e465c Prevent Aborts from happening whilst emulating a SWI 2001-02-14 03:50:46 +00:00
Nick Clifton
179ae6ea64 Fix definition of NEGBRANCH 2001-02-12 23:29:49 +00:00
Nick Clifton
fae0bf59e6 Add parentheses ready for future conbtribution 2001-02-01 20:56:35 +00:00
Nick Clifton
dda308f5fd Update base address register after restoring register bank. 2001-02-01 20:39:51 +00:00
Nick Clifton
88694af3f9 Detect installation of SWI vector by running program as well as loading program. 2001-02-01 00:14:40 +00:00
Nick Clifton
ac1c9d3aad Fix test for StoreDouble Instruction. 2000-12-19 00:58:04 +00:00
Nick Clifton
9a6b6a66b7 Add 0x91 as an FPE SWI. 2000-12-11 03:08:17 +00:00
Nick Clifton
df38a86eec oops - remove redundant prototype introduced in previous delta 2000-12-08 01:39:48 +00:00
Nick Clifton
760a7bbec5 Add emulation of double word load and store instructions. 2000-12-08 01:38:47 +00:00
Nick Clifton
7f53bc3526 Suppress support of DEMON swi's in XScale mode. 2000-12-03 23:28:46 +00:00
Nick Clifton
f1129fb8ff Add support for ARM's v5TE architecture and Intel's XScale extenstions 2000-11-30 01:55:12 +00:00
Nick Clifton
3943c96b07 Replace StrongARM property with v4 and v5 properties. 2000-09-15 23:55:50 +00:00
Nick Clifton
4bc1de7b2d Compute write back value for post increment loads before
performing the load in case the offset register is overwritten.
2000-08-15 00:10:52 +00:00
Fernando Nasser
0a4321b903 2000-07-14 Fernando Nasser <fnasser@cygnus.com>
* wrapper.c (sim_create_inferior): Fix typo in the previous patch.
2000-07-14 21:27:15 +00:00
Fernando Nasser
64a1067567 2000-07-14 Fernando Nasser <fnasser@cygnus.com>
* wrapper.c (sim_create_inferior): Reset mode to ARM when creating a
        new inferior.
2000-07-14 16:49:46 +00:00
Alexandre Oliva
ae3c7619e1 * armvirt.c (ABORTS): Do not define. 2000-07-04 08:00:19 +00:00
Alexandre Oliva
1e6b544a97 * armdefs.h (struct ARMul_State): Add is_StrongARM.
(ARM_Strong_Prop, STRONGARM): Define.
* arminit.c (ARMul_NewState): Reset is_StrongARM.
(ARMul_SelectProcessor): Set is_StrongARM.
* wrapper.c (sim_create_inferior): Use bfd machine type to
determine processor type to emulate.
* armemu.h (BUSUSEDINCPCS, BUSUSEDINCPCN): Don't increment PC
when emulating StrongARM.
2000-07-04 07:18:18 +00:00
Alexandre Oliva
66210567f0 * armemu.c (ARMul_Emulate, t_undefined): Proceed to next insn. 2000-07-04 06:54:48 +00:00
Alexandre Oliva
e063aa3bd8 * armemu.h (INSN_SIZE): New macro.
(SET_ABORT): Save CPSR in SPSR and set LR.
* armemu.c (ARMul_Emulate, isize): Set to INSN_SIZE.
(WriteR15, WriteSR15): Do not discard bit 1 in Thumb mode.
* arminit.c (ARMul_Abort): Use new SETABORT and INSN_SIZE.
2000-07-04 06:52:30 +00:00
Alexandre Oliva
13b6dd6f68 * armemu.c (LoadSMult): Use WriteR15() to discard the least
significant bits of PC.
2000-07-04 06:39:39 +00:00
Alexandre Oliva
892c6b9d8f * armemu.h (WRITEDESTB): New macro.
* armemu.c (ARMul_Emulate26, bl): Use WriteR15Branch() to
modify PC.  Moved the existing logic...
(WriteR15Branch): ... here.  New function.
(WriteR15, WriteSR15): Drop the two least significant bits.
(LoadSMult): Use WriteR15Branch() to modify PC.
(LoadMult): Use WRITEDESTB() instead of WRITEDEST().
2000-07-04 06:35:36 +00:00
Alexandre Oliva
cf52c765b0 * armemu.h (GETSPSR): Call ARMul_GetSPSR().
* armsupp.c (ARMul_CPSRAltered): Zero out bits as they're
extracted from state->Cpsr, but preserve the unused bits.
(ARMul_GetCPSR): Get bits preserved in state->Cpsr.
(ARMul_GetSPSR, ARMul_FixCPSR): Use ARMul_GetCPSR() to
get the full CPSR word.
2000-07-04 06:19:29 +00:00
Alexandre Oliva
4ef2594f4e * armemu.h (PSR_FBITS, PSR_SBITS, PSR_XBITS, PSR_CBITS): New.
(SETPSR_F, SETPSR_S, SETPSR_X, SETPSR_C): New macros.
(SETPSR, SET_INTMODE, SETCC): Removed.
* armsupp.c (ARMul_FixCPSR, ARMul_FixSPSR): Do not test bit
mask.  Use SETPSR_* to modify PSR.
(ARMul_SetCPSR): Load all bits from value.
* armemu.c (ARMul_Emulate, msr): Do not test bit mask.
2000-07-04 06:06:30 +00:00
Alexandre Oliva
e62263b8ec * armemu.c (ARMul_Emulate): Compute writeback value before
loading, since the offset register may be the destination
register.
2000-07-04 05:30:43 +00:00
Alexandre Oliva
b0eae074ca * armdefs.h (SYSTEMBANK): Define as USERBANK.
* armsupp.c (ARMul_SwitchMode): Remove SYSTEMBANK cases.
2000-07-04 05:16:20 +00:00
Alexandre Oliva
f9c22bc3a4 * armemu.c (Multiply64): Fix computation of flag N. 2000-06-22 20:42:34 +00:00
Alexandre Oliva
ee9a777240 * armemu.c (MultiplyAdd64): Fix computation of flag N. 2000-06-22 20:03:32 +00:00
Alexandre Oliva
fe47e8dfd3 * armemu.h (NEGBRANCH): Do not overwrite the two most significant
bits of the offset.
2000-06-20 09:36:12 +00:00
Nick Clifton
c1a72ffdd6 Add support for v4 SystemMode. 2000-05-30 17:13:37 +00:00
Andrew Cagney
eb2d80b469 Change profiling so that it is enabled by default. Re-generate everything. 2000-05-24 04:39:50 +00:00
Nick Clifton
3463c3fbbb Add special case handling when GDB set CPSR register 2000-05-23 23:52:46 +00:00
Frank Ch. Eigler
5d0d395e94 * arm abort fix
2000-03-11  Philip Blundell  <philb@gnu.org>

	* armemu.c (LoadSMult, LoadMult): Correct handling of aborts.
	Patch from Allan Skillman <Allan.Skillman@arm.com>.
2000-04-10 15:35:56 +00:00
Frank Ch. Eigler
6c9e0292a3 * memory corruption fix
Wed Mar 22 15:24:21 2000  glen mccready  <gkm@pobox.com>

	* wrapper.c (sim_open,sim_close): Copy into myname, free myname.
2000-03-23 23:28:43 +00:00
Frank Ch. Eigler
d018757450 * adding forgotten entry 2000-03-02 21:53:51 +00:00
Nick Clifton
6d358e869b Fix compile time warning messages. 2000-02-08 20:54:27 +00:00
Jason Molenda
dfcd3bfb6f import gdb-2000-02-04 snapshot 2000-02-05 07:30:26 +00:00
Jason Molenda
f743149ecb import gdb-2000-01-26 snapshot 2000-01-26 21:49:14 +00:00
Jason Molenda
c2d11a7da0 import gdb-1999-12-06 snapshot 1999-12-07 03:56:43 +00:00
Jason Molenda
5c44784c11 import gdb-1999-11-01 snapshot 1999-11-02 04:44:47 +00:00
Jason Molenda
2df3850c7b import gdb-1999-10-11 snapshot 1999-10-12 04:37:53 +00:00
Jason Molenda
2acceee218 import gdb-1999-10-04 snapshot 1999-10-05 23:13:56 +00:00
Stan Shebs
d4f3574e77 import gdb-1999-09-08 snapshot 1999-09-09 00:02:17 +00:00
Jason Molenda
43e526b9b4 import gdb-1999-07-12 snapshot 1999-07-12 11:15:22 +00:00
Stan Shebs
cd0fc7c3eb import gdb-1999-05-10 1999-05-11 13:35:55 +00:00
Stan Shebs
7a292a7adf import gdb-19990422 snapshot 1999-04-26 18:34:20 +00:00
Stan Shebs
c906108c21 Initial creation of sourceware repository 1999-04-16 01:35:26 +00:00
Stan Shebs
071ea11e85 Initial creation of sourceware repository 1999-04-16 01:34:07 +00:00
Jeff Law
312de19bdd Fixes. 1998-12-10 23:36:40 +00:00
Nick Clifton
043333a61a define SIM_HAVE_BIENDIAN 1998-09-14 16:58:00 +00:00
Nick Clifton
e3ace30a61 Allow simulator to work with Angel SWIs. 1998-06-02 22:23:52 +00:00
Jason Molenda
7d449b448b Mon Jun 1 17:14:19 1998 Anthony Thompson (athompso@cambridge.arm.com)
* armos.c (ARMul_OSHandleSWI::SWI_Open): Handle special case
        of ":tt" to catch stdin in addition to stdout.
        (ARMul_OSHandleSWI::SWI_Seek): Return 0 or 1 to indicate failure
        or success of lseek().

From PR 15839, modified a bit by me to appease my sense of style--but
not too much because I am lazy.
1998-06-02 00:18:31 +00:00
Geoffrey Noer
9d45df1b8c Tue Apr 28 18:28:58 1998 Geoffrey Noer <noer@cygnus.com>
* common/aclocal.m4: call AM_EXEEXT in SIM_AC_COMMON, define
        AM_CYGWIN32 and AM_EXEEXT.
        * common/Make-common.in: set EXEEXT, add missing EXEEXTs
        to run and install-common rules.
        * common/configure: regenerate

And update all subdirectory ChangeLogs and configure files.
1998-04-29 01:44:23 +00:00
Tom Tromey
5da9ce07eb * configure: Regenerated to track ../common/aclocal.m4 changes.
* config.in: Ditto.
	* acconfig.h: New file.
	* configure.in: Reverted change of Apr 24; use sinclude again.
1998-04-26 22:03:55 +00:00
Tom Tromey
b1df34b9ed * configure: Regenerated to track ../common/aclocal.m4 changes.
* config.in: Ditto.
	* configure.in: Don't call sinclude.
1998-04-24 20:39:48 +00:00
Andrew Cagney
412c4e940e Add config support for the size of the target address and OF cell. 1998-01-31 14:07:23 +00:00
Doug Evans
462cfbc4eb * aclocal.m4: Recognize --enable-maintainer-mode.
*/configure: Regenerated.
1998-01-20 06:37:00 +00:00
Felix Lee
06434f5f16 sanitization fixes. (files not mentioned, fences misspelled) 1997-12-11 04:18:47 +00:00
Doug Evans
6e51f990a2 Regenerate configure files. 1997-12-04 17:26:06 +00:00
Nick Clifton
d3e9ca1a88 Patches to support generating an executing environment.
Patches from Tony Thompson at ARM:  athompso@arm.com
1997-10-30 21:52:16 +00:00
Andrew Cagney
9e03a68f13 Add LMA_P and DO_WRITE arguments to sim/common/sim-load.c:sim_load_file().
Update all simulators.
Clarify behavour of sim_load in remote-sim.h
1997-10-22 05:26:27 +00:00
Andrew Cagney
92f91d1ff0 Remove need to update <targ>/Makefile.in when adding optional options
to <targ>/configure.in.
Simplify logic used to select target [default] endianness.
1997-09-23 01:25:26 +00:00
Andrew Cagney
794e9ac96a Simplify logic behind the generic configuration option --enable-sim-alignment. 1997-09-22 02:49:57 +00:00
Andrew Cagney
b45caf050c Add support for --enable-sim-alignment to simulator common aclocal.m4
Add support for --alignment={strict,nonstrict,forced} to simulator common
run-time options.
For v850 use, make the default NONSTRICT_ALIGNMENT.
1997-09-22 00:24:46 +00:00
David Edelsohn
6fea47635b * configure: Regenerated to track ../common/aclocal.m4 changes. 1997-09-05 00:42:05 +00:00
Andrew Cagney
8811705410 Fix doco on enable-sim-inline. 1997-08-27 22:43:18 +00:00
Andrew Cagney
fafce69ab1 Add ABFD argument to sim_create_inferior. Document.
Add file sim-hload.c - generic load for hardware only simulators.
Review each simulators sim_open, sim_load, sim_create_inferior so that
they more closely match required behavour.
1997-08-27 04:44:41 +00:00
Andrew Cagney
7230ff0faa Flush defunct sim_kill. 1997-08-26 02:05:18 +00:00
Andrew Cagney
247fccdeb5 Add ABFD argument to sim_open call. Pass through to sim_config so
that image properties such as endianness can be checked.

More strongly document the expected behavour of each of the sim_*
interfaces.

Add default endian argument to simulator config macro
SIM_AC_OPTION_ENDIAN.  Use in sim_config.
1997-08-25 23:14:25 +00:00
David Edelsohn
cf8b5fc15e Makefile.orig, README.orig deleted. 1997-05-06 21:21:53 +00:00
Angela Marie Thomas
949fccf66b remove junk files that have been here waaaaaaaay too long 1997-05-02 06:43:07 +00:00
Andrew Cagney
8517f62b16 Ref gdb/11763 - can't stop a running simulator:
o	Provide poll_quit callback to simulators
		so that they can poll for SIGINT on
		clueless OS's.

	o	Add sim_stop to simulators so that clients
		can request a halt (eg gdbtk's STOP button)
		Works for PPC!

	o	Re-arange remote-sim.c so that the
		hard work is moved from gdbsim_resume()
		to gdbsim_wait() (where it should be).
1997-04-18 12:24:52 +00:00
Fred Fish
6e236775b5 * arminit.c (ARMul_NewState): Preinitialize the state to
all zero/NULL.
1997-04-18 01:33:07 +00:00
David Edelsohn
0ab92fe79f * Makefile.in (SIM_OBJS): Add sim-load.o.
* wrapper.c (sim_kind,myname): New static locals.
	(sim_open): Set sim_kind, myname.
	(sim_load): Call sim_load_file to do work.  Set start address from bfd.
	(sim_create_inferior): Return SIM_RC.  Delete start_address arg.
1997-04-17 09:41:11 +00:00
Andrew Cagney
87e43259f1 Cleanups to compile under FreeBSD 1997-04-17 06:05:19 +00:00
Andrew Cagney
08db4a658e Get configure to define RETSIGTYPE 1997-04-07 05:58:59 +00:00