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If a v5 architecture is detected, assume it might be an XScale binary, since

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there is no way to distinguish between    the two in the COFF file format.
This commit is contained in:
Nick Clifton 2002-02-04 16:27:22 +00:00
parent fdf4122d8d
commit 25180f8aef
2 changed files with 15 additions and 0 deletions
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6
sim/arm/ChangeLog
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@ -1,3 +1,9 @@
2002-02-04 Nick Clifton <nickc@cambridge.redhat.com>
* wrapper.c: If a v5 architecture is detected, assume it might be
an XScale binary, since there is no way to distinguish between
the two in the COFF file format.
2002-01-10 Nick Clifton <nickc@cambridge.redhat.com>
* arminit.c (ARMul_Abort): Fix parameters passed to CPRead[13].

9
sim/arm/wrapper.c
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@ -234,6 +234,15 @@ sim_create_inferior (sd, abfd, argv, env)
break;
case bfd_mach_arm_5:
/* This is a special case in order to support COFF based ARM toolchains.
The COFF header does not have enough room to store all the different
kinds of ARM cpu, so the XScale, v5T and v5TE architectures all default
to v5. (See coff_set_flags() in bdf/coffcode.h). So if we see a v5
machine type here, we assume it could be any of the above architectures
and so select the most feature-full. */
ARMul_SelectProcessor (state, ARM_v5_Prop | ARM_v5e_Prop | ARM_XScale_Prop);
break;
case bfd_mach_arm_5T:
ARMul_SelectProcessor (state, ARM_v5_Prop);
break;