* gdb/target.c (target_flash_erase): Do not return void value.
(target_flash_done): Likewise.
* gdb/cli/cli-cmds.c (source_command): Likewise.
Reported by timeless@gmail.com:
* wrapper.c (sim_target_parse_arg_array): Do not return void value.
sim_resume. Expect target signal numbers from sim_stop_reason.
* wrapper.c (gdb/signals.h): Include it.
(SIGTRAP): Don't define.
(SIGBUS): Likewise.
(sim_stop_reason): Use TARGET_SIGNAL_* instead of SIG*.
* sim-reason.c (sim_stop_reason): Use
sim_signal_to_target, not sim_signal_to_host.
* sim-signal.c (sim_signal_to_host): Fix typo.
(sim_signal_to_target): New function.
* interp.c (gdb/signals.h): Include it.
(sim_stop_reason): Use TARGET_SIGNAL_*.
* interf.c: (gdb/signals.h): Include it.
(sim_stop_reason): Use TARGET_SIGNAL_*.
* sim_calls.c (gdb/signals.h): Include it.
(sim_stop_reason): Use TARGET_SIGNAL_*.
* psim.c (cntrl_c_simulation): Use TARGET_SIGNAL_*.
* sim/arm/armos.c: Include limits.h
(unlink): Remove this macro. It is unused in this file and
conflicts with sim_callback->unlink.
(PATH_MAX): Define as 1024 if not already defined.
(ReadFileName): New function.
(SWIopen): Fix a potential buffer overflow.
(SWIremove): New function.
(SWIrename): Ditto.
(ARMul_OSHandleSWI): Handle the RDP calls SWI_IsTTY,
SWI_Remove, and SWI_Rename, as well as the RDI calls
AngelSWI_Reason_IsTTY, AngelSWI_Reason_Remove, and
AngelSWI_Reason_Rename.
* armdefs.h: Define ARMsword and ARMsdword. Use stdint.h when
available.
* armemu.c: Use them.
* armvirt.c (ARMul_MemoryInit): Use correct type for size.
* configure.ac: Check for stdint.h.
* config.in: Regenerate.
* configure: Regenerate.
(ARMulEmulate32): Call handle_v6_insn when a possible v6 insn is found.
* armdefs.h (struct ARMul_State): Add new field: is_v6.#
(ARM_v6_Prop): Define.
* arminit.c (ARMul_NewState): Initialise the v6 flag.
(ARMul_SelectProcessor): Determine if the v6 flag should be set.
* wrapper.c (sim_create_inferior): For unknown architectures, default to allowing the v6 instructions.
2005-01-12 Andrew Cagney <cagney@gnu.org>
* configure.ac: Update to use ../common/common.m4.
* configure: Re-generate.
Index: mn10300/ChangeLog
2005-01-12 Andrew Cagney <cagney@gnu.org>
* configure.ac: Update to use ../common/common.m4.
* configure: Re-generate.
Index: d10v/ChangeLog
2005-01-12 Andrew Cagney <cagney@gnu.org>
* configure.ac: Update to use ../common/common.m4.
* configure: Re-generate.
Index: erc32/ChangeLog
2005-01-12 Andrew Cagney <cagney@gnu.org>
* configure.ac: Update to use ../common/common.m4.
* configure: Re-generate.
Index: frv/ChangeLog
2005-01-12 Andrew Cagney <cagney@gnu.org>
* configure.ac: Update to use ../common/common.m4.
* configure: Re-generate.
Index: h8300/ChangeLog
2005-01-12 Andrew Cagney <cagney@gnu.org>
* configure.ac: Update to use ../common/common.m4.
* configure: Re-generate.
Index: m32r/ChangeLog
2005-01-12 Andrew Cagney <cagney@gnu.org>
* configure.ac: Update to use ../common/common.m4.
* configure: Re-generate.
Index: mcore/ChangeLog
2005-01-12 Andrew Cagney <cagney@gnu.org>
* configure.ac: Update to use ../common/common.m4.
* configure: Re-generate.
Index: mips/ChangeLog
2005-01-12 Andrew Cagney <cagney@gnu.org>
* configure.ac: Update to use ../common/common.m4.
* configure: Re-generate.
Index: v850/ChangeLog
2005-01-12 Andrew Cagney <cagney@gnu.org>
* configure.ac: Update to use ../common/common.m4.
* configure: Re-generate.
Index: common/ChangeLog
2005-01-12 Andrew Cagney <cagney@gnu.org>
* common.m4: New file, based on of aclocal.m4.
Index: arm/ChangeLog
2005-01-12 Andrew Cagney <cagney@gnu.org>
* configure.ac: Update to use ../common/common.m4.
* configure: Re-generate.
(O_RDONLY): Do not define.
(O_WRONLY): Likewise.
(O_RDWR): Likewise.
(targ-vals.h): Include it.
(translate_open_mode): Use TARGET_O_* instead of O_*.
(SWIopen): Likewise.
* Makefile.in (armos.o): Depend on targ-vals.h.
2001-04-18 matthew green <mrg@redhat.com>
* armcopro.c (write_cp15_reg): Set CHANGEMODE if endianness changes.
(read_cp15_reg): Make non-static.
(XScale_cp15_LDC): Update for write_cp15_reg() change.
(XScale_cp15_MCR): Likewise.
(XScale_cp15_write_reg): Likewise.
(XScale_check_memacc): New function. Check for breakpoints being
activated by memory accesses. Does not support the Branch Target
Buffer.
(XScale_set_fsr_far): New function. Set FSR and FAR for XScale.
(XScale_debug_moe): New function. Set the debug Method Of Entry,
if configured.
(write_cp14_reg): Reset count counter if requested.
* armdefs.h (struct ARMul_State): New members `LastTime' and
`CP14R0_CCD' used for the timer/counters.
(ARMul_CP13_R0_FIQ, ARMul_CP13_R0_IRQ, ARMul_CP13_R8_PMUS,
ARMul_CP14_R0_ENABLE, ARMul_CP14_R0_CLKRST, ARMul_CP14_R0_CCD,
ARMul_CP14_R0_INTEN0, ARMul_CP14_R0_INTEN1, ARMul_CP14_R0_INTEN2,
ARMul_CP14_R0_FLAG0, ARMul_CP14_R0_FLAG1, ARMul_CP14_R0_FLAG2,
ARMul_CP14_R10_MOE_IB, ARMul_CP14_R10_MOE_DB, ARMul_CP14_R10_MOE_BT,
ARMul_CP15_R1_ENDIAN, ARMul_CP15_R1_ALIGN, ARMul_CP15_R5_X,
ARMul_CP15_R5_ST_ALIGN, ARMul_CP15_R5_IMPRE, ARMul_CP15_R5_MMU_EXCPT,
ARMul_CP15_DBCON_M, ARMul_CP15_DBCON_E1, ARMul_CP15_DBCON_E0): New
defines for XScale registers.
(XScale_check_memacc, XScale_set_fsr_far, XScale_debug_moe): Prototype.
(ARMul_Emulate32, ARMul_Emulate26): Clean up function definition.
(ARMul_Emulate32): Handle the clock counter and hardware instruction
breakpoints. Call XScale_set_fsr_far() for software breakpoints and
software interrupts.
(LoadMult): Call XScale_set_fsr_far() for data aborts.
(LoadSMult): Likewise.
(StoreMult): Likewise.
(StoreSMult): Likewise.
* armemu.h (write_cp15_reg): Update prototype.
* arminit.c (ARMul_NewState): Initialise CP14R0_CCD and LastTime.
(ARMul_Abort): If XScale, check for FIQ and IRQ being enabled in CP13
register 0.
* armvirt.c (GetWord): Call XScale_check_memacc().
(PutWord): Likewise.
(ARM_Strong_Prop, STRONGARM): Define.
* arminit.c (ARMul_NewState): Reset is_StrongARM.
(ARMul_SelectProcessor): Set is_StrongARM.
* wrapper.c (sim_create_inferior): Use bfd machine type to
determine processor type to emulate.
* armemu.h (BUSUSEDINCPCS, BUSUSEDINCPCN): Don't increment PC
when emulating StrongARM.
(SET_ABORT): Save CPSR in SPSR and set LR.
* armemu.c (ARMul_Emulate, isize): Set to INSN_SIZE.
(WriteR15, WriteSR15): Do not discard bit 1 in Thumb mode.
* arminit.c (ARMul_Abort): Use new SETABORT and INSN_SIZE.
* armemu.c (ARMul_Emulate26, bl): Use WriteR15Branch() to
modify PC. Moved the existing logic...
(WriteR15Branch): ... here. New function.
(WriteR15, WriteSR15): Drop the two least significant bits.
(LoadSMult): Use WriteR15Branch() to modify PC.
(LoadMult): Use WRITEDESTB() instead of WRITEDEST().
* armsupp.c (ARMul_CPSRAltered): Zero out bits as they're
extracted from state->Cpsr, but preserve the unused bits.
(ARMul_GetCPSR): Get bits preserved in state->Cpsr.
(ARMul_GetSPSR, ARMul_FixCPSR): Use ARMul_GetCPSR() to
get the full CPSR word.
(SETPSR_F, SETPSR_S, SETPSR_X, SETPSR_C): New macros.
(SETPSR, SET_INTMODE, SETCC): Removed.
* armsupp.c (ARMul_FixCPSR, ARMul_FixSPSR): Do not test bit
mask. Use SETPSR_* to modify PSR.
(ARMul_SetCPSR): Load all bits from value.
* armemu.c (ARMul_Emulate, msr): Do not test bit mask.
2000-03-11 Philip Blundell <philb@gnu.org>
* armemu.c (LoadSMult, LoadMult): Correct handling of aborts.
Patch from Allan Skillman <Allan.Skillman@arm.com>.
* armos.c (ARMul_OSHandleSWI::SWI_Open): Handle special case
of ":tt" to catch stdin in addition to stdout.
(ARMul_OSHandleSWI::SWI_Seek): Return 0 or 1 to indicate failure
or success of lseek().
From PR 15839, modified a bit by me to appease my sense of style--but
not too much because I am lazy.
* common/aclocal.m4: call AM_EXEEXT in SIM_AC_COMMON, define
AM_CYGWIN32 and AM_EXEEXT.
* common/Make-common.in: set EXEEXT, add missing EXEEXTs
to run and install-common rules.
* common/configure: regenerate
And update all subdirectory ChangeLogs and configure files.
Add file sim-hload.c - generic load for hardware only simulators.
Review each simulators sim_open, sim_load, sim_create_inferior so that
they more closely match required behavour.
that image properties such as endianness can be checked.
More strongly document the expected behavour of each of the sim_*
interfaces.
Add default endian argument to simulator config macro
SIM_AC_OPTION_ENDIAN. Use in sim_config.
o Provide poll_quit callback to simulators
so that they can poll for SIGINT on
clueless OS's.
o Add sim_stop to simulators so that clients
can request a halt (eg gdbtk's STOP button)
Works for PPC!
o Re-arange remote-sim.c so that the
hard work is moved from gdbsim_resume()
to gdbsim_wait() (where it should be).
* wrapper.c (sim_kind,myname): New static locals.
(sim_open): Set sim_kind, myname.
(sim_load): Call sim_load_file to do work. Set start address from bfd.
(sim_create_inferior): Return SIM_RC. Delete start_address arg.
* Make-common.in (CSEARCH): Do not include the gdb directory in
the search path.
* Make-common.in (SIM_ENDIAN, SIM_HOSTENDIAN, SIM_INLINE,
SIM_WARNING): Drop, requiring the simulator specific Makefile.in
to explicitly incorporate these.
* aclocal.m4 (--enable-sim-alignment); New option. Strongly
specify the alignment restrictions of the target architecture -
without this option all alignment restrictions are accomodated.
(--enable-sim-assert): New option. Conditionally compile in
assertion statements.
(--enable-sim-float): New option. Strongly specify the target's
floating point support.
(--enable-sim-hardware): New option. Specify the hardware devices
included in the simulation.
(--enable-sim-packages): New option. Specify the hardware
packages included in the simulation.
(--enable-sim-regparm): New option. Specify that parameters be
passed in registers instead of on the stack.
(--enable-sim-reserved-bits): New option. Specify that reserved
bits within an instruction are are correctly set.
(--enable-sim-smp): New option. Specify the level of SMP support
to be included in the simulator.
(--enable-sim-stdcall): New option. Specify an alternative
function call convention.
(--enable-sim-xor-endian): New option. Configure xor-endian
support used by some targets to implement bi-endian support.
