Commit graph

3777 commits

Author SHA1 Message Date
Mike Frysinger
31557eccb2 sim: microblaze: switch to common sim_resume/sim_stop_reason
This allows us to use the common code for all exception handling.
2015-06-11 07:13:22 -04:00
Joel Brobecker
bb9e16d4bb Fix latest sim/common/ChangeLog entry. 2015-06-09 14:29:09 -04:00
Joel Brobecker
f419f52b9b Remove unnecessary empty line in sim/common/ChangeLog 2015-06-09 14:27:58 -04:00
Mike Stump
509c2f329a Fix spelling mistakes in sim/common/sim-events.c error messages.
sim/common/ChangeLog:

        * sim-events.c (sim_events_schedule_after_signal): Fix spelling
        mistake in call to sim_engine_abort.
        (sim_events_schedule_after_signal): Likewise.
2015-06-09 14:27:46 -04:00
Mike Frysinger
296730a52b sim: erc32: restore attribution 2015-05-17 17:15:36 +08:00
Joel Brobecker
17d88f73c0 Switch erc32 simulator copyright headers to FSF.
Permission was granted by Jiri Gaisler, who has a copyright assignment
on file for GDB.

sim/erc32/ChangeLog:

        * configure.ac: Add copyright header.
        * erc32.c: Change copyright holder to FSF.  Reformat.
        * exec.c, float.c, func.c, interf.c, sis.c, sis.h: Likewise.
        * help.c, startsim: Add copyright header.
2015-05-08 07:23:15 -07:00
DJ Delorie
0952813b0b Make RL78 disassembler and simulator respect ISA for mul/div
[gas]
	* config/rl78-defs.h (rl78_isa_g10): New.
	(rl78_isa_g13): New.
	(rl78_isa_g14): New.
	* config/rl78-parse.y (ISA_G10): New.
	(ISA_G13): New.
	(ISA_G14): New.
	(MULHU, MULH, MULU, DIVHU, DIVWU, MACHU, MACH): Use them.
	* config/tc-rl78.c (rl78_isa_g10): New.
	(rl78_isa_g13): New.
	(rl78_isa_g14): New.

[gdb]
	* rl78-tdep.c (rl78_analyze_prologue): Pass RL78_ISA_DEFAULT to
	rl78_decode_opcode

[include]
	* dis-asm.h (print_insn_rl78_g10): New.
	(print_insn_rl78_g13): New.
	(print_insn_rl78_g14): New.
	(rl78_get_disassembler): New.
	* opcode/rl78.h (RL78_Dis_Isa): New.
	(rl78_decode_opcode): Add ISA parameter.

[opcodes]
	* disassemble.c (disassembler): Choose suitable disassembler based
	on E_ABI.
	* rl78-decode.opc (rl78_decode_opcode): Take ISA parameter.  Use
	it to decode mul/div insns.
	* rl78-decode.c: Regenerate.
	* rl78-dis.c (print_insn_rl78): Rename to...
	(print_insn_rl78_common): ...this, take ISA parameter.
	(print_insn_rl78): New.
	(print_insn_rl78_g10): New.
	(print_insn_rl78_g13): New.
	(print_insn_rl78_g14): New.
	(rl78_get_disassembler): New.

[sim]
	* rl78/cpu.c (g14_multiply): New.
	* rl78/cpu.h (g14_multiply): New.
	* rl78/load.c (rl78_load): Decode ISA completely.
	* rl78/main.c (main): Expand -M to include other ISAs.
	* rl78/rl78.c (decode_opcode): Decode based on ISA.
	* rl78/trace.c (rl78_disasm_fn): New.
	(sim_disasm_init): Reset it.
	(sim_disasm_one): Get correct disassembler for ISA.
2015-04-30 15:25:49 -04:00
Nick Clifton
0a13382c8e Fix problems in the sim sources discovered by running the cppcheck static analysis tool.
erc32	PR 18273
	* sis.c (main): Remove unreachable code.

m68hc11	* gencode.c (gen_fetch_operands): Remove unreachable code.

ppc	* hw_htab.c (htab_map_binary): Fix overlap check.

common	* sim-fpu.c (INLINE_SIM_FPU): Fix static analysis warning by
	increasing parenthesis around casts to signed values.
2015-04-29 16:02:02 +01:00
Senthil Kumar Selvaraj
180d40b903 sim: avr: Fix 'multiple definition of sim_{read,write}'
This patch does whatever was done in
https://sourceware.org/ml/gdb-patches/2015-04/msg00437.html to fix
broken gdb build for the AVR target.
2015-04-27 09:54:37 -04:00
Nick Clifton
de7669bfa5 Fix typos in sim sources exposed by static analysis.
bfin	PR 18273
	* bfin-sim.c (decode_dsp32alu_0): Remove spurious check for
	s == 1.

erc32	PR 18273
	* exec.c (add32): Fix typo in check for overflow.

igen	PR 18273
	* misc.c (a2i): Fix typos checking for uppercase letters.
2015-04-24 15:43:21 +01:00
Nick Clifton
63c72d1ae4 Fix typo in check for valid register number in RX sim.
PR sim/18273
	* reg.c (put_reg): Fix check for valid register number.
2015-04-24 15:31:36 +01:00
Mike Frysinger
43236bb255 sim: mcore: clean up printf warnings
These printf statements are showing "word" objects which are typedefed
from long, so make sure to use l with %x when printing them to avoid
warnings from gcc.
2015-04-21 03:10:16 -04:00
Mike Frysinger
f63036b811 sim: mcore: convert to common memory/verbose functions
Re-use the existing memory core that handles reads/writes.

The verbose command is converted to the common --verbose flag
since only a few call sites use it now.
2015-04-21 03:10:16 -04:00
Mike Frysinger
e53e5aab53 sim: mcore: drop watchpoint/dumpmem/clearstats support
In preparation for converting to the common memory framework, the custom
commands get in our way.  But when we realize that gdb support has been
dropped for mcore, it makes things a bit easier: the main runner does not
let you run arbitrary commands once simulation starts.

So lets disable watchpoint support until it can be converted to the common
watchpoint logic.  There's already an ifdef to let us do that.

We straight up drop support for the dumpmem command (no other sim supports
this, and if it's a feature people want, we can add a common func) and the
clearstats command (not a big deal -- just restart your simulation).

We leave in place the verbose check points as a follow up commit will cut
that over to common logic.
2015-04-21 03:10:16 -04:00
Mike Frysinger
767e68f1b9 sim: mcore: switch to common syscall handling
Now that libgloss has a header tracking the syscalls for this arch, we
can update the database to include it for the symbolic constants/maps.
Then we can switch the mcore syscall callbacks over to the common ones.
2015-04-21 03:10:16 -04:00
Mike Frysinger
248d23e82b sim: gennltvals.sh: handle split out newlib source tree
Since newlib no longer shares the same repo as binutils/gdb, we have to go
searching further afield to locate the sources.  We still look at the top
level for newlib, but if that is not found, we also try up one dir outside
of this source tree.  It sucks, but better than the status quo (no workie).
2015-04-21 03:10:16 -04:00
Jiri Gaisler
d3e9b40afb sim/erc32: Switched emulated memory to host endian order.
Change data ordering in emulated memory from target order (big endian)
to host order. Improves performance and simplifies most memory
operations. Requires some byte twisting during stores on little
endian hosts (intel). Also removed support for little-endian binaries.
2015-04-19 02:29:44 -04:00
Mike Frysinger
3ebe2863f7 sim: clean up duplicate sim-engine hooks
Now that we've unified sim-cpu, we can delete the duplicate sim-engine
hooks -- these targets defined these only because they didn't fully
implement the sim-cpu callbacks.
2015-04-18 04:40:27 -04:00
Mike Frysinger
e8d3a34fee sim: trim old USING_SIM_BASE_H define
This doesn't appear to have been used since 1998, but wasn't cleaned
up since.  So much for being "quick" ;).
2015-04-18 04:32:56 -04:00
Mike Frysinger
20bca71d82 sim: unify SIM_CPU definition
Since every target typedefs this the same way, move it to the common code.

We have to leave Blackfin behind here for now because of inter-dependencies
on types and headers: sim-base.h includes sim-model.h which needs types in
machs.h which needs types in bfim-sim.h which needs SIM_CPU.
2015-04-18 04:31:36 -04:00
Mike Frysinger
7e83aa92f2 sim: unify sim_cia definition
Almost every target defines sim_cia the same way -- either using the
address_word type directly, or a type of equivalent size.  The only
odd one out is sh64 (who has 32bit address_word and 64bit cia), and
even that case doesn't seem to make sense.  We'll put off clean up
though of sh64 and at least set up a sensible default for everyone.
2015-04-18 04:14:38 -04:00
Mike Frysinger
c85fc61074 sim: microblaze: switch to common memory functions
Re-use the existing memory core that handles reads/writes.

This drops support for the dumpmem command, but gdb itself has
support for dumping memory regions.

The verbose command is converted to the common --verbose flag
since only two call sites use it now.

Support for the clearstats command is dropped entirely, but no
other sim really does this, and the same thing can be done by
reloading.  If it's important (clearing cycle stats) to someone,
we can add a common function for it.
2015-04-17 03:15:43 -04:00
Mike Frysinger
034685f9ce sim: replace CIA_{GET,SET} with CPU_PC_{GET,SET}
The CIA_{GET,SET} macros serve the same function as CPU_PC_{GET,SET}
except the latter adds a layer of indirection via the sim state.  This
lets models set up different functions at runtime and doesn't reach so
directly into the arch-specific cpu state.

It also doesn't make sense to have two sets of macros that do exactly
the same thing, so lets standardize on the one that gets us more.
2015-04-17 02:44:30 -04:00
Mike Frysinger
27b97b40bc sim: arm/cr16/d10v/h8300/microblaze/sh: fill out sim-cpu pc fetch/store helpers
This makes the common sim-cpu logic work.
2015-04-17 02:22:16 -04:00
Mike Frysinger
4c0cab1e21 sim: avr/mcore/moxie: fill out sim-cpu pc fetch/store helpers
This makes the common sim-cpu logic work.
2015-04-16 02:13:50 -04:00
Mike Frysinger
78e9aa70fe sim: unify sim-cpu usage
Now that all the targets are utilizing CPU_PC_{FETCH,STORE}, and the
cpu state is multicore, and the STATE_CPU defines match, we can move
it all to the common code.
2015-04-15 02:19:52 -04:00
Mike Frysinger
f95f4ed2c4 sim: cris/frv/h8300/iq2000/lm32/m32r/sh64: standardize cpu state
This sets up the sim_state structure and the cpu member to match what we
do in most other sims, and what the common code suggests.  This is a step
to unifying on the sim-cpu.o object.
2015-04-15 01:25:32 -04:00
Mike Frysinger
887bddbcad sim: ppc: fix up version script
The common sim code has switched to using gdb directly; update the
ppc copy too.
2015-04-13 23:17:53 -04:00
Mike Frysinger
bf12d44ee0 sim: fix the PKGVERSION define
This should be SIM, not GDB.
2015-04-13 02:41:10 -04:00
Mike Frysinger
a542beff94 sim: options: add --version support
The old run frontend had a --version option, but the new common
sim-options file does not.  Restore support for that so we can
get version info out of `run` when using the new frontend.
2015-04-13 02:35:26 -04:00
Mike Frysinger
8c32ba2233 sim: switch to gdb version script
Since the local create-version.sh already points directly into the gdb
source tree, we might as well use the gdb script directly too.
2015-04-13 02:32:58 -04:00
Mike Frysinger
64f14c9707 sim: mn10300: convert to sim-cpu
Make cpu allocation fully dynamic so we can leverage the common
sim-cpu and its APIs.
2015-04-13 02:13:48 -04:00
Mike Frysinger
14c9ad2edb sim: v850: convert to sim-cpu
Make cpu allocation fully dynamic so we can leverage the common
sim-cpu and its APIs.
2015-04-13 02:11:50 -04:00
Mike Frysinger
7bebb329bb sim: mips: convert to sim-cpu
Make cpu allocation fully dynamic so we can leverage the common
sim-cpu and its APIs.
2015-04-13 02:09:55 -04:00
Mike Frysinger
bea3f671c5 sim: m68hc11: convert to sim-cpu
Make cpu allocation fully dynamic so we can leverage the common
sim-cpu and its APIs.
2015-04-13 02:07:23 -04:00
Mike Frysinger
8ac57fbde4 sim: mips: fix prototype warnings
Convert a bunch of old style prototypes and tweak various casts
to match the function signatures.
2015-04-13 02:01:11 -04:00
Mike Frysinger
65f9096890 sim: ft32: fix ft32_pc_get logic 2015-04-13 01:54:33 -04:00
Hans-Peter Nilsson
a9d9677441 Do unset_currtarget_info ldscript for all simulator testsuites.
sim/testsuite:
	* sim-defs.exp (sim_init): Unset target ldscript here.

sim/testsuite/sim/mips:
	* basic.exp: Don't unset target ldscript here.
2015-04-13 01:56:04 +02:00
Mike Frysinger
e787f858a4 sim: arm/mips: fix sim_read/sim_write linkage errors
With sim-hrw.o being built & linked in the common list, some people are
getting linking errors now for these targets.  Move the main objects that
provide these functions before the common list to avoid that.
2015-04-12 05:47:39 -04:00
Mike Frysinger
29f1a5934a sim: ft32: delete sim_read/sim_write funcs
The common sim-hrw.o provides both of these, so simply use them.
2015-04-12 05:13:23 -04:00
Mike Frysinger
122bbfb52a sim: move sim-engine.o/sim-hrw.o to the common list
This makes these two objects available to all sims by default.
2015-04-06 23:56:47 -04:00
Mike Frysinger
20cc975360 sim: moxie: fix running after nrun conversion
The nrun conversion was slightly incorrect in how it stopped when an
exception occurred.  We still set cpu.asregs.exception, but nothing
was checking it anymore.  Convert all of that to sim_engine_halt.

To keep things from regressing again, add a basic testsuite too.
2015-04-05 04:37:44 -04:00
Mike Frysinger
024305f7f2 sim: mn10300: add a basic testsuite 2015-04-05 03:52:08 -04:00
Mike Frysinger
aad84fa6ae sim: m68hc11: add a basic testsuite 2015-04-05 03:17:44 -04:00
Mike Frysinger
eed64ce675 sim: iq2000: add a basic testsuite 2015-04-05 02:28:44 -04:00
Mike Frysinger
e56dbbb92f sim: lm32: add a basic testsuite 2015-04-05 01:58:00 -04:00
Mike Frysinger
b366059a5b sim: d10v: fix signal updates
Way back in aba6488e0b, a bunch of signal
defines were changed to TARGET_SIGNAL_xxx.  For d10v, the transition was
incomplete which lead to sim_stop_reason using the new set but sim_resume
still using the old set.  Which meant in some cases, the sim would never
actually stop.

Convert all the remaining SIGxxx defines in here to TARGET_SIGNAL_xxx.
This has the nice side effect of fixing the testsuite.
2015-04-02 20:40:11 -04:00
H.J. Lu
7fed4b0be6 Regenerate configure in sim
* arm/configure: Regenerated.
	* avr/configure: Likewise.
	* bfin/configure: Likewise.
	* common/configure: Likewise.
	* cr16/configure: Likewise.
	* cris/configure: Likewise.
	* d10v/configure: Likewise.
	* erc32/configure: Likewise.
	* frv/configure: Likewise.
	* ft32/configure: Likewise.
	* h8300/configure: Likewise.
	* igen/configure: Likewise.
	* iq2000/configure: Likewise.
	* lm32/configure: Likewise.
	* m32c/configure: Likewise.
	* m32r/configure: Likewise.
	* m68hc11/configure: Likewise.
	* mcore/configure: Likewise.
	* microblaze/configure: Likewise.
	* mips/configure: Likewise.
	* mn10300/configure: Likewise.
	* moxie/configure: Likewise.
	* msp430/configure: Likewise.
	* ppc/configure: Likewise.
	* rl78/configure: Likewise.
	* rx/configure: Likewise.
	* sh/configure: Likewise.
	* sh64/configure: Likewise.
	* v850/configure: Likewise.
2015-04-02 05:43:07 -07:00
Mike Frysinger
1a8faa2aa6 sim: clean up SIM_EXTRA_OBJS references
This variable was deleted in previous commits and is not used anymore.
Prune any stray references to it.
2015-04-02 00:51:40 -04:00
H.J. Lu
79730a3b26 Fix sim build
* common/Make-common.in (CSEARCH): Remove $(ZLIBINC).
	(BFD_LIB): Remove $(ZLIB).
	(CONFIG_LIBS): Add $(ZLIB).
	* ppc/Makefile.in (ZLIBINC): Removed.
	(INCLUDES): Remove $(ZLIBINC).
	(BFD_LIB): Remove $(ZLIB).
2015-04-01 10:27:43 -07:00
H.J. Lu
0ceaf1ec96 Regenerate configure in sim
* arm/configure: Regenerated.
	* avr/configure: Likewise.
	* bfin/configure: Likewise.
	* common/configure: Likewise.
	* cr16/configure: Likewise.
	* cris/configure: Likewise.
	* d10v/configure: Likewise.
	* erc32/configure: Likewise.
	* frv/configure: Likewise.
	* ft32/configure: Likewise.
	* h8300/configure: Likewise.
	* igen/configure: Likewise.
	* iq2000/configure: Likewise.
	* lm32/configure: Likewise.
	* m32c/configure: Likewise.
	* m32r/configure: Likewise.
	* m68hc11/configure: Likewise.
	* mcore/configure: Likewise.
	* microblaze/configure: Likewise.
	* mips/configure: Likewise.
	* mn10300/configure: Likewise.
	* moxie/configure: Likewise.
	* msp430/configure: Likewise.
	* ppc/configure: Likewise.
	* rl78/configure: Likewise.
	* rx/configure: Likewise.
	* sh/configure: Likewise.
	* sh64/configure: Likewise.
	* v850/configure: Likewise.
2015-04-01 10:15:13 -07:00
Mike Frysinger
269e9c185f sim: m32c: enable warnings & clean up a bunch
This doesn't clean up all the warnings, just most of them.
The ones that are left will require some care to unravel.
2015-04-01 02:22:58 -04:00
Mike Frysinger
0fe84f3fbe sim: run: punt!
Now that all targets have been converted to nrun, we can finally punt
this old inconsistent interface.

A few stray references to the old run were sprinkled about; clean them
up in the process.

We leave behind the run(1) man page mostly so that we get it updated for
the new nrun interface.
2015-04-01 01:22:44 -04:00
Mike Frysinger
aadc9410ba sim: update zlib handling
With zlib being mandatory, and the updated m4 configs, we need to regen
and use the new settings w/bfd to avoid linkage errors.
2015-04-01 01:07:57 -04:00
Mike Frysinger
b38f7f340b sim: cr16/d10v: restore generated headers dep
While cleaning up stale make rules, one too many were deleted.  The
build system autogenerates static rules, but not generated files.
2015-03-31 01:59:44 -04:00
Mike Frysinger
5a394431de common: cgen-mem/cgen-ops: fix extern inline handling
With newer versions of gcc (5.x), the extern inline we're using with the
cgen-{mem,ops} modules no longer work.  Since this code really wants the
gnu inline semantics, use that attribute explicitly.
2015-03-31 01:58:01 -04:00
Mike Frysinger
2b6ca06237 sim: m68hc11: fix gcc-5 build error w/restrict keyword 2015-03-31 01:54:47 -04:00
Mike Frysinger
49d62f8925 sim: arm: convert to nrun
A lot of cpu state is stored in global variables, as is memory handling.
The sim_size support needs unwinding at some point.  But at least this
is an improvement on the status quo.
2015-03-30 12:58:24 -04:00
Mike Frysinger
dbf8e8afcd sim: arm: delete NEED_UI_LOOP_HOOK handling 2015-03-30 12:58:23 -04:00
Mike Frysinger
58b991b14e sim: arm: clean up misc warnings
Also delete a few unused funcs.
2015-03-30 12:58:23 -04:00
Mike Frysinger
c4c9c44f57 sim: arm: use common configure options
In preparation for converting to nrun, call the common functions that
are needed.  This doesn't produce any new warnings, and the generated
code should be the same.
2015-03-30 12:58:23 -04:00
Mike Frysinger
457983e3a3 sim: arm: move COPRO settings to the makefile
These values are the same all the time, so just list them directly in
the Makefile.
2015-03-30 03:06:34 -04:00
Mike Frysinger
99956be1d7 sim: d10v: add missing sim-main.h 2015-03-30 03:06:33 -04:00
Mike Frysinger
541ebcee67 sim: d10v: convert to nrun
A lot of cpu state is stored in global variables, as is memory handling.
The sim_size support needs unwinding at some point.  But at least this
is an improvement on the status quo.
2015-03-30 02:20:23 -04:00
Mike Frysinger
a87686e5aa sim: d10v: delete NEED_UI_LOOP_HOOK handling
This hook is used only when linked into gdb, and d10v doesn't have a gdb
port anymore.  Punt it.
2015-03-30 02:20:23 -04:00
Mike Frysinger
11558abc20 sim: d10v: clean up misc warnings 2015-03-30 02:20:23 -04:00
Mike Frysinger
ef9535c6bc sim: d10v: use common configure options
In preparation for converting to nrun, call the common functions that
are needed.  This doesn't produce any new warnings, and the generated
code should be the same.
2015-03-30 02:20:23 -04:00
Mike Frysinger
e8713c0f02 sim: d10v: link in missing testsuite
Looks like historical restructuring in this dir lost the d10v-elf subdir
and no one noticed in the meantime.  Re-add it to the testsuite.

There are some failures, but better some tests get run than none at all.
2015-03-30 01:06:57 -04:00
Mike Frysinger
247ac9ee6e sim: cr16: convert to nrun
A lot of cpu state is stored in global variables, as is memory handling.
The sim_size support needs unwinding at some point.  But at least this
is an improvement on the status quo.
2015-03-30 00:13:38 -04:00
Mike Frysinger
4b0cc5edf4 sim: cr16: delete NEED_UI_LOOP_HOOK handling
This hook is used only when linked into gdb, and cr16 doesn't have a gdb
port anymore.  Punt it.
2015-03-30 00:10:27 -04:00
Mike Frysinger
1e504675bd sim: cr16: delete dead code
This code is getting in the way of porting to nrun, so just drop it.
If anyone actually cares about this cpu, they can revive it.
2015-03-30 00:08:46 -04:00
Mike Frysinger
5aedb83b9c sim: cr16: clean up misc warnings 2015-03-29 22:41:14 -04:00
Mike Frysinger
ca968da465 sim: cr16: use common configure options
In preparation for converting to nrun, call the common functions that
are needed.  This doesn't produce any new warnings, and the generated
code should be the same.
2015-03-29 22:42:33 -04:00
Mike Frysinger
4daf7a7c3a sim: cr16: add _start symbol to tests [BZ #12385]
The current cr16 testsuite sets up _START, but the linker looks for the
_start symbol.  Add the latter as an alias to the former.
2015-03-29 21:02:03 -04:00
Mike Frysinger
2b4bc832a7 sim: microblaze: convert to nrun
This port already was storing its cpu state in the sim_cpu structure, so
converting it over was pretty easy.  It is allocating memory itself still,
but we'll fix that up in the future at some point.
2015-03-29 17:40:30 -04:00
Mike Frysinger
97eca187b3 sim: mcore/microblaze: delete dead code
The mcore port had a few structs/defines that were never used.

Similarly, the microblaze port, because it was copied from mcore, has
that same dead code, and more.  The watchpoint logic was never actually
used.  Punt it all.
2015-03-29 17:25:53 -04:00
Mike Frysinger
191ec03314 sim: microblaze: start a testsuite
Since the sim doesn't have any debug support in it, we can only exit
cleanly.  But this is still better than nothing.

Change the default microblaze sim to not dump the debug load output
when running.  No other does this, and it breaks the testsuite.
2015-03-29 16:45:49 -04:00
Mike Frysinger
744b9a190b sim; testsuite: allow tests to set no output
If a test doesn't write anything at all to stdout, the current test
framework can't support that.  Even if you put a blank output line:
	# output:
the setup happily clobbers that with a default pass/fail string.

Tweak the parsing logic so we only set the output to pass/fail when
the test has no output marker.
2015-03-29 16:41:59 -04:00
Mike Frysinger
92fc6153a6 sim: common: sim-arange: fix extern inline handling
With newer versions of gcc (5.x), the extern inline we're using with the
sim-arange module no longer works.  Since this code really wants the gnu
inline semantics, use that attribute explicitly.

Reported-by: DJ Delorie <dj@redhat.com>
Reported-by: Joel Sherrill <joel.sherrill@oarcorp.com>
2015-03-29 16:02:17 -04:00
Mike Frysinger
6dae8a88bf sim: testsuite: make subdir unconditional
Since the testsuite subdir has to handle dynamic arch values already,
there's no real value in requiring arches to opt in to it.  Most have
a testsuite now anyways, and we're requiring it in the future.
2015-03-29 11:51:13 -04:00
Mike Frysinger
3c0ae30962 sim: microblaze: use common configure options
In preparation for converting to nrun, call the common functions that
are needed.  This doesn't produce any new warnings, and the generated
code should be the same.
2015-03-29 11:51:13 -04:00
Mike Frysinger
ea6b7543b4 sim: mcore: convert to nrun
A lot of cpu state is stored in global variables, as is memory handling.
The sim_size support needs unwinding at some point.  But at least this
is an improvement on the status quo.
2015-03-29 04:14:27 -04:00
Mike Frysinger
525887679c sim: mcore: use common configure options
In preparation for converting to nrun, call the common functions that
are needed.  This doesn't produce any new warnings, and the generated
code should be the same.
2015-03-29 04:14:27 -04:00
Mike Frysinger
36cb69e0ed sim: mcore: add a basic testsuite 2015-03-29 04:14:27 -04:00
Mike Frysinger
aac18a6996 sim: mcore: drop sbrk support
The sbrk syscall assumes the sbrk region starts after the bss and the
current implementation requires a bss section to exist.  Since there
is no requirement for programs to have a bss in general, we want to
drop this check.  However, there is still the sbrk syscall that wants
to know about the region.

Since libgloss doesn't actually use the sbrk syscall (it implements
sbrk in its own way), and the sim really shouldn't enforce a specific
memory layout on programs, lets simply delete sbrk support.  Now it
always returns an error.
2015-03-29 04:14:27 -04:00
Mike Frysinger
4f5cce88bf sim: avr: fix _start testsuite symbol
Make sure we use the symbol the linker expects by default, and we export
it so it can be found.
2015-03-29 04:14:27 -04:00
Mike Frysinger
62454d3da2 sim: sh: convert to nrun
A lot of cpu state is stored in global variables, as is memory handling.
The sim_size support needs unwinding at some point.  But at least this
is an improvement on the status quo.
2015-03-28 17:45:31 -04:00
Mike Frysinger
5fa71a1b13 sim: sh: clean up some warnings
Mostly converting old style prototypes.  Also include a few missing
headers, and add static/casts where appropriate.
2015-03-28 17:45:31 -04:00
Mike Frysinger
02131c7ff6 sim: sh: fix broken handling in DSR reg
A missing */ caused a case statement to be incorrect masked out which
also hide an error where the wrong value was being checked.  Fix both.
2015-03-28 17:45:30 -04:00
Mike Frysinger
ed4d32c28a sim: sh: clean up gencode
The build line was missing the normal BUILD_xxx flags.  Once we added
that, we get warnings that weren't shown before.  As we fix those, we
notice that the -d option segfaults because it tries to write readonly
memory.  Fix that too as part of the const/prototype clean up.
2015-03-28 17:45:30 -04:00
Mike Frysinger
6d89786cb3 sim: sh: use common configure options
In preparation for converting to nrun, call the common functions that
are needed.  This also produces a bunch of warnings, but one thing at
a time.
2015-03-28 17:45:30 -04:00
Mike Frysinger
9943d3185a sim: avr: convert to nrun.o
Looks like a lot more work than actually was -- the main decode loop
was de-indented by dropping the loop as a step-once function.
2015-03-28 05:35:29 -04:00
Mike Frysinger
eca5fe422e sim: avr: start a basic testsuite
Just enough to know the sim isn't totally broken.
2015-03-28 04:28:46 -04:00
Jiri Gaisler
510d27512c sim/erc32: Fix a few compiler warnings 2015-03-28 03:05:35 -04:00
Jiri Gaisler
102b920e11 sim/erc32: Use memory_iread() function for instruction fetching.
Use separate memory_iread() function for instruction fetching.
Speeds up execution and allows addition of an MMU at a later stage.
2015-03-28 03:00:19 -04:00
Mike Frysinger
5831e29bc1 sim: erc32: strip paren from return statements 2015-03-28 02:57:08 -04:00
James Bowman
f46e4eb78b sim: ft32: new port
FT32 is a new high performance 32-bit RISC core developed by FTDI for
embedded applications.
2015-03-28 02:12:33 -04:00
Mike Frysinger
05f53ed611 sim: m68hc11/mips/mn10300/v850: add basic sim_pc_get
The previous profile change broke these sims that use sim-profile but
not sim-cpu (due to missing model support).  Add simple funcs until we
can convert these over properly.
2015-03-24 02:43:42 -04:00
Mike Frysinger
596f88276c sim: profile: disconnect from watchpoint core
The profile code was using STATE_WATCHPOINTS to get access to the PC, but
we already have a standard method for getting the pc, so switch to that.

This assumes that sizeof_pc is the same size as sim_cia, but we already
assume this in places by way of sim_pc_{get,set}, and this is how it's
documented in the sim-base.h API.
2015-03-24 01:24:10 -04:00
Mike Frysinger
1bf57e9a2e sim: moxie: clean up build time warnings 2015-03-24 01:14:28 -04:00
Mike Frysinger
cc8ab1ded5 sim: moxie: convert to nrun.o
This port already used a lot of common/ files, so cutting it over to
nrun.o and using a few more common objects is pretty straight forward.
2015-03-24 01:08:56 -04:00
Mike Frysinger
523ba8f92e sim: erc32/h8300/m68hc11: trim unused functions
These funcs are only used with the old run.o, and these sims use nrun.o,
so drop these stub funcs.
2015-03-24 00:48:40 -04:00
Mike Frysinger
c4a6006b2e sim: moxie: switch to common sim-command.o 2015-03-24 00:42:37 -04:00
Mike Frysinger
c0931f26e3 sim: clean up SIM_HAVE_BIENDIAN
This define only applies when using the old run.o main.  Document it as
such, and delete it from mips/sh64 since both use nrun.o now.
2015-03-24 00:39:00 -04:00
Mike Frysinger
fe83b8a8d3 sim: m32r: drop duplicate dv_sockser_install call
Since sim_module_install takes care of this for us, there's no need
to initialize the module twice.
2015-03-24 00:26:31 -04:00
Mike Frysinger
97f478c5a4 sim: Revert "Fix frv/iq2000/m32r/sh64 sim, default hardware to off."
This partially reverts commits:
	105dd264de
	3df3af7c3f
	c4892a6b37
	9e3042ec07

Now that dv-sockser is handled entirely by the common build logic, the
failure these targets were hitting isn't really possible anymore.  Lets
reset their hardware status back to defaulting to on.  Some of these
were set to "always" previously, but we don't support that anymore.
2015-03-24 00:16:42 -04:00
Mike Frysinger
30452bbe7e sim: fix sim-hardware configure option
The current default handling for the --enable-sim-hardware option ends up
forcing the value to whatever is set as the first argument when calling
the macro (by virtue of how autoconf works).  Relocate the setup code to
the 4th parameter of the AC_ARG_ENABLE macro to fix it.

This was caused by the simplification work in 1517bd2742.

Reported-by: Hans-Peter Nilsson <hans-peter.nilsson@axis.com>
2015-03-24 00:13:57 -04:00
Mike Frysinger
64dd13dfc2 sim: drop support for requiring hw support
Since no sim is using the "always" option to SIM_AC_OPTION_HARDWARE, and
we don't want to require hw support to always be enabled, drop the option.
This leads to a slight simplification in the macro too as we can collapse
the sim_hw_p variable.
2015-03-23 23:20:09 -04:00
Mike Frysinger
7722e5b802 sim: cris: delete unused CONFIG_DEVICES
Looks like unused copy & paste from other sim ports.  Drop it.
2015-03-23 23:16:40 -04:00
Mike Frysinger
4af3e7e0d3 sim: mn10300: fix duplicated hardware option
This code was calling SIM_AC_OPTION_HARDWARE twice -- we only want and
need to do it once.
2015-03-23 22:59:16 -04:00
Mike Frysinger
66b0e85dce sim: iq2000/mn10300: drop dv-sockser.o references
The common code handles this for us now automatically.
2015-03-23 22:59:13 -04:00
Mike Frysinger
c906b4b52b sim: frv: delete UART device support
This looks like copy & paste logic from the m32r port (and history
suggests this as well).  Since building with hw & device support
enabled leads to failures:
sim/frv/devices.c: In function 'device_io_read_buffer':
sim/frv/devices.c:39:15: error: 'UART_INCHAR_ADDR' undeclared (first use in this function)

Delete it entirely.  We leave device support in place as it is used
to flush the scache.
2015-03-23 21:58:12 -04:00
Nick Clifton
99067e2973 Fix thinko with previous delta to RL78 sim, by adding code to define the G10 and G13 mode options.
* cpu.c (rl78_g10_mode): Declare.
	(g13_multiply): Declare.
	* cpu.h (rl78_g10_mode): Export.
	(g13_multiply): Export.
2015-03-23 11:40:14 +00:00
Mike Frysinger
49cd1634b2 sim: dv-sockser: move build to common dir
If dv-sockser is available, lets add it to the common SIM_HW_OBJS
variable so it is always included automatically.  Now ports do not
have to shoe horn it in directly themselves.  It does mean it will
be compiled for targets that don't explicitly use it, but that's
really what we want anyways.
2015-03-23 04:40:07 -04:00
Mike Frysinger
3649cb0656 sim: dv-sockser: add stub funcs when not available
This lets ports assume that the dv-sockser API is always available if
they want to.  This way we don't have to do an abort at configure time
and it makes the resulting code a bit simpler.
2015-03-23 04:14:27 -04:00
Mike Frysinger
80fc77e6c1 sim: bfin/msp430: drop run-sim.h include
This header is used only with run.o, and both of these use nrun.o.
2015-03-23 03:37:30 -04:00
Mike Frysinger
8a863336bb sim: sh64: delete dv-sockser references
This sim doesn't actually use dv-sockser code anywhere, so drop references
to it in its build files.
2015-03-23 03:25:01 -04:00
Nick Clifton
4819f490bd Fixes implementation of hardware multiply/divide peripheral in RL78 G13 cores.
* load.c (rl78_load): If the G10, G13 or G14 flag bits are set in
	the ELF header use them to select the proper emulation mode.
	* mem.c (mem_put_byte): Use mem_put_hi to store a value into the
	MDB register.
	(mem_get_byte): Use mem_get_hi to extract a value from the MDB
	register.
2015-03-20 10:30:53 +00:00
Jiri Gaisler
b9f9ea2f5d sim/erc32: Removed type mismatch compiler warnings 2015-03-17 18:58:14 -04:00
Jiri Gaisler
638fcdad6a sim/erc32: Added -v command line switch for verbose output 2015-03-17 18:51:44 -04:00
Mike Frysinger
ba14f9419d sim: mcore/microblaze: strip trailing whitespace
No functional changes here.
2015-03-16 03:16:59 -04:00
Mike Frysinger
feb703b3f4 sim: mcore/microblaze: clean up a bit
Fix some various warnings and enable the extra warnings options.
2015-03-16 03:15:31 -04:00
Mike Frysinger
6cd5ace4db sim: convert some old prototypes 2015-03-16 03:01:09 -04:00
Mike Frysinger
ae7d0cac8c sim: rename tconfig.in to tconfig.h
Rather than manually include tconfig.h when we think we'll need it (which
is error prone as it can define symbols we expect from config.h), have it
be included directly by config.h.  Since we know we have to include that
header everywhere already, this will make sure tconfig.h isn't missed.

It should also be fine as tconfig.h is supposed to be simple and only set
up a few core defines for the target.

This allows us to stop symlinking it in place all the time and just use
it straight out of the respective source directory.
2015-03-16 01:23:52 -04:00
Jiri Gaisler
9c5f41df36 sim/erc32: use SIM_AC_OPTION_HOSTENDIAN to probe for host endianess 2015-03-16 01:16:35 -04:00
Mike Frysinger
8406bb5944 sim: dv-sockser: push module init prototype down
Pull out the duplicated dv_sockser_install prototype from the tconfig.in
files and put it in the one place it gets used -- sim-module.c.  This is
still arguably incorrect, but it's better than the status quo where the
tconfig.in has to include header files and duplicate the dv-sockser func.
The tconfig header is meant to be simple and contain a target defines.
2015-03-15 03:05:05 -04:00
Mike Frysinger
b19839da38 sim: bfin: fix signed warning
Fix the type of the local var to match the function it is passed to.
2015-03-14 20:56:39 -04:00
Mike Frysinger
1303206d7f sim: delete unused sim-inline.c rule
This dates back to the start of the repo, but has never really been used.
The sim-inline.c file has been checked in to the source, and attempts to
build it in the build tree leads to a circular dep warning from make.  It
also doesn't produce a file that is usable -- it can't be compiled.  Punt!
2015-03-14 20:56:04 -04:00
Mike Frysinger
41cc895fc8 sim: mcore/moxie: clean up makefiles a bit
Clean out stub targets and rules that get autogenerated.
2015-03-14 07:46:54 -04:00
Mike Frysinger
c1e768db52 sim: msp430: use common warnings options
This triggers a bunch of new warnings, so fix some of them.
2015-03-14 07:28:26 -04:00
Mike Frysinger
465fb143c8 sim: make nrun the default run program
We want people to stop using the run.c frontend, but it's hard to notice
when it's still set as the default.  Lets flip things so nrun.c is the
default, and users of run.c will get an error by default.  We turn that
error into a warning for existing sims so we don't break them -- this is
mostly meant for people starting new ports.
2015-03-14 07:02:58 -04:00
Mike Frysinger
5cddc23a3a sim: drop duplicate header checks
The SIM_AC_COMMON macro already checks for a bunch of headers, so specific
sim ports need not do it themselves.
2015-03-14 06:04:29 -04:00
Mike Frysinger
9312936603 sim: move sim-io.h to sim-assert.h
Since sim-endian.c doesn't actually use sim_io funcs, it's weird to
include the sim-io.h header here.  It's doing so only for the assert
header.  So lets relocate the include to the right place.
2015-03-14 03:44:58 -04:00
Mike Frysinger
6defcd57e9 sim: bfin: fix up linux-fixed-code.h generation more [PR sim/13160]
Add a trailing semi-colon to the sed print command as the BSD sed
implementation wants it.  It's a nop otherwise and works fine on
GNU/etc... implementations too.
2015-03-10 01:43:31 -04:00
Mike Frysinger
411b642274 sim: bfin: fix bug reference 2015-03-09 13:26:51 -04:00
Mike Frysinger
43fa85d9a8 sim: bfin: fix up linux-fixed-code.h generation [PR sim/10143]
The use of $< ends up picking the wrong object out of the depend
list.  Specify the input name directly to avoid fragility.

On BSD systems, we need to make sure all options come before the
non-options (i.e. the files).

Reported-by: Chris Johns <chrisj@rtems.org>
URL: https://sourceware.org/bugzilla/show_bug.cgi?id=13160
2015-03-09 00:00:05 -04:00
Mike Frysinger
3e95021c77 sim: microblaze: fix printf string
Since sizeof returns a size_t, use %zu to display it.
2015-03-08 03:24:09 -04:00
Nick Clifton
a3976a7c56 Fixes problems building the V850 simulator introduced with the previous delta.
* sim-main.h (reg64_t): New type.
	(v850_regs): Add selID_sregs field.
	(VR, SAT16, SAT32, ABS16, ABS32 ): New macros.
	* v850-dc: Add fields for v850e3v5 instructions.
	* v850.igen (cvtf.dl): Use correctly signed local value.
	(cvtf.dw, cvtf.sw, trncf.dul, trncf.dl, trncf.sul, trncf.sw):
	Likewise.
	* interp.c: Fix old style function declarations.
	* simops.c: Likewise.
2015-02-27 09:53:03 +00:00
Nick Clifton
9ad55e9b25 Adds support for emulating V850 e3v5 instructions to the simulator.
* v850.igen: Add more e3v5 support.
	(FMAF.S): New pattern.
	(FMSF.S): New pattern.
	(FNMAF.S): New pattern.
	(FNMSF.S): New pattern.
	(cnvq15q30): New pattern.
	(cnvq30q15): New pattern.
	(cnvq31q62): New pattern.
	(cnvq62q31): New pattern.
	(dup.h): New pattern.
	(dup.w): New pattern.
	(expq31): New pattern.
	(modadd): New pattern.
	(mov.dw): New pattern.
	(mov.h): New pattern.
	(mov.w): New pattern.
	(pki16i32): New pattern.
	(pki16ui8): New pattern.
	(pki32i16): New pattern.
	(pki64i32): New pattern.
	(pkq15q31): New pattern.
	(pkq30q31): New pattern.
	(pkq31q15): New pattern.
	(pkui8i16): New pattern.
	(vabs.h): New pattern.
	(vabs.w): New pattern.
	(vadd.dw): New placeholder pattern.
	(vadd.h): New placeholder pattern.
	(vadd.w): New placeholder pattern.
	(vadds.h): New placeholder pattern.
	(vadds.w): New placeholder pattern.
	(vaddsat.h): New placeholder pattern.
	(vaddsat.w): New placeholder pattern.
	(vand): New pattern.
	(vbiq.h): New placeholder pattern.
	(vbswap.dw): New placeholder pattern.
	(vbswap.h): New placeholder pattern.
	(vbswap.w): New placeholder pattern.
	(vcalc.h): New placeholder pattern.
	(vcalc.w): New placeholder pattern.
	(vcmov): New placeholder pattern.
2015-02-24 17:58:50 +00:00
Nick Clifton
10d602c7f9 Fix the detection of illegal memory accesses in the MSP430 simulator.
* msp430-sim.c (sim_open): Allocate memory regions matching those
	declared in the libgloss/msp430 linker scripts.
	Allow sim_load_file to fail.
	(get_op): Test the correct address bit when checking for out of
	range addresses.
	Include the address in the error message when an illegal access to
	the hardware multiplier is detected.
	(put_op): Test the correct address bit when checking for out of
	range addresses.
2015-02-24 10:27:07 +00:00
Jiri Gaisler
5634e839cc sim/erc32: Use readline.h for readline types and functions.
Use gdb's readline.h for readline types.
2015-02-22 15:57:25 -05:00
Jiri Gaisler
e26473a140 sim/erc32: File loading via command line did not work
* sis.c (main) load binary file from argv parameters
2015-02-21 23:29:58 -05:00
Jiri Gaisler
96d6709579 sim/erc32: Fix incorrect simulator performance report 2015-02-21 23:27:24 -05:00
Jiri Gaisler
bb6ead917c sim/erc32: Remove unused defines in Makefile and switch off statistics 2015-02-21 23:22:10 -05:00
Jiri Gaisler
0172ee3adc sim/erc32: Use fenv.h for host FPU access 2015-02-21 23:20:09 -05:00
Jiri Gaisler
20a0ffe33a sim/erc32: Perform pseudo-init if binary linked to non-zero address.
Binaries produced by most erc32 tool-chains do not include
system initialization. sis will detect this and initialize
necessary registers for memory and timer control.
2015-02-21 23:18:23 -05:00
Jiri Gaisler
df9bc4163b sim/erc32: Corrected wrong CPU implementation and version ID in psr 2015-02-21 23:11:36 -05:00
Jiri Gaisler
53b5af48f6 sim/erc32: Disassembly in stand-alone mode did not work.
The API to print_insn_sparc() has changed over the years ...
2015-02-21 23:10:57 -05:00
Mike Frysinger
dc049bf460 sim: drop unused headers
These look like left over hacks from the days where we had to protect
ourselves from the compiler and C library.  None of these checks are
relevant, and we have common configure logic to do header tests.  Punt
them all now.
2015-02-20 00:16:14 -05:00
Mike Frysinger
4c4ca605d5 sim: drop unused sim_kill function
This has been deprecated for a long time and no one calls it.
2015-02-19 20:42:14 -05:00
Chen Gang
16218fd311 sim: ChangeLog: Correct the related items position and format.
Move several items from sim/ChangeLog to sim/*/ChangeLog. Also remove
the incorrect white space in sim/common/ChangeLog.
2015-02-20 07:04:13 +08:00
Mike Frysinger
dfaf2c472c sim: microblaze: fix build failure after opcodes update
Commit 07774fccc3 update the microblaze
opcodes table to avoid C++ collisions, but missed updating the sim.
That caused it to fail to build due to missing keywords.
2015-02-19 03:43:45 -05:00
Chen Gang
dc1d9d1fcb sim/common/gentmap.c: Include "string.h".
The related warnings:

  gcc ../../../binutils-gdb/sim/mcore/../common/gentmap.c -o gentmap -g -O -I. -I../../../binutils-gdb/sim/mcore -I../common -I../../../binutils-gdb/sim/mcore/../common -I../../include -I../../../binutils-gdb/sim/mcore/../../include -I../../bfd -I../../../binutils-gdb/sim/mcore/../../bfd -I../../opcodes -I../../../binutils-gdb/sim/mcore/../../opcodes
  ../../../binutils-gdb/sim/mcore/../common/gentmap.c: In function ‘main’:
  ../../../binutils-gdb/sim/mcore/../common/gentmap.c:119:7: warning: implicit declaration of function ‘strcmp’ [-Wimplicit-function-declaration]
     if (strcmp (argv[1], "-h") == 0)
         ^

2015-02-13  Chen Gang  <gang.chen.5i5j@gmail.com>

	*  gentmap.c: Include "string.h".
2015-02-14 00:11:34 +08:00
Chen Gang
4185814eb4 sim/mcore/interp.c: Include "unistd.h".
The related warnings:

  gcc -DHAVE_CONFIG_H     -DPROFILE=1 -DWITH_PROFILE=-1          -DDEFAULT_INLINE=0              -I. -I../../../binutils-gdb/sim/mcore -I../common -I../../../binutils-gdb/sim/mcore/../common -I../../include -I../../../binutils-gdb/sim/mcore/../../include -I../../bfd -I../../../binutils-gdb/sim/mcore/../../bfd -I../../opcodes -I../../../binutils-gdb/sim/mcore/../../opcodes  -g -O2 -c -o interp.o -MT interp.o -MMD -MP -MF .deps/interp.Tpo ../../../binutils-gdb/sim/mcore/interp.c
../../../binutils-gdb/sim/mcore/interp.c: In function ‘handle_trap1’:
../../../binutils-gdb/sim/mcore/interp.c:559:22: warning: implicit declaration of function ‘link’ [-Wimplicit-function-declaration]
         cpu.gr[RET1] = link ((char *) a[0], (char *) a[1]);
                        ^
  ../../../binutils-gdb/sim/mcore/interp.c:585:22: warning: implicit declaration of function ‘access’ [-Wimplicit-function-declaration]
         cpu.gr[RET1] = access ((char *) a[0], a[1]);
                        ^

2015-02-11  Chen Gang <gang.chen.5i5j@gmail.com>

        * interp.c: Include "unistd.h".
2015-02-11 21:46:30 +08:00
Chen Gang
907c4910c3 sim: Be sure of calling freeargv() after successfully call buildargv().
Or there will be memory leak.

2015-02-02  Chen Gang <gang.chen.5i5j@gmail.com>

	* microblaze/interp.c (sim_do_command): Call freeargv() before
	return.
2015-02-03 04:03:41 +08:00
Chen Gang
cd71915c77 sim: Be sure of calling freeargv() after successfully call buildargv().
Or there will be memory leak.

2015-02-02  Chen Gang <gang.chen.5i5j@gmail.com>

	* mcore/interp.c (sim_do_command): Call freeargv() before return.
2015-02-03 04:03:38 +08:00
Chen Gang
c9ba137e21 sim: Call freeargv() when failure occurs
After successfully call buildargv(), the code need to be sure of calling
freeargv() in any cases.

2015-02-02  Chen Gang <gang.chen.5i5j@gmail.com>

       * common/sim-options.c (sim_args_command): Call freeargv() when
       failure occurs.
2015-02-03 04:03:34 +08:00
Joel Brobecker
a300380e12 Build failure in sim/rx/gdb-if.c on windows
This should fix a build failure reported on x86_64-mingw32 by Daniel
Calcoen due to conflicting declarations of "open".  This patch just
renames the static global in sim/rx/gdb-if.c into "rx_sim_is_open".

sim/rx/ChangeLog:

	* gdb-if.c (open): Rename to...
	(rx_sim_is_open): This. Replace all uses of "open" by uses of
	"rx_sim_is_open" throughout.

Tested by rebuilding on x86_64-linux.
2015-01-15 07:21:50 +04:00
Joel Brobecker
fdbf396f7e Regenerate sim/common/aclocal.m4 and sim/common/configure...
... using automake 1.11.1, which is the version we're currently
using throughout, instead of 1.11.3. This should be a no-op in
practice, but will help automake/aclocal version-related
differences to cloud real changes being made.

sim/common/ChangeLog:

        * aclocal.m4, configure: Regenerate using automake 1.11.1.
2015-01-07 14:00:06 +04:00
Joel Brobecker
32d0add0a6 Update year range in copyright notice of all files owned by the GDB project.
gdb/ChangeLog:

        Update year range in copyright notice of all files.
2015-01-01 13:32:14 +04:00
Anthony Green
507411ccab Update sto/ldo implementations with 16 bit offsets 2014-12-27 18:19:49 -05:00
Anthony Green
67afb06e01 Whitespace cleanup 2014-12-25 08:38:58 -05:00
Anthony Green
3ba611c3ca Whitespace cleanup 2014-12-25 08:29:27 -05:00
Anthony Green
ed4fd7b7f3 Add support for moxie's mul.x and umul.x instructions 2014-12-24 08:38:09 -05:00
Anthony Green
c784b11504 Add zex instruction support for moxie port 2014-12-12 08:45:25 -05:00
Joel Brobecker
2d7bb7580a callback.h:struct host_callback_struct compilation error on Windows hosts.
On Windows, a recent gnulib update imported the lstat module, and
this caused a remote-sim.c build failure in struct host_callback_struct:

    In file included from /[...]/gdb/remote-sim.c:34:0:
    /[...]/gdb/../include/gdb/callback.h:93:9: error: duplicate member '_stati64'
       int (*lstat) (host_callback *, const char *, struct stat *);
             ^
What happens it that gnulib's stat.h makes the following defines:

     /* Large File Support on native Windows.  */
     #if 1
     # define stat _stati64
     #endif

and then:

    #if 1
    # if ! 0
    /* mingw does not support symlinks, therefore it does not have lstat.  But
       without links, stat does just fine.  */
    #  if !(defined __cplusplus && defined GNULIB_NAMESPACE)
    #   define lstat stat
    #  endif

So, the following fields in struct host_callback_struct...

      int (*stat) (host_callback *, const char *, struct stat *);
      int (*fstat) (host_callback *, int, struct stat *);
      int (*lstat) (host_callback *, const char *, struct stat *);

... get translated to...

      int (*_stati64) (host_callback *, const char *, struct _stati64 *);
      int (*_fstati64) (host_callback *, int, struct _stati64 *);
      int (*_stati64) (host_callback *, const char *, struct _stati64 *);

... which causes two fields to have the same name.

This patch fixes the issue by renaming the stat-related fields
by adding a "to_" prefix, similar to what is done in GDB's
target_ops vector.

include/gdb/ChangeLog:

	* callback.h (struct host_callback_struct) <to_stat>: Renamed
	from "stat".
	<to_fstat>: Renamed from "fstat".
	<to_lstat>: Renamed from "lstat".

sim/common/ChangeLog:

	* sim-io.c (sim_io_stat, sim_io_fstat): Adjust calls to "stat"
	and "fstat" callbacks by calls to "to_stat" and "to_fstat" (resp)
	callbacks following renaming in callback.h.
	* syscall.c (cb_syscall): Likewise.  Adjust calls to "lstat"
	callback by call to "to_lstat" callback

sim/cris/ChangeLog:

	* traps.c (cris_break_13_handler): Adjust call to "fstat" callback
	by call to "to_fstat" following renaming in callback.h.

sim/h8300/ChangeLog:

	* compile.c (sim_resume):  Adjust calls to "stat" and "fstat"
	callbacks by calls to "to_stat" and "to_fstat" (resp) callbacks
	following renaming in callback.h.
2014-12-03 13:43:08 +04:00
Oleg Endo
57df9adf2d Correct fabs and fneg insns in simulator
It seems that the implementation of the SH fabs and fneg insns in the
simulator is not correct.  They use the FP_UNARY macro which checks the
FPSCR.PR setting and raises an exception if PR = 1 (double precision)
and the register number is not even (i.e. a valid DF reg number).
For normal unary FP insns this is fine.  However, fneg and fabs perform
the same (integer) operations regardless of the FPSCR.PR setting.

This issue initially popped up here
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63260

I've checked some of the failing tests mentioned in GCC PR 63260 above
with the patch applied and the failures go away.

sim/sh/ChangeLog (tiny patch):

	* gencode.c (fabs, fneg): Implement as integer operation
	instead of using the FP_UNARY macro.
2014-11-28 19:44:03 +04:00
Joel Sherrill
576054f170 sim/ppc/*: Change immediatly to immediately
sim/ppc/ChangeLog:

	* ChangeLog, ChangeLog.00, hw_com.c, ld-cache.h, ppc-instructions:
	Change immediatly to immediately.
2014-11-23 07:11:39 +04:00
Joel Sherrill
8eec6289f8 sim/igen/: Change immediatly to immediately
sim/igen/ChangeLog:

        * igen/ld-cache.h, igen/table.h: Change immediatly to immediately.
2014-11-23 07:09:16 +04:00
Joel Sherrill
fcb381293d s/immediatly/immediately/ in sim/sh/ChangeLog entry. 2014-11-23 06:59:54 +04:00
Gary Benson
6aefca7e49 Shadow SIM's debug_printf function
GDB and SIM both have functions called "debug_printf", which conflicts
at link time.  This commit shadows SIM's debug_printf with a macro so
that SIM's symbol ends up being called "sim_debug_printf".

sim/common/ChangeLog:

	* sim-trace.h (debug_printf): New define.
2014-08-28 11:59:09 +01:00
Joel Sherrill
ceac4ecf4c psim: Correct spelling in comments.
2014-08-27  Joel Sherrill <joel.sherrill@oarcorp.com>

	* basics.h, device.c, device.h, hw_htab.c, hw_memory.c:
	Correct spelling in comments.
2014-08-27 14:04:41 -05:00
Hans-Peter Nilsson
9e3042ec07 Fix m32r-elf sim, default hardware to off.
The situation here is similar to that of the other nearby (previous)
sims fixed; it fails at the dv_sockser_install declaration in
sim/m32r/tconfig.in.  But, as opposed to e.g. frv, this *does* have a
definition of UART_INCHAR_ADDR et al.  It's somewhat tempting to keep
sim-hardware enabled here but, I'm disabling it for the same reasons
as for frv.  Unsurprisingly (as m32r seems to be the template), the
same confusing lines are in sim/m32r/Makefile.in as in
sim/frv/Makefile.in at that time, deleted in 73e76d20.  Again, commit
73e76d20 (for m32r as well as for frv) attempted to move the
non-existing dv-sockser.o use to $(m32r_extra_objs) but missed that
AC_SUBST would only affect @m32r_extra_objs@ and not
$(m32r_extra_objs) per se so nothing happened.  As for frv, I'm
removing the $(m32r_extra_objs) too, to avoid confusion.  Make
check-sim for m32r-elf shows no regressions (5 failures; 100 expected
passes) compared to bf3d9781ec (before the recent config.in regen,
after sim-hardware mostly-enabled) and eed23bb4a1 (before the
sim-hardware mostly-enabled; 2013-03-23).

sim/m32r:
	* configure.ac: Default simulator hardware to off again.  Remove
	dead m32r_extra_objs substitution.
	* configure: Regenerate.
	* Makefile.in: Remove unused frv_extra_objs.
2014-08-23 04:53:28 +02:00
Hans-Peter Nilsson
c4892a6b37 Fix sh64-elf sim, default hardware to off.
See nearby (previous) commit for the iq2000 sim; this similarly fails
at the dv_sockser_install declaration in sim/sh64/tconfig.in.  I'm
disabling simulator hardware to be consistent with the state before
94c63d78f (2013-03-23) and with the actions for the frv sim and the
iq2000 sim.  Make check-sim for sh64-elf shows no regressions (25
failures; 357 expected passes) compared to bf3d9781ec (before the
recent config.in regen, after sim-hardware mostly-enabled) and
eed23bb4a1 (before the sim-hardware mostly-enabled; 2013-03-23).

sim/sh64:
	* configure.ac: Default simulator hardware to off again
	without emitting errors when off or dv-sockser.o unavailable.
	* configure: Regenerate.
2014-08-23 04:40:36 +02:00
Hans-Peter Nilsson
3df3af7c3f Fix iq2000-elf sim, default hardware to off.
See nearby (previous) commit for the frv sim; this similarly fails at
the dv_sockser_install declaration in sim/iq2000/tconfig.in.  There's
no HAVE_DV_SOCKSER conditionals here and no other dv-sockser.o
artefacts so maybe there is no further fallout, but I'm going to
disable sim-hardware just be consistent with the state before
94c63d78f (2013-03-23) and with the actions for the frv sim.  Make
check-sim for iq2000-elf shows no failures but that's in no small part
because it has no test-suite.

sim/iq2000:
	* configure.ac: Default simulator hardware to off again
	without emitting errors when off or dv-sockser.o unavailable.
	* configure: Regenerate.
2014-08-23 04:27:26 +02:00
Hans-Peter Nilsson
105dd264de Fix frv-elf sim, default hardware to off.
At 2974be626, frv-elf fails at the dv_sockser_install declaration in
sim/frv/tconfig.in.  But, with the trivial #include's added (see other
sims tconfig.in, like cris or mn10300), it *still* fails building
sim/frv/devices.c because of a missing UART_INCHAR_ADDR.  I have no
insight into what'd be a valid value, except that there's a definition
in m32r, which was probably used as a template with frv not finished.
Simulated hardware should not have been be enabled, and was indeed not
enabled by default before 94c63d78f (2013-03-23), where it seems to
have been enabled for no simulator-specific reason.  Except
dv-sockser.o wasn't enabled even then: sim/frv/config.in wasn't
regenerated, so HAVE_DV_SOCKSER was never defined.  Maybe people were
fooled by this in sim/frv/Makefile.in at that time (these two lines
were later deleted, in 73e76d20):
CONFIG_DEVICES = dv-sockser.o
CONFIG_DEVICES =
(As it seems people have missed it before: the second line overrides
the first...)  I'm guessing these lines were part of the
never-completed hardware-support.  Commit 73e76d20 attempted to move
the imagined dv-sockser.o from $(CONFIG_DEVICES) to $(frv_extra_objs)
but missed that AC_SUBST would only affect @frv_extra_objs@ (not
$(frv_extra_objs) per se) so nothing happened regarding sockser:
dv-sockser.o was not compiled and HAVE_DV_SOCKSER was not defined.
I'm removing the $(frv_extra_objs) too, to avoid confusion.  The best
action seems to be disabling all hardware support by default again
until a specific sim maintainer finishes the work.
Make check-sim for frv-elf shows no failures after this.

sim/frv:
	* configure.ac: Default simulator hardware to off again.  Remove
	dead frv_extra_objs substitution.
	* configure: Regenerate.
	* Makefile.in: Remove unused frv_extra_objs.
2014-08-23 04:16:58 +02:00
Alan Modra
2974be626b Fix --diable-shared --enable-plugins build breakage
Directories that don't use libtool need to add -ldl (on most *nix
hosts) to provide dlopen for libbfd.

config/
	* plugins.m4 (AC_PLUGINS): If plugins are enabled, add -ldl to
	LIBS via AC_SEARCH_LIBS.
gdb/
	* acinclude.m4 (GDB_AC_CHECK_BFD): Don't add -ldl.
	* config.in: Regenerate.
sim/ppc/
	* configure.ac: Invoke AC_PLUGINS.
	* config.in: Regenerate.

and regen lots of configure files.
2014-08-19 21:59:56 +09:30
Nick Clifton
180eb0634c Replace static variables in the MSP430 simulator with fields in the cpu state structure.
* msp430-sim.c: Move static hardware multiply support variables
	from here...
	* msp430-sim.h (msp430_cpu_state): ... into here ...
	* msp430-sim.c (get_op, put_op): ... and update references to use
	the msp430_cpu_state structure.
2014-08-19 11:34:14 +01:00
Roland McGrath
faa743bb1b Regenerate sim configury. 2014-08-15 15:51:50 -07:00
Michael Eager
ba8e7d1e24 Sim - Use long int format instead of int to avoid compiling warning
2014-07-01  Chen Gang <gang.chen.5i5j@gmail.com>

	* sim/microblaze/interp.c: Use long int format instead of int
	format to avoid compiling warnings.
2014-06-30 17:40:02 -07:00
Nick Clifton
aef392c4ae Fix a small but in the emulation of the MSP430 hardware multiply.
* msp430-sim.c (get_op): Handle reads of low result register when
	in MAC mode.
	(put_op): Copy MAC result into result words.
	Handle writes to the low result register.
2014-06-03 09:00:57 +01:00
DJ Delorie
a7da346e5c Support 32->64 sign extension in msp430's sign_ext
* msp43-sim.c (sign_ext): Change to "long long" to support
sign-extending 32-bit values.
2014-05-12 19:05:19 -04:00
Nick Clifton
8969934d31 Add support for emulating the MSP430 hardware multiply feature.
* msp430-sim.c (sim_open): Do not allocate memory over the
	hardware multiply registers.
	(get_op): Add support for reads from the hardware multiply
	registers.
	(put_op): Add support for writes to the hardware multiply
	registers.
	(msp430_step_once): Add support for the RETI instruction used by
	the CPUX architecture.
2014-05-08 08:53:16 +01:00
Anthony Green
048ea17465 Add support for two new moxie sign-extension instructions 2014-04-02 23:58:01 -04:00
Nick Clifton
1d63324c56 Improve .rsrc section merging with better handling of the alignment adjustments
made between merged .rsrc sections.

	* peXXigen.c (rsrc_align): New function.  Attempts to cope with
	alignment variances when .rsrc sections are merged.
	(rsrc_process_section): Use rsrc_align.

	* Makefile.am (default-manifest.o): Use WINDRES_FOR_TARGET.
	* Makefile.in: Regenerate.
	* emultempl/default-manifest.rc: Fix typo.
	* scripttempl/pe.sc (R_RSRC): Fix default-manifest exclusion.
	(.rsrc): Add SUBALIGN(4).
	* scripttempl/pep.sc: Likewise.
2014-03-19 08:51:20 +00:00
Nick Clifton
d68d7e6b82 Convert function declarations to ISO C format. Remove redundant code.
* wrapper.c: Convert function declarations to ISO C format.
	(sim_open): Delete code for handling t,d and z command line
	options.
2014-03-18 14:16:54 +00:00
Nick Clifton
8d05292667 Add support for instruction level tracing to the ARM simulator.
* wrapper.c (op_print): New function.
	(sim_dis_read): New function.
	(print_insn): New function - disassembles the given instruction.
	(sim_trace): Note that tracing is now allowed.
	(sim_create_inferior): Default to emulating v6.
	Initialise the disassembler machinery.
	(sim_target_parse_command_line): Add support for -t -d and -z
	options.
	(sim_target_display_usage): Note existence of -d and -z options.
	(sim_open): Parse -t -d and -z options.
	* armemu.h: Add exports of trace, disas and trace_funcs.
	Add prototype for print_insn.
	* armemu.c (ARMul_Emulate26): Add tracing code.
	Delete unused variables.
	* thumbemu (handle_v6_thumb_insn): Delete unused variable Rd.
	Move Rm variable into switch cases.
	Add tracing code.

	* armcopro.c (XScale_cp15_init): Add a return value.
	(XScale_cp13_init): Likewise.
	(XScale_cp14_init): Likewise.
	(XScale_cp15_LDC): Delete unused function.
	(XScale_cp15_STC): Likewise.
	* maverick.c: Delete comment inside comment.
	(DSPInit): Delete unused function.
	(DSPMCR4): Fix compile time warning about missing parenthesis.
	(DSPMCR5): Likewise.
	(DSPCDP6): Delete unused variable opcode2.
2014-03-14 15:21:23 +00:00
David McQuillan
b9366cf395 Prevent writes to R15 via LDR or LDM from changing the ARM/Thumb state in pre-v5 architectures.
PR sim/8388
	* armemu.c (WriteR15Load): New function.  Determines if the state
	can be changed upon a write to R15.
	(LoadMult): Use WriteR15Load.
	* armemu.h (WRITEDESTB): Use WriteR15Load.
2014-03-14 14:03:29 +00:00
Nick Clifton
7701725167 Add myself as the maintainer for the MSP430 sim. 2014-03-12 11:02:57 +00:00
Mike Frysinger
f32d1b7f58 sim: msp430: start a test framework
The current sim lacks any sort of tests.  Start a basic framework and
add a simple one to test the add insn.
2014-03-10 23:59:59 -04:00
Mike Frysinger
7b0278dcad sim: msp430: set initial PC to ELF entry if available
If we want to run a simple ELF, the reset vector isn't set up, so starting
at address 0 doesn't make sense.  Use the ELF's entry point instead.
2014-03-10 23:57:57 -04:00
Mike Frysinger
a3271a3e6c sim: msp430: fix build time warnings
This fix is simple:

msp430-sim.c: In function 'maybe_perform_syscall':
msp430-sim.c:898:10: warning: format '%d' expects argument of type 'int',
                     but argument 5 has type 'long int' [-Wformat]

This one we change to use casts like everyone else does in the code base:

msp430-sim.c: In function 'msp430_step_once':
msp430-sim.c:985:7: warning: passing argument 3 of 'init_disassemble_info'
                    from incompatible pointer type [enabled by default]
include/dis-asm.h:368:13: note: expected 'fprintf_ftype' but argument is
of type 'int (*)(struct FILE * __restrict__,  const char * __restrict__)'
2014-03-10 22:59:22 -04:00
Mike Frysinger
60d847df0b sim: constify arg to sim_do_command
It is rare for people to want to modify the cmd arg.  In general, they
really shouldn't be, but a few still do.  For those who misbehave, dupe
the string locally so they can bang on it.
2014-03-10 22:57:29 -04:00
Mike Frysinger
b2b255bdf3 sim: constify prog_name
There's no need for the prog_name handed down to the core to be mutable,
so add const markings to it and all the related funcs.
2014-03-05 01:42:44 -05:00
Mike Frysinger
1a8a700e3a sim: convert old style prototypes
Most of these prototypes have been killed off, but we have a few left
in the sim tree.  Clean them up so we can enable the -W flag for it.
2014-03-04 02:54:50 -05:00
Kevin Buettner
fa0dd93eca Revise signal mapping function in GDB interface for RX sim.
sim/rx/gdb-if.c had a function named `rx_signal_to_host'.  This
	function mapped signal numbers used by the BSP to host signal
	numbers which, at one time a while back, were used by GDB
	as target signal numbers.  This change updates the signal
	numbers returned to be those names prefixed with "GDB_SIGNAL_"
	as defined in include/gdb/signals.h.

	It also changes the name of the function somewhat to better
	match what the function currently does.  I noticed that this
	function is not static - and there's no reason for it not
	to be - so I made it static too.

	* gdb-if.c (rx_signal_to_host):  Rename to
	`rx_signal_to_gdb_signal'.  Make static.  Update all callers
	to use new name.  Use signal names from include/gdb/signals.h.
2014-02-17 18:15:56 -07:00
Mike Frysinger
ef3e8cf7d1 sim: delete duplicate SIGINT handling
Many of the simulators change the SIGINT handler.
E.g., moxie/interp.c:

  sigsave = signal (SIGINT, interrupt);

However, this is unnecessary.
remote-sim.h already provides an API for asynchronously stopping
a sim; and both gdb and the drivers (run.c and nrun.c at least,
I didn't check the others) install a SIGINT handler which
calls this method.

URL: https://sourceware.org/bugzilla/show_bug.cgi?id=16450
Reported-by: Tom Tromey <tromey@redhat.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2014-02-17 18:32:45 -05:00
Aaro Koskinen
0d8a6ab7d3 sim: ppc: drop $(LIBS) from psim dependency
When cross-compiling GDB for PPC, there's a prerequisite "-lz" for psim
that results in a build failure. With such prerequisite, GNU Make will
try to search the library from build machine's /usr/lib which is wrong.
On 64-bit Linux build machines the compilation will fail because of this.

URL: https://sourceware.org/bugzilla/show_bug.cgi?id=12202
2014-02-17 17:12:59 -05:00
Tom Tromey
6104cb7ae7 remove VA_* macros from sim
Remove the obsolete VA_* macros from sim.

2014-01-06  Tom Tromey  <tromey@redhat.com>

	* common/cgen-trace.c: Don't use old VA_* macros.
	* common/sim-load.c (xprintf): Likewise.
	* common/sim-trace.c (trace_printf, debug_printf): Likewise.
2014-01-07 09:17:05 -07:00
Tom Tromey
bdca5ee4bc remove PARAMS from sim
This removes the last uses of PARAMS from sim.

2014-01-06  Tom Tromey  <tromey@redhat.com>

	* README-HACKING: Don't use PARAMS.
	* arm/wrapper.c: Don't use PARAMS.
	* bfin/sim-main.h: Don't use PARAMS.
	* common/callback.c: Don't use PARAMS.
	* common/cgen-trace.c: Don't use PARAMS.
	* common/run-sim.h: Don't use PARAMS.
	* common/run.c: Don't use PARAMS.
	* common/sim-base.h: Don't use PARAMS.
	* common/sim-load.c: Don't use PARAMS.
	* common/sim-options.h: Don't use PARAMS.
	* common/sim-trace.c: Don't use PARAMS.
	* common/sim-trace.h: Don't use PARAMS.
	* common/sim-utils.h: Don't use PARAMS.
	* cr16/cr16_sim.h: Don't use PARAMS.
	* cr16/gencode.c: Don't use PARAMS.
	* cr16/interp.c: Don't use PARAMS.
	* cr16/simops.c: Don't use PARAMS.
	* d10v/d10v_sim.h: Don't use PARAMS.
	* d10v/gencode.c: Don't use PARAMS.
	* d10v/interp.c: Don't use PARAMS.
	* d10v/simops.c: Don't use PARAMS.
	* erc32/erc32.c: Don't use PARAMS.
	* erc32/exec.c: Don't use PARAMS.
	* erc32/float.c: Don't use PARAMS.
	* erc32/func.c: Don't use PARAMS.
	* erc32/sis.c: Don't use PARAMS.
	* erc32/sis.h: Don't use PARAMS.
	* mips/interp.c: Don't use PARAMS.
	* mips/sim-main.h: Don't use PARAMS.
	* sh/interp.c: Don't use PARAMS.
	* v850/sim-main.h: Don't use PARAMS.
	* v850/v850_sim.h: Don't use PARAMS.
2014-01-07 09:17:05 -07:00
Joel Brobecker
ecd75fc8ee Update Copyright year range in all files maintained by GDB. 2014-01-01 07:54:24 +04:00
Mike Frysinger
daff015bcd sim: bfin: tests: make run-tests.sh executable
I meant for this script to be +x, but missed when doing the initial CVS
commit.  It wasn't possible to fix w/CVS, but it is w/git, so do it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>

2012-12-03  Mike Frysinger  <vapier@gentoo.org>

	* run-tests.sh: Add +x file mode.
2013-12-07 02:03:33 -05:00
Mike Frysinger
594d8fa8e9 strip off +x bits on non-executable/script files
These files are source files and have no business being +x.  We couldn't
easily fix it in CVS (you need login+write access to the raw rcs files),
but we can fix this w/git.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2013-12-07 02:03:03 -05:00
Steve Ellcey
b02677b904 2013-11-25 Steve Ellcey <sellcey@mips.com>
* igen/Makefile.in (igen): Use BUILD_CFLAGS in link.
2013-11-25 13:31:43 -08:00
Will Newton
d40af490aa sim/ChangeLog: Correct bug number in previous commit. 2013-11-07 16:14:51 +00:00
Will Newton
1ed6c797ef sim/arm: Prevent crash when running sim with no binary.
2013-11-07  Will Newton  <will.newton@linaro.org>

	PR gdb/15508
	* arm/wrapper.c (sim_create_inferior): Call init before
	accessing STATE.
2013-11-07 16:02:51 +00:00
Will Newton
8782aa321e sim/arm: Prevent NULL pointer dereference in sim_create_inferior.
2013-11-07  Will Newton  <will.newton@linaro.org>

	PR gdb/9195
	* arm/wrapper.c (sim_create_inferior): Avoid calling
	bfd_get_mach with a NULL bfd.
2013-11-07 16:02:41 +00:00
Hans-Peter Nilsson
490e58e2ff * Makefile.in (srcsim): New variable.
(version.c): Adjust call to $(srccom)/create-version.sh as per change.
2013-10-15 20:42:07 +00:00
Hans-Peter Nilsson
7b0648448f * create-version.sh: Align parameters to match those of
../../gdb/common/create-version.sh.
	* Make-common.in (srcsim): New variable.
	(version.c): Adjust call to create-version.sh as per above.
2013-10-15 20:40:22 +00:00
Sergio Durigan Junior
40776d1927 sim/erc32/ChangeLog:
2013-10-09  Sergio Durigan Junior  <sergiodj@redhat.com>

	PR sim/16018:
	* float.c (set_fsr): Add missing "break" statements.  Reindent
	code.
2013-10-09 21:42:11 +00:00
Alan Modra
bf3d9781ec Regenerate sim configure files to pick up support for powerpc64le in
libtool.m4.
2013-09-23 00:32:27 +00:00
Mike Frysinger
f06dccb0fe sim: mark complete_option_list args const to fix build warnings
The completion API was updated, but this func missed having its
text/word args const.
2013-09-03 20:45:08 +00:00
Kevin Buettner
317cc67d75 * gdb-if.c (hw_breakpoints): Remove.
(sim_store_register): Add an assert() to make sure PC is in range.
	Delete code which referenced hw_breakpoints[].
2013-08-08 00:10:01 +00:00
Tom Tromey
d6c2da5446 move version.in from gdb/common back to gdb
This reverts part of the earlier version.in change.  It moves
version.in back to the gdb directory.  This works around the CVS bug
we've found.

gdb
	* Makefile.in (version.c): Use version.in, not
	common/version.in.
	* common/create-version.sh: Likewise.
	* common/version.in: Move...
	* version.in: ...here.
gdb/doc
	* Makefile.in (version.subst): Use version.in, not
	common/version.in.
	* gdbint.texinfo (Versions and Branches, Releasing GDB):
	Likewise.
gdb/gdbserver
	* Makefile.in (version.c): Use version.in, not
	common/version.in.
sim/common
	* Make-common.in (version.c): Use version.in, not
	common/version.in.
	* create-version.sh: Likewise.
sim/ppc:
	* Make-common.in (version.c): Use version.in, not
	common/version.in.
2013-06-28 18:59:51 +00:00
Nick Clifton
7f77d948db * rx.c (SHIFT_OP): A shift by zero still sets the condition codes. 2013-06-28 07:19:44 +00:00
Tom Tromey
3cd8689bf6 * Makefile.in (dtbdir): Don't use gdb's version.in. 2013-06-26 15:55:59 +00:00
Joel Brobecker
b652c496ac Adapt sim to new version number & date locations.
This change is required now that gdb/version.in has been moved to
gdb/common/version.in and now that the date needs to be fetched
from bfd/version.h.

sim/common/ChangeLog:

        * create-version.sh: New script. Adapted from
        gdb/commong/create-version.sh.
        * Make-common.in (version.c): Update rule dependencies,
        and re-implement using create-version.sh.

sim/ppc/ChangeLog:

        * Makefile.in (srccom): New variable.
        (version.c): Update rule dependencies, and re-implement using
        sim/common/create-version.sh.
2013-06-24 23:41:35 +00:00
Mike Frysinger
48a9389710 sim: bfin: note missing parallel handling of SEARCH
The SEARCH insn is an oddball when it comes to parallel usage.  It places a
big limit on what other insns it can run in parallel with, but we don't
currently track the amount of state needed to verify this (since no other insn
really requires this).  Add a note for now in case we get around to it.
2013-06-24 02:06:32 +00:00
Mike Frysinger
03dccef1ab sim: bfin: handle invalid HLs encoding in dsp shift insns
For many of the 32bit dsp shift related insns, we were just ignoring the HLs
field.  The hardware does not though and will reject the insn if it's set
incorrectly.  Update the sim to match.
2013-06-24 02:03:03 +00:00
Mike Frysinger
19b7bc4bd8 sim: bfin: run-tests.sh: fix typo in usage exit 2013-06-24 01:59:10 +00:00
Mike Frysinger
7f5884f775 sim: bfin: se_all32bitopcodes: skip debug insns under the sim
Since the sim has a few fake debug insns that the hardware does not, we
need to check for those before attempting to run them.  Otherwise we'll
randomly trigger the sim debug asserts/aborts/halts insns.  On the
hardware, these are proper invalid insns, and the table catches that.
2013-06-24 01:52:33 +00:00
Mike Frysinger
531d5282c0 sim: bfin: speed up all insn testcases slightly
The main body of the "all insn" test is executed once per tested insn, and
we test millions of insns here.  Any shrinkage we can do in this loop will
speed things up nicely (since it's multiplied per tested insn).

To that end, simplify the end-of-table test into one less insn, and omit
the SSYNC when we build for the sim.  When we build to run on the hardware,
this insn matters, but the sim doesn't have write store buffers in the chip
that might get in the way (memory writes are atomic).
2013-06-24 01:44:55 +00:00
Mike Frysinger
88924e5fa2 sim: bfin: trim trailing whitespace 2013-06-23 06:23:54 +00:00
Nick Clifton
3346cfda88 * msp430: New Directory.
* configure.tgt: Add it.
	* configure: Regenerate.

	* gennltvals.sh: Add msp430 support.
	* nltvals.def: Regenerate.

	* Makefile.in: New.
	* aclocal.m4: Generate.
	* config.in: Generate.
	* configure.ac: New.
	* configure: Generate.
	* msp430-sim.c: New.
	* msp430-sim.h: New.
	* sim-main.h: New.
	* trace.c: New.
	* trace.h: New.
2013-06-21 10:59:14 +00:00
Mike Frysinger
f7f8a049bd sim: bfin: stricter insn decoding
We wrote a test case that tries every single 32bit opcode on the hardware
and compared it to the sim.  There were a bunch of places in the sim where
we weren't strict enough (requiring certain parts of the opcode be set) so
we were treating a lot of invalid opcodes as valid ones.  This sprinkles
out a lot additional checks in the dsp32alu class.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2013-06-19 03:12:26 +00:00
Mike Frysinger
b6857b1e6c sim: bfin: tweak run-tests for parallel usage 2013-06-17 04:58:56 +00:00
Mike Frysinger
9fb7353ff0 sim: bfin: add helpful info for generating test tables 2013-06-17 04:47:26 +00:00
Mike Frysinger
7a56db5f46 sim: bfin: drop RET[ENI] setup
Since these insns run in usermode, there should be no need to setup
RET[ENI] to safe values.  They won't be dereferenced, and any insn
that returns via them are valid only in supervisor mode.  Since this
is in the main exception code path, saving any insn at all is good
as it gets multiplied quickly (as in O(n^2) times).

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2013-06-17 04:45:54 +00:00
Mike Frysinger
7935c6b0d2 sim: bfin: add flush/HWERR todo 2013-06-17 04:43:22 +00:00
Mike Frysinger
b241c8905a sim: bfin: only regen linux-fixed-code.h in maintainer mode
Since many people don't have a Blackfin toolchain available, only try to
regenerate the header file when in maintainer mode.  This file rarely changes,
and when it does, we commit the generated output, so there's almost never a
need to run directly on an end system.
2013-06-10 02:25:35 +00:00
Mike Frysinger
31e6ad7d64 sim: use AM_MAINTAINER_MODE
I noticed the sim code is using an old implementation of the maintainer logic.
I cut it over to the new macro (like gdb has been doing).  In practice, it
makes no difference currently as nothing in the sim tree uses it, but I have a
follow up commit for the Blackfin tree that needs it.
2013-06-05 01:42:13 +00:00
Mike Frysinger
590919de6c sim: arm: add support for MOVW and MOVT instructions
From: Jayant R. Sonar <Jayant.Sonar@kpitcummins.com>

This patch adds simulator support for handling the armv7 instructions
'movw (immediate)' and 'movt'.

Compiler frequently use these instructions to load the 32bit addresses of
global variables, string pointers etc. into the general registers.

In absence of support of these instructions:
1. GDB run simulator fails to print even simple "hello world" string
   on console.
2. Loading of global variable addresses into the registers fail causing
   arithmetic operation failures.

Patch has been regression tested for arm-none-eabi (-march=armv7-a).
2013-05-15 17:49:44 +00:00
Nick Clifton
fd7b2a545d * v850.igen (LDSR): Accept but ignore a selID parameter. 2013-05-13 10:52:52 +00:00
Tom Tromey
d3685d60d6 gdb
Freddie Chopin  <freddie_chopin@op.pl>
	PR build/15414:
	* configure: Rebuild.
	* configure.ac (build_warnings): Do not use -Wformat-nonliteral
	with -Wno-format.
sim/common
	* acinclude.m4 (SIM_AC_OPTION_WARNINGS): Do not use
	-Wformat-nonliteral with -Wno-format.
sim/bfin
	* configure: Rebuild.
sim/cr16
	* configure: Rebuild.
sim/cris
	* configure: Rebuild.
sim/d10v
	* configure: Rebuild.
sim/igen
	* configure: Rebuild.
sim/m68hc11
	* configure: Rebuild.
sim/mips
	* configure: Rebuild.
sim/mn10300
	* configure: Rebuild.
sim/v850
	* configure: Rebuild.
2013-05-10 16:10:40 +00:00
Joel Brobecker
b21c850d8f Move ChangeLog entry from sim/ to sim/ppc/...
... where it belongs.
2013-05-06 10:26:41 +00:00
Hafiz Abid Qadeer
3fd5675a52 2013-05-03 Hafiz Abid Qadeer <abidh@codesourcery.com>
revert:
	2013-04-19  Nathan Froyd  <froydnj@codesourcery.com>
	* ppc-instructions (isel): New instruction.
2013-05-03 14:03:57 +00:00
Hafiz Abid Qadeer
8bf54274ec 2013-04-19 Nathan Froyd <froydnj@codesourcery.com>
* ppc-instructions (isel): New instruction.
2013-04-19 18:17:32 +00:00
Mike Frysinger
73e76d2003 sim: frv/m32r: back out hard failure when dv-sockser is not available
These sims have optional support for the dv-sockser model, so do not make
them hard failures.  The Makefile made it seem like they didn't actually
support things dynamically, but a further code dive into the source and
the Makefile shows that things work out.
2013-03-31 00:39:35 +00:00
Mike Frysinger
1517bd2742 sim: rewrite SIM_AC_OPTION_HARDWARE a bit to simplify things
There's no need to put the majority of the logic into the 3rd arg of the
AC_ARG_ENABLE.  Coupled with the lack of indentation, it makes it hard to
follow, error prone to update, and duplicates code (with the 4th arg).

So pull the logic out of the 3rd arg and outside of the AC_ARG_ENABLE
macro.  This allows us to gut the 4th arg entirely, merge with the code
that followed the macro, and fix bugs related to the new dv-sockser in
the process.

Hopefully building the various sims with the default sim-hardware
settings, as well as with explicit --{dis,en}able-sim-hardware flags,
should all just work now.
2013-03-26 18:00:04 +00:00
Joel Sherrill
256139f50b 2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
* configure.ac: Use $SIM_DV_SOCKSER_O.
	* configure: Regenerated.
2013-03-23 15:08:07 +00:00
Joel Sherrill
94c63d78f6 2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
* configure.ac: Fail if dv-sockser.o not available.
	Error when --disable-sim-hardware is specified.
	* configure: Regenerated.
2013-03-23 15:07:30 +00:00
Joel Sherrill
fb61c40add 2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
* configure.ac: Fail if dv-sockser.o not available.
	Error when --disable-sim-hardware is specified.
	* tconfig.in: Conditionalize use of dv_sockser_install.
	* configure: Regenerated.
	* config.in: Regenerated.
2013-03-23 15:06:59 +00:00
Joel Sherrill
3be3151681 2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
* configure.ac: Address use of dv-sockser.o.
	* tconfig.in: Conditionalize use of dv_sockser_install.
	* configure: Regenerated.
	* config.in: Regenerated.
2013-03-23 15:05:07 +00:00
Joel Sherrill
3fd38161b3 2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
* acinclude.m4: Add SIM_DV_SOCKSER_O which is empty  on hosts
	which do not support dv-sockser.o.  Add always as option to
	first argument to SIM_AC_OPTION_HARDWARE. Fail if hardware
	is always required to be enabled by simulator.
2013-03-23 15:03:01 +00:00
Steve Ellcey
3cb2ab1a46 gdb:
2013-03-15  Steve Ellcey  <sellcey@mips.com>

	* remote-sim.c (sim_command_completer): Make char arguments const.

include:


2013-03-15  Steve Ellcey  <sellcey@mips.com>

	* gdb/remote-sim.h (sim_command_completer): Make char arguments const.

sim:

2013-03-15  Steve Ellcey  <sellcey@mips.com>

	* arm/wrapper.c (sim_complete_command): Make char arguments const.
	* avr/interp.c (sim_complete_command): Ditto.
	* common/sim-options.c (sim_complete_command): Ditto.
	* cr16/interp.c (sim_complete_command): Ditto.
	* erc32/interf.c (sim_complete_command): Ditto.
	* m32c/gdb-if.c (sim_complete_command): Ditto.
	* microblaze/interp.c (sim_complete_command): Ditto.
	* ppc/sim_calls.c (sim_complete_command): Ditto.
	* rl78/gdb-if.c (sim_complete_command): Ditto.
	* rx/gdb-if.c (sim_complete_command): Ditto.
	* sh/interp.c (sim_complete_command): Ditto.
2013-03-15 17:53:44 +00:00
Joel Brobecker
7b7f7f41a8 Fix erc32 simulator out-of-tree build failure.
sim/erc32/ChangeLog:

        * Makefile.in: Include build directory in search path to find
        config.h
2013-03-14 23:33:57 +00:00
Nick Clifton
67d7515b0a * simops.c (v850_rotl): New function.
(v850_bins): New function.
	* simops.h: Add prototypes fir v850_rotl and v850_bins.
	* v850-dc: Add entries for V850e3v5.
	* v850.igen: Add support for v850e3v5.
	(ld.dw, st.dw, rotl, bins): New patterns.
2013-01-28 10:06:51 +00:00
Anthony Green
9c9e1b263d Remove debug output 2013-01-17 09:44:53 +00:00
Nick Clifton
04e65a62c6 * rx.c (decode_opcode): Handle RXO_satr. 2013-01-16 10:45:22 +00:00
Nick Clifton
853678261b * interp.c (sim_open): Add support for bfd_arch_v850_rh850
architecture type.  Add support for bfd_mach_v850e2 and
	bfd_mach_v850e2v3 machine numbers.
        * v850.igen (dbtrap): Add support for SIM_OPEN_DEBUG.
        (cmpf.d): Correct order of operands.
        (cmpf.s): Likewise.
        (trncf.dul): New pattern.
        (trncf.duw): New pattern.
        (trncf.sul): New pattern.
        (trncf.suw): New pattern.
        * v850-dc: Correct bitfield selection for TRNCF.SW and CVTF.SW.
2013-01-10 09:57:02 +00:00