2008-04-07 13:07:16 +00:00
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2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
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* config/tc-i386.c (parse_real_register): Return AVX register
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only if AVX is enabled.
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2008-04-07 02:55:08 +00:00
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2008-04-07 Kaz Kojima <kkojima@rr.iij4u.or.jp>
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PR gas/6043
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* config/tc-sh64.c (shmedia_md_pcrel_from_section): Use
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md_pcrel_from_section for BFD_RELOC_64 and BFD_RELOC_64_PCREL.
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2008-04-04 23:25:49 +00:00
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2008-04-04 Adrian Bunk <bunk@stusta.de>
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Bob Wilson <bob.wilson@acm.org>
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* config/tc-xtensa.c (xg_apply_fix_value): Check return code from
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call to decode_reloc.
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2008-04-04 16:34:23 +00:00
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2008-04-04 H.J. Lu <hongjiu.lu@intel.com>
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* NEWS: Mention XSAVE. Change CLMUL to PCLMUL.
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* config/tc-i386.c (cpu_arch): Add .pclmul.
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(md_show_usage): Replace clmul with pclmul.
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* doc/c-i386.texi: Likewise.
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binutils/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* dwarf.c (dwarf_regnames_i386): Add AVX registers.
(dwarf_regnames_x86_64): Likewise.
gas/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* NEWS: Mention AES, CLMUL, AVX/FMA and -msse2avx.
* doc/c-i386.texi: Add avx, aes, clmul and fma to -march=.
Document -msse2avx, .avx, .aes, .clmul and .fma.
* config/tc-i386.c (YMMWORD_MNEM_SUFFIX): New.
(vex_prefix): Likewise.
(sse2avx): Likewise.
(CPU_FLAGS_ARCH_MATCH): Likewise.
(CPU_FLAGS_64BIT_MATCH): Likewise.
(CPU_FLAGS_32BIT_MATCH): Likewise.
(CPU_FLAGS_PERFECT_MATCH): Likewise.
(regymm): Likewise.
(vex_imm4): Likewise.
(fits_in_imm4): Likewise.
(build_vex_prefix): Likewise.
(VEX_check_operands): Likewise.
(bad_implicit_operand): Likewise.
(OPTION_MSSE2AVX): Likewise.
(T_YMMWORD): Likewise.
(_i386_insn): Add vex.
(cpu_arch): Add .avx, .aes, .clmul and .fma.
(cpu_flags_match): Changed to take a pointer to const template.
Enable encoding SSE instructions with VEX prefix for -msse2avx.
(match_mem_size): Also check ymmword.
(operand_type_match): Clear ymmword.
(md_begin): Allow '_' in mnemonic.
(type_names): Add OPERAND_TYPE_VEX_IMM4.
(process_immext): Update assert.
(md_assemble): Don't call process_immext if sse2avx and immext
are true. Call build_vex_prefix if vex is true.
(parse_insn): Updated for cpu_flags_match.
(swap_operands): Handle 5 operands.
(match_template): Handle 5 operands. Updated for cpu_flags_match.
Check regymm. Call VEX_check_operands. Handle YMMWORD_MNEM_SUFFIX.
(process_suffix): Handle YMMWORD_MNEM_SUFFIX.
(check_byte_reg): Check regymm.
(process_operands): Duplicate the destination register for
-msse2avx if needed.
(build_modrm_byte): Updated for instructions with VEX encoding.
(output_insn): Output VEX prefix if needed.
(md_longopts): Add msse2avx.
(md_parse_option): Handle OPTION_MSSE2AVX.
(md_show_usage): Add avx, aes, clmul, fma and -msse2avx.
(intel_e09): Support YMMWORD.
(intel_e11): Likewise.
(intel_get_token): Likewise.
gas/testsuite/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run aes, aes-intel, x86-64-aes,
x86-64-aes-intel, avx, avx-intel, inval-avx, x86-64-avx,
x86-64-avx-intel and x86-64-inval-avx.
* gas/cfi/cfi-i386.s: Add tests for AVX register maps.
* gas/cfi/cfi-x86_64.s: Likewise.
* gas/i386/aes.d: New.
* gas/i386/aes.s: Likewise.
* gas/i386/aes-intel.d: Likewise.
* gas/i386/avx.d: Likewise.
* gas/i386/avx.s: Likewise.
* gas/i386/avx-intel.d: Likewise.
* gas/i386/clmul.d: Likewise.
* gas/i386/clmul-intel.d: Likewise.
* gas/i386/clmul.s: Likewise.
* gas/i386/i386.exp: Likewise.
* gas/i386/inval-avx.l: Likewise.
* gas/i386/inval-avx.s: Likewise.
* gas/i386/sse2avx.d: Likewise.
* gas/i386/sse2avx.s: Likewise.
* gas/i386/x86-64-aes.d: Likewise.
* gas/i386/x86-64-aes.s: Likewise.
* gas/i386/x86-64-aes-intel.d: Likewise.
* gas/i386/x86-64-avx.d: Likewise.
* gas/i386/x86-64-avx.s: Likewise.
* gas/i386/x86-64-avx-intel.d: Likewise.
* gas/i386/x86-64-clmul.d: Likewise.
* gas/i386/x86-64-clmul-intel.d: Likewise.
* gas/i386/x86-64-clmul.s: Likewise.
* gas/i386/x86-64-inval-avx.l: Likewise.
* gas/i386/x86-64-inval-avx.s: Likewise.
* gas/i386/x86-64-sse2avx.d: Likewise.
* gas/i386/x86-64-sse2avx.s: Likewise.
* gas/i386/arch-10.s: Add tests for AVX, AES, CLMUL and FMA.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/rexw.s: Add AVX tests.
* gas/i386/x86-64-opcode-inval.s: Remove lds/les test.
* gas/cfi/cfi-i386.d: Updated.
* gas/cfi/cfi-x86_64.d: Likewise.
* gas/i386/arch-10.d: Likewise.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/rexw.d: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
* gas/i386/x86-64-opcode-inval.d: Likewise.
* gas/i386/x86-64-opcode-inval-intel.d: Likewise.
include/opcode/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (MAX_OPERANDS): Set to 5.
(MAX_MNEM_SIZE): Changed to 20.
opcodes/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (OP_E_register): New.
(OP_E_memory): Likewise.
(OP_VEX): Likewise.
(OP_EX_Vex): Likewise.
(OP_EX_VexW): Likewise.
(OP_XMM_Vex): Likewise.
(OP_XMM_VexW): Likewise.
(OP_REG_VexI4): Likewise.
(PCLMUL_Fixup): Likewise.
(VEXI4_Fixup): Likewise.
(VZERO_Fixup): Likewise.
(VCMP_Fixup): Likewise.
(VPERMIL2_Fixup): Likewise.
(rex_original): Likewise.
(rex_ignored): Likewise.
(Mxmm): Likewise.
(XMM): Likewise.
(EXxmm): Likewise.
(EXxmmq): Likewise.
(EXymmq): Likewise.
(Vex): Likewise.
(Vex128): Likewise.
(Vex256): Likewise.
(VexI4): Likewise.
(EXdVex): Likewise.
(EXqVex): Likewise.
(EXVexW): Likewise.
(EXdVexW): Likewise.
(EXqVexW): Likewise.
(XMVex): Likewise.
(XMVexW): Likewise.
(XMVexI4): Likewise.
(PCLMUL): Likewise.
(VZERO): Likewise.
(VCMP): Likewise.
(VPERMIL2): Likewise.
(xmm_mode): Likewise.
(xmmq_mode): Likewise.
(ymmq_mode): Likewise.
(vex_mode): Likewise.
(vex128_mode): Likewise.
(vex256_mode): Likewise.
(USE_VEX_C4_TABLE): Likewise.
(USE_VEX_C5_TABLE): Likewise.
(USE_VEX_LEN_TABLE): Likewise.
(VEX_C4_TABLE): Likewise.
(VEX_C5_TABLE): Likewise.
(VEX_LEN_TABLE): Likewise.
(REG_VEX_XX): Likewise.
(MOD_VEX_XXX): Likewise.
(PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
(PREFIX_0F3A44): Likewise.
(PREFIX_0F3ADF): Likewise.
(PREFIX_VEX_XXX): Likewise.
(VEX_OF): Likewise.
(VEX_OF38): Likewise.
(VEX_OF3A): Likewise.
(VEX_LEN_XXX): Likewise.
(vex): Likewise.
(need_vex): Likewise.
(need_vex_reg): Likewise.
(vex_i4_done): Likewise.
(vex_table): Likewise.
(vex_len_table): Likewise.
(OP_REG_VexI4): Likewise.
(vex_cmp_op): Likewise.
(pclmul_op): Likewise.
(vpermil2_op): Likewise.
(m_mode): Updated.
(es_reg): Likewise.
(PREFIX_0F38F0): Likewise.
(PREFIX_0F3A60): Likewise.
(reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
(prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
and PREFIX_VEX_XXX entries.
(x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
(three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
PREFIX_0F3ADF.
(mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
Add MOD_VEX_XXX entries.
(ckprefix): Initialize rex_original and rex_ignored. Store the
REX byte in rex_original.
(get_valid_dis386): Handle the implicit prefix in VEX prefix
bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
(print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
calling get_valid_dis386. Use rex_original and rex_ignored when
printing out REX.
(putop): Handle "XY".
(intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
ymmq_mode.
(OP_E_extended): Updated to use OP_E_register and
OP_E_memory.
(OP_XMM): Handle VEX.
(OP_EX): Likewise.
(XMM_Fixup): Likewise.
(CMP_Fixup): Use ARRAY_SIZE.
* i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
CPU_FMA_FLAGS and CPU_AVX_FLAGS.
(operand_type_init): Add OPERAND_TYPE_REGYMM and
OPERAND_TYPE_VEX_IMM4.
(cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
(opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
VexImmExt and SSE2AVX.
(operand_types): Add RegYMM, Ymmword and Vex_Imm4.
* i386-opc.h (CpuAVX): New.
(CpuAES): Likewise.
(CpuCLMUL): Likewise.
(CpuFMA): Likewise.
(Vex): Likewise.
(Vex256): Likewise.
(VexNDS): Likewise.
(VexNDD): Likewise.
(VexW0): Likewise.
(VexW1): Likewise.
(Vex0F): Likewise.
(Vex0F38): Likewise.
(Vex0F3A): Likewise.
(Vex3Sources): Likewise.
(VexImmExt): Likewise.
(SSE2AVX): Likewise.
(RegYMM): Likewise.
(Ymmword): Likewise.
(Vex_Imm4): Likewise.
(Implicit1stXmm0): Likewise.
(CpuXsave): Updated.
(CpuLM): Likewise.
(ByteOkIntel): Likewise.
(OldGcc): Likewise.
(Control): Likewise.
(Unspecified): Likewise.
(OTMax): Likewise.
(i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
(i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
vex3sources, veximmext and sse2avx.
(i386_operand_type): Add regymm, ymmword and vex_imm4.
* i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
* i386-reg.tbl: Add AVX registers, ymm0..ymm15.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-04-03 14:03:21 +00:00
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2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
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* NEWS: Mention AES, CLMUL, AVX/FMA and -msse2avx.
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* doc/c-i386.texi: Add avx, aes, clmul and fma to -march=.
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Document -msse2avx, .avx, .aes, .clmul and .fma.
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* config/tc-i386.c (YMMWORD_MNEM_SUFFIX): New.
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(vex_prefix): Likewise.
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(sse2avx): Likewise.
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(CPU_FLAGS_ARCH_MATCH): Likewise.
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(CPU_FLAGS_64BIT_MATCH): Likewise.
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(CPU_FLAGS_32BIT_MATCH): Likewise.
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(CPU_FLAGS_PERFECT_MATCH): Likewise.
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(regymm): Likewise.
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(vex_imm4): Likewise.
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(fits_in_imm4): Likewise.
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(build_vex_prefix): Likewise.
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(VEX_check_operands): Likewise.
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(bad_implicit_operand): Likewise.
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(OPTION_MSSE2AVX): Likewise.
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(T_YMMWORD): Likewise.
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(_i386_insn): Add vex.
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(cpu_arch): Add .avx, .aes, .clmul and .fma.
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(cpu_flags_match): Changed to take a pointer to const template.
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Enable encoding SSE instructions with VEX prefix for -msse2avx.
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(match_mem_size): Also check ymmword.
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(operand_type_match): Clear ymmword.
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(md_begin): Allow '_' in mnemonic.
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(type_names): Add OPERAND_TYPE_VEX_IMM4.
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(process_immext): Update assert.
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(md_assemble): Don't call process_immext if sse2avx and immext
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are true. Call build_vex_prefix if vex is true.
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(parse_insn): Updated for cpu_flags_match.
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(swap_operands): Handle 5 operands.
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(match_template): Handle 5 operands. Updated for cpu_flags_match.
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Check regymm. Call VEX_check_operands. Handle YMMWORD_MNEM_SUFFIX.
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(process_suffix): Handle YMMWORD_MNEM_SUFFIX.
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(check_byte_reg): Check regymm.
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(process_operands): Duplicate the destination register for
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-msse2avx if needed.
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(build_modrm_byte): Updated for instructions with VEX encoding.
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(output_insn): Output VEX prefix if needed.
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(md_longopts): Add msse2avx.
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(md_parse_option): Handle OPTION_MSSE2AVX.
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(md_show_usage): Add avx, aes, clmul, fma and -msse2avx.
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(intel_e09): Support YMMWORD.
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(intel_e11): Likewise.
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(intel_get_token): Likewise.
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2008-03-28 21:51:38 +00:00
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2008-03-28 Eric B. Weddington <eric.weddington@atmel.com>
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* config/tc-avr.c (mcu_types): Add attiny167.
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* doc/c-avr.texi: Likewise.
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2008-03-28 21:04:22 +00:00
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2008-03-28 Eric B. Weddington <eric.weddington@atmel.com>
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* config/tc-avr.c (mcu_types): Add atmega32u4.
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* doc/c-avr.texi: Likewise.
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2008-03-28 19:24:52 +00:00
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2008-03-28 Eric B. Weddington <eric.weddington@atmel.com>
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* config/tc-avr.c (mcu_types): Add atmega32c1.
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* doc/c-avr.texi: Likewise.
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2008-03-28 18:13:52 +00:00
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2008-03-28 Paul Brook <paul@codesourcery.com>
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* config/tc-arm.c (parse_neon_mov): Parse register before immediate
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to avoid spurious symbols.
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2008-03-28 09:51:13 +00:00
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2008-03-28 Nathan Sidwell <nathan@codesourcery.com>
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* config/tc-m68k.c (md_convert_frag_1): Replace as_fatal with
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as_bad_where.
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2008-03-27 14:52:35 +00:00
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2008-03-27 Eric B. Weddington <eric.weddington@atmel.com>
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* config/tc-avr.c (mcu_types): Add atmega32m1.
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* doc/c-avr.texi: Likewise.
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2008-03-27 14:12:15 +00:00
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2008-03-27 Ineiev <ineiev@yahoo.co.uk>
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* config/tc-arm.c (do_neon_cvt): Move variable declarations to
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start of block.
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(do_neon_ext): Fix sign of comparison.
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2008-03-26 15:18:42 +00:00
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2008-03-26 Bernd Schmidt <bernd.schmidt@analog.com>
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From Jie Zhang <jie.zhang@analog.com>
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* config/bfin-parse.y (asm_1): Check AREGS in comparison
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2008-03-26 15:58:27 +00:00
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instructions. And call yyerror when comparing PREG with
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2008-03-26 15:18:42 +00:00
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DREG.
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2008-03-26 15:58:27 +00:00
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(check_macfunc_option): New.
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2008-03-28 18:13:52 +00:00
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(check_macfuncs): Check option by calling check_macfunc_option.
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2008-03-26 15:58:27 +00:00
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Fix comparison always true warnings. Both scalar instructions
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of vector instruction must share the same mode option. Only allow
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option mode at the end of the second instruction of the vector.
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2008-03-28 18:13:52 +00:00
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(asm_1): Check option by calling check_macfunc_option.
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2008-03-26 15:18:42 +00:00
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2008-03-26 16:21:10 +00:00
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* config/bfin-parse.y (check_macfunc_option): Allow (IU)
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option for multiply and multiply-accumulate to data register
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2008-03-28 18:13:52 +00:00
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instruction.
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2008-03-26 16:21:10 +00:00
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(check_macfuncs): Don't check if accumulator matches the data register
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here.
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(assign_macfunc): Check if accumulator matches the
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data register in each rule that moves to the data
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register.
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2008-03-26 16:33:33 +00:00
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* config/tc-bfin.c (bfin_start_line_hook): Localize the labels
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generated for LOOP_BEGIN and LOOP_END instructions.
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(bfin_gen_loop): Likewise.
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2008-03-19 Andreas Krebbel <krebbel1@de.ibm.com>
* opcodes/s390-mkopc.c (s390_opcode_cpu_val): S390_OPCODE_Z10 added.
(s390_cond_extensions): Reduced extensions to the compare related.
(main): z10 cpu type option added.
(expandConditionalJump): Renamed to ...
(insertExpandedMnemonic): ... this.
* opcodes/s390-opc.c: Re-group the operand format makros.
(INSTR_RIE_RRPU, INSTR_RIE_RRP0, INSTR_RIE_RUPI,
INSTR_RIE_R0PI, INSTR_RIE_RUPU, INSTR_RIE_R0PU, INSTR_RIE_R0IU,
INSTR_RIE_R0I0, INSTR_RIE_R0UU, INSTR_RIE_R0U0,
INSTR_RIE_RRUUU, INSTR_RIS_RURDI, INSTR_RIS_R0RDI, INSTR_RIS_RURDU,
INSTR_RIS_R0RDU, INSTR_RRF_U0RR, INSTR_RRF_00RR, INSTR_RRS_RRRDU,
INSTR_RRS_RRRD0, INSTR_RXY_URRD, INSTR_SIY_IRD, INSTR_SIL_RDI,
INSTR_SIL_RDU): New instruction formats added.
(MASK_RIE_RRPU, MASK_RIE_RRP0, MASK_RIE_RUPI, MASK_RIE_R0PI,
MASK_RIE_RUPU, MASK_RIE_R0PU, MASK_RIE_R0IU, MASK_RIE_R0I0,
MASK_RIE_R0UU, MASK_RIE_R0U0, MASK_RIE_RRUUU, MASK_RIS_RURDI,
MASK_RIS_R0RDI, MASK_RIS_RURDU, MASK_RIS_R0RDU, MASK_RRF_U0RR,
MASK_RRF_00RR, MASK_RRS_RRRDU, MASK_RRS_RRRD0, MASK_RXY_URRD,
MASK_SIY_IRD, MASK_SIL_RDI, MASK_SIL_RDU): New instruction format
masks added.
(s390_opformats): New formats added "ris", "rrs", "sil".
* opcodes/s390-opc.txt: Add the conditional jumps with the
extensions removed from automatic expansion in s390-mkopc.c manually.
(asi - trtre): Add new System z10 EC instructions.
* include/opcode/s390.h (s390_opcode_cpu_val): S390_OPCODE_Z10 added.
2008-03-19 Andreas Krebbel <krebbel1@de.ibm.com>
* config/tc-s390.c (md_parse_option): z10 option added.
2008-03-19 Andreas Krebbel <krebbel1@de.ibm.com>
* gas/s390/zarch-z10.d: New file.
* gas/s390/zarch-z10.s: New file.
* gas/s390/s390.exp: Run the z10 testcases.
2008-03-19 10:29:18 +00:00
|
|
|
|
2008-03-19 Andreas Krebbel <krebbel1@de.ibm.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-s390.c (md_parse_option): z10 option added.
|
|
|
|
|
|
2008-03-17 22:17:33 +00:00
|
|
|
|
2008-03-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
|
|
|
|
|
|
|
|
|
|
* aclocal.m4: Regenerate.
|
|
|
|
|
* configure: Likewise.
|
|
|
|
|
* Makefile.in: Likewise.
|
|
|
|
|
* doc/Makefile.in: Likewise.
|
|
|
|
|
|
2008-03-16 23:16:03 +00:00
|
|
|
|
2008-03-17 Adrian Bunk <bunk@stusta.de>
|
|
|
|
|
|
|
|
|
|
PR 5946
|
|
|
|
|
* config/tc-hppa.c (is_same_frag): Delete.
|
|
|
|
|
|
2008-03-14 20:17:39 +00:00
|
|
|
|
2008-03-14 Sterling Augustine <sterling@tensilica.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-xtensa.h (xtensa_relax_statesE): Update comment for
|
|
|
|
|
RELAX_LOOP_END_ADD_NOP.
|
|
|
|
|
|
2008-03-13 10:51:33 +00:00
|
|
|
|
2008-03-13 Evandro Menezes <evandro@yahoo.com>
|
|
|
|
|
|
|
|
|
|
PR gas/5895
|
|
|
|
|
* read.c (s_mexit): Warn if attempting to exit a macro when not
|
|
|
|
|
inside a macro definition.
|
|
|
|
|
|
2008-03-13 02:05:23 +00:00
|
|
|
|
2008-03-13 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
* Makefile.am: Run "make dep-am".
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
* configure: Regenerate.
|
|
|
|
|
|
2008-03-09 15:20:31 +00:00
|
|
|
|
2008-03-09 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (arm_cpu_option_table): Add cortex-a9.
|
|
|
|
|
* doc/c-arm.texi: Add cortex-a9.
|
|
|
|
|
|
2008-03-09 13:23:29 +00:00
|
|
|
|
2008-03-09 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (fpu_vfp_ext_d32): New vairable.
|
|
|
|
|
(parse_vfp_reg_list, encode_arm_vfp_reg): Use it.
|
|
|
|
|
(arm_option_cpu_value): Add vfpv3-d16, vfpv2 and vfpv3.
|
|
|
|
|
(aeabi_set_public_attributes): Handle Tag_VFP_arch=VFPV3-D16.
|
|
|
|
|
* doc/c-arm.texi: Document new ARM FPU variants.
|
|
|
|
|
|
2008-03-08 01:20:39 +00:00
|
|
|
|
2008-03-07 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (md_apply_fix): Use correct offset range.
|
|
|
|
|
|
2008-03-06 23:01:00 +00:00
|
|
|
|
2008-03-07 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
* config/tc-ppc.c (ppc_setup_opcodes): Tidy. Add code to test
|
|
|
|
|
for strict ordering of powerpc_opcodes, but disable for now.
|
|
|
|
|
|
2008-03-05 01:31:26 +00:00
|
|
|
|
2008-03-04 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (arm_ext_barrier, arm_ext_msr): New.
|
|
|
|
|
(arm_ext_v7m): Rename...
|
|
|
|
|
(arm_ext_m): ... to this. Include v6-M.
|
|
|
|
|
(do_t_add_sub): Allow narrow low-reg non flag setting adds.
|
|
|
|
|
(do_t_mrs, do_t_msr, aeabi_set_public_attributes): Use arm_ext_m.
|
|
|
|
|
(md_assemble): Allow wide msr instructions.
|
|
|
|
|
(insns): Add classifications for v6-m instructions.
|
|
|
|
|
(arm_cpu_option_table): Add cortex-m1.
|
|
|
|
|
(arm_arch_option_table): Add armv6-m.
|
|
|
|
|
(cpu_arch): Add ARM_ARCH_V6M. Fix numbering of other v6 variants.
|
|
|
|
|
|
2008-03-03 23:23:41 +00:00
|
|
|
|
2008-03-03 Sterling Augustine <sterling@tensilica.com>
|
|
|
|
|
Bob Wilson <bob.wilson@acm.org>
|
|
|
|
|
|
|
|
|
|
* config/tc-xtensa.c (xtensa_num_pipe_stages): New.
|
|
|
|
|
(md_begin): Initialize it.
|
|
|
|
|
(resources_conflict): Use it.
|
|
|
|
|
|
2008-03-03 22:14:45 +00:00
|
|
|
|
2008-03-03 Sterling Augustine <sterling@tensilica.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-xtensa.h (RELAX_XTENSA_NONE): New.
|
|
|
|
|
|
2008-03-03 15:28:58 +00:00
|
|
|
|
2008-03-03 Denys Vlasenko <vda.linux@googlemail.com>
|
|
|
|
|
H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
PR gas/5543
|
|
|
|
|
* read.c (pseudo_set): Don't allow global register symbol.
|
|
|
|
|
|
|
|
|
|
* symbols.c (S_SET_EXTERNAL): Don't allow register symbol
|
|
|
|
|
global.
|
|
|
|
|
|
|
|
|
|
2008-03-03 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
PR gas/5543
|
|
|
|
|
* write.c (write_object_file): Don't allow symbols which were
|
|
|
|
|
equated to register. Stop if there is an error.
|
|
|
|
|
|
2008-03-01 07:24:47 +00:00
|
|
|
|
2008-03-01 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
* config/tc-ppc.h (struct _ppc_fix_extra): New.
|
|
|
|
|
(ppc_cpu): Declare.
|
|
|
|
|
(TC_FIX_TYPE, TC_INIT_FIX_DATA): Define.
|
|
|
|
|
* config/tc-ppc.c (ppu_cpu): Make global.
|
|
|
|
|
(ppc_insert_operand): Add ppu_cpu parameter.
|
|
|
|
|
(md_assemble): Adjust for above change.
|
|
|
|
|
(md_apply_fix): Pass tc_fix_data.ppc_cpu to ppc_insert_operand.
|
|
|
|
|
|
2008-02-22 15:14:44 +00:00
|
|
|
|
2008-02-22 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (do_bx): Only test EF_ARM_EABI_VERSION on ELF
|
2008-02-22 16:47:01 +00:00
|
|
|
|
targeted ARM ports, otherwise just skip generating the reloc.
|
2008-02-22 15:14:44 +00:00
|
|
|
|
|
2008-02-18 18:52:46 +00:00
|
|
|
|
2008-02-18 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
* doc/c-i386.texi: Update -march= and .arch.
|
|
|
|
|
|
2008-02-18 10:03:06 +00:00
|
|
|
|
2008-02-18 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-mn10300.c (has_known_symbol_location): New function.
|
|
|
|
|
Do not regard weak symbols as having a known location.
|
|
|
|
|
(md_estimate_size_before_relax): Use new function.
|
|
|
|
|
(md_pcrel_from): Do not compute a pcrel against a weak symbol.
|
|
|
|
|
|
2008-02-18 08:44:38 +00:00
|
|
|
|
2008-02-18 Jan Beulich <jbeulich@novell.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (match_template): Disallow 'l' suffix when
|
|
|
|
|
currently selected CPU has no 32-bit support.
|
|
|
|
|
(parse_real_register): Do not return registers not available on
|
|
|
|
|
currently selected CPU.
|
|
|
|
|
|
2008-02-17 00:26:19 +00:00
|
|
|
|
2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (process_immext): Fix format.
|
|
|
|
|
|
2008-02-16 16:16:48 +00:00
|
|
|
|
2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (inoutportreg): New.
|
|
|
|
|
(process_immext): New.
|
|
|
|
|
(md_assemble): Use it.
|
|
|
|
|
(update_imm): Use imm16 and imm32s.
|
|
|
|
|
(i386_att_operand): Use inoutportreg.
|
|
|
|
|
|
2008-02-14 22:54:02 +00:00
|
|
|
|
2008-02-14 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (operand_type_all_zero): New.
|
|
|
|
|
(operand_type_set): Likewise.
|
|
|
|
|
(operand_type_equal): Likewise.
|
|
|
|
|
(cpu_flags_all_zero): Likewise.
|
|
|
|
|
(cpu_flags_set): Likewise.
|
|
|
|
|
(cpu_flags_equal): Likewise.
|
|
|
|
|
(UINTS_ALL_ZERO): Removed.
|
|
|
|
|
(UINTS_SET): Likewise.
|
|
|
|
|
(UINTS_CLEAR): Likewise.
|
|
|
|
|
(UINTS_EQUAL): Likewise.
|
|
|
|
|
(cpu_flags_match): Updated.
|
|
|
|
|
(smallest_imm_type): Likewise.
|
|
|
|
|
(set_cpu_arch): Likewise.
|
|
|
|
|
(md_assemble): Likewise.
|
|
|
|
|
(optimize_imm): Likewise.
|
|
|
|
|
(match_template): Likewise.
|
|
|
|
|
(process_suffix): Likewise.
|
|
|
|
|
(update_imm): Likewise.
|
|
|
|
|
(process_drex): Likewise.
|
|
|
|
|
(process_operands): Likewise.
|
|
|
|
|
(build_modrm_byte): Likewise.
|
|
|
|
|
(i386_immediate): Likewise.
|
|
|
|
|
(i386_displacement): Likewise.
|
|
|
|
|
(i386_att_operand): Likewise.
|
|
|
|
|
(parse_real_register): Likewise.
|
|
|
|
|
(md_parse_option): Likewise.
|
|
|
|
|
(i386_target_format): Likewise.
|
|
|
|
|
|
2008-02-14 16:35:51 +00:00
|
|
|
|
2008-02-14 Dimitry Andric <dimitry@andric.com>
|
|
|
|
|
|
|
|
|
|
PR gas/5712
|
|
|
|
|
* config/tc-arm.c (s_arm_unwind_save): Advance the input line
|
|
|
|
|
pointer past the comma after parsing a floating point register
|
|
|
|
|
name.
|
|
|
|
|
|
2008-02-14 13:04:29 +00:00
|
|
|
|
2008-02-14 Hakan Ardo <hakan@debian.org>
|
|
|
|
|
|
|
|
|
|
PR gas/2626
|
|
|
|
|
* config/tc-avr.c (mcu_types): Change the ISA tyoe of the attiny26
|
|
|
|
|
to AVR_ISA_2xxe.
|
|
|
|
|
(avr_operand): Disallow post-increment addressing in the lpm
|
|
|
|
|
instruction for the attiny26.
|
|
|
|
|
|
2008-02-13 13:41:26 +00:00
|
|
|
|
2008-02-13 Jan Beulich <jbeulich@novell.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (parse_real_register): Don't return 'FLAT'
|
|
|
|
|
if not in Intel mode.
|
|
|
|
|
(i386_intel_operand): Ignore segment overrides in immediate and
|
|
|
|
|
offset operands.
|
|
|
|
|
(intel_e11): Range-check i.mem_operands before use as array
|
|
|
|
|
index. Filter out FLAT for uses other than as segment override.
|
|
|
|
|
(intel_get_token): Remove broken promotion of "FLAT:" to mean
|
|
|
|
|
"offset FLAT:".
|
|
|
|
|
|
2008-02-13 13:29:31 +00:00
|
|
|
|
2008-02-13 Jan Beulich <jbeulich@novell.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (intel_e09): Also special-case 'bound'.
|
|
|
|
|
|
2008-02-13 10:14:40 +00:00
|
|
|
|
2008-02-13 Jan Beulich <jbeulich@novell.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (allow_pseudo_reg): New.
|
|
|
|
|
(parse_real_register): Check for NULL just once. Allow all
|
|
|
|
|
register table entries when allow_pseudo_reg is non-zero.
|
|
|
|
|
Don't allow any registers without type when allow_pseudo_reg
|
|
|
|
|
is zero.
|
|
|
|
|
(tc_x86_regname_to_dw2regnum): Replace with ...
|
|
|
|
|
(tc_x86_parse_to_dw2regnum): ... this.
|
|
|
|
|
(tc_x86_frame_initial_instructions): Adjust for above change.
|
|
|
|
|
* config/tc-i386.h (tc_regname_to_dw2regnum): Remove.
|
|
|
|
|
(tc_parse_to_dw2regnum): New.
|
|
|
|
|
(tc_x86_regname_to_dw2regnum): Replace with ...
|
|
|
|
|
(tc_x86_parse_to_dw2regnum): ... this.
|
|
|
|
|
* dw2gencfi.c (tc_parse_to_dw2regnum): New, broken out of ...
|
|
|
|
|
(cfi_parse_reg): ... this. Use tc_parse_to_dw2regnum. Adjust
|
|
|
|
|
error handling.
|
|
|
|
|
|
2008-02-12 08:37:08 +00:00
|
|
|
|
2008-02-12 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-tic4x.c (tic4x_insn_insert): Add const qualifier to
|
|
|
|
|
argument.
|
|
|
|
|
(tic4x_insn_add): Likewise.
|
|
|
|
|
(md_begin): Drop cast that was discarding a const qualifier.
|
|
|
|
|
* config/tc-d30v.c (get_reloc): Add const qualifier to op
|
|
|
|
|
argument.
|
|
|
|
|
(build_insn): Drop cast that was discarding a const qualifier.
|
|
|
|
|
|
2008-02-12 05:35:36 +00:00
|
|
|
|
2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (cpu_arch): Add .xsave.
|
|
|
|
|
(md_show_usage): Add .xsave.
|
|
|
|
|
|
|
|
|
|
* doc/c-i386.texi: Add xsave to -march=.
|
|
|
|
|
|
2008-02-07 08:40:29 +00:00
|
|
|
|
2008-02-07 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
* read.c (s_weakref): Don't pass unadorned NULL to concat.
|
|
|
|
|
* config/tc-i386.c (set_cpu_arch, md_parse_option): Likewise.
|
|
|
|
|
|
2008-02-05 19:39:08 +00:00
|
|
|
|
2008-02-05 Sterling Augustine <sterling@tensilica.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-xtensa.c (relax_frag_immed): Change internal consistency
|
|
|
|
|
checks into assertions. When relaxation produces an operation that
|
|
|
|
|
does not fit in the current FLIX instruction, make sure that the
|
|
|
|
|
operation is relaxed as needed to account for being placed following
|
|
|
|
|
the current instruction.
|
|
|
|
|
|
2008-02-04 19:43:51 +00:00
|
|
|
|
2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
PR 5715
|
|
|
|
|
* configure: Regenerated.
|
|
|
|
|
|
2008-02-04 19:20:16 +00:00
|
|
|
|
2008-02-04 Adam Nemet <anemet@caviumnetworks.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (mips_cpu_info_table): Add Octeon.
|
|
|
|
|
|
2008-02-01 17:58:48 +00:00
|
|
|
|
2008-01-31 Marc Gauthier <marc@tensilica.com>
|
|
|
|
|
|
|
|
|
|
* configure.tgt (xtensa*-*-*): Recognize processor variants.
|
|
|
|
|
|
2008-01-25 16:18:41 +00:00
|
|
|
|
2008-01-25 Kai Tietz <kai.tietz@onevision.com>
|
|
|
|
|
|
|
|
|
|
* read.c: (emit_expr): Correct for mingw use of printf size
|
|
|
|
|
specifier.
|
|
|
|
|
|
2008-01-25 01:08:34 +00:00
|
|
|
|
2008-01-24 Bob Wilson <bob.wilson@acm.org>
|
|
|
|
|
|
|
|
|
|
* doc/c-xtensa.texi (Xtensa Syntax): Clarify handling of opcodes that
|
|
|
|
|
can only be encoded in FLIX instructions but are not specified as such.
|
|
|
|
|
(Xtensa Automatic Alignment): Remove obsolete comment about debugging
|
|
|
|
|
labels.
|
|
|
|
|
|
2008-01-24 22:44:37 +00:00
|
|
|
|
2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
* NEWS: Mention new command line options for x86 targets.
|
|
|
|
|
|
2008-01-23 19:05:12 +00:00
|
|
|
|
2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (md_show_usage): Replace tabs with spaces.
|
|
|
|
|
|
2008-01-23 17:36:23 +00:00
|
|
|
|
2008-01-23 Eric B. Weddington <eric.weddington@atmel.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-avr.c (mcu_types): Change opcode set for at86rf401.
|
|
|
|
|
|
2008-01-23 14:13:08 +00:00
|
|
|
|
2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (md_show_usage): Show more processors for
|
|
|
|
|
-march=/-mtune=.
|
|
|
|
|
|
2008-01-22 19:57:30 +00:00
|
|
|
|
2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (i386_target_format): Remove cpummx2.
|
|
|
|
|
|
2008-01-22 19:16:45 +00:00
|
|
|
|
2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (XXX_PREFIX): Moved from tc-i386.h.
|
|
|
|
|
(XXX_MNEM_SUFFIX): Likewise.
|
|
|
|
|
(END_OF_INSN): Likewise.
|
|
|
|
|
(templates): Likewise.
|
|
|
|
|
(modrm_byte): Likewise.
|
|
|
|
|
(rex_byte): Likewise.
|
|
|
|
|
(DREX_XXX): Likewise.
|
|
|
|
|
(drex_byte): Likewise.
|
|
|
|
|
(sib_byte): Likewise.
|
|
|
|
|
(processor_type): Likewise.
|
|
|
|
|
(arch_entry): Likewise.
|
|
|
|
|
(cpu_sub_arch_name): Remove const.
|
|
|
|
|
(cpu_arch): Add .vmx and .smx.
|
|
|
|
|
(set_cpu_arch): Append cpu_sub_arch_name.
|
|
|
|
|
(md_parse_option): Support -march=CPU[,+EXTENSION...].
|
|
|
|
|
(md_show_usage): Updated.
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.h (XXX_PREFIX): Moved to tc-i386.c.
|
|
|
|
|
(XXX_MNEM_SUFFIX): Likewise.
|
|
|
|
|
(END_OF_INSN): Likewise.
|
|
|
|
|
(templates): Likewise.
|
|
|
|
|
(modrm_byte): Likewise.
|
|
|
|
|
(rex_byte): Likewise.
|
|
|
|
|
(DREX_XXX): Likewise.
|
|
|
|
|
(drex_byte): Likewise.
|
|
|
|
|
(sib_byte): Likewise.
|
|
|
|
|
(processor_type): Likewise.
|
|
|
|
|
(arch_entry): Likewise.
|
|
|
|
|
|
|
|
|
|
* doc/as.texinfo: Update i386 -march option.
|
|
|
|
|
|
|
|
|
|
* doc/c-i386.texi: Update -march= for ISA.
|
|
|
|
|
|
2008-01-18 19:13:48 +00:00
|
|
|
|
2008-01-18 Bob Wilson <bob.wilson@acm.org>
|
|
|
|
|
|
|
|
|
|
* config/tc-xtensa.c (xtensa_leb128): New function.
|
|
|
|
|
(md_pseudo_table): Use it for sleb128 and uleb128.
|
|
|
|
|
(is_leb128_expr): New internal flag.
|
|
|
|
|
(xtensa_symbol_new_hook): Check new flag.
|
|
|
|
|
|
2008-01-16 17:59:07 +00:00
|
|
|
|
2008-01-16 Eric B. Weddington <eric.weddington@atmel.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-avr.c (mcu_types): Change opcode set for avr3,
|
|
|
|
|
at90usb82, at90usb162.
|
|
|
|
|
* doc/c-avr.texi: Change architecture grouping for at90usb82,
|
|
|
|
|
at90usb162.
|
|
|
|
|
These changes support the new avr35 architecture group in gcc.
|
|
|
|
|
|
2008-01-15 18:50:44 +00:00
|
|
|
|
2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (md_assemble): Also zap movzx and movsx
|
|
|
|
|
suffix for AT&T syntax.
|
|
|
|
|
|
2008-01-15 01:37:56 +00:00
|
|
|
|
2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (match_reg_size): New.
|
|
|
|
|
(match_mem_size): Likewise.
|
|
|
|
|
(operand_size_match): Likewise.
|
|
|
|
|
(operand_type_match): Also clear all size fields.
|
|
|
|
|
(match_template): Skip Intel syntax when in AT&T syntax.
|
|
|
|
|
Call operand_size_match to check operand size.
|
|
|
|
|
(i386_att_operand): Set the mem field to 1 for memory
|
|
|
|
|
operand.
|
|
|
|
|
(i386_intel_operand): Likewise.
|
|
|
|
|
|
gas/testsuite/
2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* gas/i386/i386.s: Add tests for fnstsw and fstsw.
* gas/i386/inval.s: Likewise.
* gas/i386/x86_64.s: Likewise.
* gas/i386/intel.s: Use word instead of dword on ss.
* gas/i386/x86-64-inval.s: Add tests for fnstsw, fstsw, in
and out.
* gas/i386/prefix.s: Remove invalid fstsw.
* gas/i386/inval.l: Updated.
* gas/i386/intelbad.l: Likewise.
* gas/i386/i386.d: Likewise.
* gas/i386/x86_64.d: Likewise.
* gas/i386/x86-64-inval.l: Likewise.
* gas/i386/prefix.d: Updated.
gas/
2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* config/tc-i386.c (_i386_insn): Update comment.
(operand_type_match): Also clear unspecified.
(operand_type_register_match): Likewise.
(parse_operands): Initialize unspecified.
(i386_intel_operand): Likewise.
(match_template): Check memory and accumulator operand size.
(i386_att_operand): Clear unspecified on register operand.
(intel_e11): Likewise.
(intel_e09): Set operand size and clean unspecified for
"XXX PTR".
opcodes/
2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* i386-gen.c (operand_type_init): Add Dword to
OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
(opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
Qword and Xmmword.
(operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
Xmmword, Unspecified and Anysize.
(set_bitfield): Make Mmword an alias of Qword. Make Oword
an alias of Xmmword.
* i386-opc.h (CheckSize): Removed.
(Byte): Updated.
(Word): Likewise.
(Dword): Likewise.
(Qword): Likewise.
(Xmmword): Likewise.
(FWait): Updated.
(OTMax): Likewise.
(i386_opcode_modifier): Remove checksize, byte, word, dword,
qword and xmmword.
(Fword): New.
(TBYTE): Likewise.
(Unspecified): Likewise.
(Anysize): Likewise.
(i386_operand_type): Add byte, word, dword, fword, qword,
tbyte xmmword, unspecified and anysize.
* i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
Tbyte, Xmmword, Unspecified and Anysize.
* i386-reg.tbl: Add size for accumulator.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-01-12 16:05:42 +00:00
|
|
|
|
2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
PR gas/5534
|
|
|
|
|
* config/tc-i386.c (_i386_insn): Update comment.
|
|
|
|
|
(operand_type_match): Also clear unspecified.
|
|
|
|
|
(operand_type_register_match): Likewise.
|
|
|
|
|
(parse_operands): Initialize unspecified.
|
|
|
|
|
(i386_intel_operand): Likewise.
|
|
|
|
|
(match_template): Check memory and accumulator operand size.
|
|
|
|
|
(i386_att_operand): Clear unspecified on register operand.
|
|
|
|
|
(intel_e11): Likewise.
|
|
|
|
|
(intel_e09): Set operand size and clean unspecified for
|
|
|
|
|
"XXX PTR".
|
|
|
|
|
|
2008-01-11 16:18:43 +00:00
|
|
|
|
2008-01-11 Andreas Schwab <schwab@suse.de>
|
|
|
|
|
|
|
|
|
|
* read.c (s_space): Declare `repeat' as offsetT.
|
|
|
|
|
|
2008-01-10 21:59:46 +00:00
|
|
|
|
2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (match_template): Check processor support
|
|
|
|
|
first.
|
|
|
|
|
|
2008-01-10 20:53:27 +00:00
|
|
|
|
2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (match_template): Continue if processor
|
|
|
|
|
doesn't match.
|
|
|
|
|
|
2008-01-09 22:36:06 +00:00
|
|
|
|
2008-01-09 Alexandre Oliva <aoliva@redhat.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-ia64.c (ia64_convert_frag): Zero-initialize room for
|
|
|
|
|
unwind personality function address.
|
|
|
|
|
|
2008-01-09 17:30:59 +00:00
|
|
|
|
2008-01-09 Bob Wilson <bob.wilson@acm.org>
|
|
|
|
|
|
|
|
|
|
* dwarf2dbg.c (out_sleb128): Delete.
|
|
|
|
|
(size_fixed_inc_line_addr, emit_fixed_inc_line_addr): New.
|
|
|
|
|
(out_fixed_inc_line_addr): Delete.
|
|
|
|
|
(relax_inc_line_addr, dwarf2dbg_estimate_size_before_relax): Call new
|
|
|
|
|
size_fixed_inc_line_addr if DWARF2_USE_FIXED_ADVANCE_PC is set.
|
|
|
|
|
(dwarf2dbg_convert_frag): Likewise for emit_fixed_inc_line_addr.
|
|
|
|
|
(process_entries): Remove calls to out_fixed_inc_line_addr. When
|
|
|
|
|
DWARF2_USE_FIXED_ADVANCE_PC is set, call relax_inc_line_addr.
|
|
|
|
|
* read.h (emit_expr_fix): New prototype.
|
|
|
|
|
* read.c (emit_expr): Move code to emit_expr_fix and use it here.
|
|
|
|
|
(emit_expr_fix): New.
|
|
|
|
|
|
2008-01-09 16:55:14 +00:00
|
|
|
|
2008-01-09 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (match_template): Check register size
|
|
|
|
|
only when size of operands can be encoded the canonical way.
|
|
|
|
|
|
2008-01-08 19:51:24 +00:00
|
|
|
|
2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (i386_operand): Renamed to ...
|
|
|
|
|
(i386_att_operand): This.
|
|
|
|
|
(parse_operands): Updated.
|
|
|
|
|
|
gas/
2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
* doc/c-i386.texi: Update .att_mnemonic and .intel_mnemonic.
* config/tc-i386.c (set_intel_mnemonic): Set intel_mnemonic
only.
(md_assemble): Remove Intel mode workaround.
(match_template): Check support for old gcc, AT&T mnemonic
and Intel Syntax.
(md_parse_option): Don't set intel_mnemonic to 0 for
OPTION_MOLD_GCC.
gas/testsuite/
2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/intel.s: Add tests for fadd, faddp, fdiv, fdivp,
fdivr, fdivrp, fmul, fmulp, fsub, fsubp, fsubr and fsubrp.
* gas/i386/intel.d: Updated.
* gas/i386/intel.e: Likewise.
opcodes/
2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
ATTSyntax.
* i386-opc.h (IntelMnemonic): Renamed to ..
(ATTSyntax): This
(Opcode_Modifier_Max): Updated.
(i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
and intelsyntax.
* i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
* i386-tbl.h: Regenerated.
2008-01-05 17:07:25 +00:00
|
|
|
|
2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
* doc/c-i386.texi: Update .att_mnemonic and .intel_mnemonic.
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (set_intel_mnemonic): Set intel_mnemonic
|
|
|
|
|
only.
|
|
|
|
|
(md_assemble): Remove Intel mode workaround.
|
|
|
|
|
(match_template): Check support for old gcc, AT&T mnemonic
|
|
|
|
|
and Intel Syntax.
|
|
|
|
|
(md_parse_option): Don't set intel_mnemonic to 0 for
|
|
|
|
|
OPTION_MOLD_GCC.
|
|
|
|
|
|
2008-01-04 18:19:12 +00:00
|
|
|
|
2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.h: Update copyright to 2008.
|
|
|
|
|
|
2008-01-04 14:53:50 +00:00
|
|
|
|
2008-01-04 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-ppc.c (parse_cpu): Preserve the settings of the
|
|
|
|
|
PPC_OPCODE_ALTIVEC and PPC_OPCODE_SPE flags.
|
|
|
|
|
|
2008-01-04 01:27:01 +00:00
|
|
|
|
2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (md_assemble): Use !intel_mnemonic instead
|
|
|
|
|
of SYSV386_COMPAT.
|
|
|
|
|
|
2008-01-04 01:05:45 +00:00
|
|
|
|
2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
* gas/config/tc-i386.c (cpu_arch_flags_not): Removed.
|
|
|
|
|
(cpu_flags_not): Likewise.
|
|
|
|
|
(cpu_flags_match): Updated to check 64bit and arch.
|
|
|
|
|
(set_code_flag): Remove cpu_arch_flags_not.
|
|
|
|
|
(set_16bit_gcc_code_flag): Likewise.
|
|
|
|
|
(set_cpu_arch): Likewise.
|
|
|
|
|
(md_begin): Likewise.
|
|
|
|
|
(parse_insn): Call cpu_flags_match to check 64bit and arch.
|
|
|
|
|
(match_template): Likewise.
|
|
|
|
|
|
2008-01-03 20:19:29 +00:00
|
|
|
|
2008-01-03 Jakub Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (process_drex): Initialize modrm_reg and
|
|
|
|
|
modrm_regmem to 0 instead of None.
|
|
|
|
|
|
2008-01-03 20:09:38 +00:00
|
|
|
|
2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (match_template): Use the xmmword field
|
|
|
|
|
instead of no_xsuf.
|
|
|
|
|
|
2008-01-02 23:55:45 +00:00
|
|
|
|
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (process_suffix): Fix a typo.
|
|
|
|
|
|
gas/
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* config/tc-i386.c (match_template): Handle XMMWORD_MNEM_SUFFIX.
Check memory size in Intel mode.
(process_suffix): Handle XMMWORD_MNEM_SUFFIX.
(intel_e09): Likewise.
* config/tc-i386.h (XMMWORD_MNEM_SUFFIX): New.
gas/testsuite/
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* gas/i386/intel.s: Use QWORD on movq instead of DWORD.
* gas/i386/inval.s: Add tests for movq.
* gas/i386/x86-64-inval.s: Likewise.
* gas/i386/inval.l: Updated.
* gas/i386/x86-64-inval.l: Likewise.
opcodes/
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
Byte, Word, Dword, QWord and Xmmword.
* i386-opc.h (No_xSuf): New.
(CheckSize): Likewise.
(Byte): Likewise.
(Word): Likewise.
(Dword): Likewise.
(QWord): Likewise.
(Xmmword): Likewise.
(FWait): Updated.
(i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
Dword, QWord and Xmmword.
* i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
used.
* i386-tbl.h: Regenerated.
2008-01-02 21:43:34 +00:00
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2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
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PR gas/5534
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* config/tc-i386.c (match_template): Handle XMMWORD_MNEM_SUFFIX.
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Check memory size in Intel mode.
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(process_suffix): Handle XMMWORD_MNEM_SUFFIX.
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(intel_e09): Likewise.
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* config/tc-i386.h (XMMWORD_MNEM_SUFFIX): New.
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2008-01-02 20:59:47 +00:00
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2008-01-02 Catherine Moore <clm@codesourcery.com>
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* config/tc-mips.c (mips_ip): Check operands on jalr instruction.
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2008-01-02 21:41:02 +00:00
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For older changes see ChangeLog-2007
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2002-01-07 12:12:47 +00:00
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Local Variables:
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mode: change-log
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left-margin: 8
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fill-column: 74
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version-control: never
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End:
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