2008-03-07 Paul Brook <paul@codesourcery.com>
bfd/ * elf32-arm.c (elf32_arm_howto_table_1): Fix bitmasks for MOVW and MOVT relocations. (elf32_arm_final_link_relocate): Fix off by one MOVW/MOVT sign extension. (elf32_arm_relocate_section): Handle MOVW and MOVT relocations. Improve safety check for other weird relocations. (elf32_arm_check_relocs): Only set h->needs_plt for branch/call relocations. gas/ * config/tc-arm.c (md_apply_fix): Use correct offset range. ld/testsuite/ * ld-arm/arm-elf.exp (armelftests): Add movw-merge and arm-app-movw. * ld-arm/arm-app-movw.s: New test. * ld-arm/arm-app.r: Update expected output. * ld-arm/movw-merge.d: New test. * ld-arm/movw-merge.s: New test.
This commit is contained in:
Paul Brook
parent
460b285508
commit
39623e120c
10 changed files with 168 additions and 41 deletions
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@ -1,3 +1,14 @@
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2008-03-07 Paul Brook <paul@codesourcery.com>
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* elf32-arm.c (elf32_arm_howto_table_1): Fix bitmasks for MOVW and
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MOVT relocations.
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(elf32_arm_final_link_relocate): Fix off by one MOVW/MOVT sign
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extension.
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(elf32_arm_relocate_section): Handle MOVW and MOVT
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relocations. Improve safety check for other weird relocations.
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(elf32_arm_check_relocs): Only set h->needs_plt for branch/call
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relocations.
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2008-03-03 Bob Wilson <bob.wilson@acm.org>
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* xtensa-isa.c (xtensa_isa_num_pipe_stages): Make max_stage static and
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132
bfd/elf32-arm.c
132
bfd/elf32-arm.c
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@ -696,8 +696,8 @@ static reloc_howto_type elf32_arm_howto_table_1[] =
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bfd_elf_generic_reloc, /* special_function */
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"R_ARM_MOVW_ABS_NC", /* name */
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FALSE, /* partial_inplace */
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0x0000ffff, /* src_mask */
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0x0000ffff, /* dst_mask */
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0x000f0fff, /* src_mask */
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0x000f0fff, /* dst_mask */
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FALSE), /* pcrel_offset */
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HOWTO (R_ARM_MOVT_ABS, /* type */
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@ -710,8 +710,8 @@ static reloc_howto_type elf32_arm_howto_table_1[] =
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bfd_elf_generic_reloc, /* special_function */
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"R_ARM_MOVT_ABS", /* name */
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FALSE, /* partial_inplace */
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0x0000ffff, /* src_mask */
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0x0000ffff, /* dst_mask */
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0x000f0fff, /* src_mask */
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0x000f0fff, /* dst_mask */
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FALSE), /* pcrel_offset */
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HOWTO (R_ARM_MOVW_PREL_NC, /* type */
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@ -724,8 +724,8 @@ static reloc_howto_type elf32_arm_howto_table_1[] =
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bfd_elf_generic_reloc, /* special_function */
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"R_ARM_MOVW_PREL_NC", /* name */
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FALSE, /* partial_inplace */
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0x0000ffff, /* src_mask */
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0x0000ffff, /* dst_mask */
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0x000f0fff, /* src_mask */
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0x000f0fff, /* dst_mask */
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TRUE), /* pcrel_offset */
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HOWTO (R_ARM_MOVT_PREL, /* type */
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@ -738,8 +738,8 @@ static reloc_howto_type elf32_arm_howto_table_1[] =
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bfd_elf_generic_reloc, /* special_function */
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"R_ARM_MOVT_PREL", /* name */
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FALSE, /* partial_inplace */
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0x0000ffff, /* src_mask */
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0x0000ffff, /* dst_mask */
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0x000f0fff, /* src_mask */
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0x000f0fff, /* dst_mask */
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TRUE), /* pcrel_offset */
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HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
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@ -5916,7 +5916,7 @@ elf32_arm_final_link_relocate (reloc_howto_type * howto,
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if (globals->use_rel)
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{
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addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
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signed_addend = (addend ^ 0x10000) - 0x10000;
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signed_addend = (addend ^ 0x8000) - 0x8000;
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}
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value += signed_addend;
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@ -5966,7 +5966,7 @@ elf32_arm_final_link_relocate (reloc_howto_type * howto,
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| ((insn >> 15) & 0x0800)
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| ((insn >> 4) & 0x0700)
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| (insn & 0x00ff);
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signed_addend = (addend ^ 0x10000) - 0x10000;
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signed_addend = (addend ^ 0x8000) - 0x8000;
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}
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value += signed_addend;
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@ -6548,34 +6548,85 @@ elf32_arm_relocate_section (bfd * output_bfd,
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asection *msec;
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bfd_vma addend, value;
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if (howto->rightshift)
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switch (r_type)
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{
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(*_bfd_error_handler)
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(_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
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input_bfd, input_section,
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(long) rel->r_offset, howto->name);
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return FALSE;
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case R_ARM_MOVW_ABS_NC:
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case R_ARM_MOVT_ABS:
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value = bfd_get_32 (input_bfd, contents + rel->r_offset);
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addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
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addend = (addend ^ 0x8000) - 0x8000;
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break;
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case R_ARM_THM_MOVW_ABS_NC:
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case R_ARM_THM_MOVT_ABS:
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value = bfd_get_16 (input_bfd, contents + rel->r_offset)
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<< 16;
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value |= bfd_get_16 (input_bfd,
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contents + rel->r_offset + 2);
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addend = ((value & 0xf7000) >> 4) | (value & 0xff)
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| ((value & 0x04000000) >> 15);
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addend = (addend ^ 0x8000) - 0x8000;
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break;
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default:
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if (howto->rightshift
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|| (howto->src_mask & (howto->src_mask + 1)))
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{
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(*_bfd_error_handler)
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(_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
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input_bfd, input_section,
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(long) rel->r_offset, howto->name);
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return FALSE;
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}
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value = bfd_get_32 (input_bfd, contents + rel->r_offset);
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/* Get the (signed) value from the instruction. */
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addend = value & howto->src_mask;
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if (addend & ((howto->src_mask + 1) >> 1))
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{
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bfd_signed_vma mask;
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mask = -1;
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mask &= ~ howto->src_mask;
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addend |= mask;
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}
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break;
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}
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value = bfd_get_32 (input_bfd, contents + rel->r_offset);
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/* Get the (signed) value from the instruction. */
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addend = value & howto->src_mask;
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if (addend & ((howto->src_mask + 1) >> 1))
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{
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bfd_signed_vma mask;
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mask = -1;
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mask &= ~ howto->src_mask;
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addend |= mask;
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}
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msec = sec;
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addend =
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_bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
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- relocation;
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addend += msec->output_section->vma + msec->output_offset;
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value = (value & ~ howto->dst_mask) | (addend & howto->dst_mask);
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bfd_put_32 (input_bfd, value, contents + rel->r_offset);
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/* Cases here must match those in the preceeding
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switch statement. */
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switch (r_type)
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{
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case R_ARM_MOVW_ABS_NC:
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case R_ARM_MOVT_ABS:
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value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
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| (addend & 0xfff);
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bfd_put_32 (input_bfd, value, contents + rel->r_offset);
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break;
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case R_ARM_THM_MOVW_ABS_NC:
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case R_ARM_THM_MOVT_ABS:
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value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
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| (addend & 0xff) | ((addend & 0x0800) << 15);
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bfd_put_16 (input_bfd, value >> 16,
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contents + rel->r_offset);
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bfd_put_16 (input_bfd, value,
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contents + rel->r_offset + 2);
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break;
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default:
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value = (value & ~ howto->dst_mask)
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| (addend & howto->dst_mask);
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bfd_put_32 (input_bfd, value, contents + rel->r_offset);
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break;
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}
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}
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}
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else
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@ -7663,6 +7714,7 @@ elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
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asection *sreloc;
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bfd_vma *local_got_offsets;
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struct elf32_arm_link_hash_table *htab;
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bfd_boolean needs_plt;
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if (info->relocatable)
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return TRUE;
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@ -7804,10 +7856,6 @@ elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
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break;
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/* Fall through */
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case R_ARM_ABS32:
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case R_ARM_ABS32_NOI:
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case R_ARM_REL32:
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case R_ARM_REL32_NOI:
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case R_ARM_PC24:
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case R_ARM_PLT32:
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case R_ARM_CALL:
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@ -7816,6 +7864,13 @@ elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
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case R_ARM_THM_CALL:
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case R_ARM_THM_JUMP24:
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case R_ARM_THM_JUMP19:
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needs_plt = 1;
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goto normal_reloc;
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case R_ARM_ABS32:
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case R_ARM_ABS32_NOI:
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case R_ARM_REL32:
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case R_ARM_REL32_NOI:
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case R_ARM_MOVW_ABS_NC:
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case R_ARM_MOVT_ABS:
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case R_ARM_MOVW_PREL_NC:
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@ -7824,6 +7879,9 @@ elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
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case R_ARM_THM_MOVT_ABS:
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case R_ARM_THM_MOVW_PREL_NC:
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case R_ARM_THM_MOVT_PREL:
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needs_plt = 0;
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normal_reloc:
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/* Should the interworking branches be listed here? */
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if (h != NULL)
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{
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@ -7840,11 +7898,7 @@ elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
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refers to is in a different object. We can't tell for
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sure yet, because something later might force the
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symbol local. */
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if (r_type != R_ARM_ABS32
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&& r_type != R_ARM_REL32
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&& r_type != R_ARM_ABS32_NOI
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&& r_type != R_ARM_REL32_NOI
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&& r_type != R_ARM_ABS12)
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if (needs_plt)
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h->needs_plt = 1;
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/* If we create a PLT entry, this relocation will reference
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@ -1,3 +1,7 @@
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2008-03-07 Paul Brook <paul@codesourcery.com>
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* config/tc-arm.c (md_apply_fix): Use correct offset range.
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2008-03-07 Alan Modra <amodra@bigpond.net.au>
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* config/tc-ppc.c (ppc_setup_opcodes): Tidy. Add code to test
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@ -18804,7 +18804,7 @@ md_apply_fix (fixS * fixP,
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/* REL format relocations are limited to a 16-bit addend. */
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if (!fixP->fx_done)
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{
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if (value < -0x1000 || value > 0xffff)
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if (value < -0x8000 || value > 0x7fff)
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as_bad_where (fixP->fx_file, fixP->fx_line,
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_("offset out of range"));
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}
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@ -1,3 +1,11 @@
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2008-03-07 Paul Brook <paul@codesourcery.com>
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* ld-arm/arm-elf.exp (armelftests): Add movw-merge and arm-app-movw.
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* ld-arm/arm-app-movw.s: New test.
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* ld-arm/arm-app.r: Update expected output.
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* ld-arm/movw-merge.d: New test.
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* ld-arm/movw-merge.s: New test.
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2008-03-01 Alan Modra <amodra@bigpond.net.au>
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* ld-powerpc/relbrlt.d: Update. Also check .branch_lt section.
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11
ld/testsuite/ld-arm/arm-app-movw.s
Normal file
11
ld/testsuite/ld-arm/arm-app-movw.s
Normal file
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@ -0,0 +1,11 @@
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.text
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.globl _start
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_start:
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movw r0, #:lower16:data_obj
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movt r0, #:upper16:data_obj
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movw r0, #:lower16:lib_func1
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movt r0, #:upper16:lib_func1
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.globl app_func2
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app_func2:
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bx lr
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@ -1,5 +1,5 @@
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tmpdir/arm-app: file format elf32-(little|big)arm
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tmpdir/arm-app.*: file format elf32-(little|big)arm
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DYNAMIC RELOCATION RECORDS
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OFFSET TYPE VALUE
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@ -176,6 +176,12 @@ set armelftests {
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{"ARMv4 interworking" "-static -T arm.ld --fix-v4bx-interworking" "--fix-v4bx -meabi=4" {armv4-bx.s}
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{{objdump -d armv4-bx.d}}
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"armv4-bx"}
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{"MOVW/MOVT and merged sections" "-T arm.ld" "" {movw-merge.s}
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{{objdump -dw movw-merge.d}}
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"movw-merge"}
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{"MOVW/MOVT against shared libraries" "tmpdir/arm-lib.so" "" {arm-app-movw.s}
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{{objdump -Rw arm-app.r}}
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"arm-app-movw"}
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}
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run_ld_link_tests $armelftests
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13
ld/testsuite/ld-arm/movw-merge.d
Normal file
13
ld/testsuite/ld-arm/movw-merge.d
Normal file
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@ -0,0 +1,13 @@
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.*: file format.*
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Disassembly of section .text:
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00008000 <[^>]*>:
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8000: e3080013 movw r0, #32787 ; 0x8013
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8004: e3400000 movt r0, #0 ; 0x0
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00008008 <[^>]*>:
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8008: f248 0013 movw r0, #32787 ; 0x8013
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800c: f2c0 0000 movt r0, #0 ; 0x0
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20
ld/testsuite/ld-arm/movw-merge.s
Normal file
20
ld/testsuite/ld-arm/movw-merge.s
Normal file
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@ -0,0 +1,20 @@
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.arch armv7-a
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.syntax unified
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.text
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.global _start
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.type _start, %function
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_start:
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movw r0, #:lower16:.LC0
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movt r0, #:upper16:.LC0
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.thumb
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.global tfunc
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.type tfunc, %function
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tfunc:
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movw r0, #:lower16:.LC0
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movt r0, #:upper16:.LC0
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.section .rodata.str1.4,"aMS",%progbits,1
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.align 2
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.ascii "pad"
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.LC0:
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.ascii "inner: cont \000"
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Loading…
Reference in a new issue