old-cross-binutils/gas/doc/as.texinfo

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\input texinfo @c -*-Texinfo-*-
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@c Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
@c 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012
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@c Free Software Foundation, Inc.
@c UPDATE!! On future updates--
@c (1) check for new machine-dep cmdline options in
@c md_parse_option definitions in config/tc-*.c
@c (2) for platform-specific directives, examine md_pseudo_op
@c in config/tc-*.c
@c (3) for object-format specific directives, examine obj_pseudo_op
@c in config/obj-*.c
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@c (4) portable directives in potable[] in read.c
@c %**start of header
@setfilename as.info
@c ---config---
@macro gcctabopt{body}
@code{\body\}
@end macro
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@c defaults, config file may override:
@set have-stabs
@c ---
@c man begin NAME
@c ---
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@include asconfig.texi
bfd/ 2007-03-15 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (bfdver.h): Substitute report_bugs_to. Also create doc/bfdver.texi. * Makefile.in: Regenerated. * configure.in (--with-bugurl): New option. * configure: Regenerated. * version.h (REPORT_BUGS_TO): New. binutils/ 2007-03-15 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (REPORT_BUGS_TO): Removed. (INCLUDES): Remove -DREPORT_BUGS_TO. * Makefile.in: Regenerated. * bucomm.c: Don't include bfdver.h. * objdump.c: Likewise. * version.c: Likewise. * bucomm.h: Include bfdver.h. * configure.in (--with-bugurl): Removed. * configure: Regenerated. * doc/Makefile.am (binutils_TEXINFOS): Removed. (AM_MAKEINFOFLAGS): Add -I ../../bfd/doc. (TEXI2DVI): Likewise. (config.texi): Removed. (MOSTLYCLEANFILES): Remove config.texi. * doc/Makefile.in: Regenerated. * doc/binutils.texi: Include bfdver.texi instead of config.texi. gas/ 2007-03-15 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (REPORT_BUGS_TO): Removed. (INCLUDES): Remove -DREPORT_BUGS_TO. * Makefile.in: Regenerated. * configure.in (--with-bugurl): Removed. * configure: Regenerated. * doc/Makefile.am (as_TEXINFOS): Remove gasver.texi. (AM_MAKEINFOFLAGS): Add -I ../../bfd/doc. (TEXI2DVI): Likewise. (gasver.texi): Removed. (MOSTLYCLEANFILES): Remove gasver.texi. (as.1): Don't depend on gasver.texi. * doc/Makefile.in: Regenerated. * doc/as.texi: Include bfdver.texi instead of gasver.texi. gprof/ 2007-03-15 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (REPORT_BUGS_TO): Removed. (INCLUDES): Remove -DREPORT_BUGS_TO. * Makefile.in: Regenerated. * configure.in (--with-bugurl): Removed. * configure: Regenerated. ld/ 2007-03-15 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (ld_TEXINFOS): Remove ldver.texi. (AM_MAKEINFOFLAGS): Add -I ../../bfd/doc. (TEXI2DVI): Likewise. (REPORT_BUGS_TO): Removed. (INCLUDES): Remove -DREPORT_BUGS_TO. (ldver.texi): Likewise. (ld.1): Don't depend on ldver.texi. (MOSTLYCLEANFILES): Remove ldver.texi. * Makefile.in: Regenerated. * configure.in (--with-bugurl): Removed. * configure: Regenerated. * lexsup.c: Include bfdver.h. * ld.texinfo: Include bfdver.texi instead of ldver.texi.
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@include bfdver.texi
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@c ---
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@c man end
@c ---
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@c common OR combinations of conditions
@ifset COFF
@set COFF-ELF
@end ifset
@ifset ELF
@set COFF-ELF
@end ifset
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@ifset AOUT
@set aout-bout
@end ifset
@ifset ARM/Thumb
@set ARM
@end ifset
@ifset Blackfin
@set Blackfin
@end ifset
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@ifset BOUT
@set aout-bout
@end ifset
@ifset H8/300
@set H8
@end ifset
@ifset SH
@set H8
@end ifset
@ifset HPPA
@set abnormal-separator
@end ifset
@c ------------
@ifset GENERIC
@settitle Using @value{AS}
@end ifset
@ifclear GENERIC
@settitle Using @value{AS} (@value{TARGET})
@end ifclear
@setchapternewpage odd
@c %**end of header
@c @smallbook
@c @set SMALL
@c WARE! Some of the machine-dependent sections contain tables of machine
@c instructions. Except in multi-column format, these tables look silly.
@c Unfortunately, Texinfo doesn't have a general-purpose multi-col format, so
@c the multi-col format is faked within @example sections.
@c
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@c Again unfortunately, the natural size that fits on a page, for these tables,
@c is different depending on whether or not smallbook is turned on.
@c This matters, because of order: text flow switches columns at each page
@c break.
@c
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@c The format faked in this source works reasonably well for smallbook,
@c not well for the default large-page format. This manual expects that if you
@c turn on @smallbook, you will also uncomment the "@set SMALL" to enable the
@c tables in question. You can turn on one without the other at your
@c discretion, of course.
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@ifinfo
@set SMALL
@c the insn tables look just as silly in info files regardless of smallbook,
@c might as well show 'em anyways.
@end ifinfo
@ifnottex
@dircategory Software development
@direntry
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* As: (as). The GNU assembler.
* Gas: (as). The GNU assembler.
@end direntry
@end ifnottex
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@finalout
@syncodeindex ky cp
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@copying
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This file documents the GNU Assembler "@value{AS}".
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@c man begin COPYRIGHT
Copyright @copyright{} 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
PR gas/12390 * doc/all.texi: Add NS32K * doc/as.texinfo: Remove target specific details of which characters act as comment initiators and statement separators into individual target specific files. * doc/c-alpha.texi (Alpha-Chars): Document special behaviour of the hash character at the start of a line. * doc/c-arm.texi (ARM-Chars): Likewise. * doc/c-avr.texi (AVR-Chars): Likewise. * doc/c-d10v.texi (D10V-Chars): Likewise. * doc/c-d30v.texi (D30V-Chars): Likewise. * doc/c-mmix.texi (MMIX-Chars): Likewise. * doc/c-s390.texi (s390 characters): Likewise. * doc/c-sh.texi (SH-Chars): Likewise. * doc/c-sh64.texi (SH64-Chars): Likewise. * doc/c-sparc.texi (SPARC-Chars): Likewise. * doc/c-tic6x.texi (TIC6X Syntax): Likewise. * doc/c-xtensa.texi (Xtensa Syntax): Likewise. * doc/c-z80.texi (Z80-Chars): Likewise. * doc/c-z8k.texi (Z8000-Chars): Likewise. * doc/c-pdp11.texi (PDP11-Syntax): Document line separator character. * doc/c-arc.texi (ARC-Chars): Fill in this subsection. * doc/c-bfin.texi (Blackfin Syntax): Document line comment and line separator characters. * doc/c-cr16.texi (CR16 Syntax): Likewise. * doc/c-i386.texi (i386-Chars): Likewise. * doc/c-i860.texi (i860-Chars): Likewise. * doc/c-i960.texi (i960-Chars): Likewise. * doc/c-ip2k.texi (IP2K-Chars): Likewise. * doc/c-lm32.texi (LM32-Chars): likewise. * doc/c-m32c.texi (M32C-Chars): Likewise. * doc/c-m68hc11.texi (M68HC11-syntax): Likewise. * doc/c-m68k.texi (M68K-Chars): Likewise. * doc/c-microblaze.texi (MicroBlaze-Chars): Likewise. * doc/c-msp430.texi (MSP430-Chars): Likewise. * doc/c-mt.texi (MT-Chars): Likewise. * doc/c-ns32k.texi (NS32K-Chars): Likewise. * doc/c-pj.texi (PJ-Chars): Likewise. * doc/c-ppc.texi (PowerPC-Chars): Likewise. * doc/c-rx.texi (RX-Chars): Likewise. * doc/c-score.texi (SCORE-Chars): Likewise. * doc/c-tic54x.texi (TIC54X-Chars): Likewise. * doc/c-v850.texi (V850-Chars): Likewise. * doc/c-vax.texi (VAX-Chars): Likewise. * doc/c-xc16x.texi (xc16x-Chars): Likewise.
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2000, 2001, 2002, 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation,
Inc.
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Permission is granted to copy, distribute and/or modify this document
under the terms of the GNU Free Documentation License, Version 1.3
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or any later version published by the Free Software Foundation;
with no Invariant Sections, with no Front-Cover Texts, and with no
Back-Cover Texts. A copy of the license is included in the
section entitled ``GNU Free Documentation License''.
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@c man end
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@end copying
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@titlepage
@title Using @value{AS}
@subtitle The @sc{gnu} Assembler
@ifclear GENERIC
@subtitle for the @value{TARGET} family
@end ifclear
@ifset VERSION_PACKAGE
@sp 1
@subtitle @value{VERSION_PACKAGE}
@end ifset
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@sp 1
@subtitle Version @value{VERSION}
@sp 1
@sp 13
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The Free Software Foundation Inc.@: thanks The Nice Computer
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Company of Australia for loaning Dean Elsner to write the
first (Vax) version of @command{as} for Project @sc{gnu}.
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The proprietors, management and staff of TNCCA thank FSF for
distracting the boss while they got some work
done.
@sp 3
@author Dean Elsner, Jay Fenlason & friends
@page
@tex
{\parskip=0pt
\hfill {\it Using {\tt @value{AS}}}\par
\hfill Edited by Cygnus Support\par
}
%"boxit" macro for figures:
%Modified from Knuth's ``boxit'' macro from TeXbook (answer to exercise 21.3)
\gdef\boxit#1#2{\vbox{\hrule\hbox{\vrule\kern3pt
\vbox{\parindent=0pt\parskip=0pt\hsize=#1\kern3pt\strut\hfil
#2\hfil\strut\kern3pt}\kern3pt\vrule}\hrule}}%box with visible outline
\gdef\ibox#1#2{\hbox to #1{#2\hfil}\kern8pt}% invisible box
@end tex
@vskip 0pt plus 1filll
Copyright @copyright{} 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
PR gas/12390 * doc/all.texi: Add NS32K * doc/as.texinfo: Remove target specific details of which characters act as comment initiators and statement separators into individual target specific files. * doc/c-alpha.texi (Alpha-Chars): Document special behaviour of the hash character at the start of a line. * doc/c-arm.texi (ARM-Chars): Likewise. * doc/c-avr.texi (AVR-Chars): Likewise. * doc/c-d10v.texi (D10V-Chars): Likewise. * doc/c-d30v.texi (D30V-Chars): Likewise. * doc/c-mmix.texi (MMIX-Chars): Likewise. * doc/c-s390.texi (s390 characters): Likewise. * doc/c-sh.texi (SH-Chars): Likewise. * doc/c-sh64.texi (SH64-Chars): Likewise. * doc/c-sparc.texi (SPARC-Chars): Likewise. * doc/c-tic6x.texi (TIC6X Syntax): Likewise. * doc/c-xtensa.texi (Xtensa Syntax): Likewise. * doc/c-z80.texi (Z80-Chars): Likewise. * doc/c-z8k.texi (Z8000-Chars): Likewise. * doc/c-pdp11.texi (PDP11-Syntax): Document line separator character. * doc/c-arc.texi (ARC-Chars): Fill in this subsection. * doc/c-bfin.texi (Blackfin Syntax): Document line comment and line separator characters. * doc/c-cr16.texi (CR16 Syntax): Likewise. * doc/c-i386.texi (i386-Chars): Likewise. * doc/c-i860.texi (i860-Chars): Likewise. * doc/c-i960.texi (i960-Chars): Likewise. * doc/c-ip2k.texi (IP2K-Chars): Likewise. * doc/c-lm32.texi (LM32-Chars): likewise. * doc/c-m32c.texi (M32C-Chars): Likewise. * doc/c-m68hc11.texi (M68HC11-syntax): Likewise. * doc/c-m68k.texi (M68K-Chars): Likewise. * doc/c-microblaze.texi (MicroBlaze-Chars): Likewise. * doc/c-msp430.texi (MSP430-Chars): Likewise. * doc/c-mt.texi (MT-Chars): Likewise. * doc/c-ns32k.texi (NS32K-Chars): Likewise. * doc/c-pj.texi (PJ-Chars): Likewise. * doc/c-ppc.texi (PowerPC-Chars): Likewise. * doc/c-rx.texi (RX-Chars): Likewise. * doc/c-score.texi (SCORE-Chars): Likewise. * doc/c-tic54x.texi (TIC54X-Chars): Likewise. * doc/c-v850.texi (V850-Chars): Likewise. * doc/c-vax.texi (VAX-Chars): Likewise. * doc/c-xc16x.texi (xc16x-Chars): Likewise.
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2000, 2001, 2002, 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation,
Inc.
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2000-11-06 20:27:26 +00:00
Permission is granted to copy, distribute and/or modify this document
under the terms of the GNU Free Documentation License, Version 1.3
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or any later version published by the Free Software Foundation;
with no Invariant Sections, with no Front-Cover Texts, and with no
Back-Cover Texts. A copy of the license is included in the
section entitled ``GNU Free Documentation License''.
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@end titlepage
@contents
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@ifnottex
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@node Top
@top Using @value{AS}
This file is a user guide to the @sc{gnu} assembler @command{@value{AS}}
@ifset VERSION_PACKAGE
@value{VERSION_PACKAGE}
@end ifset
version @value{VERSION}.
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@ifclear GENERIC
This version of the file describes @command{@value{AS}} configured to generate
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code for @value{TARGET} architectures.
@end ifclear
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This document is distributed under the terms of the GNU Free
Documentation License. A copy of the license is included in the
section entitled ``GNU Free Documentation License''.
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@menu
* Overview:: Overview
* Invoking:: Command-Line Options
* Syntax:: Syntax
* Sections:: Sections and Relocation
* Symbols:: Symbols
* Expressions:: Expressions
* Pseudo Ops:: Assembler Directives
@ifset ELF
* Object Attributes:: Object Attributes
@end ifset
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* Machine Dependencies:: Machine Dependent Features
* Reporting Bugs:: Reporting Bugs
* Acknowledgements:: Who Did What
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* GNU Free Documentation License:: GNU Free Documentation License
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* AS Index:: AS Index
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@end menu
@end ifnottex
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@node Overview
@chapter Overview
@iftex
This manual is a user guide to the @sc{gnu} assembler @command{@value{AS}}.
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@ifclear GENERIC
This version of the manual describes @command{@value{AS}} configured to generate
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code for @value{TARGET} architectures.
@end ifclear
@end iftex
@cindex invocation summary
@cindex option summary
@cindex summary of options
Here is a brief summary of how to invoke @command{@value{AS}}. For details,
see @ref{Invoking,,Command-Line Options}.
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@c man title AS the portable GNU assembler.
@ignore
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@c man begin SEEALSO
gcc(1), ld(1), and the Info entries for @file{binutils} and @file{ld}.
@c man end
@end ignore
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@c We don't use deffn and friends for the following because they seem
@c to be limited to one line for the header.
@smallexample
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@c man begin SYNOPSIS
@value{AS} [@b{-a}[@b{cdghlns}][=@var{file}]] [@b{--alternate}] [@b{-D}]
[@b{--compress-debug-sections}] [@b{--nocompress-debug-sections}]
[@b{--debug-prefix-map} @var{old}=@var{new}]
[@b{--defsym} @var{sym}=@var{val}] [@b{-f}] [@b{-g}] [@b{--gstabs}]
[@b{--gstabs+}] [@b{--gdwarf-2}] [@b{--help}] [@b{-I} @var{dir}] [@b{-J}]
[@b{-K}] [@b{-L}] [@b{--listing-lhs-width}=@var{NUM}]
[@b{--listing-lhs-width2}=@var{NUM}] [@b{--listing-rhs-width}=@var{NUM}]
[@b{--listing-cont-lines}=@var{NUM}] [@b{--keep-locals}] [@b{-o}
@var{objfile}] [@b{-R}] [@b{--reduce-memory-overheads}] [@b{--statistics}]
[@b{-v}] [@b{-version}] [@b{--version}] [@b{-W}] [@b{--warn}]
[@b{--fatal-warnings}] [@b{-w}] [@b{-x}] [@b{-Z}] [@b{@@@var{FILE}}]
[@b{--size-check=[error|warning]}]
[@b{--target-help}] [@var{target-options}]
[@b{--}|@var{files} @dots{}]
@c
@c Target dependent options are listed below. Keep the list sorted.
@c Add an empty line for separation.
@ifset AARCH64
@emph{Target AArch64 options:}
[@b{-EB}|@b{-EL}]
@end ifset
@ifset ALPHA
@emph{Target Alpha options:}
[@b{-m@var{cpu}}]
[@b{-mdebug} | @b{-no-mdebug}]
2009-03-03 Tristan Gingold <gingold@adacore.com> Eric Botcazou <ebotcazou@adacore.com> Douglas B Rupp <rupp@gnat.com> * doc/as.texinfo (Overview): Mention -replace/-noreplace options for Alpha. * doc/c-alpha.texi (Alpha Options): Document -replace/-noreplace. * config/tc-alpha.h (TC_VALIDATE_FIX_SUB): Define to 1 (evax). (OBJ_SYMFIELD_TYPE): Remove. (tc_canonicalize_symbol_name): Define to evax_shorten_name. (TC_IMPLICIT_LCOMM_ALIGNMENT): For alignment to 3 on evax. (tc_frob_file_before_fix): Do not defined on evax. * config/tc-alpha.c: Always includes dwarf2dbg.h. Include vms.h if OBJ_EVAX. (struct alpha_fixup): Add xtrasym and procsym (evax only). (enum alpha_macro_arg): Remove trailing comma. (md_longopts): Add replace and noreplace arguments (evax only). (alpha_evax_proc_hash): New variable. (alpha_link_section): Make it global. (alpha_ctors_section, alpha_dtors_section): Removed. (alpha_ctors_symbol, alpha_dtors_symbol): Ditto. (alpha_lit8_section): Ifndef'ed on evax. (alpha_lit8_symbol): Ditto. (alpha_prologue_label): New variable. (alpha_linkage_symbol): New variable (evax only). (alpha_flag_replace): Ditto. (struct alpha_evax_procs): Add handler and handler_data field. (alpha_evax_proc): Now of type pointer. (alpha_linkage_fixup_root, alpha_linkage_fixup_tail): New variables. (struct alpha_reloc_tag): Add sym and psym fields (evax only). (get_alpha_reloc_tag): Initialize sym and psym fields (evax only). (alpha_adjust_relocs): Ifndef'ed on evax. (load_expression): Add opname argument. Implement LDA/BSR optimization for evax. (emit_lda): Adjust for new prototype of load_expression. (emit_ir_load): Ditto. Do not nothing for GP if ..lk symbols. (emit_loadstore): Likewise. (emit_ldXu): Likewise. (emit_stX): Likewise. (emit_jsrjmp): Likewise. Implement LDA/BSR optimization for evax. (emit_ldgp): Avoid warning in evax case. (add_to_link_pool): Make it static. Return symbolic expression rather than number expression for the offset. (s_alpha_text): Create .text symbol for evax if not already created. (s_alpha_comm): Do not create specific section for common symbol. Fill common area with zeros for evax. (s_alpha_prologue): Create alpha_prologue_label. (s_alpha_section_name): New function (evax). (s_alpha_section_word): Likewise. (section_name): New static variabke moved out from ... (s_alpha_section): ... here. Create new sections on demand. (s_alpha_literals): New function (evax). (s_alpha_ent): Create alpha_evax_proc instance and insert it in the alpha_evax_proc_hash table. (s_alpha_handler): New function (evax). (s_alpha_frame): Adjust for new type of alpha_evax_proc. (s_alpha_prologue): New function (evax). (s_alpha_pdesc): Adjust for new type of alpha_evax_proc and new handling of procedures with hash table. Add support for condition handlers. (s_alpha_linkage): Create linkage_fixup instance and chain it. (s_alpha_fp_save): Adjust for new type of alpha_evax_proc. (s_alpha_mask): Likewise. (s_alpha_fmask): Likewise. (s_alpha_end): Clear alpha_evax_proc. (s_alpha_align): Increase max_alignment to 16. (alpha_print_token): Call print_expr_1 instead of print_expr. (md_pseudo_table): Add "section", "literals", "handler" and "handler_data" (evax). Do not ignore "prologue" on evax. Fix indentation. (md_begin): Create hash table for alpha_evax_proc_hash. (md_parse_option): Handle OPTION_REPLACE and OPTION_NOREPLACE. (md_show_usage): Mention -replace/-noreplace for evax. (md_apply_fix): Handle evax relocs (_NOP, _LDA, _BSR and _BOH). (alpha_force_relocation): Likewise. (alpha_fix_adjustable): Likewise. Add BFD_RELOC_16 case. (tc_gen_reloc): Likewise. Add BFD_RELOC_ALPHA_LINKAGE for evax. (emit_insn): New cases for evax specific relocs. (assemble_insn): Fix indentation. Take care of -MDISP in operand table. * config/obj-evax.h (struct alpha_linkage_fixups): New struct. (OBJ_SYMFIELD_TYPE): New macro. (obj_symbol_new_hook): Define. (obj_frob_symbol, obj_frob_file_before_adjust): Ditto. (obj_frob_file_before_fix): Ditto. (PDSC_S_M_HANDLER_VALID): New macro. (PDSC_S_M_HANDLER_DATA_VALID): Ditto. (TC_IMPLICIT_LCOMM_ALIGNMENT): Remove. Add prototypes for functions declared in obj-evax.c * config/obj-evax.c: Include subsegs.h, struc-symbol.h, safe-ctype.h. (s_evax_weak): Convert to ansi-C. (evax_symbol_new_hook): New function. (evax_frob_symbol): Ditto. (evax_frob_file_before_adjust): Ditto. (evax_frob_file_before_fix): Ditto. (evax_shorten_name): Ditto. (crc32): Ditto. (encode_32): Ditto. (encode_16): Ditto. (decode_16): Ditto. (shorten_identifier): Ditto. (is_truncated_identifier): Ditto. * dwarf2dbg.c (out_debug_info): Do not append trailing slash on VMS. * as.c (close_output_file): Remove #ifndef OBJ_VMS. (main): Ditto.
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[@b{-replace} | @b{-noreplace}]
[@b{-relax}] [@b{-g}] [@b{-G@var{size}}]
[@b{-F}] [@b{-32addr}]
@end ifset
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@ifset ARC
@emph{Target ARC options:}
[@b{-marc[5|6|7|8]}]
[@b{-EB}|@b{-EL}]
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@end ifset
@ifset ARM
@emph{Target ARM options:}
@c Don't document the deprecated options
[@b{-mcpu}=@var{processor}[+@var{extension}@dots{}]]
[@b{-march}=@var{architecture}[+@var{extension}@dots{}]]
[@b{-mfpu}=@var{floating-point-format}]
[@b{-mfloat-abi}=@var{abi}]
[@b{-meabi}=@var{ver}]
[@b{-mthumb}]
[@b{-EB}|@b{-EL}]
[@b{-mapcs-32}|@b{-mapcs-26}|@b{-mapcs-float}|
@b{-mapcs-reentrant}]
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[@b{-mthumb-interwork}] [@b{-k}]
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@end ifset
@ifset Blackfin
@emph{Target Blackfin options:}
[@b{-mcpu}=@var{processor}[-@var{sirevision}]]
[@b{-mfdpic}]
[@b{-mno-fdpic}]
[@b{-mnopic}]
@end ifset
@ifset CRIS
@emph{Target CRIS options:}
[@b{--underscore} | @b{--no-underscore}]
[@b{--pic}] [@b{-N}]
[@b{--emulation=criself} | @b{--emulation=crisaout}]
* configure.in (crisv32): Recognize. AC_DEFINE_UNQUOTED DEFAULT_CRIS_ARCH. Handle crisv32-*-linux-gnu* like cris-*-linux-gnu* and crisv32-*-* like cris-*-*. * configure: Regenerate. * config/tc-cris.c (enum cris_archs): New. (cris_mach, cris_arch_from_string, s_cris_arch, get_sup_reg) (cris_insn_ver_valid_for_arch): New functions. (DEFAULT_CRIS_ARCH): New macro, default to cris_any_v0_v10. (cris_arch): New variable. (md_pseudo_table): New pseudo .arch. (err_for_dangerous_mul_placement): Initialize according to DEFAULT_CRIS_ARCH. (STATE_COND_BRANCH): Renamed from STATE_CONDITIONAL_BRANCH. All users changed. (STATE_COND_BRANCH_V32, STATE_COND_BRANCH_COMMON) (STATE_ABS_BRANCH_V32, STATE_LAPC, BRANCH_BF_V32, BRANCH_BB_V32) (BRANCH_WF_V32, BRANCH_WB_V32): New. (BRANCH_BF, BRANCH_BB, BRANCH_WF, BRANCH_WB): Don't undef after use in md_cris_relax_table. (md_cris_relax_table): Add entries for STATE_COND_BRANCH_V32, STATE_COND_BRANCH_COMMON, STATE_ABS_BRANCH_V32, STATE_LAPC. Update and improve head comment. (OPTION_PIC): Define in terms of previous option, OPTION_US. (OPTION_MULBUG_ABORT_ON, OPTION_MULBUG_ABORT_OFF): Similar. (OPTION_ARCH): New. (md_longopts): New option --march=... (cris_any_v0_v10_long_jump_size, crisv32_long_jump_size): New macros. (md_long_jump_size): Initialize in terms of DEFAULT_CRIS_ARCH. (HANDLE_RELAXABLE): New macro. (md_estimate_size_before_relax): Use HANDLE_RELAXABLE for common cases. Check for weak symbols and assume not relaxable. Handle STATE_COND_BRANCH_V32, STATE_COND_BRANCH_COMMON, STATE_ABS_BRANCH_V32, STATE_LAPC. Use new variable symbolP, not fragP->fr_symbol. (md_convert_frag): Handle STATE_COND_BRANCH_V32, STATE_COND_BRANCH_COMMON, STATE_ABS_BRANCH_V32, STATE_LAPC. (cris_create_short_jump): Adjust for CRISv32. (md_create_long_jump): Ditto. Emit error for common_v10_v32. (md_begin): Define symbols "..asm.arch.cris.v32", "..asm.arch.cris.v10", "..asm.arch.cris.common_v10_v32" and "..asm.arch.cris.any_v0_v10". Use cris_insn_ver_valid_for_arch when entering opcode table entry points. (md_assemble): Adjust branch handling for CRISv32. Handle LAPC relaxation. In fix_new_exp call for main insn, pass 1 for pcrel parameter for 8, 16 and 32-bit pc-relative insns and LAPC. (cris_process_instruction): Initialize out_insnp->insn_type to CRIS_INSN_NONE, not CRIS_INSN_NORMAL. <case ']', '[', 'A', 'd', 'Q', 'N', 'n', 'Y', 'U', 'u', 'T'>: New cases. <case 'm'>: Check that modified_char == '.'. <invalid operands>: Consume the rest of the line. When operands don't match, skip over subsequent insns with non-matching version specifier but same mnemonic. <immediate constant, case SIZE_SPEC_REG>: Immediate operands for special registers in CRISv32 are always 32 bit long. <immediate constant, case SIZE_FIELD_SIGNED, SIZE_FIELD_UNSIGNED>: New cases. (get_gen_reg): Only recognize "PC" when followed by "+]" for v32 and compatible. Recognize "ACR" for v32, unless followed by "+". (get_spec_reg): Consider cris_arch when looking up register. (get_autoinc_prefix_or_indir_op): Don't recognize assignment for v32 or compatible. (get_3op_or_dip_prefix_op): Check for ']' after seeing '[rN+'. (cris_get_expression): Restore input_line_pointer if failing "early". (get_flags): Consider cris_arch and recognize flags accordingly. (branch_disp): Adjust for CRISv32. (gen_cond_branch_32): Similar. Emit error for common_v10_v32. (cris_number_to_imm): Use as_bad_where, not as_bad. Remove related FIXME. Don't insist on BFD_RELOC_32_PCREL fixup to be resolved. Don't enter zeros in object file for BFD_RELOC_32_PCREL. <case BFD_RELOC_CRIS_LAPCQ_OFFSET, BFD_RELOC_CRIS_SIGNED_16> <case BFD_RELOC_CRIS_SIGNED_8>: New case. (md_parse_option): Break out "return 1". <OPTION_ARCH> New case. (tc_gen_reloc): <case BFD_RELOC_CRIS_LAPCQ_OFFSET> <case BFD_RELOC_CRIS_SIGNED_16, BFD_RELOC_CRIS_SIGNED_8> <case BFD_RELOC_CRIS_UNSIGNED_8, BFD_RELOC_CRIS_UNSIGNED_16> <case BFD_RELOC_32_PCREL>: New cases. Addends for non-zero fx_pcrel are too in fx_offset. (md_show_usage): Show --march=<arch>. (md_apply_fix3): Adjust val for BFD_RELOC_CRIS_LAPCQ_OFFSET. (md_pcrel_from): BFD_RELOC_CRIS_LAPCQ_OFFSET is PC-relative too. (s_syntax) <struct syntaxes>: Properly constify member operand. * config/tc-cris.h (TARGET_MACH): Define. (cris_mach): Declare. * doc/as.texinfo (Overview) <CRIS>: Add --march=... * doc/c-cris.texi (CRIS-Symbols): New node for built-in symbols. (CRIS-Opts): Document --march=... (CRIS-Pseudos): Document .arch.
2004-11-04 15:00:37 +00:00
[@b{--march=v0_v10} | @b{--march=v10} | @b{--march=v32} | @b{--march=common_v10_v32}]
@c Deprecated -- deliberately not documented.
@c [@b{-h}] [@b{-H}]
@end ifset
1999-05-03 07:29:11 +00:00
@ifset D10V
@emph{Target D10V options:}
[@b{-O}]
1999-05-03 07:29:11 +00:00
@end ifset
@ifset D30V
@emph{Target D30V options:}
[@b{-O}|@b{-n}|@b{-N}]
1999-05-03 07:29:11 +00:00
@end ifset
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
@ifset EPIPHANY
@emph{Target EPIPHANY options:}
[@b{-mepiphany}|@b{-mepiphany16}]
@end ifset
1999-05-03 07:29:11 +00:00
@ifset H8
@emph{Target H8/300 options:}
[-h-tick-hex]
1999-05-03 07:29:11 +00:00
@end ifset
@ifset HPPA
@c HPPA has no machine-dependent assembler options (yet).
@end ifset
@ifset I80386
@emph{Target i386 options:}
[@b{--32}|@b{--x32}|@b{--64}] [@b{-n}]
[@b{-march}=@var{CPU}[+@var{EXTENSION}@dots{}]] [@b{-mtune}=@var{CPU}]
1999-05-03 07:29:11 +00:00
@end ifset
@ifset I960
@emph{Target i960 options:}
1999-05-03 07:29:11 +00:00
@c see md_parse_option in tc-i960.c
[@b{-ACA}|@b{-ACA_A}|@b{-ACB}|@b{-ACC}|@b{-AKA}|@b{-AKB}|
@b{-AKC}|@b{-AMC}]
[@b{-b}] [@b{-no-relax}]
1999-05-03 07:29:11 +00:00
@end ifset
2002-02-26 12:04:30 +00:00
@ifset IA64
2002-02-25 10:34:25 +00:00
@emph{Target IA-64 options:}
[@b{-mconstant-gp}|@b{-mauto-pic}]
[@b{-milp32}|@b{-milp64}|@b{-mlp64}|@b{-mp64}]
[@b{-mle}|@b{mbe}]
[@b{-mtune=itanium1}|@b{-mtune=itanium2}]
[@b{-munwind-check=warning}|@b{-munwind-check=error}]
[@b{-mhint.b=ok}|@b{-mhint.b=warning}|@b{-mhint.b=error}]
2002-02-25 10:34:25 +00:00
[@b{-x}|@b{-xexplicit}] [@b{-xauto}] [@b{-xdebug}]
@end ifset
2002-07-19 07:52:40 +00:00
@ifset IP2K
@emph{Target IP2K options:}
[@b{-mip2022}|@b{-mip2022ext}]
@end ifset
ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * configure.in: Add cases for Renesas m32c. * configure: Regenerated. bfd/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for m32c-*-elf (Renesas m32c and m16c). * Makefile.am (ALL_MACHINES): Add cpu-m32c.lo. (ALL_MACHINES_CFILES): Add cpu-m32c.c. (BFD32_BACKENDS): Add elf32-m32c.lo. (BFD32_BACKENDS_CFILES): Add elf32-m32c.c. (cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'. * Makefile.in: Regenerated. * archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New arch and mach codes. (bfd_m32c_arch): New arch info object. (bfd_archures_list): List bfd_m32c_arch. * bfd-in2.h: Regenerated. * config.bfd: Add case for the m32c. * configure.in: Add case for the m32c. * configure: Regenerated. * cpu-m32c.c, elf32-m32c.c: New files. * libbfd.h: Regenerated. * targets.c (bfd_elf32_m32c_vec): Declare. (_bfd_target_vector): List bfd_elf32_m32c_vec. binutils/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * readelf.c: #include "elf/m32c.h" (guess_is_rela, dump_relocations, get_machine_name): Add cases for EM_M32C. * Makefile.am (readelf.o): Update dependencies. * Makefile.in: Regenerated. cpu/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. gas/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C. * Makefile.am (CPU_TYPES): List m32c. (TARGET_CPU_CFILES): List config/tc-m32c.c. (TARGET_CPU_HFILES): List config/tc-m32c.h. * configure.in: Add case for m32c. * configure.tgt: Add cases for m32c and m32c-*-elf. * configure: Regenerated. * config/tc-m32c.c, config/tc-m32c.h: New files. * doc/Makefile.am (CPU_DOCS): Add c-m32c.texi. * doc/Makefile.in: Regenerated. * doc/all.texi: Set M32C. * doc/as.texinfo: Add text for the M32C-specific options and line comment characters, and refer to c-m32c.texi. * doc/c-m32c.texi: New file. include/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * dis-asm.h (print_insn_m32c): New declaration. include/elf/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for Renesas M32C and M16C. * common.h (EM_M32C): New machine number. * m32c.h: New file. ld/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o. (eelf32m32c.c): New target. * Makefile.in: Regenerated. * configure.tgt: Add case for m32c-*-elf. * emulparams/elf32m32c.sh: New file. opcodes/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New. * m32c-desc.h, m32c-opc.h: New. * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h. (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c. (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo. (CLEANFILES): List stamp-m32c. (M32C_DEPS): List stamp-m32c, if CGEN_MAINT. (CGEN_CPUS): Add m32c. (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c) (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS. (m32c_opc_h): New variable. (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo) (m32c-opc.lo): New rules. * Makefile.in: Regenerated. * configure.in: Add case for bfd_m32c_arch. * configure: Regenerated. * disassemble.c (ARCH_m32c): New. [ARCH_m32c]: #include "m32c-desc.h". (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c. (disassemble_init_for_target) [ARCH_m32c]: Same. * cgen-ops.h, cgen-types.h: New files. * Makefile.am (HFILES): List them. * Makefile.in: Regenerated.
2005-07-14 22:52:28 +00:00
@ifset M32C
@emph{Target M32C options:}
[@b{-m32c}|@b{-m16c}] [-relax] [-h-tick-hex]
ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * configure.in: Add cases for Renesas m32c. * configure: Regenerated. bfd/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for m32c-*-elf (Renesas m32c and m16c). * Makefile.am (ALL_MACHINES): Add cpu-m32c.lo. (ALL_MACHINES_CFILES): Add cpu-m32c.c. (BFD32_BACKENDS): Add elf32-m32c.lo. (BFD32_BACKENDS_CFILES): Add elf32-m32c.c. (cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'. * Makefile.in: Regenerated. * archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New arch and mach codes. (bfd_m32c_arch): New arch info object. (bfd_archures_list): List bfd_m32c_arch. * bfd-in2.h: Regenerated. * config.bfd: Add case for the m32c. * configure.in: Add case for the m32c. * configure: Regenerated. * cpu-m32c.c, elf32-m32c.c: New files. * libbfd.h: Regenerated. * targets.c (bfd_elf32_m32c_vec): Declare. (_bfd_target_vector): List bfd_elf32_m32c_vec. binutils/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * readelf.c: #include "elf/m32c.h" (guess_is_rela, dump_relocations, get_machine_name): Add cases for EM_M32C. * Makefile.am (readelf.o): Update dependencies. * Makefile.in: Regenerated. cpu/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. gas/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C. * Makefile.am (CPU_TYPES): List m32c. (TARGET_CPU_CFILES): List config/tc-m32c.c. (TARGET_CPU_HFILES): List config/tc-m32c.h. * configure.in: Add case for m32c. * configure.tgt: Add cases for m32c and m32c-*-elf. * configure: Regenerated. * config/tc-m32c.c, config/tc-m32c.h: New files. * doc/Makefile.am (CPU_DOCS): Add c-m32c.texi. * doc/Makefile.in: Regenerated. * doc/all.texi: Set M32C. * doc/as.texinfo: Add text for the M32C-specific options and line comment characters, and refer to c-m32c.texi. * doc/c-m32c.texi: New file. include/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * dis-asm.h (print_insn_m32c): New declaration. include/elf/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for Renesas M32C and M16C. * common.h (EM_M32C): New machine number. * m32c.h: New file. ld/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o. (eelf32m32c.c): New target. * Makefile.in: Regenerated. * configure.tgt: Add case for m32c-*-elf. * emulparams/elf32m32c.sh: New file. opcodes/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New. * m32c-desc.h, m32c-opc.h: New. * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h. (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c. (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo. (CLEANFILES): List stamp-m32c. (M32C_DEPS): List stamp-m32c, if CGEN_MAINT. (CGEN_CPUS): Add m32c. (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c) (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS. (m32c_opc_h): New variable. (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo) (m32c-opc.lo): New rules. * Makefile.in: Regenerated. * configure.in: Add case for bfd_m32c_arch. * configure: Regenerated. * disassemble.c (ARCH_m32c): New. [ARCH_m32c]: #include "m32c-desc.h". (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c. (disassemble_init_for_target) [ARCH_m32c]: Same. * cgen-ops.h, cgen-types.h: New files. * Makefile.am (HFILES): List them. * Makefile.in: Regenerated.
2005-07-14 22:52:28 +00:00
@end ifset
2002-02-26 12:04:30 +00:00
@ifset M32R
2002-02-25 10:34:25 +00:00
@emph{Target M32R options:}
[@b{--m32rx}|@b{--[no-]warn-explicit-parallel-conflicts}|
2002-02-26 12:04:30 +00:00
@b{--W[n]p}]
@end ifset
1999-05-03 07:29:11 +00:00
@ifset M680X0
@emph{Target M680X0 options:}
[@b{-l}] [@b{-m68000}|@b{-m68010}|@b{-m68020}|@dots{}]
1999-05-03 07:29:11 +00:00
@end ifset
@ifset M68HC11
@emph{Target M68HC11 options:}
* config/tc-m68hc11.c: Add S12X and XGATE co-processor support. Add option to offset S12 addresses into XGATE memory space. Tweak target flags to match other tools. (i.e. -m m68hc11). * doc/as.texinfo: Mention new options. * doc/c-m68hc11.texi: Document new options. * NEWS: Mention new support. * archures.c: Add bfd_arch_m9s12x and bfd_arch_m9s12xg. * config.bfd: Likewise. * cpu-m9s12x.c: New. * cpu-m9s12xg.c: New. * elf32-m68hc12.c: Add S12X and XGATE co-processor support. Add option to offset S12 addresses into XGATE memory space. Fix carry bug in IMM16 (IMM8 low/high) relocate. * Makefile.am (ALL_MACHINES): Add cpu-m9s12x and cpu-m9s12xg. (ALL_MACHINES_CFILES): Likewise. * reloc.c: Add S12X relocs. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * gas/m68hc11/insns9s12x.s: New * gas/m68hc11/insns9s12x.d: New * gas/m68hc11/hexprefix.s: New * gas/m68hc11/hexprefix.d: New * gas/m68hc11/9s12x-exg-sex-tfr.s: New * gas/m68hc11/9s12x-exg-sex-tfr.d: New * gas/m68hc11/insns9s12xg.s: New * gas/m68hc11/insns9s12xg.d: New * gas/m68hc11/9s12x-mov.s: New * gas/m68hc11/9s12x-mov.d: New * gas/m68hc11/m68hc11.exp: Updated * gas/m68hc11/*.d: Brought in line with changed objdump output. * gas/all/gas.exp: XFAIL all hc11/12 targets for redef2,3. * gas/elf/elf.exp: XFAIL all hc11/12 targets for redef. * gas/elf/dwarf2-1.d: Skip for hc11/12 targets. * gas/elf/dwarf2-2.d: Likewise. * ld-m68hc11/xgate-link.s: New. * ld-m68hc11/xgate-link.d: New. * ld-m68hc11/xgate-offset.s: New. * ld-m68hc11/xgate-offset.d: New. * ld-m68hc11/xgate1.s: New. * ld-m68hc11/xgate1.d: New. * ld-m68hc11/xgate2.s: New. * ld-m68hc11/m68hc11.exp: Updated. * ld-m68hc11/*.d: Brought in line with changed objdump output. * ld-gc/gc.exp: Update CFLAGS for m68hc11. * ld-plugin/plugin.exp: Likewise. * ld-srec/srec.exp: XFAIL for m68hc11 and m68hc12. * configure.in: Add S12X and XGATE co-processor support to m68hc11 target. * disassemble.c: Likewise. * configure: Regenerate. * m68hc11-dis.c: Make objdump output more consistent, use hex instead of decimal and use 0x prefix for hex. * m68hc11-opc.c: Add S12X and XGATE opcodes. * dis-asm.h (print_insn_m9s12x): Prototype. (print_insn_m9s12xg): Prototype. * m68hc11.h (R_M68HC12_16B, R_M68HC12_PCREL_9, R_M68HC12_PCREL_10) R_M68HC12_HI8XG, R_M68HC12_LO8XG): New relocations. (E_M68HC11_XGATE_RAMOFFSET): Define. * m68hc11.h: Add XGate definitions. (struct m68hc11_opcode): Add xg_mask field.
2012-05-15 12:55:51 +00:00
[@b{-m68hc11}|@b{-m68hc12}|@b{-m68hcs12}|@b{-mm9s12x}|@b{-mm9s12xg}]
[@b{-mshort}|@b{-mlong}]
[@b{-mshort-double}|@b{-mlong-double}]
[@b{--force-long-branches}] [@b{--short-branches}]
[@b{--strict-direct-mode}] [@b{--print-insn-syntax}]
[@b{--print-opcodes}] [@b{--generate-example}]
@end ifset
@ifset MCORE
@emph{Target MCORE options:}
[@b{-jsri2bsr}] [@b{-sifilter}] [@b{-relax}]
[@b{-mcpu=[210|340]}]
@end ifset
Add support for Xilinx MicroBlaze processor. * bfd/Makefile.am: Add cpu-microblaze.{lo,c}, elf32-microblaze.{lo,c}. * bfd/Makefile.in: Same. * bfd/archures.c: Add bfd_arch_microblaze. * bfd/bfd-in2.h: Regenerate. * bfd/config.bfd: Add microblaze target. * bfd/configure: Add bfd_elf32_microblaze_vec target. * bfd/configure.in: Same. * bfd/cpu-microblaze.c: New. * bfd/elf32-microblaze.c: New. * bfd/libbfd-in.h: Add prototype _bfd_dwarf2_fixup_section_debug_loc(). * bfd/libbfd.h: Regenerate. * bfd/reloc.c: Add MICROBLAZE relocations. * bfd/section.c: Add struct relax_table and relax_count to section. * bfd/targets.c: Add bfd_elf32_microblaze_vec. * binutils/MAINTAINERS: Add self as maintainer. * binutils/readelf.c: Include elf/microblaze.h, add EM_MICROBLAZE & EM_MICROBLAZE_OLD to guess_is_rela(), dump_relocations(), get_machine_name(). * config.sub: Add microblaze target. * configure: Same. * configure.ac: Same. * gas/Makefile.am: add microblaze to CPU_TYPES, config/tc-microblaze.c to TARGET_CPU_CFILES, config/tc-microblaze.h to TARGET_CPU_HFILES, add DEP_microblaze_elf target. * gas/Makefile.in: Same. * gas/config/tc-microblaze.c: Add MicroBlaze assembler. * gas/config/tc-microblaze.h: Add header for tc-microblaze.c. * gas/configure: Add microblaze target. * gas/configure.in: Same. * gas/configure.tgt: Same. * gas/doc/Makefile.am: Add c-microblaze.texi to CPU_DOCS. * gas/doc/Makefile.in: Same. * gas/doc/all.texi: Set MICROBLAZE. * gas/doc/as.texinfo: Add MicroBlaze doc links. * gas/doc/c-microblaze.texi: New MicroBlaze docs. * include/dis-asm.h: Decl print_insn_microblaze(). * include/elf/common.h: Define EM_MICROBLAZE & EM_MICROBLAZE_OLD. * include/elf/microblaze.h: New reloc definitions. * ld/Makefile.am: Add eelf32mb_linux.o, eelf32microblaze.o to ALL_EMULATIONS, targets. * ld/Makefile.in: Same. * ld/configure.tgt: Add microblaze*-linux*, microblaze* targets. * ld/emulparams/elf32mb_linux.sh: New. * ld/emulparams/elf32microblaze.sh. New. * ld/scripttempl/elfmicroblaze.sc: New. * opcodes/Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to CFILES, microblaze-dis.lo to ALL_MACHINES, targets. * opcodes/Makefile.in: Same. * opcodes/configure: Add bfd_microblaze_arch target. * opcodes/configure.in: Same. * opcodes/disassemble.c: Define ARCH_microblaze, return print_insn_microblaze(). * opcodes/microblaze-dis.c: New MicroBlaze disassembler. * opcodes/microblaze-opc.h: New MicroBlaze opcode definitions. * opcodes/microblaze-opcm.h: New MicroBlaze opcode types.
2009-08-06 17:38:04 +00:00
@ifset MICROBLAZE
@emph{Target MICROBLAZE options:}
@c MicroBlaze has no machine-dependent assembler options.
@end ifset
1999-05-03 07:29:11 +00:00
@ifset MIPS
@emph{Target MIPS options:}
[@b{-nocpp}] [@b{-EL}] [@b{-EB}] [@b{-O}[@var{optimization level}]]
[@b{-g}[@var{debug level}]] [@b{-G} @var{num}] [@b{-KPIC}] [@b{-call_shared}]
[@b{-non_shared}] [@b{-xgot} [@b{-mvxworks-pic}]
[@b{-mabi}=@var{ABI}] [@b{-32}] [@b{-n32}] [@b{-64}] [@b{-mfp32}] [@b{-mgp32}]
[@b{-march}=@var{CPU}] [@b{-mtune}=@var{CPU}] [@b{-mips1}] [@b{-mips2}]
[ bfd/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * aoutx.h (NAME(aout,machine_type)): Add bfd_mach_mipsisa32r2 case. * archures.c (bfd_mach_mipsisa32r2): New define. * bfd-in2.h: Regenerate. * cpu-mips.c (I_mipsisa32r2): New enum value. (arch_info_struct): Add entry for I_mipsisa32r2. * elfxx-mips.c (elf_mips_isa, _bfd_elf_mips_mach) (_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_32R2. (_bfd_mips_elf_final_write_processing): Add bfd_mach_mipsisa32r2 case. (_bfd_mips_elf_merge_private_bfd_data): Handle merging of binaries marked as using MIPS32 Release 2. [ binutils/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * doc/binutils.texi (objdump): Note MIPS HWR (Hardware Register) changes in MIPS -M options. [ gas/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * configure.in: Recognize mipsisa32r2, mipsisa32r2el, and CPU variants. * configure: Regenerate. * config/tc-mips.c (ISA_HAS_DROR, ISA_HAS_ROR): New defines. (macro_build): Handle "K" operand. (macro2): Use ISA_HAS_DROR and ISA_HAS_ROR in the places where CPU_HAS_DROR and CPU_HAS_ROR are currently used. (mips_ip): New variable "lastpos", and implement "+A", "+B", and "+C" operands for MIPS32 Release 2 ins/ext instructions. Implement "K" operand for MIPS32 Release 2 rdhwr instruction. (validate_mips_insn): Implement "+" as a way to extend the allowed operands, and implement "K", "+A", "+B", and "+C" operands. (OPTION_MIPS32R2): New define. (md_longopts): Add entry for OPTION_MIPS32R2. (OPTION_ELF_BASE): Adjust to accomodate OPTIONS_MIPS32R2. (md_parse_option): Handle OPTION_MIPS32R2. (s_mipsset): Reimplement handling of ".set mipsN" options and add support for ".set mips32r2". (mips_cpu_info_table): Add entry for "mips32r2" (MIPS32 Release 2). (md_show_usage): Document "-mips32r2" option. * doc/as.texinfo: Document "-mips32r2" option. * doc/c-mips.texi: Likewise. [ gas/testsuite/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * gas/mips/cp0-names-mips32r2.d: New test. * gas/mips/hwr-names-mips32r2.d: New test. * gas/mips/hwr-names-numeric.d: New test. * gas/mips/hwr-names.s: New test source file. * gas/mips/mips32r2.d: New test. * gas/mips/mips32r2.s: New test source file. * gas/mips/mips32r2-ill.l: New test. * gas/mips/mips32r2-ill.s: New test source file. * gas/mips/mips.exp: Add mips32r2 architecture data array entry. Run new tests mentioned above. [ include/elf/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * mips.h (E_MIPS_ARCH_32R2): New define. [ include/opcode/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * mips.h: Document "+" as the start of two-character operand type names, and add new "K", "+A", "+B", and "+C" operand types. (OP_MASK_INSMSB, OP_SH_INSMSB, OP_MASK_EXTMSB) (OP_SH_EXTMSB, INSN_ISA32R2, ISA_MIPS32R2, CPU_MIPS32R2): New defines. [ opcodes/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * mips-dis.c (mips_cp0_names_mips3264r2, mips_hwr_names_numeric) (mips_hwr_names_mips3264r2): New arrays. (mips_arch_choice): New "hwr_names" member. (mips_arch_choices): Adjust for structure change, and add a new entry for "mips32r2" ISA. (mips_hwr_names): New variable. (set_default_mips_dis_options): Set mips_hwr_names. (parse_mips_dis_option): New "hwr-names" option which sets mips_hwr_names, and adjust "reg-names=ARCH" to set mips_hwr_names. (print_insn_arg): Change return type to "int" and use that to indicate number of characters consumed. Add support for "+" operand extension character, "+A", "+B", "+C", and "K" operands. (print_insn_mips): Adjust for changes to print_insn_arg. (print_mips_disassembler_options): Adjust for "hwr-names" addition and "reg-names" change. * mips-opc (I33): New define (shorthand for INSN_ISA32R2). (mips_builtin_opcodes): Note that "nop" and "ssnop" are special forms of "sll". Add new MIPS32 Release 2 instructions: ehb, di, ei, ext, ins, jr.hb, jalr.hb, mfhc1, mfhc2, mthc1, mthc2, rdhwr, rdpgpr, seb, seh, synci, wrpgpr, wsbh. Note that hardware rotate instructions (ror, rorv) can be used on MIPS32 Release 2, and add the official mnemonics for them (rotr, rotrv) and the similar "rotl" mnemonic for left-rotate.
2002-12-31 07:29:29 +00:00
[@b{-mips3}] [@b{-mips4}] [@b{-mips5}] [@b{-mips32}] [@b{-mips32r2}]
[ bfd/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * archures.c (bfd_mach_mipsisa64r2): New define. * bfd-in2.h: Regenerate. * aoutx.h (NAME(aout,machine_type)): Handle bfd_mach_mipsisa64r2. * cpu-mips.c (I_mipsisa64r2): New enum value. (arch_info_struct): Add entry for I_mipsisa64r2. * elfxx-mips.c (_bfd_elf_mips_mach) (_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_64R2. (mips_set_isa_flags): Add bfd_mach_mipsisa64r2 case. (mips_mach_extensions): Add entry for bfd_mach_mipsisa64r2. [ binutils/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * readelf.c (get_machine_flags): Handle E_MIPS_ARCH_64R2. [ gas/Changelog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * configure.in (mipsisa64r2, mipsisa64r2el, mipsisa64r2*): New CPUs. * configure: Regenerate. * config/tc-mips.c (imm2_expr): New variable. (md_assemble, mips16_ip): Initialize imm2_expr. (ISA_HAS_64BIT_REGS, ISA_HAS_DROR, ISA_HAS_ROR): Add ISA_MIPS64R2. (macro_build): Handle +A, +B, +C, +E, +F, +G, and +H format operands. (macro): Handle M_DEXT and M_DINS. (validate_mips_insn): Handle +E, +F, +G, +H, and +I format operands. (mips_ip): Likewise. (OPTION_MIPS64R2): New define. (md_longopts): New entry for -mips64r2 (OPTION_MIPS64R2). OPTION_ASE_BASE): Increase to compensate for OPTION_MIPS64R2. (md_parse_option): Handle OPTION_MIPS64R2. (s_mipsset): Handle setting "mips64r2" ISA. (mips_cpu_info_table): Add mips64r2. (md_show_usage): Document -mips64r2 option. * doc/as.texinfo: Docuemnt -mips64r2 option. * doc/c-mips.texi: Likewise. [ gas/testsuite/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * gas/mips/cp0-names-mips64r2.d: New file. * gas/mips/cp0sel-names-mips64r2.d: New file. * gas/mips/elf_arch_mips64r2.d: New file. * gas/mips/hwr-names-mips64r2.d: New file. * gas/mips/mips32r2-ill-fp64.l: New file. * gas/mips/mips32r2-ill-fp64.s: New file. * gas/mips/mips64r2-ill.l: New file. * gas/mips/mips64r2-ill.s: New file. * gas/mips/mips64r2.d: New file. * gas/mips/mips64r2.s: New file. * gas/mips/mips.exp: Define "mips64r2" arch, and run new tests. [ include/elf/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * mips.h (E_MIPS_ARCH_64R2): New define. [ include/opcode/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * mips.h: Document +E, +F, +G, +H, and +I operand types. Update documentation of I, +B and +C operand types. (INSN_ISA64R2, ISA_MIPS64R2, CPU_MIPS64R2): New defines. (M_DEXT, M_DINS): New enum values. [ ld/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * ldmain.c (get_emulation): Ignore "-mips64r2". [ ld/testsuite/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * ld-mips-elf/mips-elf-flags.exp: Add tests for combinations with MIPS64r2. [ opcodes/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * mips-dis.c (mips_arch_choices): Add entry for "mips64r2" (print_insn_args): Add handing for +E, +F, +G, and +H. * mips-opc.c (I65): New define for MIPS64r2. (mips_builtin_opcodes): Add "dext", "dextm", "dextu", "dins", "dinsm", "dinsu", "drotl", "drotr", "drotr32", "drotrv", "dsbh", and "dshd" for MIPS64r2. Adjust "dror", "dror32", and "drorv" to be supported on MIPS64r2.
2003-09-30 16:17:15 +00:00
[@b{-mips64}] [@b{-mips64r2}]
[@b{-construct-floats}] [@b{-no-construct-floats}]
[@b{-trap}] [@b{-no-break}] [@b{-break}] [@b{-no-trap}]
[@b{-mips16}] [@b{-no-mips16}]
bfd/ 2011-02-25 Chao-ying Fu <fu@mips.com> Ilie Garbacea <ilie@mips.com> Maciej W. Rozycki <macro@codesourcery.com> Joseph Myers <joseph@codesourcery.com> Catherine Moore <clm@codesourcery.com> Richard Sandiford <rdsandiford@googlemail.com> * archures.c (bfd_mach_mips_micromips): New macro. * cpu-mips.c (I_micromips): New enum value. (arch_info_struct): Add bfd_mach_mips_micromips. * elfxx-mips.h (_bfd_mips_elf_is_target_special_symbol): New prototype. (_bfd_mips_elf_relax_section): Likewise. (_bfd_mips16_elf_reloc_unshuffle): Rename to... (_bfd_mips_elf_reloc_unshuffle): ... this. Handle microMIPS ASE. (_bfd_mips16_elf_reloc_shuffle): Rename to... (_bfd_mips_elf_reloc_shuffle): ... this. Handle microMIPS ASE. (gprel16_reloc_p): Handle microMIPS ASE. (literal_reloc_p): New function. * elf32-mips.c (elf_micromips_howto_table_rel): New variable. (_bfd_mips_elf32_gprel16_reloc): Handle microMIPS ASE. (mips16_gprel_reloc): Update for _bfd_mips_elf_reloc_unshuffle and _bfd_mips_elf_reloc_shuffle changes. (mips_elf_gprel32_reloc): Update comment. (micromips_reloc_map): New variable. (bfd_elf32_bfd_reloc_type_lookup): Handle microMIPS ASE. (mips_elf32_rtype_to_howto): Likewise. (mips_info_to_howto_rel): Likewise. (bfd_elf32_bfd_is_target_special_symbol): Define. (bfd_elf32_bfd_relax_section): Likewise. * elf64-mips.c (micromips_elf64_howto_table_rel): New variable. (micromips_elf64_howto_table_rela): Likewise. (mips16_gprel_reloc): Update for _bfd_mips_elf_reloc_unshuffle and _bfd_mips_elf_reloc_shuffle changes. (micromips_reloc_map): Likewise. (bfd_elf64_bfd_reloc_type_lookup): Handle microMIPS ASE. (bfd_elf64_bfd_reloc_name_lookup): Likewise. (mips_elf64_rtype_to_howto): Likewise. (bfd_elf64_bfd_is_target_special_symbol): Define. * elfn32-mips.c (elf_micromips_howto_table_rel): New variable. (elf_micromips_howto_table_rela): Likewise. (mips16_gprel_reloc): Update for _bfd_mips_elf_reloc_unshuffle and _bfd_mips_elf_reloc_shuffle changes. (micromips_reloc_map): Likewise. (bfd_elf32_bfd_reloc_type_lookup): Handle microMIPS ASE. (bfd_elf32_bfd_reloc_name_lookup): Likewise. (mips_elf_n32_rtype_to_howto): Likewise. (bfd_elf32_bfd_is_target_special_symbol): Define. * elfxx-mips.c (LA25_LUI_MICROMIPS_1): New macro. (LA25_LUI_MICROMIPS_2): Likewise. (LA25_J_MICROMIPS_1, LA25_J_MICROMIPS_2): Likewise. (LA25_ADDIU_MICROMIPS_1, LA25_ADDIU_MICROMIPS_2): Likewise. (TLS_RELOC_P): Handle microMIPS ASE. (mips_elf_create_stub_symbol): Adjust value of stub symbol if target is a microMIPS function. (micromips_reloc_p): New function. (micromips_reloc_shuffle_p): Likewise. (got16_reloc_p, call16_reloc_p): Handle microMIPS ASE. (got_disp_reloc_p, got_page_reloc_p): New functions. (got_ofst_reloc_p): Likewise. (got_hi16_reloc_p, got_lo16_reloc_p): Likewise. (call_hi16_reloc_p, call_lo16_reloc_p): Likewise. (hi16_reloc_p, lo16_reloc_p, jal_reloc_p): Handle microMIPS ASE. (micromips_branch_reloc_p): New function. (tls_gd_reloc_p, tls_ldm_reloc_p): Likewise. (tls_gottprel_reloc_p): Likewise. (_bfd_mips16_elf_reloc_unshuffle): Rename to... (_bfd_mips_elf_reloc_unshuffle): ... this. Handle microMIPS ASE. (_bfd_mips16_elf_reloc_shuffle): Rename to... (_bfd_mips_elf_reloc_shuffle): ... this. Handle microMIPS ASE. (_bfd_mips_elf_lo16_reloc): Handle microMIPS ASE. (mips_tls_got_index, mips_elf_got_page): Likewise. (mips_elf_create_local_got_entry): Likewise. (mips_elf_relocation_needs_la25_stub): Likewise. (mips_elf_calculate_relocation): Likewise. (mips_elf_perform_relocation): Likewise. (_bfd_mips_elf_symbol_processing): Likewise. (_bfd_mips_elf_add_symbol_hook): Likewise. (_bfd_mips_elf_link_output_symbol_hook): Likewise. (mips_elf_add_lo16_rel_addend): Likewise. (_bfd_mips_elf_check_relocs): Likewise. (mips_elf_adjust_addend): Likewise. (_bfd_mips_elf_relocate_section): Likewise. (mips_elf_create_la25_stub): Likewise. (_bfd_mips_vxworks_finish_dynamic_symbol): Likewise. (_bfd_mips_elf_gc_sweep_hook): Likewise. (_bfd_mips_elf_is_target_special_symbol): New function. (mips_elf_relax_delete_bytes): Likewise. (opcode_descriptor): New structure. (RA): New macro. (OP32_SREG, OP32_TREG, OP16_VALID_REG): Likewise. (b_insns_32, bc_insn_32, bz_insn_32, bzal_insn_32): New variables. (beq_insn_32): Likewise. (b_insn_16, bz_insn_16): New variables. (BZC32_REG_FIELD): New macro. (bz_rs_insns_32, bz_rt_insns_32): New variables. (bzc_insns_32, bz_insns_16):Likewise. (BZ16_REG, BZ16_REG_FIELD): New macros. (jal_insn_32_bd16, jal_insn_32_bd32): New variables. (jal_x_insn_32_bd32): Likewise. (j_insn_32, jalr_insn_32): Likewise. (ds_insns_32_bd16, ds_insns_32_bd32): Likewise. (jalr_insn_16_bd16, jalr_insn_16_bd32, jr_insn_16): Likewise. (JR16_REG): New macro. (ds_insns_16_bd16): New variable. (lui_insn): Likewise. (addiu_insn, addiupc_insn): Likewise. (ADDIUPC_REG_FIELD): New macro. (MOVE32_RD, MOVE32_RS): Likewise. (MOVE16_RD_FIELD, MOVE16_RS_FIELD): Likewise. (move_insns_32, move_insns_16): New variables. (nop_insn_32, nop_insn_16): Likewise. (MATCH): New macro. (find_match): New function. (check_br16_dslot, check_br32_dslot): Likewise. (check_br16, check_br32): Likewise. (IS_BITSIZE): New macro. (check_4byte_branch): New function. (_bfd_mips_elf_relax_section): Likewise. (_bfd_mips_elf_merge_private_bfd_data): Disallow linking MIPS16 and microMIPS modules together. (_bfd_mips_elf_print_private_bfd_data): Handle microMIPS ASE. * reloc.c (BFD_RELOC_MICROMIPS_7_PCREL_S1): New relocation. (BFD_RELOC_MICROMIPS_10_PCREL_S1): Likewise. (BFD_RELOC_MICROMIPS_16_PCREL_S1): Likewise. (BFD_RELOC_MICROMIPS_GPREL16): Likewise. (BFD_RELOC_MICROMIPS_JMP, BFD_RELOC_MICROMIPS_HI16): Likewise. (BFD_RELOC_MICROMIPS_HI16_S): Likewise. (BFD_RELOC_MICROMIPS_LO16): Likewise. (BFD_RELOC_MICROMIPS_LITERAL): Likewise. (BFD_RELOC_MICROMIPS_GOT16): Likewise. (BFD_RELOC_MICROMIPS_CALL16): Likewise. (BFD_RELOC_MICROMIPS_GOT_HI16): Likewise. (BFD_RELOC_MICROMIPS_GOT_LO16): Likewise. (BFD_RELOC_MICROMIPS_CALL_HI16): Likewise. (BFD_RELOC_MICROMIPS_CALL_LO16): Likewise. (BFD_RELOC_MICROMIPS_SUB): Likewise. (BFD_RELOC_MICROMIPS_GOT_PAGE): Likewise. (BFD_RELOC_MICROMIPS_GOT_OFST): Likewise. (BFD_RELOC_MICROMIPS_GOT_DISP): Likewise. (BFD_RELOC_MICROMIPS_HIGHEST): Likewise. (BFD_RELOC_MICROMIPS_HIGHER): Likewise. (BFD_RELOC_MICROMIPS_SCN_DISP): Likewise. (BFD_RELOC_MICROMIPS_JALR): Likewise. (BFD_RELOC_MICROMIPS_TLS_GD): Likewise. (BFD_RELOC_MICROMIPS_TLS_LDM): Likewise. (BFD_RELOC_MICROMIPS_TLS_DTPREL_HI16): Likewise. (BFD_RELOC_MICROMIPS_TLS_DTPREL_LO16): Likewise. (BFD_RELOC_MICROMIPS_TLS_GOTTPREL): Likewise. (BFD_RELOC_MICROMIPS_TLS_TPREL_HI16): Likewise. (BFD_RELOC_MICROMIPS_TLS_TPREL_LO16): Likewise. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. binutils/ 2011-02-25 Chao-ying Fu <fu@mips.com> Maciej W. Rozycki <macro@codesourcery.com> * readelf.c (get_machine_flags): Handle microMIPS ASE. (get_mips_symbol_other): Likewise. gas/ 2011-02-25 Maciej W. Rozycki <macro@codesourcery.com> Chao-ying Fu <fu@mips.com> Richard Sandiford <rdsandiford@googlemail.com> * config/tc-mips.h (mips_segment_info): Add one bit for microMIPS. (TC_LABEL_IS_LOCAL): New macro. (mips_label_is_local): New prototype. * config/tc-mips.c (S0, S7): New macros. (emit_branch_likely_macro): New variable. (mips_set_options): Add micromips. (mips_opts): Initialise micromips to -1. (file_ase_micromips): New variable. (CPU_HAS_MICROMIPS): New macro. (hilo_interlocks): Set for microMIPS too. (gpr_interlocks): Likewise. (cop_interlocks): Likewise. (cop_mem_interlocks): Likewise. (HAVE_CODE_COMPRESSION): New macro. (micromips_op_hash): New variable. (micromips_nop16_insn, micromips_nop32_insn): New variables. (NOP_INSN): Handle microMIPS ASE. (mips32_to_micromips_reg_b_map): New macro. (mips32_to_micromips_reg_c_map): Likewise. (mips32_to_micromips_reg_d_map): Likewise. (mips32_to_micromips_reg_e_map): Likewise. (mips32_to_micromips_reg_f_map): Likewise. (mips32_to_micromips_reg_g_map): Likewise. (mips32_to_micromips_reg_l_map): Likewise. (mips32_to_micromips_reg_n_map): Likewise. (mips32_to_micromips_reg_h_map): New variable. (mips32_to_micromips_reg_m_map): Likewise. (mips32_to_micromips_reg_q_map): Likewise. (micromips_to_32_reg_h_map): New variable. (micromips_to_32_reg_i_map): Likewise. (micromips_to_32_reg_m_map): Likewise. (micromips_to_32_reg_q_map): Likewise. (micromips_to_32_reg_b_map): New macro. (micromips_to_32_reg_c_map): Likewise. (micromips_to_32_reg_d_map): Likewise. (micromips_to_32_reg_e_map): Likewise. (micromips_to_32_reg_f_map): Likewise. (micromips_to_32_reg_g_map): Likewise. (micromips_to_32_reg_l_map): Likewise. (micromips_to_32_reg_n_map): Likewise. (micromips_imm_b_map, micromips_imm_c_map): New macros. (RELAX_DELAY_SLOT_16BIT): New macro. (RELAX_DELAY_SLOT_SIZE_FIRST): Likewise. (RELAX_DELAY_SLOT_SIZE_SECOND): Likewise. (RELAX_MICROMIPS_ENCODE, RELAX_MICROMIPS_P): New macros. (RELAX_MICROMIPS_TYPE, RELAX_MICROMIPS_AT): Likewise. (RELAX_MICROMIPS_U16BIT, RELAX_MICROMIPS_UNCOND): Likewise. (RELAX_MICROMIPS_COMPACT, RELAX_MICROMIPS_LINK): Likewise. (RELAX_MICROMIPS_RELAX32, RELAX_MICROMIPS_TOOFAR16): Likewise. (RELAX_MICROMIPS_MARK_TOOFAR16): Likewise. (RELAX_MICROMIPS_CLEAR_TOOFAR16): Likewise. (RELAX_MICROMIPS_TOOFAR32): Likewise. (RELAX_MICROMIPS_MARK_TOOFAR32): Likewise. (RELAX_MICROMIPS_CLEAR_TOOFAR32): Likewise. (INSERT_OPERAND, EXTRACT_OPERAND): Handle microMIPS ASE. (mips_macro_warning): Add delay_slot_16bit_p, delay_slot_32bit_p, fsize and insns. (mips_mark_labels): New function. (mips16_small, mips16_ext): Remove variables, replacing with... (forced_insn_size): ... this. (append_insn, mips16_ip): Update accordingly. (micromips_insn_length): New function. (insn_length): Return the length of microMIPS instructions. (mips_record_mips16_mode): Rename to... (mips_record_compressed_mode): ... this. Handle microMIPS ASE. (install_insn): Handle microMIPS ASE. (reglist_lookup): New function. (is_size_valid, is_delay_slot_valid): Likewise. (md_begin): Handle microMIPS ASE. (md_assemble): Likewise. Update for append_insn interface change. (micromips_reloc_p): New function. (got16_reloc_p): Handle microMIPS ASE. (hi16_reloc_p): Likewise. (lo16_reloc_p): Likewise. (jmp_reloc_p): New function. (jalr_reloc_p): Likewise. (matching_lo_reloc): Handle microMIPS ASE. (insn_uses_reg, reg_needs_delay): Likewise. (mips_move_labels): Likewise. (mips16_mark_labels): Rename to... (mips_compressed_mark_labels): ... this. Handle microMIPS ASE. (gpr_mod_mask): New function. (gpr_read_mask, gpr_write_mask): Handle microMIPS ASE. (fpr_read_mask, fpr_write_mask): Likewise. (insns_between, nops_for_vr4130, nops_for_insn): Likewise. (fix_loongson2f_nop, fix_loongson2f_jump): Likewise. (MICROMIPS_LABEL_CHAR): New macro. (micromips_target_label, micromips_target_name): New variables. (micromips_label_name, micromips_label_expr): New functions. (micromips_label_inc, micromips_add_label): Likewise. (mips_label_is_local): Likewise. (micromips_map_reloc): Likewise. (can_swap_branch_p): Handle microMIPS ASE. (append_insn): Add expansionp argument. Handle microMIPS ASE. (start_noreorder, end_noreorder): Handle microMIPS ASE. (macro_start, macro_warning, macro_end): Likewise. (brk_fmt, cop12_fmt, jalr_fmt, lui_fmt): New variables. (mem12_fmt, mfhl_fmt, shft_fmt, trap_fmt): Likewise. (BRK_FMT, COP12_FMT, JALR_FMT, LUI_FMT): New macros. (MEM12_FMT, MFHL_FMT, SHFT_FMT, TRAP_FMT): Likewise. (macro_build): Handle microMIPS ASE. Update for append_insn interface change. (mips16_macro_build): Update for append_insn interface change. (macro_build_jalr): Handle microMIPS ASE. (macro_build_lui): Likewise. Simplify. (load_register): Handle microMIPS ASE. (load_address): Likewise. (move_register): Likewise. (macro_build_branch_likely): New function. (macro_build_branch_ccl): Likewise. (macro_build_branch_rs): Likewise. (macro_build_branch_rsrt): Likewise. (macro): Handle microMIPS ASE. (validate_micromips_insn): New function. (expr_const_in_range): Likewise. (mips_ip): Handle microMIPS ASE. (options): Add OPTION_MICROMIPS and OPTION_NO_MICROMIPS. (md_longopts): Add mmicromips and mno-micromips. (md_parse_option): Handle OPTION_MICROMIPS and OPTION_NO_MICROMIPS. (mips_after_parse_args): Handle microMIPS ASE. (md_pcrel_from): Handle microMIPS relocations. (mips_force_relocation): Likewise. (md_apply_fix): Likewise. (mips_align): Handle microMIPS ASE. (s_mipsset): Likewise. (s_cpload, s_cpsetup, s_cpreturn): Use relocation wrappers. (s_dtprel_internal): Likewise. (s_gpword, s_gpdword): Likewise. (s_insn): Handle microMIPS ASE. (s_mips_stab): Likewise. (relaxed_micromips_32bit_branch_length): New function. (relaxed_micromips_16bit_branch_length): New function. (md_estimate_size_before_relax): Handle microMIPS ASE. (mips_fix_adjustable): Likewise. (tc_gen_reloc): Handle microMIPS relocations. (mips_relax_frag): Handle microMIPS ASE. (md_convert_frag): Likewise. (mips_frob_file_after_relocs): Likewise. (mips_elf_final_processing): Likewise. (mips_nop_opcode): Likewise. (mips_handle_align): Likewise. (md_show_usage): Handle microMIPS options. * symbols.c (TC_LABEL_IS_LOCAL): New macro. (S_IS_LOCAL): Add a TC_LABEL_IS_LOCAL check. * doc/as.texinfo (Target MIPS options): Add -mmicromips and -mno-micromips. (-mmicromips, -mno-micromips): New options. * doc/c-mips.texi (-mmicromips, -mno-micromips): New options. (MIPS ISA): Document .set micromips and .set nomicromips. (MIPS insn): Update for microMIPS support. gas/testsuite/ 2011-02-25 Maciej W. Rozycki <macro@codesourcery.com> Chao-ying Fu <fu@mips.com> Richard Sandiford <rdsandiford@googlemail.com> * gas/mips/micromips.d: New test. * gas/mips/micromips-branch-delay.d: Likewise. * gas/mips/micromips-branch-relax.d: Likewise. * gas/mips/micromips-branch-relax-pic.d: Likewise. * gas/mips/micromips-size-1.d: Likewise. * gas/mips/micromips-trap.d: Likewise. * gas/mips/micromips.l: New stderr output. * gas/mips/micromips-branch-delay.l: Likewise. * gas/mips/micromips-branch-relax.l: Likewise. * gas/mips/micromips-branch-relax-pic.l: Likewise. * gas/mips/micromips-size-0.l: New list test. * gas/mips/micromips-size-1.l: New stderr output. * gas/mips/micromips.s: New test source. * gas/mips/micromips-branch-delay.s: Likewise. * gas/mips/micromips-branch-relax.s: Likewise. * gas/mips/micromips-size-0.s: Likewise. * gas/mips/micromips-size-1.s: Likewise. * gas/mips/mips.exp: Run the new tests. * gas/mips/dli.s: Use .p2align. * gas/mips/elf_ase_micromips.d: New test. * gas/mips/elf_ase_micromips-2.d: Likewise. * gas/mips/micromips@abs.d: Likewise. * gas/mips/micromips@add.d: Likewise. * gas/mips/micromips@alnv_ps-swap.d: Likewise. * gas/mips/micromips@and.d: Likewise. * gas/mips/micromips@beq.d: Likewise. * gas/mips/micromips@bge.d: Likewise. * gas/mips/micromips@bgeu.d: Likewise. * gas/mips/micromips@blt.d: Likewise. * gas/mips/micromips@bltu.d: Likewise. * gas/mips/micromips@branch-likely.d: Likewise. * gas/mips/micromips@branch-misc-1.d: Likewise. * gas/mips/micromips@branch-misc-2-64.d: Likewise. * gas/mips/micromips@branch-misc-2.d: Likewise. * gas/mips/micromips@branch-misc-2pic-64.d: Likewise. * gas/mips/micromips@branch-misc-2pic.d: Likewise. * gas/mips/micromips@branch-misc-4-64.d: Likewise. * gas/mips/micromips@branch-misc-4.d: Likewise. * gas/mips/micromips@branch-self.d: Likewise. * gas/mips/micromips@cache.d: Likewise. * gas/mips/micromips@daddi.d: Likewise. * gas/mips/micromips@dli.d: Likewise. * gas/mips/micromips@elf-jal.d: Likewise. * gas/mips/micromips@elf-rel2.d: Likewise. * gas/mips/micromips@elfel-rel2.d: Likewise. * gas/mips/micromips@elf-rel4.d: Likewise. * gas/mips/micromips@jal-svr4pic.d: Likewise. * gas/mips/micromips@jal-svr4pic-noreorder.d: Likewise. * gas/mips/micromips@lb-svr4pic-ilocks.d: Likewise. * gas/mips/micromips@li.d: Likewise. * gas/mips/micromips@loc-swap-dis.d: Likewise. * gas/mips/micromips@loc-swap.d: Likewise. * gas/mips/micromips@mips1-fp.d: Likewise. * gas/mips/micromips@mips32-cp2.d: Likewise. * gas/mips/micromips@mips32-imm.d: Likewise. * gas/mips/micromips@mips32-sf32.d: Likewise. * gas/mips/micromips@mips32.d: Likewise. * gas/mips/micromips@mips32r2-cp2.d: Likewise. * gas/mips/micromips@mips32r2-fp32.d: Likewise. * gas/mips/micromips@mips32r2-sync.d: Likewise. * gas/mips/micromips@mips32r2.d: Likewise. * gas/mips/micromips@mips4-branch-likely.d: Likewise. * gas/mips/micromips@mips4-fp.d: Likewise. * gas/mips/micromips@mips4.d: Likewise. * gas/mips/micromips@mips5.d: Likewise. * gas/mips/micromips@mips64-cp2.d: Likewise. * gas/mips/micromips@mips64.d: Likewise. * gas/mips/micromips@mips64r2.d: Likewise. * gas/mips/micromips@pref.d: Likewise. * gas/mips/micromips@relax-at.d: Likewise. * gas/mips/micromips@relax.d: Likewise. * gas/mips/micromips@rol-hw.d: Likewise. * gas/mips/micromips@uld2-eb.d: Likewise. * gas/mips/micromips@uld2-el.d: Likewise. * gas/mips/micromips@ulh2-eb.d: Likewise. * gas/mips/micromips@ulh2-el.d: Likewise. * gas/mips/micromips@ulw2-eb-ilocks.d: Likewise. * gas/mips/micromips@ulw2-el-ilocks.d: Likewise. * gas/mips/cache.d: Likewise. * gas/mips/daddi.d: Likewise. * gas/mips/mips32-imm.d: Likewise. * gas/mips/pref.d: Likewise. * gas/mips/elf-rel27.d: Handle microMIPS ASE. * gas/mips/l_d.d: Likewise. * gas/mips/l_d-n32.d: Likewise. * gas/mips/l_d-n64.d: Likewise. * gas/mips/ld.d: Likewise. * gas/mips/ld-n32.d: Likewise. * gas/mips/ld-n64.d: Likewise. * gas/mips/s_d.d: Likewise. * gas/mips/s_d-n32.d: Likewise. * gas/mips/s_d-n64.d: Likewise. * gas/mips/sd.d: Likewise. * gas/mips/sd-n32.d: Likewise. * gas/mips/sd-n64.d: Likewise. * gas/mips/mips32.d: Update immediates. * gas/mips/micromips@mips32-cp2.s: New test source. * gas/mips/micromips@mips32-imm.s: Likewise. * gas/mips/micromips@mips32r2-cp2.s: Likewise. * gas/mips/micromips@mips64-cp2.s: Likewise. * gas/mips/cache.s: Likewise. * gas/mips/daddi.s: Likewise. * gas/mips/mips32-imm.s: Likewise. * gas/mips/elf-rel4.s: Handle microMIPS ASE. * gas/mips/lb-pic.s: Likewise. * gas/mips/ld.s: Likewise. * gas/mips/mips32.s: Likewise. * gas/mips/mips.exp: Add the micromips arch. Exclude mips16e from micromips. Run mips32-imm. * gas/mips/jal-mask-11.d: New test. * gas/mips/jal-mask-12.d: Likewise. * gas/mips/micromips@jal-mask-11.d: Likewise. * gas/mips/jal-mask-1.s: Source for the new tests. * gas/mips/jal-mask-21.d: New test. * gas/mips/jal-mask-22.d: Likewise. * gas/mips/micromips@jal-mask-12.d: Likewise. * gas/mips/jal-mask-2.s: Source for the new tests. * gas/mips/mips.exp: Run the new tests. * gas/mips/mips16-e.d: Add --special-syms to `objdump'. * gas/mips/tmips16-e.d: Likewise. * gas/mips/mipsel16-e.d: Likewise. * gas/mips/tmipsel16-e.d: Likewise. * gas/mips/and.s: Adjust padding. * gas/mips/beq.s: Likewise. * gas/mips/bge.s: Likewise. * gas/mips/bgeu.s: Likewise. * gas/mips/blt.s: Likewise. * gas/mips/bltu.s: Likewise. * gas/mips/branch-misc-2.s: Likewise. * gas/mips/jal.s: Likewise. * gas/mips/li.s: Likewise. * gas/mips/mips4.s: Likewise. * gas/mips/mips4-fp.s: Likewise. * gas/mips/relax.s: Likewise. * gas/mips/and.d: Update accordingly. * gas/mips/elf-jal.d: Likewise. * gas/mips/jal.d: Likewise. * gas/mips/li.d: Likewise. * gas/mips/relax-at.d: Likewise. * gas/mips/relax.d: Likewise. include/elf/ 2011-02-25 Chao-ying Fu <fu@mips.com> Maciej W. Rozycki <macro@codesourcery.com> * mips.h (R_MICROMIPS_min): New relocations. (R_MICROMIPS_26_S1): Likewise. (R_MICROMIPS_HI16, R_MICROMIPS_LO16): Likewise. (R_MICROMIPS_GPREL16, R_MICROMIPS_LITERAL): Likewise. (R_MICROMIPS_GOT16, R_MICROMIPS_PC7_S1): Likewise. (R_MICROMIPS_PC10_S1, R_MICROMIPS_PC16_S1): Likewise. (R_MICROMIPS_CALL16, R_MICROMIPS_GOT_DISP): Likewise. (R_MICROMIPS_GOT_PAGE, R_MICROMIPS_GOT_OFST): Likewise. (R_MICROMIPS_GOT_HI16, R_MICROMIPS_GOT_LO16): Likewise. (R_MICROMIPS_SUB, R_MICROMIPS_HIGHER): Likewise. (R_MICROMIPS_HIGHEST, R_MICROMIPS_CALL_HI16): Likewise. (R_MICROMIPS_CALL_LO16, R_MICROMIPS_SCN_DISP): Likewise. (R_MICROMIPS_JALR, R_MICROMIPS_HI0_LO16): Likewise. (R_MICROMIPS_TLS_GD, R_MICROMIPS_TLS_LDM): Likewise. (R_MICROMIPS_TLS_DTPREL_HI, R_MICROMIPS_TLS_DTPREL_LO): Likewise. (R_MICROMIPS_TLS_GOTTPREL): Likewise. (R_MICROMIPS_TLS_TPREL_HI16): Likewise. (R_MICROMIPS_TLS_TPREL_LO16): Likewise. (R_MICROMIPS_GPREL7_S2, R_MICROMIPS_PC23_S2): Likewise. (R_MICROMIPS_max): Likewise. (EF_MIPS_ARCH_ASE_MICROMIPS): New macro. (STO_MIPS_ISA, STO_MIPS_FLAGS): Likewise. (ELF_ST_IS_MIPS_PLT, ELF_ST_SET_MIPS_PLT): Likewise. (STO_MICROMIPS): Likewise. (ELF_ST_IS_MICROMIPS, ELF_ST_SET_MICROMIPS): Likewise. (ELF_ST_IS_COMPRESSED): Likewise. (STO_MIPS_PLT, STO_MIPS_PIC): Rework. (ELF_ST_IS_MIPS_PIC, ELF_ST_SET_MIPS_PIC): Likewise. (STO_MIPS16, ELF_ST_IS_MIPS16, ELF_ST_SET_MIPS16): Likewise. include/opcode/ 2011-02-25 Chao-ying Fu <fu@mips.com> Maciej W. Rozycki <macro@codesourcery.com> * mips.h (OP_MASK_EXTLSB, OP_SH_EXTLSB): New macros. (OP_MASK_STYPE, OP_SH_STYPE): Likewise. (OP_MASK_CODE10, OP_SH_CODE10): Likewise. (OP_MASK_TRAP, OP_SH_TRAP): Likewise. (OP_MASK_OFFSET12, OP_SH_OFFSET12): Likewise. (OP_MASK_OFFSET10, OP_SH_OFFSET10): Likewise. (OP_MASK_RS3, OP_SH_RS3): Likewise. (OP_MASK_MB, OP_SH_MB, OP_MASK_MC, OP_SH_MC): Likewise. (OP_MASK_MD, OP_SH_MD, OP_MASK_ME, OP_SH_ME): Likewise. (OP_MASK_MF, OP_SH_MF, OP_MASK_MG, OP_SH_MG): Likewise. (OP_MASK_MJ, OP_SH_MJ, OP_MASK_ML, OP_SH_ML): Likewise. (OP_MASK_MP, OP_SH_MP, OP_MASK_MQ, OP_SH_MQ): Likewise. (OP_MASK_IMMA, OP_SH_IMMA, OP_MASK_IMMB, OP_SH_IMMB): Likewise. (OP_MASK_IMMC, OP_SH_IMMC, OP_MASK_IMMF, OP_SH_IMMF): Likewise. (OP_MASK_IMMG, OP_SH_IMMG, OP_MASK_IMMH, OP_SH_IMMH): Likewise. (OP_MASK_IMMI, OP_SH_IMMI, OP_MASK_IMMJ, OP_SH_IMMJ): Likewise. (OP_MASK_IMML, OP_SH_IMML, OP_MASK_IMMM, OP_SH_IMMM): Likewise. (OP_MASK_IMMN, OP_SH_IMMN, OP_MASK_IMMO, OP_SH_IMMO): Likewise. (OP_MASK_IMMP, OP_SH_IMMP, OP_MASK_IMMQ, OP_SH_IMMQ): Likewise. (OP_MASK_IMMU, OP_SH_IMMU, OP_MASK_IMMW, OP_SH_IMMW): Likewise. (OP_MASK_IMMX, OP_SH_IMMX, OP_MASK_IMMY, OP_SH_IMMY): Likewise. (INSN_WRITE_GPR_S): New macro. (INSN2_BRANCH_DELAY_16BIT, INSN2_BRANCH_DELAY_32BIT): Likewise. (INSN2_READ_FPR_D): Likewise. (INSN2_MOD_GPR_MB, INSN2_MOD_GPR_MC): Likewise. (INSN2_MOD_GPR_MD, INSN2_MOD_GPR_ME): Likewise. (INSN2_MOD_GPR_MF, INSN2_MOD_GPR_MG): Likewise. (INSN2_MOD_GPR_MJ, INSN2_MOD_GPR_MP): Likewise. (INSN2_MOD_GPR_MQ, INSN2_MOD_SP): Likewise. (INSN2_READ_GPR_31, INSN2_READ_GP, INSN2_READ_PC): Likewise. (INSN2_UNCOND_BRANCH, INSN2_COND_BRANCH): Likewise. (INSN2_MOD_GPR_MHI, INSN2_MOD_GPR_MM, INSN2_MOD_GPR_MN): Likewise. (CPU_MICROMIPS): New macro. (M_BC1FL, M_BC1TL, M_BC2FL, M_BC2TL): New enum values. (M_BEQL, M_BGEZ, M_BGEZL, M_BGEZALL, M_BGTZ, M_BGTZL): Likewise. (M_BLEZ, M_BLEZL, M_BLTZ, M_BLTZL, M_BLTZALL, M_BNEL): Likewise. (M_CACHE_OB, M_JALS_1, M_JALS_2, M_JALS_A): Likewise. (M_LDC2_OB, M_LDL_OB, M_LDM_AB, M_LDM_OB): Likewise. (M_LDP_AB, M_LDP_OB, M_LDR_OB, M_LL_OB, M_LLD_OB): Likewise. (M_LWC2_OB, M_LWL_OB, M_LWM_AB, M_LWM_OB): Likewise. (M_LWP_AB, M_LWP_OB, M_LWR_OB): Likewise. (M_LWU_OB, M_PREF_OB, M_SC_OB, M_SCD_OB): Likewise. (M_SDC2_OB, M_SDL_OB, M_SDM_AB, M_SDM_OB): Likewise. (M_SDP_AB, M_SDP_OB, M_SDR_OB): Likewise. (M_SWC2_OB, M_SWL_OB, M_SWM_AB, M_SWM_OB): Likewise. (M_SWP_AB, M_SWP_OB, M_SWR_OB): Likewise. (MICROMIPSOP_MASK_MAJOR, MICROMIPSOP_SH_MAJOR): New macros. (MICROMIPSOP_MASK_IMMEDIATE, MICROMIPSOP_SH_IMMEDIATE): Likewise. (MICROMIPSOP_MASK_DELTA, MICROMIPSOP_SH_DELTA): Likewise. (MICROMIPSOP_MASK_CODE10, MICROMIPSOP_SH_CODE10): Likewise. (MICROMIPSOP_MASK_TRAP, MICROMIPSOP_SH_TRAP): Likewise. (MICROMIPSOP_MASK_SHAMT, MICROMIPSOP_SH_SHAMT): Likewise. (MICROMIPSOP_MASK_TARGET, MICROMIPSOP_SH_TARGET): Likewise. (MICROMIPSOP_MASK_EXTLSB, MICROMIPSOP_SH_EXTLSB): Likewise. (MICROMIPSOP_MASK_EXTMSBD, MICROMIPSOP_SH_EXTMSBD): Likewise. (MICROMIPSOP_MASK_INSMSB, MICROMIPSOP_SH_INSMSB): Likewise. (MICROMIPSOP_MASK_CODE, MICROMIPSOP_SH_CODE): Likewise. (MICROMIPSOP_MASK_CODE2, MICROMIPSOP_SH_CODE2): Likewise. (MICROMIPSOP_MASK_CACHE, MICROMIPSOP_SH_CACHE): Likewise. (MICROMIPSOP_MASK_SEL, MICROMIPSOP_SH_SEL): Likewise. (MICROMIPSOP_MASK_OFFSET12, MICROMIPSOP_SH_OFFSET12): Likewise. (MICROMIPSOP_MASK_3BITPOS, MICROMIPSOP_SH_3BITPOS): Likewise. (MICROMIPSOP_MASK_STYPE, MICROMIPSOP_SH_STYPE): Likewise. (MICROMIPSOP_MASK_OFFSET10, MICROMIPSOP_SH_OFFSET10): Likewise. (MICROMIPSOP_MASK_RS, MICROMIPSOP_SH_RS): Likewise. (MICROMIPSOP_MASK_RT, MICROMIPSOP_SH_RT): Likewise. (MICROMIPSOP_MASK_RD, MICROMIPSOP_SH_RD): Likewise. (MICROMIPSOP_MASK_FS, MICROMIPSOP_SH_FS): Likewise. (MICROMIPSOP_MASK_FT, MICROMIPSOP_SH_FT): Likewise. (MICROMIPSOP_MASK_FD, MICROMIPSOP_SH_FD): Likewise. (MICROMIPSOP_MASK_FR, MICROMIPSOP_SH_FR): Likewise. (MICROMIPSOP_MASK_RS3, MICROMIPSOP_SH_RS3): Likewise. (MICROMIPSOP_MASK_PREFX, MICROMIPSOP_SH_PREFX): Likewise. (MICROMIPSOP_MASK_BCC, MICROMIPSOP_SH_BCC): Likewise. (MICROMIPSOP_MASK_CCC, MICROMIPSOP_SH_CCC): Likewise. (MICROMIPSOP_MASK_COPZ, MICROMIPSOP_SH_COPZ): Likewise. (MICROMIPSOP_MASK_MB, MICROMIPSOP_SH_MB): Likewise. (MICROMIPSOP_MASK_MC, MICROMIPSOP_SH_MC): Likewise. (MICROMIPSOP_MASK_MD, MICROMIPSOP_SH_MD): Likewise. (MICROMIPSOP_MASK_ME, MICROMIPSOP_SH_ME): Likewise. (MICROMIPSOP_MASK_MF, MICROMIPSOP_SH_MF): Likewise. (MICROMIPSOP_MASK_MG, MICROMIPSOP_SH_MG): Likewise. (MICROMIPSOP_MASK_MH, MICROMIPSOP_SH_MH): Likewise. (MICROMIPSOP_MASK_MI, MICROMIPSOP_SH_MI): Likewise. (MICROMIPSOP_MASK_MJ, MICROMIPSOP_SH_MJ): Likewise. (MICROMIPSOP_MASK_ML, MICROMIPSOP_SH_ML): Likewise. (MICROMIPSOP_MASK_MM, MICROMIPSOP_SH_MM): Likewise. (MICROMIPSOP_MASK_MN, MICROMIPSOP_SH_MN): Likewise. (MICROMIPSOP_MASK_MP, MICROMIPSOP_SH_MP): Likewise. (MICROMIPSOP_MASK_MQ, MICROMIPSOP_SH_MQ): Likewise. (MICROMIPSOP_MASK_IMMA, MICROMIPSOP_SH_IMMA): Likewise. (MICROMIPSOP_MASK_IMMB, MICROMIPSOP_SH_IMMB): Likewise. (MICROMIPSOP_MASK_IMMC, MICROMIPSOP_SH_IMMC): Likewise. (MICROMIPSOP_MASK_IMMD, MICROMIPSOP_SH_IMMD): Likewise. (MICROMIPSOP_MASK_IMME, MICROMIPSOP_SH_IMME): Likewise. (MICROMIPSOP_MASK_IMMF, MICROMIPSOP_SH_IMMF): Likewise. (MICROMIPSOP_MASK_IMMG, MICROMIPSOP_SH_IMMG): Likewise. (MICROMIPSOP_MASK_IMMH, MICROMIPSOP_SH_IMMH): Likewise. (MICROMIPSOP_MASK_IMMI, MICROMIPSOP_SH_IMMI): Likewise. (MICROMIPSOP_MASK_IMMJ, MICROMIPSOP_SH_IMMJ): Likewise. (MICROMIPSOP_MASK_IMML, MICROMIPSOP_SH_IMML): Likewise. (MICROMIPSOP_MASK_IMMM, MICROMIPSOP_SH_IMMM): Likewise. (MICROMIPSOP_MASK_IMMN, MICROMIPSOP_SH_IMMN): Likewise. (MICROMIPSOP_MASK_IMMO, MICROMIPSOP_SH_IMMO): Likewise. (MICROMIPSOP_MASK_IMMP, MICROMIPSOP_SH_IMMP): Likewise. (MICROMIPSOP_MASK_IMMQ, MICROMIPSOP_SH_IMMQ): Likewise. (MICROMIPSOP_MASK_IMMU, MICROMIPSOP_SH_IMMU): Likewise. (MICROMIPSOP_MASK_IMMW, MICROMIPSOP_SH_IMMW): Likewise. (MICROMIPSOP_MASK_IMMX, MICROMIPSOP_SH_IMMX): Likewise. (MICROMIPSOP_MASK_IMMY, MICROMIPSOP_SH_IMMY): Likewise. (MICROMIPSOP_MASK_CODE, MICROMIPSOP_SH_CODE): Likewise. (MICROMIPSOP_MASK_CODE2, MICROMIPSOP_SH_CODE2): Likewise. (MICROMIPSOP_MASK_CACHE, MICROMIPSOP_SH_CACHE): Likewise. (MICROMIPSOP_MASK_CODE20, MICROMIPSOP_SH_CODE20): Likewise. (MICROMIPSOP_MASK_PERFREG, MICROMIPSOP_SH_PERFREG): Likewise. (MICROMIPSOP_MASK_CODE19, MICROMIPSOP_SH_CODE19): Likewise. (MICROMIPSOP_MASK_ALN, MICROMIPSOP_SH_ALN): Likewise. (MICROMIPSOP_MASK_VECBYTE, MICROMIPSOP_SH_VECBYTE): Likewise. (MICROMIPSOP_MASK_VECALIGN, MICROMIPSOP_SH_VECALIGN): Likewise. (MICROMIPSOP_MASK_DSPACC, MICROMIPSOP_SH_DSPACC): Likewise. (MICROMIPSOP_MASK_DSPACC_S, MICROMIPSOP_SH_DSPACC_S): Likewise. (MICROMIPSOP_MASK_DSPSFT, MICROMIPSOP_SH_DSPSFT): Likewise. (MICROMIPSOP_MASK_DSPSFT_7, MICROMIPSOP_SH_DSPSFT_7): Likewise. (MICROMIPSOP_MASK_SA3, MICROMIPSOP_SH_SA3): Likewise. (MICROMIPSOP_MASK_SA4, MICROMIPSOP_SH_SA4): Likewise. (MICROMIPSOP_MASK_IMM8, MICROMIPSOP_SH_IMM8): Likewise. (MICROMIPSOP_MASK_IMM10, MICROMIPSOP_SH_IMM10): Likewise. (MICROMIPSOP_MASK_WRDSP, MICROMIPSOP_SH_WRDSP): Likewise. (MICROMIPSOP_MASK_RDDSP, MICROMIPSOP_SH_RDDSP): Likewise. (MICROMIPSOP_MASK_BP, MICROMIPSOP_SH_BP): Likewise. (MICROMIPSOP_MASK_MT_U, MICROMIPSOP_SH_MT_U): Likewise. (MICROMIPSOP_MASK_MT_H, MICROMIPSOP_SH_MT_H): Likewise. (MICROMIPSOP_MASK_MTACC_T, MICROMIPSOP_SH_MTACC_T): Likewise. (MICROMIPSOP_MASK_MTACC_D, MICROMIPSOP_SH_MTACC_D): Likewise. (MICROMIPSOP_MASK_BBITIND, MICROMIPSOP_SH_BBITIND): Likewise. (MICROMIPSOP_MASK_CINSPOS, MICROMIPSOP_SH_CINSPOS): Likewise. (MICROMIPSOP_MASK_CINSLM1, MICROMIPSOP_SH_CINSLM1): Likewise. (MICROMIPSOP_MASK_SEQI, MICROMIPSOP_SH_SEQI): Likewise. (micromips_opcodes): New declaration. (bfd_micromips_num_opcodes): Likewise. ld/testsuite/ 2011-02-25 Catherine Moore <clm@codesourcery.com> Chao-ying Fu <fu@mips.com> Maciej W. Rozycki <macro@codesourcery.com> * lib/ld-lib.exp (run_dump_test): Support distinct assembler flags for the same source named multiple times. * ld-mips-elf/jalx-1.s: New test source. * ld-mips-elf/jalx-1.d: New test output. * ld-mips-elf/jalx-1.ld: New test linker script. * ld-mips-elf/jalx-2-main.s: New test source. * ld-mips-elf/jalx-2-ex.s: Likewise. * ld-mips-elf/jalx-2-printf.s: Likewise. * ld-mips-elf/jalx-2.dd: New test output. * ld-mips-elf/jalx-2.ld: New test linker script. * ld-mips-elf/mips16-and-micromips.d: New test. * ld-mips-elf/mips-elf.exp: Run the new tests opcodes/ 2011-02-25 Chao-ying Fu <fu@mips.com> Maciej W. Rozycki <macro@codesourcery.com> * micromips-opc.c: New file. * mips-dis.c (micromips_to_32_reg_b_map): New array. (micromips_to_32_reg_c_map, micromips_to_32_reg_d_map): Likewise. (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map): Likewise. (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map): Likewise. (micromips_to_32_reg_q_map): Likewise. (micromips_imm_b_map, micromips_imm_c_map): Likewise. (micromips_ase): New variable. (is_micromips): New function. (set_default_mips_dis_options): Handle microMIPS ASE. (print_insn_micromips): New function. (is_compressed_mode_p): Likewise. (_print_insn_mips): Handle microMIPS instructions. * Makefile.am (CFILES): Add micromips-opc.c. * configure.in (bfd_mips_arch): Add micromips-opc.lo. * Makefile.in: Regenerate. * configure: Regenerate. * mips-dis.c (micromips_to_32_reg_h_map): New variable. (micromips_to_32_reg_i_map): Likewise. (micromips_to_32_reg_m_map): Likewise. (micromips_to_32_reg_n_map): New macro.
2011-07-24 14:20:15 +00:00
[@b{-mmicromips}] [@b{-mno-micromips}]
[@b{-msmartmips}] [@b{-mno-smartmips}]
[ gas/ChangeLog ] 2002-03-15 Chris G. Demetriou <cgd@broadcom.com> * config/tc-mips.c (mips_set_options): New "ase_mips3d" member. (mips_opts): Initialize "ase_mips3d" member. (file_ase_mips3d): New variable. (CPU_HAS_MIPS3D): New macro. (md_begin): Initialize mips_opts.ase_mips3d and file_ase_mips3d based on command line options and configuration defaults. (macro_build, mips_ip): Accept MIPS-3D instructions if mips_opts.ase_mips3d is set. (OPTION_MIPS3D, OPTION_NO_MIPS3D, md_longopts, md_parse_option): Add support for "-mips3d" and "-no-mips3d" options. (OPTION_ELF_BASE): Move to accomodate new options. (s_mipsset): Support ".set mips3d" and ".set nomips3d". (mips_elf_final_processing): Add a comment indicating that a MIPS-3D ASE ELF header flag should be set, when one exists. * doc/as.texinfo: Document -mips3d and -no-mips3d options. * doc/c-mips.texi: Likewise, and document ".set mips3d" and ".set nomips3d" directives. [ gas/testsuite/ChangeLog ] 2002-03-15 Chris G. Demetriou <cgd@broadcom.com> * gas/mips/mips64-mips3d.s: New file. * gas/mips/mips64-mips3d.d: Likewise. * gas/mips/mips.exp: Run new "mips64-mips3d" test. [ include/opcode/ChangeLog ] 2002-03-15 Chris G. Demetriou <cgd@broadcom.com> * mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D instructions. (OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks may be passed along with the ISA bitmask. [ opcodes/ChangeLog ] 2002-03-15 Chris G. Demetriou <cgd@broadcom.com> * mips-dis.c (mips_isa_type): Add MIPS3D instructions to the ISA bit masks for bfd_mach_mips_sb1 and bfd_mach_mipsisa64. Add comments for bfd_mach_mipsisa32 and bfd_mach_mipsisa64 that indicate that they should dissassemble all applicable MIPS-specified ASEs. * mips-opc.c: Add support for MIPS-3D instructions. (M3D): New definition. * mips-opc.c: Update copyright years.
2002-03-16 03:09:19 +00:00
[@b{-mips3d}] [@b{-no-mips3d}]
[ gas/ChangeLog ] 2002-05-30 Chris G. Demetriou <cgd@broadcom.com> Ed Satterthwaite <ehs@broadcom.com> * config/tc-mips.c (mips_set_options): New "ase_mdmx" member. (mips_opts): Initialize "ase_mdmx" member. (file_ase_mdmx): New variable. (CPU_HAS_MDMX): New macro. (md_begin): Initialize mips_opts.ase_mdmx and file_ase_mdmx based on command line options and configuration defaults. (macro_build): Note in comment that use of MDMX in macros is not currently allowed. (validate_mips_insn): Add support for the "O", "Q", "X", "Y", and "Z" MDMX operand types. (mips_ip): Accept MDMX instructions if mips_opts.ase_mdmx is set, and add support for the "O", "Q", "X", "Y", and "Z" MDMX operand types. (OPTION_MDMX, OPTION_NO_MDMX, md_longopts, md_parse_option): Add support for "-mdmx" and "-no-mdmx" options. (OPTION_ELF_BASE): Move to accomodate new options. (s_mipsset): Support ".set mdmx" and ".set nomdmx". (mips_elf_final_processing): Set MDMX ASE ELF header flag if file_ase_mdmx was set. * doc/as.texinfo: Document -mdmx and -no-mdmx options. * doc/c-mips.texi: Likewise, and document ".set mdmx" and ".set nomdmx" directives. [ gas/testsuite/ChangeLog ] 2002-05-30 Chris G. Demetriou <cgd@broadcom.com> * gas/mips/mips64-mdmx.s: New file. * gas/mips/mips64-mdmx.d: Likewise. * gas/mips/mips.exp: Run new "mips64-mdmx" test. [ include/opcode/ChangeLog ] 2002-05-30 Chris G. Demetriou <cgd@broadcom.com> * mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL) (MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH) (MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC) (INSN_MDMX): New constants, for MDMX support. (opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX. [ opcodes/ChangeLog ] 2002-05-30 Chris G. Demetriou <cgd@broadcom.com> Ed Satterthwaite <ehs@broadcom.com> * mips-dis.c (print_insn_arg): Add support for 'O', 'Q', 'X', 'Y', and 'Z' formats, for MDMX. (mips_isa_type): Add MDMX instructions to the ISA bit mask for bfd_mach_mipsisa64. * mips-opc.c: Add support for MDMX instructions. (MX): New definition. * mips-dis.c: Update copyright years to include 2002.
2002-05-31 01:17:18 +00:00
[@b{-mdmx}] [@b{-no-mdmx}]
[@b{-mdsp}] [@b{-mno-dsp}]
[ gas/ChangeLog ] * config/tc-mips.c (mips_set_options, mips_opts, file_ase_dspr2, ISA_SUPPORTS_DSPR2_ASE, MIPS_CPU_ASE_DSPR2): Add DSP R2 ASE support. (macro_build): Add case '2'. (macro): Expand M_BALIGN to nop, packrl.ph or balign. (validate_mips_insn): Add support for balign instruction. (mips_ip): Handle DSP R2 instructions. Support balign instruction. (OPTION_DSPR2, OPTION_NO_DSPR2, OPTION_COMPAT_ARCH_BASE, md_parse_option, mips_after_parse_args): Add -mdspr2 and -mno-dspr2 command line options. (s_mipsset): Add support for .set dspr2 and .set nodspr2 directives. (md_show_usage): Add -mdspr2 and -mno-dspr2 help output. * doc/c-mips.texi, doc/as.texinfo: Document -mdspr2, -mno-dspr2, .set dspr2, .set nodspr2. [ gas/testsuite/ChangeLog ] * gas/mips/mips32-dspr2.s, gas/mips/mips32-dspr2.d: New test for DSP R2. * gas/mips/mips.exp: Run new test. [ include/opcode/Changelog ] * mips.h (OP_SH_BP, OP_MASK_BP): Add support for balign instruction. (INSN_DSPR2): Add flag for DSP R2 instructions. (M_BALIGN): New macro. [ opcodes/ChangeLog ] * mips-dis.c (mips_arch_choices): Add DSP R2 support. (print_insn_args): Add support for balign instruction. * mips-opc.c (D33): New shortcut for DSP R2 instructions. (mips_builtin_opcodes): Add DSP R2 instructions. [ sim/mips/ChangeLog ] * Makefile.in (IGEN_INCLUDE): Add dsp2.igen. * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add dsp2 to sim_igen_machine. * configure: Regenerate. * dsp.igen (do_ph_op): Add MUL support when op = 2. (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph. (mulq_rs.ph): Use do_ph_mulq. (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen. * mips.igen: Add dsp2 model and include dsp2.igen. (MFHI, MFLO, MTHI, MTLO): Extend these instructions for for *mips32r2, *mips64r2, *dsp. (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions for *mips32r2, *mips64r2, *dsp2. * dsp2.igen: New file for MIPS DSP REV 2 ASE. [ sim/testsuite/sim/mips/ChangeLog ] * basic.exp: Run the dsp2 test. * utils-dsp.inc (dspckacc_astio, dspck_tsimm): New macro. * mips32-dsp2.s: New test.
2007-02-20 13:28:56 +00:00
[@b{-mdspr2}] [@b{-mno-dspr2}]
[@b{-mmt}] [@b{-mno-mt}]
[@b{-mmcu}] [@b{-mno-mcu}]
[@b{-mfix7000}] [@b{-mno-fix7000}]
[@b{-mfix-vr4120}] [@b{-mno-fix-vr4120}]
[@b{-mfix-vr4130}] [@b{-mno-fix-vr4130}]
[@b{-mdebug}] [@b{-no-mdebug}]
[@b{-mpdr}] [@b{-mno-pdr}]
2001-10-30 15:20:14 +00:00
@end ifset
@ifset MMIX
@emph{Target MMIX options:}
[@b{--fixed-special-register-names}] [@b{--globalize-symbols}]
[@b{--gnu-syntax}] [@b{--relax}] [@b{--no-predefined-symbols}]
[@b{--no-expand}] [@b{--no-merge-gregs}] [@b{-x}]
[@b{--linker-allocated-gregs}]
@end ifset
@ifset PDP11
@emph{Target PDP11 options:}
[@b{-mpic}|@b{-mno-pic}] [@b{-mall}] [@b{-mno-extensions}]
[@b{-m}@var{extension}|@b{-mno-}@var{extension}]
[@b{-m}@var{cpu}] [@b{-m}@var{machine}]
@end ifset
@ifset PJ
@emph{Target picoJava options:}
[@b{-mb}|@b{-me}]
@end ifset
@ifset PPC
@emph{Target PowerPC options:}
[@b{-a32}|@b{-a64}]
[@b{-mpwrx}|@b{-mpwr2}|@b{-mpwr}|@b{-m601}|@b{-mppc}|@b{-mppc32}|@b{-m603}|@b{-m604}|@b{-m403}|@b{-m405}|
@b{-m440}|@b{-m464}|@b{-m476}|@b{-m7400}|@b{-m7410}|@b{-m7450}|@b{-m7455}|@b{-m750cl}|@b{-mppc64}|
@b{-m620}|@b{-me500}|@b{-e500x2}|@b{-me500mc}|@b{-me500mc64}|@b{-me5500}|@b{-me6500}|@b{-mppc64bridge}|
@b{-mbooke}|@b{-mpower4}|@b{-mpwr4}|@b{-mpower5}|@b{-mpwr5}|@b{-mpwr5x}|@b{-mpower6}|@b{-mpwr6}|
@b{-mpower7}|@b{-mpwr7}|@b{-ma2}|@b{-mcell}|@b{-mspe}|@b{-mtitan}|@b{-me300}|@b{-mvle}|@b{-mcom}]
[@b{-many}] [@b{-maltivec}|@b{-mvsx}]
[@b{-mregnames}|@b{-mno-regnames}]
[@b{-mrelocatable}|@b{-mrelocatable-lib}|@b{-K PIC}] [@b{-memb}]
[@b{-mlittle}|@b{-mlittle-endian}|@b{-le}|@b{-mbig}|@b{-mbig-endian}|@b{-be}]
[@b{-msolaris}|@b{-mno-solaris}]
[@b{-nops=@var{count}}]
@end ifset
bfd * Makefile.am (ALL_MACHINES): Add cpu-rx.lo. (ALL_MACHINES_CFILES): Add cpu-rx.c. (BFD32_BACKENDS): Add elf32-rx.lo. (BFD32_BACKENDS_CFILES): Add elf32-rx.c. * archures.c (bfd_architecture): Add bfd_arch_rx and bfd_mach_rx. Export bfd_rx_arch. (bfd_archures_list): Add bfd_rx_arch. * config.bfd: Add entry for rx-*-elf. * configure.in: Add entries for bfd_elf32_rx_le_vec and bfd_elf32_rx_be_vec. * reloc.c: Add RX relocations. * targets.c: Add RX target vectors. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rx.c: New file. * elf32-rx.c: New file. binutils * readelf.c: Add support for RX target. * MAINTAINERS: Add DJ and NickC as maintainers for RX. gas * Makefile.am: Add RX target. * configure.in: Likewise. * configure.tgt: Likewise. * read.c (do_repeat_with_expander): New function. * read.h: Provide a prototype for do_repeat_with_expander. * doc/Makefile.am: Add RX target documentation. * doc/all.texi: Likewise. * doc/as.texinfo: Likewise. * Makefile.in: Regenerate. * NEWS: Mention support for RX architecture. * configure: Regenerate. * doc/Makefile.in: Regenerate. * config/rx-defs.h: New file. * config/rx-parse.y: New file. * config/tc-rx.h: New file. * config/tc-rx.c: New file. * doc/c-rx.texi: New file. gas/testsuite * gas/rx: New directory. * gas/rx/*: New set of test cases. * gas/elf/section2.e-rx: New expected output file. * gas/all/gas.exp: Add support for RX target. * gas/elf/elf.exp: Likewise. * gas/lns/lns.exp: Likewise. * gas/macros/macros.exp: Likewise. include * dis-asm.h: Add prototype for print_insn_rx. include/elf * rx.h: New file. include/opcode * rx.h: New file. ld * Makefile.am: Add rules to build RX emulation. * configure.tgt: Likewise. * NEWS: Mention support for RX architecture. * Makefile.in: Regenerate. * emulparams/elf32rx.sh: New file. * emultempl/rxelf.em: New file. opcodes * Makefile.am: Add RX files. * configure.in: Add support for RX target. * disassemble.c: Likewise. * Makefile.in: Regenerate. * configure: Regenerate. * opc2c.c: New file. * rx-decode.c: New file. * rx-decode.opc: New file. * rx-dis.c: New file.
2009-09-29 14:17:19 +00:00
@ifset RX
@emph{Target RX options:}
[@b{-mlittle-endian}|@b{-mbig-endian}]
[@b{-m32bit-ints}|@b{-m16bit-ints}]
[@b{-m32bit-doubles}|@b{-m64bit-doubles}]
@end ifset
@ifset S390
@emph{Target s390 options:}
[@b{-m31}|@b{-m64}] [@b{-mesa}|@b{-mzarch}] [@b{-march}=@var{CPU}]
[@b{-mregnames}|@b{-mno-regnames}]
[@b{-mwarn-areg-zero}]
@end ifset
2009-03-02 10:33:08 +00:00
@ifset SCORE
@emph{Target SCORE options:}
[@b{-EB}][@b{-EL}][@b{-FIXDD}][@b{-NWARN}]
[@b{-SCORE5}][@b{-SCORE5U}][@b{-SCORE7}][@b{-SCORE3}]
[@b{-march=score7}][@b{-march=score3}]
[@b{-USE_R1}][@b{-KPIC}][@b{-O0}][@b{-G} @var{num}][@b{-V}]
@end ifset
@ifset SPARC
@emph{Target SPARC options:}
@c The order here is important. See c-sparc.texi.
[@b{-Av6}|@b{-Av7}|@b{-Av8}|@b{-Asparclet}|@b{-Asparclite}
@b{-Av8plus}|@b{-Av8plusa}|@b{-Av9}|@b{-Av9a}]
[@b{-xarch=v8plus}|@b{-xarch=v8plusa}] [@b{-bump}]
[@b{-32}|@b{-64}]
@end ifset
@ifset TIC54X
@emph{Target TIC54X options:}
[@b{-mcpu=54[123589]}|@b{-mcpu=54[56]lp}] [@b{-mfar-mode}|@b{-mf}]
[@b{-merrors-to-file} @var{<filename>}|@b{-me} @var{<filename>}]
@end ifset
bfd: * Makefile.am (ALL_MACHINES): Add cpu-tic6x.lo. (ALL_MACHINES_CFILES): Add cpu-tic6x.c. (BFD32_BACKENDS): Add elf32-tic6x.lo. (BFD32_BACKENDS_CFILES): Add elf32-tic6x.c. * Makefile.in: Regenerate. * archures.c (bfd_arch_tic6x, bfd_tic6x_arch): New. (bfd_archures_list): Update. * config.bfd (tic6x-*-elf): New. * configure.in (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New. * configure: Regenerate. * cpu-tic6x.c, elf32-tic6x.c: New. * reloc.c (BFD_RELOC_C6000_PCR_S21, BFD_RELOC_C6000_PCR_S12, BFD_RELOC_C6000_PCR_S10, BFD_RELOC_C6000_PCR_S7, BFD_RELOC_C6000_ABS_S16, BFD_RELOC_C6000_ABS_L16, BFD_RELOC_C6000_ABS_H16, BFD_RELOC_C6000_SBR_U15_B, BFD_RELOC_C6000_SBR_U15_H, BFD_RELOC_C6000_SBR_U15_W, BFD_RELOC_C6000_SBR_S16, BFD_RELOC_C6000_SBR_L16_B, BFD_RELOC_C6000_SBR_L16_H, BFD_RELOC_C6000_SBR_L16_W, BFD_RELOC_C6000_SBR_H16_B, BFD_RELOC_C6000_SBR_H16_H, BFD_RELOC_C6000_SBR_H16_W, BFD_RELOC_C6000_SBR_GOT_U15_W, BFD_RELOC_C6000_SBR_GOT_L16_W, BFD_RELOC_C6000_SBR_GOT_H16_W, BFD_RELOC_C6000_DSBT_INDEX, BFD_RELOC_C6000_PREL31, BFD_RELOC_C6000_COPY, BFD_RELOC_C6000_ALIGN, BFD_RELOC_C6000_FPHEAD, BFD_RELOC_C6000_NOCMP): New. * targets.c (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New. (_bfd_target_vector): Update. * bfd-in2.h, libbfd.h: Regenerate. binutils: * MAINTAINERS: Add self as TI C6X maintainer. * NEWS: Add news entry for TI C6X support. * readelf.c: Include elf/tic6x.h. (guess_is_rela): Handle EM_TI_C6000. (dump_relocations): Likewise. (get_tic6x_dynamic_type): New. (get_dynamic_type): Call it. (get_machine_flags): Handle EF_C6000_REL. (get_osabi_name): Handle machine-specific values only for relevant machines. Handle C6X values. (get_tic6x_segment_type): New. (get_segment_type): Call it. (get_tic6x_section_type_name): New. (get_section_type_name): Call it. (is_32bit_abs_reloc, is_16bit_abs_reloc, is_none_reloc): Handle EM_TI_C6000. gas: * Makefile.am (TARGET_CPU_CFILES): Add config/tc-tic6x.c. (TARGET_CPU_HFILES): Add config/tc-tic6x.h. * Makefile.in: Regenerate. * NEWS: Add news entry for TI C6X support. * app.c (do_scrub_chars): Handle "||^" for TI C6X. Handle TC_PREDICATE_START_CHAR and TC_PREDICATE_END_CHAR. Keep spaces in operands if TC_KEEP_OPERAND_SPACES. * configure.tgt (tic6x-*-*): New. * config/tc-ia64.h (TC_PREDICATE_START_CHAR, TC_PREDICATE_END_CHAR): Define. * config/tc-tic6x.c, config/tc-tic6x.h: New. * doc/Makefile.am (CPU_DOCS): Add c-tic6x.texi. * doc/Makefile.in: Regenerate. * doc/all.texi (TIC6X): Define. * doc/as.texinfo: Add TI C6X documentation. Include c-tic6x.texi. * doc/c-tic6x.texi: New. gas/testsuite: * gas/tic6x: New directory and testcases. include: * dis-asm.h (print_insn_tic6x): Declare. include/elf: * common.h (ELFOSABI_C6000_ELFABI, ELFOSABI_C6000_LINUX): Define. * tic6x.h: New. include/opcode: * tic6x-control-registers.h, tic6x-insn-formats.h, tic6x-opcode-table.h, tic6x.h: New. ld: * Makefile.am (ALL_EMULATIONS): Add eelf32_tic6x_be.o and eelf32_tic6x_le.o. (eelf32_tic6x_be.c, eelf32_tic6x_le.c): New. * NEWS: Add news entry for TI C6X support. * configure.tgt (tic6x-*-*): New. * emulparams/elf32_tic6x_be.sh, emulparams/elf32_tic6x_le.sh: New. ld/testsuite: * ld-elf/flags1.d, ld-elf/merge.d: XFAIL for tic6x-*-*. * ld-elf/sec-to-seg.exp: Set B_test_same_seg to 0 for tic6x-*-*. * ld-tic6x: New directory and testcases. opcodes: * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c. * Makefile.in: Regenerate. * configure.in (bfd_tic6x_arch): New. * configure: Regenerate. * disassemble.c (ARCH_tic6x): Define if ARCH_all. (disassembler): Handle TI C6X. * tic6x-dis.c: New.
2010-03-25 21:12:36 +00:00
@ifset TIC6X
@emph{Target TIC6X options:}
[@b{-march=@var{arch}}] [@b{-mbig-endian}|@b{-mlittle-endian}]
[@b{-mdsbt}|@b{-mno-dsbt}] [@b{-mpid=no}|@b{-mpid=near}|@b{-mpid=far}]
[@b{-mpic}|@b{-mno-pic}]
bfd: * Makefile.am (ALL_MACHINES): Add cpu-tic6x.lo. (ALL_MACHINES_CFILES): Add cpu-tic6x.c. (BFD32_BACKENDS): Add elf32-tic6x.lo. (BFD32_BACKENDS_CFILES): Add elf32-tic6x.c. * Makefile.in: Regenerate. * archures.c (bfd_arch_tic6x, bfd_tic6x_arch): New. (bfd_archures_list): Update. * config.bfd (tic6x-*-elf): New. * configure.in (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New. * configure: Regenerate. * cpu-tic6x.c, elf32-tic6x.c: New. * reloc.c (BFD_RELOC_C6000_PCR_S21, BFD_RELOC_C6000_PCR_S12, BFD_RELOC_C6000_PCR_S10, BFD_RELOC_C6000_PCR_S7, BFD_RELOC_C6000_ABS_S16, BFD_RELOC_C6000_ABS_L16, BFD_RELOC_C6000_ABS_H16, BFD_RELOC_C6000_SBR_U15_B, BFD_RELOC_C6000_SBR_U15_H, BFD_RELOC_C6000_SBR_U15_W, BFD_RELOC_C6000_SBR_S16, BFD_RELOC_C6000_SBR_L16_B, BFD_RELOC_C6000_SBR_L16_H, BFD_RELOC_C6000_SBR_L16_W, BFD_RELOC_C6000_SBR_H16_B, BFD_RELOC_C6000_SBR_H16_H, BFD_RELOC_C6000_SBR_H16_W, BFD_RELOC_C6000_SBR_GOT_U15_W, BFD_RELOC_C6000_SBR_GOT_L16_W, BFD_RELOC_C6000_SBR_GOT_H16_W, BFD_RELOC_C6000_DSBT_INDEX, BFD_RELOC_C6000_PREL31, BFD_RELOC_C6000_COPY, BFD_RELOC_C6000_ALIGN, BFD_RELOC_C6000_FPHEAD, BFD_RELOC_C6000_NOCMP): New. * targets.c (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New. (_bfd_target_vector): Update. * bfd-in2.h, libbfd.h: Regenerate. binutils: * MAINTAINERS: Add self as TI C6X maintainer. * NEWS: Add news entry for TI C6X support. * readelf.c: Include elf/tic6x.h. (guess_is_rela): Handle EM_TI_C6000. (dump_relocations): Likewise. (get_tic6x_dynamic_type): New. (get_dynamic_type): Call it. (get_machine_flags): Handle EF_C6000_REL. (get_osabi_name): Handle machine-specific values only for relevant machines. Handle C6X values. (get_tic6x_segment_type): New. (get_segment_type): Call it. (get_tic6x_section_type_name): New. (get_section_type_name): Call it. (is_32bit_abs_reloc, is_16bit_abs_reloc, is_none_reloc): Handle EM_TI_C6000. gas: * Makefile.am (TARGET_CPU_CFILES): Add config/tc-tic6x.c. (TARGET_CPU_HFILES): Add config/tc-tic6x.h. * Makefile.in: Regenerate. * NEWS: Add news entry for TI C6X support. * app.c (do_scrub_chars): Handle "||^" for TI C6X. Handle TC_PREDICATE_START_CHAR and TC_PREDICATE_END_CHAR. Keep spaces in operands if TC_KEEP_OPERAND_SPACES. * configure.tgt (tic6x-*-*): New. * config/tc-ia64.h (TC_PREDICATE_START_CHAR, TC_PREDICATE_END_CHAR): Define. * config/tc-tic6x.c, config/tc-tic6x.h: New. * doc/Makefile.am (CPU_DOCS): Add c-tic6x.texi. * doc/Makefile.in: Regenerate. * doc/all.texi (TIC6X): Define. * doc/as.texinfo: Add TI C6X documentation. Include c-tic6x.texi. * doc/c-tic6x.texi: New. gas/testsuite: * gas/tic6x: New directory and testcases. include: * dis-asm.h (print_insn_tic6x): Declare. include/elf: * common.h (ELFOSABI_C6000_ELFABI, ELFOSABI_C6000_LINUX): Define. * tic6x.h: New. include/opcode: * tic6x-control-registers.h, tic6x-insn-formats.h, tic6x-opcode-table.h, tic6x.h: New. ld: * Makefile.am (ALL_EMULATIONS): Add eelf32_tic6x_be.o and eelf32_tic6x_le.o. (eelf32_tic6x_be.c, eelf32_tic6x_le.c): New. * NEWS: Add news entry for TI C6X support. * configure.tgt (tic6x-*-*): New. * emulparams/elf32_tic6x_be.sh, emulparams/elf32_tic6x_le.sh: New. ld/testsuite: * ld-elf/flags1.d, ld-elf/merge.d: XFAIL for tic6x-*-*. * ld-elf/sec-to-seg.exp: Set B_test_same_seg to 0 for tic6x-*-*. * ld-tic6x: New directory and testcases. opcodes: * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c. * Makefile.in: Regenerate. * configure.in (bfd_tic6x_arch): New. * configure: Regenerate. * disassemble.c (ARCH_tic6x): Define if ARCH_all. (disassembler): Handle TI C6X. * tic6x-dis.c: New.
2010-03-25 21:12:36 +00:00
@end ifset
* Makefile.am (ALL_MACHINES): Add cpu-tilegx.lo and cpu-tilepro.lo. (ALL_MACHINE_CFILES): Add cpu-tilegx.c and cpu-tilepro.c. (BFD32_BACKENDS): Add elf32-tilegx.lo, elf32-tilepro.lo, and elfxx-tilegx.lo. (BFD32_BACKENDS_CFILES): Add elf32-tilegx.c elf32-tilepro.c, and elfxx-tilegx.c. (BFD64_BACKENDS): Add elf64-tilegx.lo. (BFD64_BACKENDS_CFILES): Add elf64-tilegx.c. * Makefile.in: Regenerate. * arctures.c (bfd_architecture): Define bfd_arch_tilepro, bfd_arch_tilegx, bfd_mach_tilepro, bfd_mach_tilegx. (bfd_arch_info): Add bfd_tilegx_arch, bfd_tilepro_arch. (bfd_archures_list): Add bfd_tilegx_arch, bfd_tilepro_arch. bfd-in2.h: Regenerate. * config.bfd: Handle tilegx-*-* and tilepro-*-*. * configure.in: Handle bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec, and bfd_elf64_tilegx_vec. * configure: Regenerate. * elf-bfd.h (enum elf_target_id): Define TILEGX_ELF_DATA and TILEPRO_ELF_DATA. * libbfd.h: Regenerate. * reloc.c: Add BFD_RELOC_TILEPRO_{COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1, JOFFLONG_X1, JOFFLONG_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM15_X1, MF_IMM15_X1, IMM16_X0, IMM16_X1, IMM16_X0_LO, IMM16_X1_LO, IMM16_X0_HI, IMM16_X1_HI, IMM16_X0_HA, IMM16_X1_HA, IMM16_X0_PCREL, IMM16_X1_PCREL, IMM16_X0_LO_PCREL, IMM16_X1_LO_PCREL, IMM16_X0_HI_PCREL, IMM16_X1_HI_PCREL, IMM16_X0_HA_PCREL, IMM16_X1_HA_PCREL, IMM16_X0_GOT, IMM16_X1_GOT, IMM16_X0_GOT_LO, IMM16_X1_GOT_LO, IMM16_X0_GOT_HI, IMM16_X1_GOT_HI, IMM16_X0_GOT_HA, IMM16_X1_GOT_HA, MMSTART_X0, MMEND_X0, MMSTART_X1, MMEND_X1, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_TLS_GD, IMM16_X1_TLS_GD, IMM16_X0_TLS_GD_LO, IMM16_X1_TLS_GD_LO, IMM16_X0_TLS_GD_HI, IMM16_X1_TLS_GD_HI, IMM16_X0_TLS_GD_HA, IMM16_X1_TLS_GD_HA, IMM16_X0_TLS_IE, IMM16_X1_TLS_IE, IMM16_X0_TLS_IE_LO, IMM16_X1_TLS_IE_LO, IMM16_X0_TLS_IE_HI, IMM16_X1_TLS_IE_HI, IMM16_X0_TLS_IE_HA, IMM16_X1_TLS_IE_HA, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32} Add BFD_RELOC_TILEGX_{HW0, HW1, HW2, HW3, HW0_LAST, HW1_LAST, HW2_LAST, COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1, JUMPOFF_X1, JUMPOFF_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM14_X1, MF_IMM14_X1, MMSTART_X0, MMEND_X0, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_HW0, IMM16_X1_HW0, IMM16_X0_HW1, IMM16_X1_HW1, IMM16_X0_HW2, IMM16_X1_HW2, IMM16_X0_HW3, IMM16_X1_HW3, IMM16_X0_HW0_LAST, IMM16_X1_HW0_LAST, IMM16_X0_HW1_LAST, IMM16_X1_HW1_LAST, IMM16_X0_HW2_LAST, IMM16_X1_HW2_LAST, IMM16_X0_HW0_PCREL, IMM16_X1_HW0_PCREL, IMM16_X0_HW1_PCREL, IMM16_X1_HW1_PCREL, IMM16_X0_HW2_PCREL, IMM16_X1_HW2_PCREL, IMM16_X0_HW3_PCREL, IMM16_X1_HW3_PCREL, IMM16_X0_HW0_LAST_PCREL, IMM16_X1_HW0_LAST_PCREL, IMM16_X0_HW1_LAST_PCREL, IMM16_X1_HW1_LAST_PCREL, IMM16_X0_HW2_LAST_PCREL, IMM16_X1_HW2_LAST_PCREL, IMM16_X0_HW0_GOT, IMM16_X1_HW0_GOT, IMM16_X0_HW1_GOT, IMM16_X1_HW1_GOT, IMM16_X0_HW2_GOT, IMM16_X1_HW2_GOT, IMM16_X0_HW3_GOT, IMM16_X1_HW3_GOT, IMM16_X0_HW0_LAST_GOT, IMM16_X1_HW0_LAST_GOT, IMM16_X0_HW1_LAST_GOT, IMM16_X1_HW1_LAST_GOT, IMM16_X0_HW2_LAST_GOT, IMM16_X1_HW2_LAST_GOT, IMM16_X0_HW0_TLS_GD, IMM16_X1_HW0_TLS_GD, IMM16_X0_HW1_TLS_GD, IMM16_X1_HW1_TLS_GD, IMM16_X0_HW2_TLS_GD, IMM16_X1_HW2_TLS_GD, IMM16_X0_HW3_TLS_GD, IMM16_X1_HW3_TLS_GD, IMM16_X0_HW0_LAST_TLS_GD, IMM16_X1_HW0_LAST_TLS_GD, IMM16_X0_HW1_LAST_TLS_GD, IMM16_X1_HW1_LAST_TLS_GD, IMM16_X0_HW2_LAST_TLS_GD, IMM16_X1_HW2_LAST_TLS_GD, IMM16_X0_HW0_TLS_IE, IMM16_X1_HW0_TLS_IE, IMM16_X0_HW1_TLS_IE, IMM16_X1_HW1_TLS_IE, IMM16_X0_HW2_TLS_IE, IMM16_X1_HW2_TLS_IE, IMM16_X0_HW3_TLS_IE, IMM16_X1_HW3_TLS_IE, IMM16_X0_HW0_LAST_TLS_IE, IMM16_X1_HW0_LAST_TLS_IE, IMM16_X0_HW1_LAST_TLS_IE, IMM16_X1_HW1_LAST_TLS_IE, IMM16_X0_HW2_LAST_TLS_IE, IMM16_X1_HW2_LAST_TLS_IE, TLS_DTPMOD64, TLS_DTPOFF64, TLS_TPOFF64, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32} * targets.c (bfd_elf32_tilegx_vec): Declare. (bfd_elf32_tilepro_vec): Declare. (bfd_elf64_tilegx_vec): Declare. (bfd_target_vector): Add bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec, and bfd_elf64_tilegx_vec. * cpu-tilegx.c: New file. * cpu-tilepro.c: New file. * elf32-tilepro.h: New file. * elf32-tilepro.c: New file. * elf32-tilegx.c: New file. * elf32-tilegx.h: New file. * elf64-tilegx.c: New file. * elf64-tilegx.h: New file. * elfxx-tilegx.c: New file. * elfxx-tilegx.h: New file. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-tilegx.c and config/tc-tilepro.c. (TARGET_CPU_HFILES): Add config/tc-tilegx.h and config/tc-tilepro.h. * Makefile.in: Regenerate. * configure.tgt (tilepro-*-*): New. (tilegx-*-*): Likewise. * config/tc-tilegx.c: New file. * config/tc-tilegx.h: Likewise. * config/tc-tilepro.h: Likewise. * config/tc-tilepro.c: Likewise. * doc/Makefile.am (CPU_DOCS): Add c-tilegx.texi and c-tilepro.texi. * doc/Makefile.in: Regenerate. * doc/all.texi (TILEGX): Define. (TILEPRO): Define. * doc/as.texinfo: Add Tile-Gx and TILEPro documentation. Include c-tilegx.texi and c-tilepro.texi. * doc/c-tilegx.texi: New. * doc/c-tilepro.texi: New. * gas/tilepro/t_constants.s: New file. * gas/tilepro/t_constants.d: Likewise. * gas/tilepro/t_insns.s: Likewise. * gas/tilepro/tilepro.exp: Likewise. * gas/tilepro/t_insns.d: Likewise. * gas/tilegx/tilegx.exp: Likewise. * gas/tilegx/t_insns.d: Likewise. * gas/tilegx/t_insns.s: Likewise. * dis-asm.h (print_insn_tilegx): Declare. (print_insn_tilepro): Likewise. * tilegx.h: New file. * tilepro.h: New file. * common.h: Add EM_TILEGX. * tilegx.h: New file. * tilepro.h: New file. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx.c and eelf32tilepro.c. (ALL_64_EMULATION_SOURCES): Add eelf64tilegx.c. (eelf32tilegx.c): New target. (eelf32tilepro.c): Likewise. (eelf64tilegx.c): Likewise. * Makefile.in: Regenerate. * configure.tgt: Handle tilegx-*-* and tilepro-*-*. * emulparams/elf32tilegx.sh: New file. * emulparams/elf64tilegx.sh: New file. * emulparams/elf32tilepro.sh: New file. * ld-elf/eh5.d: Don't run on tile*. * ld-srec/srec.exp: xfail on tile*. * ld-tilegx/external.s: New file. * ld-tilegx/reloc.d: New file. * ld-tilegx/reloc.s: New file. * ld-tilegx/tilegx.exp: New file. * ld-tilepro/external.s: New file. * ld-tilepro/reloc.d: New file. * ld-tilepro/reloc.s: New file. * ld-tilepro/tilepro.exp: New file. * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tilegx-dis.c, tilegx-opc.c, tilepro-dis.c, and tilepro-opc.c. * Makefile.in: Regenerate. * configure.in: Handle bfd_tilegx_arch and bfd_tilepro_arch. * configure: Regenerate. * disassemble.c (disassembler): Add ARCH_tilegx and ARCH_tilepro. * po/POTFILES.in: Regenerate. * tilegx-dis.c: New file. * tilegx-opc.c: New file. * tilepro-dis.c: New file. * tilepro-opc.c: New file.
2011-06-13 15:18:54 +00:00
@ifset TILEGX
@emph{Target TILE-Gx options:}
Add big-endian support for tilegx. bfd/ * config.bfd (tilegx-*-*): rename little endian vector; add big endian vector. (tilegxbe-*-*): New case. * configure.in (bfd_elf32_tilegx_vec): Rename... (bfd_elf32_tilegx_le_vec): ... to this. (bfd_elf32_tilegx_be_vec): New vector. (bfd_elf64_tilegx_vec): Rename... (bfd_elf64_tilegx_le_vec): ... to this. (bfd_elf64_tilegx_be_vec): New vector. * configure: Regenerate. * elf32-tilegx.c (TARGET_LITTLE_SYM): Rename. (TARGET_LITTLE_NAME): Ditto. (TARGET_BIG_SYM): Define. (TARGET_BIG_NAME): Define. * elf64-tilegx.c (TARGET_LITTLE_SYM): Rename. (TARGET_LITTLE_NAME): Ditto. (TARGET_BIG_SYM): Define. (TARGET_BIG_NAME): Define. * targets.c (bfd_elf32_tilegx_vec): Rename... (bfd_elf32_tilegx_le_vec): ... to this. (bfd_elf32_tilegx_be_vec): Declare. (bfd_elf64_tilegx_vec): Rename... (bfd_elf64_tilegx_le_vec): ... to this. (bfd_elf64_tilegx_be_vec): Declare. (_bfd_target_vector): Add / rename above vectors. binutils/testsuite/ * binutils-all/objdump.exp (cpus_expected): Add tilegx. gas/ * tc-tilegx.c (tilegx_target_format): Handle big endian. (OPTION_EB): Define. (OPTION_EL): Define. (md_longopts): Add entries for "EB" and "EL". (md_parse_option): Handle OPTION_EB and OPTION_EL. (md_show_usage): Add -EB and -EL. (md_number_to_chars): New. * tc-tilegx.h (TARGET_BYTES_BIG_ENDIAN): Guard definition with ifndef. (md_number_to_chars): Delete. * configure.tgt (tilegx*be): Handle. * doc/as.texinfo [TILE-Gx]: Document -EB and -EL. * doc/c-tilegx.texi: Ditto. ld/ * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx_be.c. (ALL_64_EMULATION_SOURCES): Add eelf64tilegx_be.c. (eelf32tilegx_be.c): Add rule to build this file. (eelf64tilegx_be.c): Ditto. * Makefile.in: Regenerate. * configure.tgt (tilegx-*-*): Support big endian. (tilegxbe-*-*): New. * emulparams/elf32tilegx.sh (OUTPUT_FORMAT): Rename. (BIG_OUTPUT_FORMAT): Define. (LITTLE_OUTPUT_FORMAT): Define. * emulparams/elf32tilegx_be.sh: New. * emulparams/elf64tilegx.sh (OUTPUT_FORMAT): Rename. (BIG_OUTPUT_FORMAT): Define. (LITTLE_OUTPUT_FORMAT): Define. * emulparams/elf64tilegx_be.sh: New. ld/testsuite/ * ld-tilegx/reloc-be.d: New. * ld-tilegx/reloc-le.d: New. * ld-tilegx/reloc.d: Delete. * ld-tilegx/tilegx.exp: Test big and little endian.
2012-02-25 19:51:34 +00:00
[@b{-m32}|@b{-m64}][@b{-EB}][@b{-EL}]
* Makefile.am (ALL_MACHINES): Add cpu-tilegx.lo and cpu-tilepro.lo. (ALL_MACHINE_CFILES): Add cpu-tilegx.c and cpu-tilepro.c. (BFD32_BACKENDS): Add elf32-tilegx.lo, elf32-tilepro.lo, and elfxx-tilegx.lo. (BFD32_BACKENDS_CFILES): Add elf32-tilegx.c elf32-tilepro.c, and elfxx-tilegx.c. (BFD64_BACKENDS): Add elf64-tilegx.lo. (BFD64_BACKENDS_CFILES): Add elf64-tilegx.c. * Makefile.in: Regenerate. * arctures.c (bfd_architecture): Define bfd_arch_tilepro, bfd_arch_tilegx, bfd_mach_tilepro, bfd_mach_tilegx. (bfd_arch_info): Add bfd_tilegx_arch, bfd_tilepro_arch. (bfd_archures_list): Add bfd_tilegx_arch, bfd_tilepro_arch. bfd-in2.h: Regenerate. * config.bfd: Handle tilegx-*-* and tilepro-*-*. * configure.in: Handle bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec, and bfd_elf64_tilegx_vec. * configure: Regenerate. * elf-bfd.h (enum elf_target_id): Define TILEGX_ELF_DATA and TILEPRO_ELF_DATA. * libbfd.h: Regenerate. * reloc.c: Add BFD_RELOC_TILEPRO_{COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1, JOFFLONG_X1, JOFFLONG_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM15_X1, MF_IMM15_X1, IMM16_X0, IMM16_X1, IMM16_X0_LO, IMM16_X1_LO, IMM16_X0_HI, IMM16_X1_HI, IMM16_X0_HA, IMM16_X1_HA, IMM16_X0_PCREL, IMM16_X1_PCREL, IMM16_X0_LO_PCREL, IMM16_X1_LO_PCREL, IMM16_X0_HI_PCREL, IMM16_X1_HI_PCREL, IMM16_X0_HA_PCREL, IMM16_X1_HA_PCREL, IMM16_X0_GOT, IMM16_X1_GOT, IMM16_X0_GOT_LO, IMM16_X1_GOT_LO, IMM16_X0_GOT_HI, IMM16_X1_GOT_HI, IMM16_X0_GOT_HA, IMM16_X1_GOT_HA, MMSTART_X0, MMEND_X0, MMSTART_X1, MMEND_X1, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_TLS_GD, IMM16_X1_TLS_GD, IMM16_X0_TLS_GD_LO, IMM16_X1_TLS_GD_LO, IMM16_X0_TLS_GD_HI, IMM16_X1_TLS_GD_HI, IMM16_X0_TLS_GD_HA, IMM16_X1_TLS_GD_HA, IMM16_X0_TLS_IE, IMM16_X1_TLS_IE, IMM16_X0_TLS_IE_LO, IMM16_X1_TLS_IE_LO, IMM16_X0_TLS_IE_HI, IMM16_X1_TLS_IE_HI, IMM16_X0_TLS_IE_HA, IMM16_X1_TLS_IE_HA, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32} Add BFD_RELOC_TILEGX_{HW0, HW1, HW2, HW3, HW0_LAST, HW1_LAST, HW2_LAST, COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1, JUMPOFF_X1, JUMPOFF_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM14_X1, MF_IMM14_X1, MMSTART_X0, MMEND_X0, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_HW0, IMM16_X1_HW0, IMM16_X0_HW1, IMM16_X1_HW1, IMM16_X0_HW2, IMM16_X1_HW2, IMM16_X0_HW3, IMM16_X1_HW3, IMM16_X0_HW0_LAST, IMM16_X1_HW0_LAST, IMM16_X0_HW1_LAST, IMM16_X1_HW1_LAST, IMM16_X0_HW2_LAST, IMM16_X1_HW2_LAST, IMM16_X0_HW0_PCREL, IMM16_X1_HW0_PCREL, IMM16_X0_HW1_PCREL, IMM16_X1_HW1_PCREL, IMM16_X0_HW2_PCREL, IMM16_X1_HW2_PCREL, IMM16_X0_HW3_PCREL, IMM16_X1_HW3_PCREL, IMM16_X0_HW0_LAST_PCREL, IMM16_X1_HW0_LAST_PCREL, IMM16_X0_HW1_LAST_PCREL, IMM16_X1_HW1_LAST_PCREL, IMM16_X0_HW2_LAST_PCREL, IMM16_X1_HW2_LAST_PCREL, IMM16_X0_HW0_GOT, IMM16_X1_HW0_GOT, IMM16_X0_HW1_GOT, IMM16_X1_HW1_GOT, IMM16_X0_HW2_GOT, IMM16_X1_HW2_GOT, IMM16_X0_HW3_GOT, IMM16_X1_HW3_GOT, IMM16_X0_HW0_LAST_GOT, IMM16_X1_HW0_LAST_GOT, IMM16_X0_HW1_LAST_GOT, IMM16_X1_HW1_LAST_GOT, IMM16_X0_HW2_LAST_GOT, IMM16_X1_HW2_LAST_GOT, IMM16_X0_HW0_TLS_GD, IMM16_X1_HW0_TLS_GD, IMM16_X0_HW1_TLS_GD, IMM16_X1_HW1_TLS_GD, IMM16_X0_HW2_TLS_GD, IMM16_X1_HW2_TLS_GD, IMM16_X0_HW3_TLS_GD, IMM16_X1_HW3_TLS_GD, IMM16_X0_HW0_LAST_TLS_GD, IMM16_X1_HW0_LAST_TLS_GD, IMM16_X0_HW1_LAST_TLS_GD, IMM16_X1_HW1_LAST_TLS_GD, IMM16_X0_HW2_LAST_TLS_GD, IMM16_X1_HW2_LAST_TLS_GD, IMM16_X0_HW0_TLS_IE, IMM16_X1_HW0_TLS_IE, IMM16_X0_HW1_TLS_IE, IMM16_X1_HW1_TLS_IE, IMM16_X0_HW2_TLS_IE, IMM16_X1_HW2_TLS_IE, IMM16_X0_HW3_TLS_IE, IMM16_X1_HW3_TLS_IE, IMM16_X0_HW0_LAST_TLS_IE, IMM16_X1_HW0_LAST_TLS_IE, IMM16_X0_HW1_LAST_TLS_IE, IMM16_X1_HW1_LAST_TLS_IE, IMM16_X0_HW2_LAST_TLS_IE, IMM16_X1_HW2_LAST_TLS_IE, TLS_DTPMOD64, TLS_DTPOFF64, TLS_TPOFF64, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32} * targets.c (bfd_elf32_tilegx_vec): Declare. (bfd_elf32_tilepro_vec): Declare. (bfd_elf64_tilegx_vec): Declare. (bfd_target_vector): Add bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec, and bfd_elf64_tilegx_vec. * cpu-tilegx.c: New file. * cpu-tilepro.c: New file. * elf32-tilepro.h: New file. * elf32-tilepro.c: New file. * elf32-tilegx.c: New file. * elf32-tilegx.h: New file. * elf64-tilegx.c: New file. * elf64-tilegx.h: New file. * elfxx-tilegx.c: New file. * elfxx-tilegx.h: New file. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-tilegx.c and config/tc-tilepro.c. (TARGET_CPU_HFILES): Add config/tc-tilegx.h and config/tc-tilepro.h. * Makefile.in: Regenerate. * configure.tgt (tilepro-*-*): New. (tilegx-*-*): Likewise. * config/tc-tilegx.c: New file. * config/tc-tilegx.h: Likewise. * config/tc-tilepro.h: Likewise. * config/tc-tilepro.c: Likewise. * doc/Makefile.am (CPU_DOCS): Add c-tilegx.texi and c-tilepro.texi. * doc/Makefile.in: Regenerate. * doc/all.texi (TILEGX): Define. (TILEPRO): Define. * doc/as.texinfo: Add Tile-Gx and TILEPro documentation. Include c-tilegx.texi and c-tilepro.texi. * doc/c-tilegx.texi: New. * doc/c-tilepro.texi: New. * gas/tilepro/t_constants.s: New file. * gas/tilepro/t_constants.d: Likewise. * gas/tilepro/t_insns.s: Likewise. * gas/tilepro/tilepro.exp: Likewise. * gas/tilepro/t_insns.d: Likewise. * gas/tilegx/tilegx.exp: Likewise. * gas/tilegx/t_insns.d: Likewise. * gas/tilegx/t_insns.s: Likewise. * dis-asm.h (print_insn_tilegx): Declare. (print_insn_tilepro): Likewise. * tilegx.h: New file. * tilepro.h: New file. * common.h: Add EM_TILEGX. * tilegx.h: New file. * tilepro.h: New file. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx.c and eelf32tilepro.c. (ALL_64_EMULATION_SOURCES): Add eelf64tilegx.c. (eelf32tilegx.c): New target. (eelf32tilepro.c): Likewise. (eelf64tilegx.c): Likewise. * Makefile.in: Regenerate. * configure.tgt: Handle tilegx-*-* and tilepro-*-*. * emulparams/elf32tilegx.sh: New file. * emulparams/elf64tilegx.sh: New file. * emulparams/elf32tilepro.sh: New file. * ld-elf/eh5.d: Don't run on tile*. * ld-srec/srec.exp: xfail on tile*. * ld-tilegx/external.s: New file. * ld-tilegx/reloc.d: New file. * ld-tilegx/reloc.s: New file. * ld-tilegx/tilegx.exp: New file. * ld-tilepro/external.s: New file. * ld-tilepro/reloc.d: New file. * ld-tilepro/reloc.s: New file. * ld-tilepro/tilepro.exp: New file. * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tilegx-dis.c, tilegx-opc.c, tilepro-dis.c, and tilepro-opc.c. * Makefile.in: Regenerate. * configure.in: Handle bfd_tilegx_arch and bfd_tilepro_arch. * configure: Regenerate. * disassemble.c (disassembler): Add ARCH_tilegx and ARCH_tilepro. * po/POTFILES.in: Regenerate. * tilegx-dis.c: New file. * tilegx-opc.c: New file. * tilepro-dis.c: New file. * tilepro-opc.c: New file.
2011-06-13 15:18:54 +00:00
@end ifset
@ifset TILEPRO
@c TILEPro has no machine-dependent assembler options
@end ifset
bfd: * Makefile.am (ALL_MACHINES): Add cpu-tic6x.lo. (ALL_MACHINES_CFILES): Add cpu-tic6x.c. (BFD32_BACKENDS): Add elf32-tic6x.lo. (BFD32_BACKENDS_CFILES): Add elf32-tic6x.c. * Makefile.in: Regenerate. * archures.c (bfd_arch_tic6x, bfd_tic6x_arch): New. (bfd_archures_list): Update. * config.bfd (tic6x-*-elf): New. * configure.in (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New. * configure: Regenerate. * cpu-tic6x.c, elf32-tic6x.c: New. * reloc.c (BFD_RELOC_C6000_PCR_S21, BFD_RELOC_C6000_PCR_S12, BFD_RELOC_C6000_PCR_S10, BFD_RELOC_C6000_PCR_S7, BFD_RELOC_C6000_ABS_S16, BFD_RELOC_C6000_ABS_L16, BFD_RELOC_C6000_ABS_H16, BFD_RELOC_C6000_SBR_U15_B, BFD_RELOC_C6000_SBR_U15_H, BFD_RELOC_C6000_SBR_U15_W, BFD_RELOC_C6000_SBR_S16, BFD_RELOC_C6000_SBR_L16_B, BFD_RELOC_C6000_SBR_L16_H, BFD_RELOC_C6000_SBR_L16_W, BFD_RELOC_C6000_SBR_H16_B, BFD_RELOC_C6000_SBR_H16_H, BFD_RELOC_C6000_SBR_H16_W, BFD_RELOC_C6000_SBR_GOT_U15_W, BFD_RELOC_C6000_SBR_GOT_L16_W, BFD_RELOC_C6000_SBR_GOT_H16_W, BFD_RELOC_C6000_DSBT_INDEX, BFD_RELOC_C6000_PREL31, BFD_RELOC_C6000_COPY, BFD_RELOC_C6000_ALIGN, BFD_RELOC_C6000_FPHEAD, BFD_RELOC_C6000_NOCMP): New. * targets.c (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New. (_bfd_target_vector): Update. * bfd-in2.h, libbfd.h: Regenerate. binutils: * MAINTAINERS: Add self as TI C6X maintainer. * NEWS: Add news entry for TI C6X support. * readelf.c: Include elf/tic6x.h. (guess_is_rela): Handle EM_TI_C6000. (dump_relocations): Likewise. (get_tic6x_dynamic_type): New. (get_dynamic_type): Call it. (get_machine_flags): Handle EF_C6000_REL. (get_osabi_name): Handle machine-specific values only for relevant machines. Handle C6X values. (get_tic6x_segment_type): New. (get_segment_type): Call it. (get_tic6x_section_type_name): New. (get_section_type_name): Call it. (is_32bit_abs_reloc, is_16bit_abs_reloc, is_none_reloc): Handle EM_TI_C6000. gas: * Makefile.am (TARGET_CPU_CFILES): Add config/tc-tic6x.c. (TARGET_CPU_HFILES): Add config/tc-tic6x.h. * Makefile.in: Regenerate. * NEWS: Add news entry for TI C6X support. * app.c (do_scrub_chars): Handle "||^" for TI C6X. Handle TC_PREDICATE_START_CHAR and TC_PREDICATE_END_CHAR. Keep spaces in operands if TC_KEEP_OPERAND_SPACES. * configure.tgt (tic6x-*-*): New. * config/tc-ia64.h (TC_PREDICATE_START_CHAR, TC_PREDICATE_END_CHAR): Define. * config/tc-tic6x.c, config/tc-tic6x.h: New. * doc/Makefile.am (CPU_DOCS): Add c-tic6x.texi. * doc/Makefile.in: Regenerate. * doc/all.texi (TIC6X): Define. * doc/as.texinfo: Add TI C6X documentation. Include c-tic6x.texi. * doc/c-tic6x.texi: New. gas/testsuite: * gas/tic6x: New directory and testcases. include: * dis-asm.h (print_insn_tic6x): Declare. include/elf: * common.h (ELFOSABI_C6000_ELFABI, ELFOSABI_C6000_LINUX): Define. * tic6x.h: New. include/opcode: * tic6x-control-registers.h, tic6x-insn-formats.h, tic6x-opcode-table.h, tic6x.h: New. ld: * Makefile.am (ALL_EMULATIONS): Add eelf32_tic6x_be.o and eelf32_tic6x_le.o. (eelf32_tic6x_be.c, eelf32_tic6x_le.c): New. * NEWS: Add news entry for TI C6X support. * configure.tgt (tic6x-*-*): New. * emulparams/elf32_tic6x_be.sh, emulparams/elf32_tic6x_le.sh: New. ld/testsuite: * ld-elf/flags1.d, ld-elf/merge.d: XFAIL for tic6x-*-*. * ld-elf/sec-to-seg.exp: Set B_test_same_seg to 0 for tic6x-*-*. * ld-tic6x: New directory and testcases. opcodes: * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c. * Makefile.in: Regenerate. * configure.in (bfd_tic6x_arch): New. * configure: Regenerate. * disassemble.c (ARCH_tic6x): Define if ARCH_all. (disassembler): Handle TI C6X. * tic6x-dis.c: New.
2010-03-25 21:12:36 +00:00
@ifset XTENSA
@emph{Target Xtensa options:}
[@b{--[no-]text-section-literals}] [@b{--[no-]absolute-literals}]
[@b{--[no-]target-align}] [@b{--[no-]longcalls}]
[@b{--[no-]transform}]
[@b{--rename-section} @var{oldname}=@var{newname}]
@end ifset
@ifset Z80
@emph{Target Z80 options:}
[@b{-z80}] [@b{-r800}]
[@b{ -ignore-undocumented-instructions}] [@b{-Wnud}]
[@b{ -ignore-unportable-instructions}] [@b{-Wnup}]
[@b{ -warn-undocumented-instructions}] [@b{-Wud}]
[@b{ -warn-unportable-instructions}] [@b{-Wup}]
[@b{ -forbid-undocumented-instructions}] [@b{-Fud}]
[@b{ -forbid-unportable-instructions}] [@b{-Fup}]
@end ifset
@ifset Z8000
@c Z8000 has no machine-dependent assembler options
1999-05-03 07:29:11 +00:00
@end ifset
2003-04-01 15:50:31 +00:00
2001-03-25 20:32:31 +00:00
@c man end
1999-05-03 07:29:11 +00:00
@end smallexample
2001-03-25 20:32:31 +00:00
@c man begin OPTIONS
@table @gcctabopt
@include at-file.texi
@item -a[cdghlmns]
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Turn on listings, in any of a variety of ways:
@table @gcctabopt
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@item -ac
omit false conditionals
@item -ad
omit debugging directives
@item -ag
include general information, like @value{AS} version and options passed
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@item -ah
include high-level source
@item -al
include assembly
@item -am
include macro expansions
@item -an
omit forms processing
@item -as
include symbols
@item =file
set the name of the listing file
@end table
You may combine these options; for example, use @samp{-aln} for assembly
listing without forms processing. The @samp{=file} option, if used, must be
the last one. By itself, @samp{-a} defaults to @samp{-ahls}.
@item --alternate
Begin in alternate macro mode.
@ifclear man
@xref{Altmacro,,@code{.altmacro}}.
@end ifclear
@item --compress-debug-sections
Compress DWARF debug sections using zlib. The debug sections are renamed
to begin with @samp{.zdebug}, and the resulting object file may not be
compatible with older linkers and object file utilities.
@item --nocompress-debug-sections
Do not compress DWARF debug sections. This is the default.
1999-05-03 07:29:11 +00:00
@item -D
Ignored. This option is accepted for script compatibility with calls to
other assemblers.
@item --debug-prefix-map @var{old}=@var{new}
When assembling files in directory @file{@var{old}}, record debugging
information describing them as in @file{@var{new}} instead.
1999-05-03 07:29:11 +00:00
@item --defsym @var{sym}=@var{value}
Define the symbol @var{sym} to be @var{value} before assembling the input file.
@var{value} must be an integer constant. As in C, a leading @samp{0x}
indicates a hexadecimal value, and a leading @samp{0} indicates an octal
value. The value of the symbol can be overridden inside a source file via the
use of a @code{.set} pseudo-op.
1999-05-03 07:29:11 +00:00
@item -f
``fast''---skip whitespace and comment preprocessing (assume source is
compiler output).
2004-08-17 12:19:58 +00:00
@item -g
@itemx --gen-debug
Generate debugging information for each assembler source line using whichever
debug format is preferred by the target. This currently means either STABS,
ECOFF or DWARF2.
1999-05-03 07:29:11 +00:00
@item --gstabs
Generate stabs debugging information for each assembler line. This
may help debugging assembler code, if the debugger can handle it.
@item --gstabs+
Generate stabs debugging information for each assembler line, with GNU
extensions that probably only gdb can handle, and that could make other
debuggers crash or refuse to read your program. This
may help debugging assembler code. Currently the only GNU extension is
the location of the current working directory at assembling time.
2004-08-17 12:19:58 +00:00
@item --gdwarf-2
1999-09-01 09:28:07 +00:00
Generate DWARF2 debugging information for each assembler line. This
may help debugging assembler code, if the debugger can handle it. Note---this
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option is only supported by some targets, not all of them.
1999-09-01 09:28:07 +00:00
@item --size-check=error
@itemx --size-check=warning
Issue an error or warning for invalid ELF .size directive.
1999-05-03 07:29:11 +00:00
@item --help
Print a summary of the command line options and exit.
2000-10-17 20:10:20 +00:00
@item --target-help
Print a summary of all target specific options and exit.
1999-05-03 07:29:11 +00:00
@item -I @var{dir}
Add directory @var{dir} to the search list for @code{.include} directives.
@item -J
Don't warn about signed overflow.
@item -K
@ifclear DIFF-TBL-KLUGE
This option is accepted but has no effect on the @value{TARGET} family.
@end ifclear
@ifset DIFF-TBL-KLUGE
Issue warnings when difference tables altered for long displacements.
@end ifset
@item -L
@itemx --keep-locals
Keep (in the symbol table) local symbols. These symbols start with
system-specific local label prefixes, typically @samp{.L} for ELF systems
or @samp{L} for traditional a.out systems.
@ifclear man
@xref{Symbol Names}.
@end ifclear
1999-05-03 07:29:11 +00:00
@item --listing-lhs-width=@var{number}
Set the maximum width, in words, of the output data column for an assembler
listing to @var{number}.
@item --listing-lhs-width2=@var{number}
Set the maximum width, in words, of the output data column for continuation
lines in an assembler listing to @var{number}.
@item --listing-rhs-width=@var{number}
Set the maximum width of an input source line, as displayed in a listing, to
@var{number} bytes.
@item --listing-cont-lines=@var{number}
Set the maximum number of lines printed in a listing for a single line of input
to @var{number} + 1.
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@item -o @var{objfile}
Name the object-file output from @command{@value{AS}} @var{objfile}.
1999-05-03 07:29:11 +00:00
@item -R
Fold the data section into the text section.
@kindex --hash-size=@var{number}
Set the default size of GAS's hash tables to a prime number close to
@var{number}. Increasing this value can reduce the length of time it takes the
assembler to perform its tasks, at the expense of increasing the assembler's
memory requirements. Similarly reducing this value can reduce the memory
requirements at the expense of speed.
@item --reduce-memory-overheads
This option reduces GAS's memory requirements, at the expense of making the
assembly processes slower. Currently this switch is a synonym for
@samp{--hash-size=4051}, but in the future it may have other effects as well.
1999-05-03 07:29:11 +00:00
@item --statistics
Print the maximum space (in bytes) and total time (in seconds) used by
assembly.
@item --strip-local-absolute
Remove local absolute symbols from the outgoing symbol table.
@item -v
@itemx -version
Print the @command{as} version.
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@item --version
Print the @command{as} version and exit.
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@item -W
@itemx --no-warn
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Suppress warning messages.
@item --fatal-warnings
Treat warnings as errors.
@item --warn
Don't suppress warning messages or treat them as errors.
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@item -w
Ignored.
@item -x
Ignored.
@item -Z
Generate an object file even after errors.
@item -- | @var{files} @dots{}
Standard input, or source files to assemble.
@end table
@c man end
@ifset AARCH64
@ifclear man
@xref{AArch64 Options}, for the options available when @value{AS} is configured
for the 64-bit mode of the ARM Architecture (AArch64).
@end ifclear
@ifset man
@c man begin OPTIONS
The following options are available when @value{AS} is configured for the
64-bit mode of the ARM Architecture (AArch64).
@c man end
@c man begin INCLUDE
@include c-aarch64.texi
@c ended inside the included file
@end ifset
@end ifset
@ifset ALPHA
@ifclear man
@xref{Alpha Options}, for the options available when @value{AS} is configured
for an Alpha processor.
@end ifclear
@ifset man
@c man begin OPTIONS
The following options are available when @value{AS} is configured for an Alpha
processor.
@c man end
@c man begin INCLUDE
@include c-alpha.texi
@c ended inside the included file
@end ifset
@end ifset
1999-05-03 07:29:11 +00:00
@c man begin OPTIONS
1999-05-03 07:29:11 +00:00
@ifset ARC
The following options are available when @value{AS} is configured for
an ARC processor.
@table @gcctabopt
@item -marc[5|6|7|8]
This option selects the core processor variant.
@item -EB | -EL
Select either big-endian (-EB) or little-endian (-EL) output.
1999-05-03 07:29:11 +00:00
@end table
@end ifset
@ifset ARM
The following options are available when @value{AS} is configured for the ARM
processor family.
@table @gcctabopt
@item -mcpu=@var{processor}[+@var{extension}@dots{}]
1999-09-01 09:28:07 +00:00
Specify which ARM processor variant is the target.
@item -march=@var{architecture}[+@var{extension}@dots{}]
1999-09-01 09:28:07 +00:00
Specify which ARM architecture variant is used by the target.
@item -mfpu=@var{floating-point-format}
Select which Floating Point architecture is the target.
@item -mfloat-abi=@var{abi}
Select which floating point ABI is in use.
@item -mthumb
Enable Thumb only instruction decoding.
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@item -mapcs-32 | -mapcs-26 | -mapcs-float | -mapcs-reentrant
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Select which procedure calling convention is in use.
@item -EB | -EL
Select either big-endian (-EB) or little-endian (-EL) output.
1999-09-01 09:28:07 +00:00
@item -mthumb-interwork
Specify that the code has been generated with interworking between Thumb and
ARM code in mind.
@item -k
Specify that PIC code has been generated.
1999-05-03 07:29:11 +00:00
@end table
@end ifset
@c man end
1999-05-03 07:29:11 +00:00
@ifset Blackfin
@ifclear man
@xref{Blackfin Options}, for the options available when @value{AS} is
configured for the Blackfin processor family.
@end ifclear
@ifset man
@c man begin OPTIONS
The following options are available when @value{AS} is configured for
the Blackfin processor family.
@c man end
@c man begin INCLUDE
@include c-bfin.texi
@c ended inside the included file
@end ifset
@end ifset
@c man begin OPTIONS
@ifset CRIS
See the info pages for documentation of the CRIS-specific options.
@end ifset
1999-05-03 07:29:11 +00:00
@ifset D10V
The following options are available when @value{AS} is configured for
a D10V processor.
@table @gcctabopt
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@cindex D10V optimization
@cindex optimization, D10V
@item -O
Optimize output by parallelizing instructions.
@end table
@end ifset
@ifset D30V
The following options are available when @value{AS} is configured for a D30V
processor.
@table @gcctabopt
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@cindex D30V optimization
@cindex optimization, D30V
@item -O
Optimize output by parallelizing instructions.
@cindex D30V nops
@item -n
Warn when nops are generated.
@cindex D30V nops after 32-bit multiply
@item -N
Warn when a nop after a 32-bit multiply instruction is generated.
@end table
@end ifset
@c man end
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
@ifset EPIPHANY
The following options are available when @value{AS} is configured for the
Adapteva EPIPHANY series.
@ifclear man
@xref{Epiphany Options}, for the options available when @value{AS} is
configured for an Epiphany processor.
@end ifclear
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
@ifset man
@c man begin OPTIONS
The following options are available when @value{AS} is configured for
an Epiphany processor.
@c man end
@c man begin INCLUDE
@include c-epiphany.texi
@c ended inside the included file
@end ifset
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
@end ifset
@ifset I80386
1999-05-03 07:29:11 +00:00
@ifclear man
@xref{i386-Options}, for the options available when @value{AS} is
configured for an i386 processor.
@end ifclear
@ifset man
@c man begin OPTIONS
The following options are available when @value{AS} is configured for
an i386 processor.
@c man end
@c man begin INCLUDE
@include c-i386.texi
@c ended inside the included file
@end ifset
@end ifset
@c man begin OPTIONS
1999-05-03 07:29:11 +00:00
@ifset I960
The following options are available when @value{AS} is configured for the
Intel 80960 processor.
@table @gcctabopt
1999-05-03 07:29:11 +00:00
@item -ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC
Specify which variant of the 960 architecture is the target.
@item -b
Add code to collect statistics about branches taken.
@item -no-relax
Do not alter compare-and-branch instructions for long displacements;
error if necessary.
@end table
@end ifset
2002-07-19 07:52:40 +00:00
@ifset IP2K
The following options are available when @value{AS} is configured for the
Ubicom IP2K series.
2002-07-19 07:52:40 +00:00
@table @gcctabopt
@item -mip2022ext
Specifies that the extended IP2022 instructions are allowed.
@item -mip2022
Restores the default behaviour, which restricts the permitted instructions to
2002-07-19 07:52:40 +00:00
just the basic IP2022 ones.
@end table
@end ifset
ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * configure.in: Add cases for Renesas m32c. * configure: Regenerated. bfd/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for m32c-*-elf (Renesas m32c and m16c). * Makefile.am (ALL_MACHINES): Add cpu-m32c.lo. (ALL_MACHINES_CFILES): Add cpu-m32c.c. (BFD32_BACKENDS): Add elf32-m32c.lo. (BFD32_BACKENDS_CFILES): Add elf32-m32c.c. (cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'. * Makefile.in: Regenerated. * archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New arch and mach codes. (bfd_m32c_arch): New arch info object. (bfd_archures_list): List bfd_m32c_arch. * bfd-in2.h: Regenerated. * config.bfd: Add case for the m32c. * configure.in: Add case for the m32c. * configure: Regenerated. * cpu-m32c.c, elf32-m32c.c: New files. * libbfd.h: Regenerated. * targets.c (bfd_elf32_m32c_vec): Declare. (_bfd_target_vector): List bfd_elf32_m32c_vec. binutils/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * readelf.c: #include "elf/m32c.h" (guess_is_rela, dump_relocations, get_machine_name): Add cases for EM_M32C. * Makefile.am (readelf.o): Update dependencies. * Makefile.in: Regenerated. cpu/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. gas/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C. * Makefile.am (CPU_TYPES): List m32c. (TARGET_CPU_CFILES): List config/tc-m32c.c. (TARGET_CPU_HFILES): List config/tc-m32c.h. * configure.in: Add case for m32c. * configure.tgt: Add cases for m32c and m32c-*-elf. * configure: Regenerated. * config/tc-m32c.c, config/tc-m32c.h: New files. * doc/Makefile.am (CPU_DOCS): Add c-m32c.texi. * doc/Makefile.in: Regenerated. * doc/all.texi: Set M32C. * doc/as.texinfo: Add text for the M32C-specific options and line comment characters, and refer to c-m32c.texi. * doc/c-m32c.texi: New file. include/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * dis-asm.h (print_insn_m32c): New declaration. include/elf/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for Renesas M32C and M16C. * common.h (EM_M32C): New machine number. * m32c.h: New file. ld/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o. (eelf32m32c.c): New target. * Makefile.in: Regenerated. * configure.tgt: Add case for m32c-*-elf. * emulparams/elf32m32c.sh: New file. opcodes/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New. * m32c-desc.h, m32c-opc.h: New. * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h. (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c. (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo. (CLEANFILES): List stamp-m32c. (M32C_DEPS): List stamp-m32c, if CGEN_MAINT. (CGEN_CPUS): Add m32c. (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c) (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS. (m32c_opc_h): New variable. (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo) (m32c-opc.lo): New rules. * Makefile.in: Regenerated. * configure.in: Add case for bfd_m32c_arch. * configure: Regenerated. * disassemble.c (ARCH_m32c): New. [ARCH_m32c]: #include "m32c-desc.h". (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c. (disassemble_init_for_target) [ARCH_m32c]: Same. * cgen-ops.h, cgen-types.h: New files. * Makefile.am (HFILES): List them. * Makefile.in: Regenerated.
2005-07-14 22:52:28 +00:00
@ifset M32C
The following options are available when @value{AS} is configured for the
Renesas M32C and M16C processors.
@table @gcctabopt
@item -m32c
Assemble M32C instructions.
@item -m16c
Assemble M16C instructions (the default).
@item -relax
Enable support for link-time relaxations.
@item -h-tick-hex
Support H'00 style hex constants in addition to 0x00 style.
ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * configure.in: Add cases for Renesas m32c. * configure: Regenerated. bfd/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for m32c-*-elf (Renesas m32c and m16c). * Makefile.am (ALL_MACHINES): Add cpu-m32c.lo. (ALL_MACHINES_CFILES): Add cpu-m32c.c. (BFD32_BACKENDS): Add elf32-m32c.lo. (BFD32_BACKENDS_CFILES): Add elf32-m32c.c. (cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'. * Makefile.in: Regenerated. * archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New arch and mach codes. (bfd_m32c_arch): New arch info object. (bfd_archures_list): List bfd_m32c_arch. * bfd-in2.h: Regenerated. * config.bfd: Add case for the m32c. * configure.in: Add case for the m32c. * configure: Regenerated. * cpu-m32c.c, elf32-m32c.c: New files. * libbfd.h: Regenerated. * targets.c (bfd_elf32_m32c_vec): Declare. (_bfd_target_vector): List bfd_elf32_m32c_vec. binutils/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * readelf.c: #include "elf/m32c.h" (guess_is_rela, dump_relocations, get_machine_name): Add cases for EM_M32C. * Makefile.am (readelf.o): Update dependencies. * Makefile.in: Regenerated. cpu/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. gas/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C. * Makefile.am (CPU_TYPES): List m32c. (TARGET_CPU_CFILES): List config/tc-m32c.c. (TARGET_CPU_HFILES): List config/tc-m32c.h. * configure.in: Add case for m32c. * configure.tgt: Add cases for m32c and m32c-*-elf. * configure: Regenerated. * config/tc-m32c.c, config/tc-m32c.h: New files. * doc/Makefile.am (CPU_DOCS): Add c-m32c.texi. * doc/Makefile.in: Regenerated. * doc/all.texi: Set M32C. * doc/as.texinfo: Add text for the M32C-specific options and line comment characters, and refer to c-m32c.texi. * doc/c-m32c.texi: New file. include/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * dis-asm.h (print_insn_m32c): New declaration. include/elf/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for Renesas M32C and M16C. * common.h (EM_M32C): New machine number. * m32c.h: New file. ld/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o. (eelf32m32c.c): New target. * Makefile.in: Regenerated. * configure.tgt: Add case for m32c-*-elf. * emulparams/elf32m32c.sh: New file. opcodes/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New. * m32c-desc.h, m32c-opc.h: New. * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h. (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c. (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo. (CLEANFILES): List stamp-m32c. (M32C_DEPS): List stamp-m32c, if CGEN_MAINT. (CGEN_CPUS): Add m32c. (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c) (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS. (m32c_opc_h): New variable. (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo) (m32c-opc.lo): New rules. * Makefile.in: Regenerated. * configure.in: Add case for bfd_m32c_arch. * configure: Regenerated. * disassemble.c (ARCH_m32c): New. [ARCH_m32c]: #include "m32c-desc.h". (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c. (disassemble_init_for_target) [ARCH_m32c]: Same. * cgen-ops.h, cgen-types.h: New files. * Makefile.am (HFILES): List them. * Makefile.in: Regenerated.
2005-07-14 22:52:28 +00:00
@end table
@end ifset
@ifset M32R
The following options are available when @value{AS} is configured for the
Renesas M32R (formerly Mitsubishi M32R) series.
@table @gcctabopt
@item --m32rx
Specify which processor in the M32R family is the target. The default
is normally the M32R, but this option changes it to the M32RX.
@item --warn-explicit-parallel-conflicts or --Wp
Produce warning messages when questionable parallel constructs are
encountered.
@item --no-warn-explicit-parallel-conflicts or --Wnp
Do not produce warning messages when questionable parallel constructs are
encountered.
@end table
@end ifset
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@ifset M680X0
The following options are available when @value{AS} is configured for the
Motorola 68000 series.
@table @gcctabopt
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@item -l
Shorten references to undefined symbols, to one word instead of two.
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@item -m68000 | -m68008 | -m68010 | -m68020 | -m68030
@itemx | -m68040 | -m68060 | -m68302 | -m68331 | -m68332
@itemx | -m68333 | -m68340 | -mcpu32 | -m5200
1999-05-03 07:29:11 +00:00
Specify what processor in the 68000 family is the target. The default
is normally the 68020, but this can be changed at configuration time.
@item -m68881 | -m68882 | -mno-68881 | -mno-68882
The target machine does (or does not) have a floating-point coprocessor.
The default is to assume a coprocessor for 68020, 68030, and cpu32. Although
the basic 68000 is not compatible with the 68881, a combination of the
two can be specified, since it's possible to do emulation of the
coprocessor instructions with the main processor.
@item -m68851 | -mno-68851
The target machine does (or does not) have a memory-management
unit coprocessor. The default is to assume an MMU for 68020 and up.
@end table
@end ifset
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@ifset PDP11
For details about the PDP-11 machine dependent features options,
see @ref{PDP-11-Options}.
@table @gcctabopt
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@item -mpic | -mno-pic
Generate position-independent (or position-dependent) code. The
default is @option{-mpic}.
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@item -mall
@itemx -mall-extensions
Enable all instruction set extensions. This is the default.
@item -mno-extensions
Disable all instruction set extensions.
@item -m@var{extension} | -mno-@var{extension}
Enable (or disable) a particular instruction set extension.
@item -m@var{cpu}
Enable the instruction set extensions supported by a particular CPU, and
disable all other extensions.
@item -m@var{machine}
Enable the instruction set extensions supported by a particular machine
model, and disable all other extensions.
@end table
@end ifset
@ifset PJ
The following options are available when @value{AS} is configured for
a picoJava processor.
@table @gcctabopt
@cindex PJ endianness
@cindex endianness, PJ
@cindex big endian output, PJ
@item -mb
Generate ``big endian'' format output.
@cindex little endian output, PJ
@item -ml
Generate ``little endian'' format output.
@end table
@end ifset
@ifset M68HC11
The following options are available when @value{AS} is configured for the
Motorola 68HC11 or 68HC12 series.
@table @gcctabopt
* config/tc-m68hc11.c: Add S12X and XGATE co-processor support. Add option to offset S12 addresses into XGATE memory space. Tweak target flags to match other tools. (i.e. -m m68hc11). * doc/as.texinfo: Mention new options. * doc/c-m68hc11.texi: Document new options. * NEWS: Mention new support. * archures.c: Add bfd_arch_m9s12x and bfd_arch_m9s12xg. * config.bfd: Likewise. * cpu-m9s12x.c: New. * cpu-m9s12xg.c: New. * elf32-m68hc12.c: Add S12X and XGATE co-processor support. Add option to offset S12 addresses into XGATE memory space. Fix carry bug in IMM16 (IMM8 low/high) relocate. * Makefile.am (ALL_MACHINES): Add cpu-m9s12x and cpu-m9s12xg. (ALL_MACHINES_CFILES): Likewise. * reloc.c: Add S12X relocs. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * gas/m68hc11/insns9s12x.s: New * gas/m68hc11/insns9s12x.d: New * gas/m68hc11/hexprefix.s: New * gas/m68hc11/hexprefix.d: New * gas/m68hc11/9s12x-exg-sex-tfr.s: New * gas/m68hc11/9s12x-exg-sex-tfr.d: New * gas/m68hc11/insns9s12xg.s: New * gas/m68hc11/insns9s12xg.d: New * gas/m68hc11/9s12x-mov.s: New * gas/m68hc11/9s12x-mov.d: New * gas/m68hc11/m68hc11.exp: Updated * gas/m68hc11/*.d: Brought in line with changed objdump output. * gas/all/gas.exp: XFAIL all hc11/12 targets for redef2,3. * gas/elf/elf.exp: XFAIL all hc11/12 targets for redef. * gas/elf/dwarf2-1.d: Skip for hc11/12 targets. * gas/elf/dwarf2-2.d: Likewise. * ld-m68hc11/xgate-link.s: New. * ld-m68hc11/xgate-link.d: New. * ld-m68hc11/xgate-offset.s: New. * ld-m68hc11/xgate-offset.d: New. * ld-m68hc11/xgate1.s: New. * ld-m68hc11/xgate1.d: New. * ld-m68hc11/xgate2.s: New. * ld-m68hc11/m68hc11.exp: Updated. * ld-m68hc11/*.d: Brought in line with changed objdump output. * ld-gc/gc.exp: Update CFLAGS for m68hc11. * ld-plugin/plugin.exp: Likewise. * ld-srec/srec.exp: XFAIL for m68hc11 and m68hc12. * configure.in: Add S12X and XGATE co-processor support to m68hc11 target. * disassemble.c: Likewise. * configure: Regenerate. * m68hc11-dis.c: Make objdump output more consistent, use hex instead of decimal and use 0x prefix for hex. * m68hc11-opc.c: Add S12X and XGATE opcodes. * dis-asm.h (print_insn_m9s12x): Prototype. (print_insn_m9s12xg): Prototype. * m68hc11.h (R_M68HC12_16B, R_M68HC12_PCREL_9, R_M68HC12_PCREL_10) R_M68HC12_HI8XG, R_M68HC12_LO8XG): New relocations. (E_M68HC11_XGATE_RAMOFFSET): Define. * m68hc11.h: Add XGate definitions. (struct m68hc11_opcode): Add xg_mask field.
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@item -m68hc11 | -m68hc12 | -m68hcs12 | -mm9s12x | -mm9s12xg
Specify what processor is the target. The default is
defined by the configuration option when building the assembler.
* config/tc-m68hc11.c: Add S12X and XGATE co-processor support. Add option to offset S12 addresses into XGATE memory space. Tweak target flags to match other tools. (i.e. -m m68hc11). * doc/as.texinfo: Mention new options. * doc/c-m68hc11.texi: Document new options. * NEWS: Mention new support. * archures.c: Add bfd_arch_m9s12x and bfd_arch_m9s12xg. * config.bfd: Likewise. * cpu-m9s12x.c: New. * cpu-m9s12xg.c: New. * elf32-m68hc12.c: Add S12X and XGATE co-processor support. Add option to offset S12 addresses into XGATE memory space. Fix carry bug in IMM16 (IMM8 low/high) relocate. * Makefile.am (ALL_MACHINES): Add cpu-m9s12x and cpu-m9s12xg. (ALL_MACHINES_CFILES): Likewise. * reloc.c: Add S12X relocs. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * gas/m68hc11/insns9s12x.s: New * gas/m68hc11/insns9s12x.d: New * gas/m68hc11/hexprefix.s: New * gas/m68hc11/hexprefix.d: New * gas/m68hc11/9s12x-exg-sex-tfr.s: New * gas/m68hc11/9s12x-exg-sex-tfr.d: New * gas/m68hc11/insns9s12xg.s: New * gas/m68hc11/insns9s12xg.d: New * gas/m68hc11/9s12x-mov.s: New * gas/m68hc11/9s12x-mov.d: New * gas/m68hc11/m68hc11.exp: Updated * gas/m68hc11/*.d: Brought in line with changed objdump output. * gas/all/gas.exp: XFAIL all hc11/12 targets for redef2,3. * gas/elf/elf.exp: XFAIL all hc11/12 targets for redef. * gas/elf/dwarf2-1.d: Skip for hc11/12 targets. * gas/elf/dwarf2-2.d: Likewise. * ld-m68hc11/xgate-link.s: New. * ld-m68hc11/xgate-link.d: New. * ld-m68hc11/xgate-offset.s: New. * ld-m68hc11/xgate-offset.d: New. * ld-m68hc11/xgate1.s: New. * ld-m68hc11/xgate1.d: New. * ld-m68hc11/xgate2.s: New. * ld-m68hc11/m68hc11.exp: Updated. * ld-m68hc11/*.d: Brought in line with changed objdump output. * ld-gc/gc.exp: Update CFLAGS for m68hc11. * ld-plugin/plugin.exp: Likewise. * ld-srec/srec.exp: XFAIL for m68hc11 and m68hc12. * configure.in: Add S12X and XGATE co-processor support to m68hc11 target. * disassemble.c: Likewise. * configure: Regenerate. * m68hc11-dis.c: Make objdump output more consistent, use hex instead of decimal and use 0x prefix for hex. * m68hc11-opc.c: Add S12X and XGATE opcodes. * dis-asm.h (print_insn_m9s12x): Prototype. (print_insn_m9s12xg): Prototype. * m68hc11.h (R_M68HC12_16B, R_M68HC12_PCREL_9, R_M68HC12_PCREL_10) R_M68HC12_HI8XG, R_M68HC12_LO8XG): New relocations. (E_M68HC11_XGATE_RAMOFFSET): Define. * m68hc11.h: Add XGate definitions. (struct m68hc11_opcode): Add xg_mask field.
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@item --xgate-ramoffset
Instruct the linker to offset RAM addresses from S12X address space into
XGATE address space.
@item -mshort
Specify to use the 16-bit integer ABI.
@item -mlong
Specify to use the 32-bit integer ABI.
@item -mshort-double
Specify to use the 32-bit double ABI.
@item -mlong-double
Specify to use the 64-bit double ABI.
@item --force-long-branches
Relative branches are turned into absolute ones. This concerns
conditional branches, unconditional branches and branches to a
sub routine.
@item -S | --short-branches
Do not turn relative branches into absolute ones
when the offset is out of range.
@item --strict-direct-mode
Do not turn the direct addressing mode into extended addressing mode
when the instruction does not support direct addressing mode.
@item --print-insn-syntax
Print the syntax of instruction in case of error.
@item --print-opcodes
* config/tc-m68hc11.c: Add S12X and XGATE co-processor support. Add option to offset S12 addresses into XGATE memory space. Tweak target flags to match other tools. (i.e. -m m68hc11). * doc/as.texinfo: Mention new options. * doc/c-m68hc11.texi: Document new options. * NEWS: Mention new support. * archures.c: Add bfd_arch_m9s12x and bfd_arch_m9s12xg. * config.bfd: Likewise. * cpu-m9s12x.c: New. * cpu-m9s12xg.c: New. * elf32-m68hc12.c: Add S12X and XGATE co-processor support. Add option to offset S12 addresses into XGATE memory space. Fix carry bug in IMM16 (IMM8 low/high) relocate. * Makefile.am (ALL_MACHINES): Add cpu-m9s12x and cpu-m9s12xg. (ALL_MACHINES_CFILES): Likewise. * reloc.c: Add S12X relocs. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * gas/m68hc11/insns9s12x.s: New * gas/m68hc11/insns9s12x.d: New * gas/m68hc11/hexprefix.s: New * gas/m68hc11/hexprefix.d: New * gas/m68hc11/9s12x-exg-sex-tfr.s: New * gas/m68hc11/9s12x-exg-sex-tfr.d: New * gas/m68hc11/insns9s12xg.s: New * gas/m68hc11/insns9s12xg.d: New * gas/m68hc11/9s12x-mov.s: New * gas/m68hc11/9s12x-mov.d: New * gas/m68hc11/m68hc11.exp: Updated * gas/m68hc11/*.d: Brought in line with changed objdump output. * gas/all/gas.exp: XFAIL all hc11/12 targets for redef2,3. * gas/elf/elf.exp: XFAIL all hc11/12 targets for redef. * gas/elf/dwarf2-1.d: Skip for hc11/12 targets. * gas/elf/dwarf2-2.d: Likewise. * ld-m68hc11/xgate-link.s: New. * ld-m68hc11/xgate-link.d: New. * ld-m68hc11/xgate-offset.s: New. * ld-m68hc11/xgate-offset.d: New. * ld-m68hc11/xgate1.s: New. * ld-m68hc11/xgate1.d: New. * ld-m68hc11/xgate2.s: New. * ld-m68hc11/m68hc11.exp: Updated. * ld-m68hc11/*.d: Brought in line with changed objdump output. * ld-gc/gc.exp: Update CFLAGS for m68hc11. * ld-plugin/plugin.exp: Likewise. * ld-srec/srec.exp: XFAIL for m68hc11 and m68hc12. * configure.in: Add S12X and XGATE co-processor support to m68hc11 target. * disassemble.c: Likewise. * configure: Regenerate. * m68hc11-dis.c: Make objdump output more consistent, use hex instead of decimal and use 0x prefix for hex. * m68hc11-opc.c: Add S12X and XGATE opcodes. * dis-asm.h (print_insn_m9s12x): Prototype. (print_insn_m9s12xg): Prototype. * m68hc11.h (R_M68HC12_16B, R_M68HC12_PCREL_9, R_M68HC12_PCREL_10) R_M68HC12_HI8XG, R_M68HC12_LO8XG): New relocations. (E_M68HC11_XGATE_RAMOFFSET): Define. * m68hc11.h: Add XGate definitions. (struct m68hc11_opcode): Add xg_mask field.
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Print the list of instructions with syntax and then exit.
@item --generate-example
* config/tc-m68hc11.c: Add S12X and XGATE co-processor support. Add option to offset S12 addresses into XGATE memory space. Tweak target flags to match other tools. (i.e. -m m68hc11). * doc/as.texinfo: Mention new options. * doc/c-m68hc11.texi: Document new options. * NEWS: Mention new support. * archures.c: Add bfd_arch_m9s12x and bfd_arch_m9s12xg. * config.bfd: Likewise. * cpu-m9s12x.c: New. * cpu-m9s12xg.c: New. * elf32-m68hc12.c: Add S12X and XGATE co-processor support. Add option to offset S12 addresses into XGATE memory space. Fix carry bug in IMM16 (IMM8 low/high) relocate. * Makefile.am (ALL_MACHINES): Add cpu-m9s12x and cpu-m9s12xg. (ALL_MACHINES_CFILES): Likewise. * reloc.c: Add S12X relocs. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * gas/m68hc11/insns9s12x.s: New * gas/m68hc11/insns9s12x.d: New * gas/m68hc11/hexprefix.s: New * gas/m68hc11/hexprefix.d: New * gas/m68hc11/9s12x-exg-sex-tfr.s: New * gas/m68hc11/9s12x-exg-sex-tfr.d: New * gas/m68hc11/insns9s12xg.s: New * gas/m68hc11/insns9s12xg.d: New * gas/m68hc11/9s12x-mov.s: New * gas/m68hc11/9s12x-mov.d: New * gas/m68hc11/m68hc11.exp: Updated * gas/m68hc11/*.d: Brought in line with changed objdump output. * gas/all/gas.exp: XFAIL all hc11/12 targets for redef2,3. * gas/elf/elf.exp: XFAIL all hc11/12 targets for redef. * gas/elf/dwarf2-1.d: Skip for hc11/12 targets. * gas/elf/dwarf2-2.d: Likewise. * ld-m68hc11/xgate-link.s: New. * ld-m68hc11/xgate-link.d: New. * ld-m68hc11/xgate-offset.s: New. * ld-m68hc11/xgate-offset.d: New. * ld-m68hc11/xgate1.s: New. * ld-m68hc11/xgate1.d: New. * ld-m68hc11/xgate2.s: New. * ld-m68hc11/m68hc11.exp: Updated. * ld-m68hc11/*.d: Brought in line with changed objdump output. * ld-gc/gc.exp: Update CFLAGS for m68hc11. * ld-plugin/plugin.exp: Likewise. * ld-srec/srec.exp: XFAIL for m68hc11 and m68hc12. * configure.in: Add S12X and XGATE co-processor support to m68hc11 target. * disassemble.c: Likewise. * configure: Regenerate. * m68hc11-dis.c: Make objdump output more consistent, use hex instead of decimal and use 0x prefix for hex. * m68hc11-opc.c: Add S12X and XGATE opcodes. * dis-asm.h (print_insn_m9s12x): Prototype. (print_insn_m9s12xg): Prototype. * m68hc11.h (R_M68HC12_16B, R_M68HC12_PCREL_9, R_M68HC12_PCREL_10) R_M68HC12_HI8XG, R_M68HC12_LO8XG): New relocations. (E_M68HC11_XGATE_RAMOFFSET): Define. * m68hc11.h: Add XGate definitions. (struct m68hc11_opcode): Add xg_mask field.
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Print an example of instruction for each possible instruction and then exit.
This option is only useful for testing @command{@value{AS}}.
@end table
@end ifset
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@ifset SPARC
The following options are available when @command{@value{AS}} is configured
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for the SPARC architecture:
@table @gcctabopt
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@item -Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite
@itemx -Av8plus | -Av8plusa | -Av9 | -Av9a
Explicitly select a variant of the SPARC architecture.
@samp{-Av8plus} and @samp{-Av8plusa} select a 32 bit environment.
@samp{-Av9} and @samp{-Av9a} select a 64 bit environment.
@samp{-Av8plusa} and @samp{-Av9a} enable the SPARC V9 instruction set with
UltraSPARC extensions.
@item -xarch=v8plus | -xarch=v8plusa
For compatibility with the Solaris v9 assembler. These options are
equivalent to -Av8plus and -Av8plusa, respectively.
@item -bump
Warn when the assembler switches to another architecture.
@end table
@end ifset
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@ifset TIC54X
The following options are available when @value{AS} is configured for the 'c54x
architecture.
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@table @gcctabopt
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@item -mfar-mode
Enable extended addressing mode. All addresses and relocations will assume
extended addressing (usually 23 bits).
@item -mcpu=@var{CPU_VERSION}
Sets the CPU version being compiled for.
@item -merrors-to-file @var{FILENAME}
Redirect error output to a file, for broken systems which don't support such
behaviour in the shell.
@end table
@end ifset
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@ifset MIPS
The following options are available when @value{AS} is configured for
a @sc{mips} processor.
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@table @gcctabopt
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@item -G @var{num}
This option sets the largest size of an object that can be referenced
implicitly with the @code{gp} register. It is only accepted for targets that
use ECOFF format, such as a DECstation running Ultrix. The default value is 8.
@cindex MIPS endianness
@cindex endianness, MIPS
@cindex big endian output, MIPS
@item -EB
Generate ``big endian'' format output.
@cindex little endian output, MIPS
@item -EL
Generate ``little endian'' format output.
@cindex MIPS ISA
@item -mips1
@itemx -mips2
@itemx -mips3
@itemx -mips4
@itemx -mips5
@itemx -mips32
[ bfd/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * aoutx.h (NAME(aout,machine_type)): Add bfd_mach_mipsisa32r2 case. * archures.c (bfd_mach_mipsisa32r2): New define. * bfd-in2.h: Regenerate. * cpu-mips.c (I_mipsisa32r2): New enum value. (arch_info_struct): Add entry for I_mipsisa32r2. * elfxx-mips.c (elf_mips_isa, _bfd_elf_mips_mach) (_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_32R2. (_bfd_mips_elf_final_write_processing): Add bfd_mach_mipsisa32r2 case. (_bfd_mips_elf_merge_private_bfd_data): Handle merging of binaries marked as using MIPS32 Release 2. [ binutils/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * doc/binutils.texi (objdump): Note MIPS HWR (Hardware Register) changes in MIPS -M options. [ gas/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * configure.in: Recognize mipsisa32r2, mipsisa32r2el, and CPU variants. * configure: Regenerate. * config/tc-mips.c (ISA_HAS_DROR, ISA_HAS_ROR): New defines. (macro_build): Handle "K" operand. (macro2): Use ISA_HAS_DROR and ISA_HAS_ROR in the places where CPU_HAS_DROR and CPU_HAS_ROR are currently used. (mips_ip): New variable "lastpos", and implement "+A", "+B", and "+C" operands for MIPS32 Release 2 ins/ext instructions. Implement "K" operand for MIPS32 Release 2 rdhwr instruction. (validate_mips_insn): Implement "+" as a way to extend the allowed operands, and implement "K", "+A", "+B", and "+C" operands. (OPTION_MIPS32R2): New define. (md_longopts): Add entry for OPTION_MIPS32R2. (OPTION_ELF_BASE): Adjust to accomodate OPTIONS_MIPS32R2. (md_parse_option): Handle OPTION_MIPS32R2. (s_mipsset): Reimplement handling of ".set mipsN" options and add support for ".set mips32r2". (mips_cpu_info_table): Add entry for "mips32r2" (MIPS32 Release 2). (md_show_usage): Document "-mips32r2" option. * doc/as.texinfo: Document "-mips32r2" option. * doc/c-mips.texi: Likewise. [ gas/testsuite/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * gas/mips/cp0-names-mips32r2.d: New test. * gas/mips/hwr-names-mips32r2.d: New test. * gas/mips/hwr-names-numeric.d: New test. * gas/mips/hwr-names.s: New test source file. * gas/mips/mips32r2.d: New test. * gas/mips/mips32r2.s: New test source file. * gas/mips/mips32r2-ill.l: New test. * gas/mips/mips32r2-ill.s: New test source file. * gas/mips/mips.exp: Add mips32r2 architecture data array entry. Run new tests mentioned above. [ include/elf/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * mips.h (E_MIPS_ARCH_32R2): New define. [ include/opcode/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * mips.h: Document "+" as the start of two-character operand type names, and add new "K", "+A", "+B", and "+C" operand types. (OP_MASK_INSMSB, OP_SH_INSMSB, OP_MASK_EXTMSB) (OP_SH_EXTMSB, INSN_ISA32R2, ISA_MIPS32R2, CPU_MIPS32R2): New defines. [ opcodes/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * mips-dis.c (mips_cp0_names_mips3264r2, mips_hwr_names_numeric) (mips_hwr_names_mips3264r2): New arrays. (mips_arch_choice): New "hwr_names" member. (mips_arch_choices): Adjust for structure change, and add a new entry for "mips32r2" ISA. (mips_hwr_names): New variable. (set_default_mips_dis_options): Set mips_hwr_names. (parse_mips_dis_option): New "hwr-names" option which sets mips_hwr_names, and adjust "reg-names=ARCH" to set mips_hwr_names. (print_insn_arg): Change return type to "int" and use that to indicate number of characters consumed. Add support for "+" operand extension character, "+A", "+B", "+C", and "K" operands. (print_insn_mips): Adjust for changes to print_insn_arg. (print_mips_disassembler_options): Adjust for "hwr-names" addition and "reg-names" change. * mips-opc (I33): New define (shorthand for INSN_ISA32R2). (mips_builtin_opcodes): Note that "nop" and "ssnop" are special forms of "sll". Add new MIPS32 Release 2 instructions: ehb, di, ei, ext, ins, jr.hb, jalr.hb, mfhc1, mfhc2, mthc1, mthc2, rdhwr, rdpgpr, seb, seh, synci, wrpgpr, wsbh. Note that hardware rotate instructions (ror, rorv) can be used on MIPS32 Release 2, and add the official mnemonics for them (rotr, rotrv) and the similar "rotl" mnemonic for left-rotate.
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@itemx -mips32r2
@itemx -mips64
[ bfd/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * archures.c (bfd_mach_mipsisa64r2): New define. * bfd-in2.h: Regenerate. * aoutx.h (NAME(aout,machine_type)): Handle bfd_mach_mipsisa64r2. * cpu-mips.c (I_mipsisa64r2): New enum value. (arch_info_struct): Add entry for I_mipsisa64r2. * elfxx-mips.c (_bfd_elf_mips_mach) (_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_64R2. (mips_set_isa_flags): Add bfd_mach_mipsisa64r2 case. (mips_mach_extensions): Add entry for bfd_mach_mipsisa64r2. [ binutils/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * readelf.c (get_machine_flags): Handle E_MIPS_ARCH_64R2. [ gas/Changelog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * configure.in (mipsisa64r2, mipsisa64r2el, mipsisa64r2*): New CPUs. * configure: Regenerate. * config/tc-mips.c (imm2_expr): New variable. (md_assemble, mips16_ip): Initialize imm2_expr. (ISA_HAS_64BIT_REGS, ISA_HAS_DROR, ISA_HAS_ROR): Add ISA_MIPS64R2. (macro_build): Handle +A, +B, +C, +E, +F, +G, and +H format operands. (macro): Handle M_DEXT and M_DINS. (validate_mips_insn): Handle +E, +F, +G, +H, and +I format operands. (mips_ip): Likewise. (OPTION_MIPS64R2): New define. (md_longopts): New entry for -mips64r2 (OPTION_MIPS64R2). OPTION_ASE_BASE): Increase to compensate for OPTION_MIPS64R2. (md_parse_option): Handle OPTION_MIPS64R2. (s_mipsset): Handle setting "mips64r2" ISA. (mips_cpu_info_table): Add mips64r2. (md_show_usage): Document -mips64r2 option. * doc/as.texinfo: Docuemnt -mips64r2 option. * doc/c-mips.texi: Likewise. [ gas/testsuite/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * gas/mips/cp0-names-mips64r2.d: New file. * gas/mips/cp0sel-names-mips64r2.d: New file. * gas/mips/elf_arch_mips64r2.d: New file. * gas/mips/hwr-names-mips64r2.d: New file. * gas/mips/mips32r2-ill-fp64.l: New file. * gas/mips/mips32r2-ill-fp64.s: New file. * gas/mips/mips64r2-ill.l: New file. * gas/mips/mips64r2-ill.s: New file. * gas/mips/mips64r2.d: New file. * gas/mips/mips64r2.s: New file. * gas/mips/mips.exp: Define "mips64r2" arch, and run new tests. [ include/elf/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * mips.h (E_MIPS_ARCH_64R2): New define. [ include/opcode/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * mips.h: Document +E, +F, +G, +H, and +I operand types. Update documentation of I, +B and +C operand types. (INSN_ISA64R2, ISA_MIPS64R2, CPU_MIPS64R2): New defines. (M_DEXT, M_DINS): New enum values. [ ld/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * ldmain.c (get_emulation): Ignore "-mips64r2". [ ld/testsuite/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * ld-mips-elf/mips-elf-flags.exp: Add tests for combinations with MIPS64r2. [ opcodes/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * mips-dis.c (mips_arch_choices): Add entry for "mips64r2" (print_insn_args): Add handing for +E, +F, +G, and +H. * mips-opc.c (I65): New define for MIPS64r2. (mips_builtin_opcodes): Add "dext", "dextm", "dextu", "dins", "dinsm", "dinsu", "drotl", "drotr", "drotr32", "drotrv", "dsbh", and "dshd" for MIPS64r2. Adjust "dror", "dror32", and "drorv" to be supported on MIPS64r2.
2003-09-30 16:17:15 +00:00
@itemx -mips64r2
Generate code for a particular @sc{mips} Instruction Set Architecture level.
@samp{-mips1} is an alias for @samp{-march=r3000}, @samp{-mips2} is an
alias for @samp{-march=r6000}, @samp{-mips3} is an alias for
@samp{-march=r4000} and @samp{-mips4} is an alias for @samp{-march=r8000}.
[ bfd/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * archures.c (bfd_mach_mipsisa64r2): New define. * bfd-in2.h: Regenerate. * aoutx.h (NAME(aout,machine_type)): Handle bfd_mach_mipsisa64r2. * cpu-mips.c (I_mipsisa64r2): New enum value. (arch_info_struct): Add entry for I_mipsisa64r2. * elfxx-mips.c (_bfd_elf_mips_mach) (_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_64R2. (mips_set_isa_flags): Add bfd_mach_mipsisa64r2 case. (mips_mach_extensions): Add entry for bfd_mach_mipsisa64r2. [ binutils/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * readelf.c (get_machine_flags): Handle E_MIPS_ARCH_64R2. [ gas/Changelog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * configure.in (mipsisa64r2, mipsisa64r2el, mipsisa64r2*): New CPUs. * configure: Regenerate. * config/tc-mips.c (imm2_expr): New variable. (md_assemble, mips16_ip): Initialize imm2_expr. (ISA_HAS_64BIT_REGS, ISA_HAS_DROR, ISA_HAS_ROR): Add ISA_MIPS64R2. (macro_build): Handle +A, +B, +C, +E, +F, +G, and +H format operands. (macro): Handle M_DEXT and M_DINS. (validate_mips_insn): Handle +E, +F, +G, +H, and +I format operands. (mips_ip): Likewise. (OPTION_MIPS64R2): New define. (md_longopts): New entry for -mips64r2 (OPTION_MIPS64R2). OPTION_ASE_BASE): Increase to compensate for OPTION_MIPS64R2. (md_parse_option): Handle OPTION_MIPS64R2. (s_mipsset): Handle setting "mips64r2" ISA. (mips_cpu_info_table): Add mips64r2. (md_show_usage): Document -mips64r2 option. * doc/as.texinfo: Docuemnt -mips64r2 option. * doc/c-mips.texi: Likewise. [ gas/testsuite/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * gas/mips/cp0-names-mips64r2.d: New file. * gas/mips/cp0sel-names-mips64r2.d: New file. * gas/mips/elf_arch_mips64r2.d: New file. * gas/mips/hwr-names-mips64r2.d: New file. * gas/mips/mips32r2-ill-fp64.l: New file. * gas/mips/mips32r2-ill-fp64.s: New file. * gas/mips/mips64r2-ill.l: New file. * gas/mips/mips64r2-ill.s: New file. * gas/mips/mips64r2.d: New file. * gas/mips/mips64r2.s: New file. * gas/mips/mips.exp: Define "mips64r2" arch, and run new tests. [ include/elf/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * mips.h (E_MIPS_ARCH_64R2): New define. [ include/opcode/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * mips.h: Document +E, +F, +G, +H, and +I operand types. Update documentation of I, +B and +C operand types. (INSN_ISA64R2, ISA_MIPS64R2, CPU_MIPS64R2): New defines. (M_DEXT, M_DINS): New enum values. [ ld/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * ldmain.c (get_emulation): Ignore "-mips64r2". [ ld/testsuite/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * ld-mips-elf/mips-elf-flags.exp: Add tests for combinations with MIPS64r2. [ opcodes/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * mips-dis.c (mips_arch_choices): Add entry for "mips64r2" (print_insn_args): Add handing for +E, +F, +G, and +H. * mips-opc.c (I65): New define for MIPS64r2. (mips_builtin_opcodes): Add "dext", "dextm", "dextu", "dins", "dinsm", "dinsu", "drotl", "drotr", "drotr32", "drotrv", "dsbh", and "dshd" for MIPS64r2. Adjust "dror", "dror32", and "drorv" to be supported on MIPS64r2.
2003-09-30 16:17:15 +00:00
@samp{-mips5}, @samp{-mips32}, @samp{-mips32r2}, @samp{-mips64}, and
@samp{-mips64r2}
[ bfd/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * aoutx.h (NAME(aout,machine_type)): Add bfd_mach_mipsisa32r2 case. * archures.c (bfd_mach_mipsisa32r2): New define. * bfd-in2.h: Regenerate. * cpu-mips.c (I_mipsisa32r2): New enum value. (arch_info_struct): Add entry for I_mipsisa32r2. * elfxx-mips.c (elf_mips_isa, _bfd_elf_mips_mach) (_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_32R2. (_bfd_mips_elf_final_write_processing): Add bfd_mach_mipsisa32r2 case. (_bfd_mips_elf_merge_private_bfd_data): Handle merging of binaries marked as using MIPS32 Release 2. [ binutils/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * doc/binutils.texi (objdump): Note MIPS HWR (Hardware Register) changes in MIPS -M options. [ gas/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * configure.in: Recognize mipsisa32r2, mipsisa32r2el, and CPU variants. * configure: Regenerate. * config/tc-mips.c (ISA_HAS_DROR, ISA_HAS_ROR): New defines. (macro_build): Handle "K" operand. (macro2): Use ISA_HAS_DROR and ISA_HAS_ROR in the places where CPU_HAS_DROR and CPU_HAS_ROR are currently used. (mips_ip): New variable "lastpos", and implement "+A", "+B", and "+C" operands for MIPS32 Release 2 ins/ext instructions. Implement "K" operand for MIPS32 Release 2 rdhwr instruction. (validate_mips_insn): Implement "+" as a way to extend the allowed operands, and implement "K", "+A", "+B", and "+C" operands. (OPTION_MIPS32R2): New define. (md_longopts): Add entry for OPTION_MIPS32R2. (OPTION_ELF_BASE): Adjust to accomodate OPTIONS_MIPS32R2. (md_parse_option): Handle OPTION_MIPS32R2. (s_mipsset): Reimplement handling of ".set mipsN" options and add support for ".set mips32r2". (mips_cpu_info_table): Add entry for "mips32r2" (MIPS32 Release 2). (md_show_usage): Document "-mips32r2" option. * doc/as.texinfo: Document "-mips32r2" option. * doc/c-mips.texi: Likewise. [ gas/testsuite/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * gas/mips/cp0-names-mips32r2.d: New test. * gas/mips/hwr-names-mips32r2.d: New test. * gas/mips/hwr-names-numeric.d: New test. * gas/mips/hwr-names.s: New test source file. * gas/mips/mips32r2.d: New test. * gas/mips/mips32r2.s: New test source file. * gas/mips/mips32r2-ill.l: New test. * gas/mips/mips32r2-ill.s: New test source file. * gas/mips/mips.exp: Add mips32r2 architecture data array entry. Run new tests mentioned above. [ include/elf/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * mips.h (E_MIPS_ARCH_32R2): New define. [ include/opcode/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * mips.h: Document "+" as the start of two-character operand type names, and add new "K", "+A", "+B", and "+C" operand types. (OP_MASK_INSMSB, OP_SH_INSMSB, OP_MASK_EXTMSB) (OP_SH_EXTMSB, INSN_ISA32R2, ISA_MIPS32R2, CPU_MIPS32R2): New defines. [ opcodes/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * mips-dis.c (mips_cp0_names_mips3264r2, mips_hwr_names_numeric) (mips_hwr_names_mips3264r2): New arrays. (mips_arch_choice): New "hwr_names" member. (mips_arch_choices): Adjust for structure change, and add a new entry for "mips32r2" ISA. (mips_hwr_names): New variable. (set_default_mips_dis_options): Set mips_hwr_names. (parse_mips_dis_option): New "hwr-names" option which sets mips_hwr_names, and adjust "reg-names=ARCH" to set mips_hwr_names. (print_insn_arg): Change return type to "int" and use that to indicate number of characters consumed. Add support for "+" operand extension character, "+A", "+B", "+C", and "K" operands. (print_insn_mips): Adjust for changes to print_insn_arg. (print_mips_disassembler_options): Adjust for "hwr-names" addition and "reg-names" change. * mips-opc (I33): New define (shorthand for INSN_ISA32R2). (mips_builtin_opcodes): Note that "nop" and "ssnop" are special forms of "sll". Add new MIPS32 Release 2 instructions: ehb, di, ei, ext, ins, jr.hb, jalr.hb, mfhc1, mfhc2, mthc1, mthc2, rdhwr, rdpgpr, seb, seh, synci, wrpgpr, wsbh. Note that hardware rotate instructions (ror, rorv) can be used on MIPS32 Release 2, and add the official mnemonics for them (rotr, rotrv) and the similar "rotl" mnemonic for left-rotate.
2002-12-31 07:29:29 +00:00
correspond to generic
[ bfd/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * archures.c (bfd_mach_mipsisa64r2): New define. * bfd-in2.h: Regenerate. * aoutx.h (NAME(aout,machine_type)): Handle bfd_mach_mipsisa64r2. * cpu-mips.c (I_mipsisa64r2): New enum value. (arch_info_struct): Add entry for I_mipsisa64r2. * elfxx-mips.c (_bfd_elf_mips_mach) (_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_64R2. (mips_set_isa_flags): Add bfd_mach_mipsisa64r2 case. (mips_mach_extensions): Add entry for bfd_mach_mipsisa64r2. [ binutils/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * readelf.c (get_machine_flags): Handle E_MIPS_ARCH_64R2. [ gas/Changelog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * configure.in (mipsisa64r2, mipsisa64r2el, mipsisa64r2*): New CPUs. * configure: Regenerate. * config/tc-mips.c (imm2_expr): New variable. (md_assemble, mips16_ip): Initialize imm2_expr. (ISA_HAS_64BIT_REGS, ISA_HAS_DROR, ISA_HAS_ROR): Add ISA_MIPS64R2. (macro_build): Handle +A, +B, +C, +E, +F, +G, and +H format operands. (macro): Handle M_DEXT and M_DINS. (validate_mips_insn): Handle +E, +F, +G, +H, and +I format operands. (mips_ip): Likewise. (OPTION_MIPS64R2): New define. (md_longopts): New entry for -mips64r2 (OPTION_MIPS64R2). OPTION_ASE_BASE): Increase to compensate for OPTION_MIPS64R2. (md_parse_option): Handle OPTION_MIPS64R2. (s_mipsset): Handle setting "mips64r2" ISA. (mips_cpu_info_table): Add mips64r2. (md_show_usage): Document -mips64r2 option. * doc/as.texinfo: Docuemnt -mips64r2 option. * doc/c-mips.texi: Likewise. [ gas/testsuite/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * gas/mips/cp0-names-mips64r2.d: New file. * gas/mips/cp0sel-names-mips64r2.d: New file. * gas/mips/elf_arch_mips64r2.d: New file. * gas/mips/hwr-names-mips64r2.d: New file. * gas/mips/mips32r2-ill-fp64.l: New file. * gas/mips/mips32r2-ill-fp64.s: New file. * gas/mips/mips64r2-ill.l: New file. * gas/mips/mips64r2-ill.s: New file. * gas/mips/mips64r2.d: New file. * gas/mips/mips64r2.s: New file. * gas/mips/mips.exp: Define "mips64r2" arch, and run new tests. [ include/elf/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * mips.h (E_MIPS_ARCH_64R2): New define. [ include/opcode/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * mips.h: Document +E, +F, +G, +H, and +I operand types. Update documentation of I, +B and +C operand types. (INSN_ISA64R2, ISA_MIPS64R2, CPU_MIPS64R2): New defines. (M_DEXT, M_DINS): New enum values. [ ld/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * ldmain.c (get_emulation): Ignore "-mips64r2". [ ld/testsuite/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * ld-mips-elf/mips-elf-flags.exp: Add tests for combinations with MIPS64r2. [ opcodes/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * mips-dis.c (mips_arch_choices): Add entry for "mips64r2" (print_insn_args): Add handing for +E, +F, +G, and +H. * mips-opc.c (I65): New define for MIPS64r2. (mips_builtin_opcodes): Add "dext", "dextm", "dextu", "dins", "dinsm", "dinsu", "drotl", "drotr", "drotr32", "drotrv", "dsbh", and "dshd" for MIPS64r2. Adjust "dror", "dror32", and "drorv" to be supported on MIPS64r2.
2003-09-30 16:17:15 +00:00
@samp{MIPS V}, @samp{MIPS32}, @samp{MIPS32 Release 2}, @samp{MIPS64},
and @samp{MIPS64 Release 2}
ISA processors, respectively.
@item -march=@var{CPU}
Generate code for a particular @sc{mips} cpu.
@item -mtune=@var{cpu}
Schedule and tune for a particular @sc{mips} cpu.
@item -mfix7000
@itemx -mno-fix7000
Cause nops to be inserted if the read of the destination register
of an mfhi or mflo instruction occurs in the following two instructions.
@item -mdebug
@itemx -no-mdebug
Cause stabs-style debugging output to go into an ECOFF-style .mdebug
section instead of the standard ELF .stabs sections.
@item -mpdr
@itemx -mno-pdr
Control generation of @code{.pdr} sections.
@item -mgp32
@itemx -mfp32
The register sizes are normally inferred from the ISA and ABI, but these
flags force a certain group of registers to be treated as 32 bits wide at
all times. @samp{-mgp32} controls the size of general-purpose registers
and @samp{-mfp32} controls the size of floating-point registers.
@item -mips16
@itemx -no-mips16
Generate code for the MIPS 16 processor. This is equivalent to putting
@code{.set mips16} at the start of the assembly file. @samp{-no-mips16}
turns off this option.
1999-05-03 07:29:11 +00:00
bfd/ 2011-02-25 Chao-ying Fu <fu@mips.com> Ilie Garbacea <ilie@mips.com> Maciej W. Rozycki <macro@codesourcery.com> Joseph Myers <joseph@codesourcery.com> Catherine Moore <clm@codesourcery.com> Richard Sandiford <rdsandiford@googlemail.com> * archures.c (bfd_mach_mips_micromips): New macro. * cpu-mips.c (I_micromips): New enum value. (arch_info_struct): Add bfd_mach_mips_micromips. * elfxx-mips.h (_bfd_mips_elf_is_target_special_symbol): New prototype. (_bfd_mips_elf_relax_section): Likewise. (_bfd_mips16_elf_reloc_unshuffle): Rename to... (_bfd_mips_elf_reloc_unshuffle): ... this. Handle microMIPS ASE. (_bfd_mips16_elf_reloc_shuffle): Rename to... (_bfd_mips_elf_reloc_shuffle): ... this. Handle microMIPS ASE. (gprel16_reloc_p): Handle microMIPS ASE. (literal_reloc_p): New function. * elf32-mips.c (elf_micromips_howto_table_rel): New variable. (_bfd_mips_elf32_gprel16_reloc): Handle microMIPS ASE. (mips16_gprel_reloc): Update for _bfd_mips_elf_reloc_unshuffle and _bfd_mips_elf_reloc_shuffle changes. (mips_elf_gprel32_reloc): Update comment. (micromips_reloc_map): New variable. (bfd_elf32_bfd_reloc_type_lookup): Handle microMIPS ASE. (mips_elf32_rtype_to_howto): Likewise. (mips_info_to_howto_rel): Likewise. (bfd_elf32_bfd_is_target_special_symbol): Define. (bfd_elf32_bfd_relax_section): Likewise. * elf64-mips.c (micromips_elf64_howto_table_rel): New variable. (micromips_elf64_howto_table_rela): Likewise. (mips16_gprel_reloc): Update for _bfd_mips_elf_reloc_unshuffle and _bfd_mips_elf_reloc_shuffle changes. (micromips_reloc_map): Likewise. (bfd_elf64_bfd_reloc_type_lookup): Handle microMIPS ASE. (bfd_elf64_bfd_reloc_name_lookup): Likewise. (mips_elf64_rtype_to_howto): Likewise. (bfd_elf64_bfd_is_target_special_symbol): Define. * elfn32-mips.c (elf_micromips_howto_table_rel): New variable. (elf_micromips_howto_table_rela): Likewise. (mips16_gprel_reloc): Update for _bfd_mips_elf_reloc_unshuffle and _bfd_mips_elf_reloc_shuffle changes. (micromips_reloc_map): Likewise. (bfd_elf32_bfd_reloc_type_lookup): Handle microMIPS ASE. (bfd_elf32_bfd_reloc_name_lookup): Likewise. (mips_elf_n32_rtype_to_howto): Likewise. (bfd_elf32_bfd_is_target_special_symbol): Define. * elfxx-mips.c (LA25_LUI_MICROMIPS_1): New macro. (LA25_LUI_MICROMIPS_2): Likewise. (LA25_J_MICROMIPS_1, LA25_J_MICROMIPS_2): Likewise. (LA25_ADDIU_MICROMIPS_1, LA25_ADDIU_MICROMIPS_2): Likewise. (TLS_RELOC_P): Handle microMIPS ASE. (mips_elf_create_stub_symbol): Adjust value of stub symbol if target is a microMIPS function. (micromips_reloc_p): New function. (micromips_reloc_shuffle_p): Likewise. (got16_reloc_p, call16_reloc_p): Handle microMIPS ASE. (got_disp_reloc_p, got_page_reloc_p): New functions. (got_ofst_reloc_p): Likewise. (got_hi16_reloc_p, got_lo16_reloc_p): Likewise. (call_hi16_reloc_p, call_lo16_reloc_p): Likewise. (hi16_reloc_p, lo16_reloc_p, jal_reloc_p): Handle microMIPS ASE. (micromips_branch_reloc_p): New function. (tls_gd_reloc_p, tls_ldm_reloc_p): Likewise. (tls_gottprel_reloc_p): Likewise. (_bfd_mips16_elf_reloc_unshuffle): Rename to... (_bfd_mips_elf_reloc_unshuffle): ... this. Handle microMIPS ASE. (_bfd_mips16_elf_reloc_shuffle): Rename to... (_bfd_mips_elf_reloc_shuffle): ... this. Handle microMIPS ASE. (_bfd_mips_elf_lo16_reloc): Handle microMIPS ASE. (mips_tls_got_index, mips_elf_got_page): Likewise. (mips_elf_create_local_got_entry): Likewise. (mips_elf_relocation_needs_la25_stub): Likewise. (mips_elf_calculate_relocation): Likewise. (mips_elf_perform_relocation): Likewise. (_bfd_mips_elf_symbol_processing): Likewise. (_bfd_mips_elf_add_symbol_hook): Likewise. (_bfd_mips_elf_link_output_symbol_hook): Likewise. (mips_elf_add_lo16_rel_addend): Likewise. (_bfd_mips_elf_check_relocs): Likewise. (mips_elf_adjust_addend): Likewise. (_bfd_mips_elf_relocate_section): Likewise. (mips_elf_create_la25_stub): Likewise. (_bfd_mips_vxworks_finish_dynamic_symbol): Likewise. (_bfd_mips_elf_gc_sweep_hook): Likewise. (_bfd_mips_elf_is_target_special_symbol): New function. (mips_elf_relax_delete_bytes): Likewise. (opcode_descriptor): New structure. (RA): New macro. (OP32_SREG, OP32_TREG, OP16_VALID_REG): Likewise. (b_insns_32, bc_insn_32, bz_insn_32, bzal_insn_32): New variables. (beq_insn_32): Likewise. (b_insn_16, bz_insn_16): New variables. (BZC32_REG_FIELD): New macro. (bz_rs_insns_32, bz_rt_insns_32): New variables. (bzc_insns_32, bz_insns_16):Likewise. (BZ16_REG, BZ16_REG_FIELD): New macros. (jal_insn_32_bd16, jal_insn_32_bd32): New variables. (jal_x_insn_32_bd32): Likewise. (j_insn_32, jalr_insn_32): Likewise. (ds_insns_32_bd16, ds_insns_32_bd32): Likewise. (jalr_insn_16_bd16, jalr_insn_16_bd32, jr_insn_16): Likewise. (JR16_REG): New macro. (ds_insns_16_bd16): New variable. (lui_insn): Likewise. (addiu_insn, addiupc_insn): Likewise. (ADDIUPC_REG_FIELD): New macro. (MOVE32_RD, MOVE32_RS): Likewise. (MOVE16_RD_FIELD, MOVE16_RS_FIELD): Likewise. (move_insns_32, move_insns_16): New variables. (nop_insn_32, nop_insn_16): Likewise. (MATCH): New macro. (find_match): New function. (check_br16_dslot, check_br32_dslot): Likewise. (check_br16, check_br32): Likewise. (IS_BITSIZE): New macro. (check_4byte_branch): New function. (_bfd_mips_elf_relax_section): Likewise. (_bfd_mips_elf_merge_private_bfd_data): Disallow linking MIPS16 and microMIPS modules together. (_bfd_mips_elf_print_private_bfd_data): Handle microMIPS ASE. * reloc.c (BFD_RELOC_MICROMIPS_7_PCREL_S1): New relocation. (BFD_RELOC_MICROMIPS_10_PCREL_S1): Likewise. (BFD_RELOC_MICROMIPS_16_PCREL_S1): Likewise. (BFD_RELOC_MICROMIPS_GPREL16): Likewise. (BFD_RELOC_MICROMIPS_JMP, BFD_RELOC_MICROMIPS_HI16): Likewise. (BFD_RELOC_MICROMIPS_HI16_S): Likewise. (BFD_RELOC_MICROMIPS_LO16): Likewise. (BFD_RELOC_MICROMIPS_LITERAL): Likewise. (BFD_RELOC_MICROMIPS_GOT16): Likewise. (BFD_RELOC_MICROMIPS_CALL16): Likewise. (BFD_RELOC_MICROMIPS_GOT_HI16): Likewise. (BFD_RELOC_MICROMIPS_GOT_LO16): Likewise. (BFD_RELOC_MICROMIPS_CALL_HI16): Likewise. (BFD_RELOC_MICROMIPS_CALL_LO16): Likewise. (BFD_RELOC_MICROMIPS_SUB): Likewise. (BFD_RELOC_MICROMIPS_GOT_PAGE): Likewise. (BFD_RELOC_MICROMIPS_GOT_OFST): Likewise. (BFD_RELOC_MICROMIPS_GOT_DISP): Likewise. (BFD_RELOC_MICROMIPS_HIGHEST): Likewise. (BFD_RELOC_MICROMIPS_HIGHER): Likewise. (BFD_RELOC_MICROMIPS_SCN_DISP): Likewise. (BFD_RELOC_MICROMIPS_JALR): Likewise. (BFD_RELOC_MICROMIPS_TLS_GD): Likewise. (BFD_RELOC_MICROMIPS_TLS_LDM): Likewise. (BFD_RELOC_MICROMIPS_TLS_DTPREL_HI16): Likewise. (BFD_RELOC_MICROMIPS_TLS_DTPREL_LO16): Likewise. (BFD_RELOC_MICROMIPS_TLS_GOTTPREL): Likewise. (BFD_RELOC_MICROMIPS_TLS_TPREL_HI16): Likewise. (BFD_RELOC_MICROMIPS_TLS_TPREL_LO16): Likewise. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. binutils/ 2011-02-25 Chao-ying Fu <fu@mips.com> Maciej W. Rozycki <macro@codesourcery.com> * readelf.c (get_machine_flags): Handle microMIPS ASE. (get_mips_symbol_other): Likewise. gas/ 2011-02-25 Maciej W. Rozycki <macro@codesourcery.com> Chao-ying Fu <fu@mips.com> Richard Sandiford <rdsandiford@googlemail.com> * config/tc-mips.h (mips_segment_info): Add one bit for microMIPS. (TC_LABEL_IS_LOCAL): New macro. (mips_label_is_local): New prototype. * config/tc-mips.c (S0, S7): New macros. (emit_branch_likely_macro): New variable. (mips_set_options): Add micromips. (mips_opts): Initialise micromips to -1. (file_ase_micromips): New variable. (CPU_HAS_MICROMIPS): New macro. (hilo_interlocks): Set for microMIPS too. (gpr_interlocks): Likewise. (cop_interlocks): Likewise. (cop_mem_interlocks): Likewise. (HAVE_CODE_COMPRESSION): New macro. (micromips_op_hash): New variable. (micromips_nop16_insn, micromips_nop32_insn): New variables. (NOP_INSN): Handle microMIPS ASE. (mips32_to_micromips_reg_b_map): New macro. (mips32_to_micromips_reg_c_map): Likewise. (mips32_to_micromips_reg_d_map): Likewise. (mips32_to_micromips_reg_e_map): Likewise. (mips32_to_micromips_reg_f_map): Likewise. (mips32_to_micromips_reg_g_map): Likewise. (mips32_to_micromips_reg_l_map): Likewise. (mips32_to_micromips_reg_n_map): Likewise. (mips32_to_micromips_reg_h_map): New variable. (mips32_to_micromips_reg_m_map): Likewise. (mips32_to_micromips_reg_q_map): Likewise. (micromips_to_32_reg_h_map): New variable. (micromips_to_32_reg_i_map): Likewise. (micromips_to_32_reg_m_map): Likewise. (micromips_to_32_reg_q_map): Likewise. (micromips_to_32_reg_b_map): New macro. (micromips_to_32_reg_c_map): Likewise. (micromips_to_32_reg_d_map): Likewise. (micromips_to_32_reg_e_map): Likewise. (micromips_to_32_reg_f_map): Likewise. (micromips_to_32_reg_g_map): Likewise. (micromips_to_32_reg_l_map): Likewise. (micromips_to_32_reg_n_map): Likewise. (micromips_imm_b_map, micromips_imm_c_map): New macros. (RELAX_DELAY_SLOT_16BIT): New macro. (RELAX_DELAY_SLOT_SIZE_FIRST): Likewise. (RELAX_DELAY_SLOT_SIZE_SECOND): Likewise. (RELAX_MICROMIPS_ENCODE, RELAX_MICROMIPS_P): New macros. (RELAX_MICROMIPS_TYPE, RELAX_MICROMIPS_AT): Likewise. (RELAX_MICROMIPS_U16BIT, RELAX_MICROMIPS_UNCOND): Likewise. (RELAX_MICROMIPS_COMPACT, RELAX_MICROMIPS_LINK): Likewise. (RELAX_MICROMIPS_RELAX32, RELAX_MICROMIPS_TOOFAR16): Likewise. (RELAX_MICROMIPS_MARK_TOOFAR16): Likewise. (RELAX_MICROMIPS_CLEAR_TOOFAR16): Likewise. (RELAX_MICROMIPS_TOOFAR32): Likewise. (RELAX_MICROMIPS_MARK_TOOFAR32): Likewise. (RELAX_MICROMIPS_CLEAR_TOOFAR32): Likewise. (INSERT_OPERAND, EXTRACT_OPERAND): Handle microMIPS ASE. (mips_macro_warning): Add delay_slot_16bit_p, delay_slot_32bit_p, fsize and insns. (mips_mark_labels): New function. (mips16_small, mips16_ext): Remove variables, replacing with... (forced_insn_size): ... this. (append_insn, mips16_ip): Update accordingly. (micromips_insn_length): New function. (insn_length): Return the length of microMIPS instructions. (mips_record_mips16_mode): Rename to... (mips_record_compressed_mode): ... this. Handle microMIPS ASE. (install_insn): Handle microMIPS ASE. (reglist_lookup): New function. (is_size_valid, is_delay_slot_valid): Likewise. (md_begin): Handle microMIPS ASE. (md_assemble): Likewise. Update for append_insn interface change. (micromips_reloc_p): New function. (got16_reloc_p): Handle microMIPS ASE. (hi16_reloc_p): Likewise. (lo16_reloc_p): Likewise. (jmp_reloc_p): New function. (jalr_reloc_p): Likewise. (matching_lo_reloc): Handle microMIPS ASE. (insn_uses_reg, reg_needs_delay): Likewise. (mips_move_labels): Likewise. (mips16_mark_labels): Rename to... (mips_compressed_mark_labels): ... this. Handle microMIPS ASE. (gpr_mod_mask): New function. (gpr_read_mask, gpr_write_mask): Handle microMIPS ASE. (fpr_read_mask, fpr_write_mask): Likewise. (insns_between, nops_for_vr4130, nops_for_insn): Likewise. (fix_loongson2f_nop, fix_loongson2f_jump): Likewise. (MICROMIPS_LABEL_CHAR): New macro. (micromips_target_label, micromips_target_name): New variables. (micromips_label_name, micromips_label_expr): New functions. (micromips_label_inc, micromips_add_label): Likewise. (mips_label_is_local): Likewise. (micromips_map_reloc): Likewise. (can_swap_branch_p): Handle microMIPS ASE. (append_insn): Add expansionp argument. Handle microMIPS ASE. (start_noreorder, end_noreorder): Handle microMIPS ASE. (macro_start, macro_warning, macro_end): Likewise. (brk_fmt, cop12_fmt, jalr_fmt, lui_fmt): New variables. (mem12_fmt, mfhl_fmt, shft_fmt, trap_fmt): Likewise. (BRK_FMT, COP12_FMT, JALR_FMT, LUI_FMT): New macros. (MEM12_FMT, MFHL_FMT, SHFT_FMT, TRAP_FMT): Likewise. (macro_build): Handle microMIPS ASE. Update for append_insn interface change. (mips16_macro_build): Update for append_insn interface change. (macro_build_jalr): Handle microMIPS ASE. (macro_build_lui): Likewise. Simplify. (load_register): Handle microMIPS ASE. (load_address): Likewise. (move_register): Likewise. (macro_build_branch_likely): New function. (macro_build_branch_ccl): Likewise. (macro_build_branch_rs): Likewise. (macro_build_branch_rsrt): Likewise. (macro): Handle microMIPS ASE. (validate_micromips_insn): New function. (expr_const_in_range): Likewise. (mips_ip): Handle microMIPS ASE. (options): Add OPTION_MICROMIPS and OPTION_NO_MICROMIPS. (md_longopts): Add mmicromips and mno-micromips. (md_parse_option): Handle OPTION_MICROMIPS and OPTION_NO_MICROMIPS. (mips_after_parse_args): Handle microMIPS ASE. (md_pcrel_from): Handle microMIPS relocations. (mips_force_relocation): Likewise. (md_apply_fix): Likewise. (mips_align): Handle microMIPS ASE. (s_mipsset): Likewise. (s_cpload, s_cpsetup, s_cpreturn): Use relocation wrappers. (s_dtprel_internal): Likewise. (s_gpword, s_gpdword): Likewise. (s_insn): Handle microMIPS ASE. (s_mips_stab): Likewise. (relaxed_micromips_32bit_branch_length): New function. (relaxed_micromips_16bit_branch_length): New function. (md_estimate_size_before_relax): Handle microMIPS ASE. (mips_fix_adjustable): Likewise. (tc_gen_reloc): Handle microMIPS relocations. (mips_relax_frag): Handle microMIPS ASE. (md_convert_frag): Likewise. (mips_frob_file_after_relocs): Likewise. (mips_elf_final_processing): Likewise. (mips_nop_opcode): Likewise. (mips_handle_align): Likewise. (md_show_usage): Handle microMIPS options. * symbols.c (TC_LABEL_IS_LOCAL): New macro. (S_IS_LOCAL): Add a TC_LABEL_IS_LOCAL check. * doc/as.texinfo (Target MIPS options): Add -mmicromips and -mno-micromips. (-mmicromips, -mno-micromips): New options. * doc/c-mips.texi (-mmicromips, -mno-micromips): New options. (MIPS ISA): Document .set micromips and .set nomicromips. (MIPS insn): Update for microMIPS support. gas/testsuite/ 2011-02-25 Maciej W. Rozycki <macro@codesourcery.com> Chao-ying Fu <fu@mips.com> Richard Sandiford <rdsandiford@googlemail.com> * gas/mips/micromips.d: New test. * gas/mips/micromips-branch-delay.d: Likewise. * gas/mips/micromips-branch-relax.d: Likewise. * gas/mips/micromips-branch-relax-pic.d: Likewise. * gas/mips/micromips-size-1.d: Likewise. * gas/mips/micromips-trap.d: Likewise. * gas/mips/micromips.l: New stderr output. * gas/mips/micromips-branch-delay.l: Likewise. * gas/mips/micromips-branch-relax.l: Likewise. * gas/mips/micromips-branch-relax-pic.l: Likewise. * gas/mips/micromips-size-0.l: New list test. * gas/mips/micromips-size-1.l: New stderr output. * gas/mips/micromips.s: New test source. * gas/mips/micromips-branch-delay.s: Likewise. * gas/mips/micromips-branch-relax.s: Likewise. * gas/mips/micromips-size-0.s: Likewise. * gas/mips/micromips-size-1.s: Likewise. * gas/mips/mips.exp: Run the new tests. * gas/mips/dli.s: Use .p2align. * gas/mips/elf_ase_micromips.d: New test. * gas/mips/elf_ase_micromips-2.d: Likewise. * gas/mips/micromips@abs.d: Likewise. * gas/mips/micromips@add.d: Likewise. * gas/mips/micromips@alnv_ps-swap.d: Likewise. * gas/mips/micromips@and.d: Likewise. * gas/mips/micromips@beq.d: Likewise. * gas/mips/micromips@bge.d: Likewise. * gas/mips/micromips@bgeu.d: Likewise. * gas/mips/micromips@blt.d: Likewise. * gas/mips/micromips@bltu.d: Likewise. * gas/mips/micromips@branch-likely.d: Likewise. * gas/mips/micromips@branch-misc-1.d: Likewise. * gas/mips/micromips@branch-misc-2-64.d: Likewise. * gas/mips/micromips@branch-misc-2.d: Likewise. * gas/mips/micromips@branch-misc-2pic-64.d: Likewise. * gas/mips/micromips@branch-misc-2pic.d: Likewise. * gas/mips/micromips@branch-misc-4-64.d: Likewise. * gas/mips/micromips@branch-misc-4.d: Likewise. * gas/mips/micromips@branch-self.d: Likewise. * gas/mips/micromips@cache.d: Likewise. * gas/mips/micromips@daddi.d: Likewise. * gas/mips/micromips@dli.d: Likewise. * gas/mips/micromips@elf-jal.d: Likewise. * gas/mips/micromips@elf-rel2.d: Likewise. * gas/mips/micromips@elfel-rel2.d: Likewise. * gas/mips/micromips@elf-rel4.d: Likewise. * gas/mips/micromips@jal-svr4pic.d: Likewise. * gas/mips/micromips@jal-svr4pic-noreorder.d: Likewise. * gas/mips/micromips@lb-svr4pic-ilocks.d: Likewise. * gas/mips/micromips@li.d: Likewise. * gas/mips/micromips@loc-swap-dis.d: Likewise. * gas/mips/micromips@loc-swap.d: Likewise. * gas/mips/micromips@mips1-fp.d: Likewise. * gas/mips/micromips@mips32-cp2.d: Likewise. * gas/mips/micromips@mips32-imm.d: Likewise. * gas/mips/micromips@mips32-sf32.d: Likewise. * gas/mips/micromips@mips32.d: Likewise. * gas/mips/micromips@mips32r2-cp2.d: Likewise. * gas/mips/micromips@mips32r2-fp32.d: Likewise. * gas/mips/micromips@mips32r2-sync.d: Likewise. * gas/mips/micromips@mips32r2.d: Likewise. * gas/mips/micromips@mips4-branch-likely.d: Likewise. * gas/mips/micromips@mips4-fp.d: Likewise. * gas/mips/micromips@mips4.d: Likewise. * gas/mips/micromips@mips5.d: Likewise. * gas/mips/micromips@mips64-cp2.d: Likewise. * gas/mips/micromips@mips64.d: Likewise. * gas/mips/micromips@mips64r2.d: Likewise. * gas/mips/micromips@pref.d: Likewise. * gas/mips/micromips@relax-at.d: Likewise. * gas/mips/micromips@relax.d: Likewise. * gas/mips/micromips@rol-hw.d: Likewise. * gas/mips/micromips@uld2-eb.d: Likewise. * gas/mips/micromips@uld2-el.d: Likewise. * gas/mips/micromips@ulh2-eb.d: Likewise. * gas/mips/micromips@ulh2-el.d: Likewise. * gas/mips/micromips@ulw2-eb-ilocks.d: Likewise. * gas/mips/micromips@ulw2-el-ilocks.d: Likewise. * gas/mips/cache.d: Likewise. * gas/mips/daddi.d: Likewise. * gas/mips/mips32-imm.d: Likewise. * gas/mips/pref.d: Likewise. * gas/mips/elf-rel27.d: Handle microMIPS ASE. * gas/mips/l_d.d: Likewise. * gas/mips/l_d-n32.d: Likewise. * gas/mips/l_d-n64.d: Likewise. * gas/mips/ld.d: Likewise. * gas/mips/ld-n32.d: Likewise. * gas/mips/ld-n64.d: Likewise. * gas/mips/s_d.d: Likewise. * gas/mips/s_d-n32.d: Likewise. * gas/mips/s_d-n64.d: Likewise. * gas/mips/sd.d: Likewise. * gas/mips/sd-n32.d: Likewise. * gas/mips/sd-n64.d: Likewise. * gas/mips/mips32.d: Update immediates. * gas/mips/micromips@mips32-cp2.s: New test source. * gas/mips/micromips@mips32-imm.s: Likewise. * gas/mips/micromips@mips32r2-cp2.s: Likewise. * gas/mips/micromips@mips64-cp2.s: Likewise. * gas/mips/cache.s: Likewise. * gas/mips/daddi.s: Likewise. * gas/mips/mips32-imm.s: Likewise. * gas/mips/elf-rel4.s: Handle microMIPS ASE. * gas/mips/lb-pic.s: Likewise. * gas/mips/ld.s: Likewise. * gas/mips/mips32.s: Likewise. * gas/mips/mips.exp: Add the micromips arch. Exclude mips16e from micromips. Run mips32-imm. * gas/mips/jal-mask-11.d: New test. * gas/mips/jal-mask-12.d: Likewise. * gas/mips/micromips@jal-mask-11.d: Likewise. * gas/mips/jal-mask-1.s: Source for the new tests. * gas/mips/jal-mask-21.d: New test. * gas/mips/jal-mask-22.d: Likewise. * gas/mips/micromips@jal-mask-12.d: Likewise. * gas/mips/jal-mask-2.s: Source for the new tests. * gas/mips/mips.exp: Run the new tests. * gas/mips/mips16-e.d: Add --special-syms to `objdump'. * gas/mips/tmips16-e.d: Likewise. * gas/mips/mipsel16-e.d: Likewise. * gas/mips/tmipsel16-e.d: Likewise. * gas/mips/and.s: Adjust padding. * gas/mips/beq.s: Likewise. * gas/mips/bge.s: Likewise. * gas/mips/bgeu.s: Likewise. * gas/mips/blt.s: Likewise. * gas/mips/bltu.s: Likewise. * gas/mips/branch-misc-2.s: Likewise. * gas/mips/jal.s: Likewise. * gas/mips/li.s: Likewise. * gas/mips/mips4.s: Likewise. * gas/mips/mips4-fp.s: Likewise. * gas/mips/relax.s: Likewise. * gas/mips/and.d: Update accordingly. * gas/mips/elf-jal.d: Likewise. * gas/mips/jal.d: Likewise. * gas/mips/li.d: Likewise. * gas/mips/relax-at.d: Likewise. * gas/mips/relax.d: Likewise. include/elf/ 2011-02-25 Chao-ying Fu <fu@mips.com> Maciej W. Rozycki <macro@codesourcery.com> * mips.h (R_MICROMIPS_min): New relocations. (R_MICROMIPS_26_S1): Likewise. (R_MICROMIPS_HI16, R_MICROMIPS_LO16): Likewise. (R_MICROMIPS_GPREL16, R_MICROMIPS_LITERAL): Likewise. (R_MICROMIPS_GOT16, R_MICROMIPS_PC7_S1): Likewise. (R_MICROMIPS_PC10_S1, R_MICROMIPS_PC16_S1): Likewise. (R_MICROMIPS_CALL16, R_MICROMIPS_GOT_DISP): Likewise. (R_MICROMIPS_GOT_PAGE, R_MICROMIPS_GOT_OFST): Likewise. (R_MICROMIPS_GOT_HI16, R_MICROMIPS_GOT_LO16): Likewise. (R_MICROMIPS_SUB, R_MICROMIPS_HIGHER): Likewise. (R_MICROMIPS_HIGHEST, R_MICROMIPS_CALL_HI16): Likewise. (R_MICROMIPS_CALL_LO16, R_MICROMIPS_SCN_DISP): Likewise. (R_MICROMIPS_JALR, R_MICROMIPS_HI0_LO16): Likewise. (R_MICROMIPS_TLS_GD, R_MICROMIPS_TLS_LDM): Likewise. (R_MICROMIPS_TLS_DTPREL_HI, R_MICROMIPS_TLS_DTPREL_LO): Likewise. (R_MICROMIPS_TLS_GOTTPREL): Likewise. (R_MICROMIPS_TLS_TPREL_HI16): Likewise. (R_MICROMIPS_TLS_TPREL_LO16): Likewise. (R_MICROMIPS_GPREL7_S2, R_MICROMIPS_PC23_S2): Likewise. (R_MICROMIPS_max): Likewise. (EF_MIPS_ARCH_ASE_MICROMIPS): New macro. (STO_MIPS_ISA, STO_MIPS_FLAGS): Likewise. (ELF_ST_IS_MIPS_PLT, ELF_ST_SET_MIPS_PLT): Likewise. (STO_MICROMIPS): Likewise. (ELF_ST_IS_MICROMIPS, ELF_ST_SET_MICROMIPS): Likewise. (ELF_ST_IS_COMPRESSED): Likewise. (STO_MIPS_PLT, STO_MIPS_PIC): Rework. (ELF_ST_IS_MIPS_PIC, ELF_ST_SET_MIPS_PIC): Likewise. (STO_MIPS16, ELF_ST_IS_MIPS16, ELF_ST_SET_MIPS16): Likewise. include/opcode/ 2011-02-25 Chao-ying Fu <fu@mips.com> Maciej W. Rozycki <macro@codesourcery.com> * mips.h (OP_MASK_EXTLSB, OP_SH_EXTLSB): New macros. (OP_MASK_STYPE, OP_SH_STYPE): Likewise. (OP_MASK_CODE10, OP_SH_CODE10): Likewise. (OP_MASK_TRAP, OP_SH_TRAP): Likewise. (OP_MASK_OFFSET12, OP_SH_OFFSET12): Likewise. (OP_MASK_OFFSET10, OP_SH_OFFSET10): Likewise. (OP_MASK_RS3, OP_SH_RS3): Likewise. (OP_MASK_MB, OP_SH_MB, OP_MASK_MC, OP_SH_MC): Likewise. (OP_MASK_MD, OP_SH_MD, OP_MASK_ME, OP_SH_ME): Likewise. (OP_MASK_MF, OP_SH_MF, OP_MASK_MG, OP_SH_MG): Likewise. (OP_MASK_MJ, OP_SH_MJ, OP_MASK_ML, OP_SH_ML): Likewise. (OP_MASK_MP, OP_SH_MP, OP_MASK_MQ, OP_SH_MQ): Likewise. (OP_MASK_IMMA, OP_SH_IMMA, OP_MASK_IMMB, OP_SH_IMMB): Likewise. (OP_MASK_IMMC, OP_SH_IMMC, OP_MASK_IMMF, OP_SH_IMMF): Likewise. (OP_MASK_IMMG, OP_SH_IMMG, OP_MASK_IMMH, OP_SH_IMMH): Likewise. (OP_MASK_IMMI, OP_SH_IMMI, OP_MASK_IMMJ, OP_SH_IMMJ): Likewise. (OP_MASK_IMML, OP_SH_IMML, OP_MASK_IMMM, OP_SH_IMMM): Likewise. (OP_MASK_IMMN, OP_SH_IMMN, OP_MASK_IMMO, OP_SH_IMMO): Likewise. (OP_MASK_IMMP, OP_SH_IMMP, OP_MASK_IMMQ, OP_SH_IMMQ): Likewise. (OP_MASK_IMMU, OP_SH_IMMU, OP_MASK_IMMW, OP_SH_IMMW): Likewise. (OP_MASK_IMMX, OP_SH_IMMX, OP_MASK_IMMY, OP_SH_IMMY): Likewise. (INSN_WRITE_GPR_S): New macro. (INSN2_BRANCH_DELAY_16BIT, INSN2_BRANCH_DELAY_32BIT): Likewise. (INSN2_READ_FPR_D): Likewise. (INSN2_MOD_GPR_MB, INSN2_MOD_GPR_MC): Likewise. (INSN2_MOD_GPR_MD, INSN2_MOD_GPR_ME): Likewise. (INSN2_MOD_GPR_MF, INSN2_MOD_GPR_MG): Likewise. (INSN2_MOD_GPR_MJ, INSN2_MOD_GPR_MP): Likewise. (INSN2_MOD_GPR_MQ, INSN2_MOD_SP): Likewise. (INSN2_READ_GPR_31, INSN2_READ_GP, INSN2_READ_PC): Likewise. (INSN2_UNCOND_BRANCH, INSN2_COND_BRANCH): Likewise. (INSN2_MOD_GPR_MHI, INSN2_MOD_GPR_MM, INSN2_MOD_GPR_MN): Likewise. (CPU_MICROMIPS): New macro. (M_BC1FL, M_BC1TL, M_BC2FL, M_BC2TL): New enum values. (M_BEQL, M_BGEZ, M_BGEZL, M_BGEZALL, M_BGTZ, M_BGTZL): Likewise. (M_BLEZ, M_BLEZL, M_BLTZ, M_BLTZL, M_BLTZALL, M_BNEL): Likewise. (M_CACHE_OB, M_JALS_1, M_JALS_2, M_JALS_A): Likewise. (M_LDC2_OB, M_LDL_OB, M_LDM_AB, M_LDM_OB): Likewise. (M_LDP_AB, M_LDP_OB, M_LDR_OB, M_LL_OB, M_LLD_OB): Likewise. (M_LWC2_OB, M_LWL_OB, M_LWM_AB, M_LWM_OB): Likewise. (M_LWP_AB, M_LWP_OB, M_LWR_OB): Likewise. (M_LWU_OB, M_PREF_OB, M_SC_OB, M_SCD_OB): Likewise. (M_SDC2_OB, M_SDL_OB, M_SDM_AB, M_SDM_OB): Likewise. (M_SDP_AB, M_SDP_OB, M_SDR_OB): Likewise. (M_SWC2_OB, M_SWL_OB, M_SWM_AB, M_SWM_OB): Likewise. (M_SWP_AB, M_SWP_OB, M_SWR_OB): Likewise. (MICROMIPSOP_MASK_MAJOR, MICROMIPSOP_SH_MAJOR): New macros. (MICROMIPSOP_MASK_IMMEDIATE, MICROMIPSOP_SH_IMMEDIATE): Likewise. (MICROMIPSOP_MASK_DELTA, MICROMIPSOP_SH_DELTA): Likewise. (MICROMIPSOP_MASK_CODE10, MICROMIPSOP_SH_CODE10): Likewise. (MICROMIPSOP_MASK_TRAP, MICROMIPSOP_SH_TRAP): Likewise. (MICROMIPSOP_MASK_SHAMT, MICROMIPSOP_SH_SHAMT): Likewise. (MICROMIPSOP_MASK_TARGET, MICROMIPSOP_SH_TARGET): Likewise. (MICROMIPSOP_MASK_EXTLSB, MICROMIPSOP_SH_EXTLSB): Likewise. (MICROMIPSOP_MASK_EXTMSBD, MICROMIPSOP_SH_EXTMSBD): Likewise. (MICROMIPSOP_MASK_INSMSB, MICROMIPSOP_SH_INSMSB): Likewise. (MICROMIPSOP_MASK_CODE, MICROMIPSOP_SH_CODE): Likewise. (MICROMIPSOP_MASK_CODE2, MICROMIPSOP_SH_CODE2): Likewise. (MICROMIPSOP_MASK_CACHE, MICROMIPSOP_SH_CACHE): Likewise. (MICROMIPSOP_MASK_SEL, MICROMIPSOP_SH_SEL): Likewise. (MICROMIPSOP_MASK_OFFSET12, MICROMIPSOP_SH_OFFSET12): Likewise. (MICROMIPSOP_MASK_3BITPOS, MICROMIPSOP_SH_3BITPOS): Likewise. (MICROMIPSOP_MASK_STYPE, MICROMIPSOP_SH_STYPE): Likewise. (MICROMIPSOP_MASK_OFFSET10, MICROMIPSOP_SH_OFFSET10): Likewise. (MICROMIPSOP_MASK_RS, MICROMIPSOP_SH_RS): Likewise. (MICROMIPSOP_MASK_RT, MICROMIPSOP_SH_RT): Likewise. (MICROMIPSOP_MASK_RD, MICROMIPSOP_SH_RD): Likewise. (MICROMIPSOP_MASK_FS, MICROMIPSOP_SH_FS): Likewise. (MICROMIPSOP_MASK_FT, MICROMIPSOP_SH_FT): Likewise. (MICROMIPSOP_MASK_FD, MICROMIPSOP_SH_FD): Likewise. (MICROMIPSOP_MASK_FR, MICROMIPSOP_SH_FR): Likewise. (MICROMIPSOP_MASK_RS3, MICROMIPSOP_SH_RS3): Likewise. (MICROMIPSOP_MASK_PREFX, MICROMIPSOP_SH_PREFX): Likewise. (MICROMIPSOP_MASK_BCC, MICROMIPSOP_SH_BCC): Likewise. (MICROMIPSOP_MASK_CCC, MICROMIPSOP_SH_CCC): Likewise. (MICROMIPSOP_MASK_COPZ, MICROMIPSOP_SH_COPZ): Likewise. (MICROMIPSOP_MASK_MB, MICROMIPSOP_SH_MB): Likewise. (MICROMIPSOP_MASK_MC, MICROMIPSOP_SH_MC): Likewise. (MICROMIPSOP_MASK_MD, MICROMIPSOP_SH_MD): Likewise. (MICROMIPSOP_MASK_ME, MICROMIPSOP_SH_ME): Likewise. (MICROMIPSOP_MASK_MF, MICROMIPSOP_SH_MF): Likewise. (MICROMIPSOP_MASK_MG, MICROMIPSOP_SH_MG): Likewise. (MICROMIPSOP_MASK_MH, MICROMIPSOP_SH_MH): Likewise. (MICROMIPSOP_MASK_MI, MICROMIPSOP_SH_MI): Likewise. (MICROMIPSOP_MASK_MJ, MICROMIPSOP_SH_MJ): Likewise. (MICROMIPSOP_MASK_ML, MICROMIPSOP_SH_ML): Likewise. (MICROMIPSOP_MASK_MM, MICROMIPSOP_SH_MM): Likewise. (MICROMIPSOP_MASK_MN, MICROMIPSOP_SH_MN): Likewise. (MICROMIPSOP_MASK_MP, MICROMIPSOP_SH_MP): Likewise. (MICROMIPSOP_MASK_MQ, MICROMIPSOP_SH_MQ): Likewise. (MICROMIPSOP_MASK_IMMA, MICROMIPSOP_SH_IMMA): Likewise. (MICROMIPSOP_MASK_IMMB, MICROMIPSOP_SH_IMMB): Likewise. (MICROMIPSOP_MASK_IMMC, MICROMIPSOP_SH_IMMC): Likewise. (MICROMIPSOP_MASK_IMMD, MICROMIPSOP_SH_IMMD): Likewise. (MICROMIPSOP_MASK_IMME, MICROMIPSOP_SH_IMME): Likewise. (MICROMIPSOP_MASK_IMMF, MICROMIPSOP_SH_IMMF): Likewise. (MICROMIPSOP_MASK_IMMG, MICROMIPSOP_SH_IMMG): Likewise. (MICROMIPSOP_MASK_IMMH, MICROMIPSOP_SH_IMMH): Likewise. (MICROMIPSOP_MASK_IMMI, MICROMIPSOP_SH_IMMI): Likewise. (MICROMIPSOP_MASK_IMMJ, MICROMIPSOP_SH_IMMJ): Likewise. (MICROMIPSOP_MASK_IMML, MICROMIPSOP_SH_IMML): Likewise. (MICROMIPSOP_MASK_IMMM, MICROMIPSOP_SH_IMMM): Likewise. (MICROMIPSOP_MASK_IMMN, MICROMIPSOP_SH_IMMN): Likewise. (MICROMIPSOP_MASK_IMMO, MICROMIPSOP_SH_IMMO): Likewise. (MICROMIPSOP_MASK_IMMP, MICROMIPSOP_SH_IMMP): Likewise. (MICROMIPSOP_MASK_IMMQ, MICROMIPSOP_SH_IMMQ): Likewise. (MICROMIPSOP_MASK_IMMU, MICROMIPSOP_SH_IMMU): Likewise. (MICROMIPSOP_MASK_IMMW, MICROMIPSOP_SH_IMMW): Likewise. (MICROMIPSOP_MASK_IMMX, MICROMIPSOP_SH_IMMX): Likewise. (MICROMIPSOP_MASK_IMMY, MICROMIPSOP_SH_IMMY): Likewise. (MICROMIPSOP_MASK_CODE, MICROMIPSOP_SH_CODE): Likewise. (MICROMIPSOP_MASK_CODE2, MICROMIPSOP_SH_CODE2): Likewise. (MICROMIPSOP_MASK_CACHE, MICROMIPSOP_SH_CACHE): Likewise. (MICROMIPSOP_MASK_CODE20, MICROMIPSOP_SH_CODE20): Likewise. (MICROMIPSOP_MASK_PERFREG, MICROMIPSOP_SH_PERFREG): Likewise. (MICROMIPSOP_MASK_CODE19, MICROMIPSOP_SH_CODE19): Likewise. (MICROMIPSOP_MASK_ALN, MICROMIPSOP_SH_ALN): Likewise. (MICROMIPSOP_MASK_VECBYTE, MICROMIPSOP_SH_VECBYTE): Likewise. (MICROMIPSOP_MASK_VECALIGN, MICROMIPSOP_SH_VECALIGN): Likewise. (MICROMIPSOP_MASK_DSPACC, MICROMIPSOP_SH_DSPACC): Likewise. (MICROMIPSOP_MASK_DSPACC_S, MICROMIPSOP_SH_DSPACC_S): Likewise. (MICROMIPSOP_MASK_DSPSFT, MICROMIPSOP_SH_DSPSFT): Likewise. (MICROMIPSOP_MASK_DSPSFT_7, MICROMIPSOP_SH_DSPSFT_7): Likewise. (MICROMIPSOP_MASK_SA3, MICROMIPSOP_SH_SA3): Likewise. (MICROMIPSOP_MASK_SA4, MICROMIPSOP_SH_SA4): Likewise. (MICROMIPSOP_MASK_IMM8, MICROMIPSOP_SH_IMM8): Likewise. (MICROMIPSOP_MASK_IMM10, MICROMIPSOP_SH_IMM10): Likewise. (MICROMIPSOP_MASK_WRDSP, MICROMIPSOP_SH_WRDSP): Likewise. (MICROMIPSOP_MASK_RDDSP, MICROMIPSOP_SH_RDDSP): Likewise. (MICROMIPSOP_MASK_BP, MICROMIPSOP_SH_BP): Likewise. (MICROMIPSOP_MASK_MT_U, MICROMIPSOP_SH_MT_U): Likewise. (MICROMIPSOP_MASK_MT_H, MICROMIPSOP_SH_MT_H): Likewise. (MICROMIPSOP_MASK_MTACC_T, MICROMIPSOP_SH_MTACC_T): Likewise. (MICROMIPSOP_MASK_MTACC_D, MICROMIPSOP_SH_MTACC_D): Likewise. (MICROMIPSOP_MASK_BBITIND, MICROMIPSOP_SH_BBITIND): Likewise. (MICROMIPSOP_MASK_CINSPOS, MICROMIPSOP_SH_CINSPOS): Likewise. (MICROMIPSOP_MASK_CINSLM1, MICROMIPSOP_SH_CINSLM1): Likewise. (MICROMIPSOP_MASK_SEQI, MICROMIPSOP_SH_SEQI): Likewise. (micromips_opcodes): New declaration. (bfd_micromips_num_opcodes): Likewise. ld/testsuite/ 2011-02-25 Catherine Moore <clm@codesourcery.com> Chao-ying Fu <fu@mips.com> Maciej W. Rozycki <macro@codesourcery.com> * lib/ld-lib.exp (run_dump_test): Support distinct assembler flags for the same source named multiple times. * ld-mips-elf/jalx-1.s: New test source. * ld-mips-elf/jalx-1.d: New test output. * ld-mips-elf/jalx-1.ld: New test linker script. * ld-mips-elf/jalx-2-main.s: New test source. * ld-mips-elf/jalx-2-ex.s: Likewise. * ld-mips-elf/jalx-2-printf.s: Likewise. * ld-mips-elf/jalx-2.dd: New test output. * ld-mips-elf/jalx-2.ld: New test linker script. * ld-mips-elf/mips16-and-micromips.d: New test. * ld-mips-elf/mips-elf.exp: Run the new tests opcodes/ 2011-02-25 Chao-ying Fu <fu@mips.com> Maciej W. Rozycki <macro@codesourcery.com> * micromips-opc.c: New file. * mips-dis.c (micromips_to_32_reg_b_map): New array. (micromips_to_32_reg_c_map, micromips_to_32_reg_d_map): Likewise. (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map): Likewise. (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map): Likewise. (micromips_to_32_reg_q_map): Likewise. (micromips_imm_b_map, micromips_imm_c_map): Likewise. (micromips_ase): New variable. (is_micromips): New function. (set_default_mips_dis_options): Handle microMIPS ASE. (print_insn_micromips): New function. (is_compressed_mode_p): Likewise. (_print_insn_mips): Handle microMIPS instructions. * Makefile.am (CFILES): Add micromips-opc.c. * configure.in (bfd_mips_arch): Add micromips-opc.lo. * Makefile.in: Regenerate. * configure: Regenerate. * mips-dis.c (micromips_to_32_reg_h_map): New variable. (micromips_to_32_reg_i_map): Likewise. (micromips_to_32_reg_m_map): Likewise. (micromips_to_32_reg_n_map): New macro.
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@item -mmicromips
@itemx -mno-micromips
Generate code for the microMIPS processor. This is equivalent to putting
@code{.set micromips} at the start of the assembly file. @samp{-mno-micromips}
turns off this option. This is equivalent to putting @code{.set nomicromips}
at the start of the assembly file.
@item -msmartmips
@itemx -mno-smartmips
Enables the SmartMIPS extension to the MIPS32 instruction set. This is
equivalent to putting @code{.set smartmips} at the start of the assembly file.
@samp{-mno-smartmips} turns off this option.
[ gas/ChangeLog ] 2002-03-15 Chris G. Demetriou <cgd@broadcom.com> * config/tc-mips.c (mips_set_options): New "ase_mips3d" member. (mips_opts): Initialize "ase_mips3d" member. (file_ase_mips3d): New variable. (CPU_HAS_MIPS3D): New macro. (md_begin): Initialize mips_opts.ase_mips3d and file_ase_mips3d based on command line options and configuration defaults. (macro_build, mips_ip): Accept MIPS-3D instructions if mips_opts.ase_mips3d is set. (OPTION_MIPS3D, OPTION_NO_MIPS3D, md_longopts, md_parse_option): Add support for "-mips3d" and "-no-mips3d" options. (OPTION_ELF_BASE): Move to accomodate new options. (s_mipsset): Support ".set mips3d" and ".set nomips3d". (mips_elf_final_processing): Add a comment indicating that a MIPS-3D ASE ELF header flag should be set, when one exists. * doc/as.texinfo: Document -mips3d and -no-mips3d options. * doc/c-mips.texi: Likewise, and document ".set mips3d" and ".set nomips3d" directives. [ gas/testsuite/ChangeLog ] 2002-03-15 Chris G. Demetriou <cgd@broadcom.com> * gas/mips/mips64-mips3d.s: New file. * gas/mips/mips64-mips3d.d: Likewise. * gas/mips/mips.exp: Run new "mips64-mips3d" test. [ include/opcode/ChangeLog ] 2002-03-15 Chris G. Demetriou <cgd@broadcom.com> * mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D instructions. (OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks may be passed along with the ISA bitmask. [ opcodes/ChangeLog ] 2002-03-15 Chris G. Demetriou <cgd@broadcom.com> * mips-dis.c (mips_isa_type): Add MIPS3D instructions to the ISA bit masks for bfd_mach_mips_sb1 and bfd_mach_mipsisa64. Add comments for bfd_mach_mipsisa32 and bfd_mach_mipsisa64 that indicate that they should dissassemble all applicable MIPS-specified ASEs. * mips-opc.c: Add support for MIPS-3D instructions. (M3D): New definition. * mips-opc.c: Update copyright years.
2002-03-16 03:09:19 +00:00
@item -mips3d
@itemx -no-mips3d
Generate code for the MIPS-3D Application Specific Extension.
This tells the assembler to accept MIPS-3D instructions.
@samp{-no-mips3d} turns off this option.
[ gas/ChangeLog ] 2002-05-30 Chris G. Demetriou <cgd@broadcom.com> Ed Satterthwaite <ehs@broadcom.com> * config/tc-mips.c (mips_set_options): New "ase_mdmx" member. (mips_opts): Initialize "ase_mdmx" member. (file_ase_mdmx): New variable. (CPU_HAS_MDMX): New macro. (md_begin): Initialize mips_opts.ase_mdmx and file_ase_mdmx based on command line options and configuration defaults. (macro_build): Note in comment that use of MDMX in macros is not currently allowed. (validate_mips_insn): Add support for the "O", "Q", "X", "Y", and "Z" MDMX operand types. (mips_ip): Accept MDMX instructions if mips_opts.ase_mdmx is set, and add support for the "O", "Q", "X", "Y", and "Z" MDMX operand types. (OPTION_MDMX, OPTION_NO_MDMX, md_longopts, md_parse_option): Add support for "-mdmx" and "-no-mdmx" options. (OPTION_ELF_BASE): Move to accomodate new options. (s_mipsset): Support ".set mdmx" and ".set nomdmx". (mips_elf_final_processing): Set MDMX ASE ELF header flag if file_ase_mdmx was set. * doc/as.texinfo: Document -mdmx and -no-mdmx options. * doc/c-mips.texi: Likewise, and document ".set mdmx" and ".set nomdmx" directives. [ gas/testsuite/ChangeLog ] 2002-05-30 Chris G. Demetriou <cgd@broadcom.com> * gas/mips/mips64-mdmx.s: New file. * gas/mips/mips64-mdmx.d: Likewise. * gas/mips/mips.exp: Run new "mips64-mdmx" test. [ include/opcode/ChangeLog ] 2002-05-30 Chris G. Demetriou <cgd@broadcom.com> * mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL) (MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH) (MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC) (INSN_MDMX): New constants, for MDMX support. (opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX. [ opcodes/ChangeLog ] 2002-05-30 Chris G. Demetriou <cgd@broadcom.com> Ed Satterthwaite <ehs@broadcom.com> * mips-dis.c (print_insn_arg): Add support for 'O', 'Q', 'X', 'Y', and 'Z' formats, for MDMX. (mips_isa_type): Add MDMX instructions to the ISA bit mask for bfd_mach_mipsisa64. * mips-opc.c: Add support for MDMX instructions. (MX): New definition. * mips-dis.c: Update copyright years to include 2002.
2002-05-31 01:17:18 +00:00
@item -mdmx
@itemx -no-mdmx
Generate code for the MDMX Application Specific Extension.
This tells the assembler to accept MDMX instructions.
@samp{-no-mdmx} turns off this option.
@item -mdsp
@itemx -mno-dsp
[ gas/ChangeLog ] * config/tc-mips.c (mips_set_options, mips_opts, file_ase_dspr2, ISA_SUPPORTS_DSPR2_ASE, MIPS_CPU_ASE_DSPR2): Add DSP R2 ASE support. (macro_build): Add case '2'. (macro): Expand M_BALIGN to nop, packrl.ph or balign. (validate_mips_insn): Add support for balign instruction. (mips_ip): Handle DSP R2 instructions. Support balign instruction. (OPTION_DSPR2, OPTION_NO_DSPR2, OPTION_COMPAT_ARCH_BASE, md_parse_option, mips_after_parse_args): Add -mdspr2 and -mno-dspr2 command line options. (s_mipsset): Add support for .set dspr2 and .set nodspr2 directives. (md_show_usage): Add -mdspr2 and -mno-dspr2 help output. * doc/c-mips.texi, doc/as.texinfo: Document -mdspr2, -mno-dspr2, .set dspr2, .set nodspr2. [ gas/testsuite/ChangeLog ] * gas/mips/mips32-dspr2.s, gas/mips/mips32-dspr2.d: New test for DSP R2. * gas/mips/mips.exp: Run new test. [ include/opcode/Changelog ] * mips.h (OP_SH_BP, OP_MASK_BP): Add support for balign instruction. (INSN_DSPR2): Add flag for DSP R2 instructions. (M_BALIGN): New macro. [ opcodes/ChangeLog ] * mips-dis.c (mips_arch_choices): Add DSP R2 support. (print_insn_args): Add support for balign instruction. * mips-opc.c (D33): New shortcut for DSP R2 instructions. (mips_builtin_opcodes): Add DSP R2 instructions. [ sim/mips/ChangeLog ] * Makefile.in (IGEN_INCLUDE): Add dsp2.igen. * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add dsp2 to sim_igen_machine. * configure: Regenerate. * dsp.igen (do_ph_op): Add MUL support when op = 2. (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph. (mulq_rs.ph): Use do_ph_mulq. (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen. * mips.igen: Add dsp2 model and include dsp2.igen. (MFHI, MFLO, MTHI, MTLO): Extend these instructions for for *mips32r2, *mips64r2, *dsp. (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions for *mips32r2, *mips64r2, *dsp2. * dsp2.igen: New file for MIPS DSP REV 2 ASE. [ sim/testsuite/sim/mips/ChangeLog ] * basic.exp: Run the dsp2 test. * utils-dsp.inc (dspckacc_astio, dspck_tsimm): New macro. * mips32-dsp2.s: New test.
2007-02-20 13:28:56 +00:00
Generate code for the DSP Release 1 Application Specific Extension.
This tells the assembler to accept DSP Release 1 instructions.
@samp{-mno-dsp} turns off this option.
[ gas/ChangeLog ] * config/tc-mips.c (mips_set_options, mips_opts, file_ase_dspr2, ISA_SUPPORTS_DSPR2_ASE, MIPS_CPU_ASE_DSPR2): Add DSP R2 ASE support. (macro_build): Add case '2'. (macro): Expand M_BALIGN to nop, packrl.ph or balign. (validate_mips_insn): Add support for balign instruction. (mips_ip): Handle DSP R2 instructions. Support balign instruction. (OPTION_DSPR2, OPTION_NO_DSPR2, OPTION_COMPAT_ARCH_BASE, md_parse_option, mips_after_parse_args): Add -mdspr2 and -mno-dspr2 command line options. (s_mipsset): Add support for .set dspr2 and .set nodspr2 directives. (md_show_usage): Add -mdspr2 and -mno-dspr2 help output. * doc/c-mips.texi, doc/as.texinfo: Document -mdspr2, -mno-dspr2, .set dspr2, .set nodspr2. [ gas/testsuite/ChangeLog ] * gas/mips/mips32-dspr2.s, gas/mips/mips32-dspr2.d: New test for DSP R2. * gas/mips/mips.exp: Run new test. [ include/opcode/Changelog ] * mips.h (OP_SH_BP, OP_MASK_BP): Add support for balign instruction. (INSN_DSPR2): Add flag for DSP R2 instructions. (M_BALIGN): New macro. [ opcodes/ChangeLog ] * mips-dis.c (mips_arch_choices): Add DSP R2 support. (print_insn_args): Add support for balign instruction. * mips-opc.c (D33): New shortcut for DSP R2 instructions. (mips_builtin_opcodes): Add DSP R2 instructions. [ sim/mips/ChangeLog ] * Makefile.in (IGEN_INCLUDE): Add dsp2.igen. * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add dsp2 to sim_igen_machine. * configure: Regenerate. * dsp.igen (do_ph_op): Add MUL support when op = 2. (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph. (mulq_rs.ph): Use do_ph_mulq. (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen. * mips.igen: Add dsp2 model and include dsp2.igen. (MFHI, MFLO, MTHI, MTLO): Extend these instructions for for *mips32r2, *mips64r2, *dsp. (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions for *mips32r2, *mips64r2, *dsp2. * dsp2.igen: New file for MIPS DSP REV 2 ASE. [ sim/testsuite/sim/mips/ChangeLog ] * basic.exp: Run the dsp2 test. * utils-dsp.inc (dspckacc_astio, dspck_tsimm): New macro. * mips32-dsp2.s: New test.
2007-02-20 13:28:56 +00:00
@item -mdspr2
@itemx -mno-dspr2
Generate code for the DSP Release 2 Application Specific Extension.
This option implies -mdsp.
This tells the assembler to accept DSP Release 2 instructions.
@samp{-mno-dspr2} turns off this option.
@item -mmt
@itemx -mno-mt
Generate code for the MT Application Specific Extension.
This tells the assembler to accept MT instructions.
@samp{-mno-mt} turns off this option.
@item -mmcu
@itemx -mno-mcu
Generate code for the MCU Application Specific Extension.
This tells the assembler to accept MCU instructions.
@samp{-mno-mcu} turns off this option.
@item --construct-floats
@itemx --no-construct-floats
The @samp{--no-construct-floats} option disables the construction of
double width floating point constants by loading the two halves of the
value into the two single width floating point registers that make up
the double width register. By default @samp{--construct-floats} is
selected, allowing construction of these floating point constants.
1999-05-03 07:29:11 +00:00
@cindex emulation
@item --emulation=@var{name}
This option causes @command{@value{AS}} to emulate @command{@value{AS}} configured
1999-05-03 07:29:11 +00:00
for some other target, in all respects, including output format (choosing
between ELF and ECOFF only), handling of pseudo-opcodes which may generate
debugging information or store symbol table information, and default
endianness. The available configuration names are: @samp{mipsecoff},
@samp{mipself}, @samp{mipslecoff}, @samp{mipsbecoff}, @samp{mipslelf},
@samp{mipsbelf}. The first two do not alter the default endianness from that
of the primary target for which the assembler was configured; the others change
the default to little- or big-endian as indicated by the @samp{b} or @samp{l}
in the name. Using @samp{-EB} or @samp{-EL} will override the endianness
selection in any case.
This option is currently supported only when the primary target
@command{@value{AS}} is configured for is a @sc{mips} ELF or ECOFF target.
1999-05-03 07:29:11 +00:00
Furthermore, the primary target or others specified with
@samp{--enable-targets=@dots{}} at configuration time must include support for
the other format, if both are to be available. For example, the Irix 5
configuration includes support for both.
Eventually, this option will support more configurations, with more
fine-grained control over the assembler's behavior, and will be supported for
more processors.
@item -nocpp
@command{@value{AS}} ignores this option. It is accepted for compatibility with
1999-05-03 07:29:11 +00:00
the native tools.
@item --trap
@itemx --no-trap
@itemx --break
@itemx --no-break
Control how to deal with multiplication overflow and division by zero.
@samp{--trap} or @samp{--no-break} (which are synonyms) take a trap exception
(and only work for Instruction Set Architecture level 2 and higher);
@samp{--break} or @samp{--no-trap} (also synonyms, and the default) take a
break exception.
@item -n
When this option is used, @command{@value{AS}} will issue a warning every
time it generates a nop instruction from a macro.
1999-05-03 07:29:11 +00:00
@end table
@end ifset
@ifset MCORE
The following options are available when @value{AS} is configured for
an MCore processor.
@table @gcctabopt
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@item -jsri2bsr
@itemx -nojsri2bsr
Enable or disable the JSRI to BSR transformation. By default this is enabled.
The command line option @samp{-nojsri2bsr} can be used to disable it.
@item -sifilter
@itemx -nosifilter
Enable or disable the silicon filter behaviour. By default this is disabled.
The default can be overridden by the @samp{-sifilter} command line option.
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@item -relax
Alter jump instructions for long displacements.
@item -mcpu=[210|340]
Select the cpu type on the target hardware. This controls which instructions
can be assembled.
@item -EB
Assemble for a big endian target.
@item -EL
Assemble for a little endian target.
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@end table
@end ifset
2001-10-30 15:20:14 +00:00
@ifset MMIX
See the info pages for documentation of the MMIX-specific options.
@end ifset
@c man end
@ifset PPC
@ifclear man
@xref{PowerPC-Opts}, for the options available when @value{AS} is configured
for a PowerPC processor.
@end ifclear
@ifset man
@c man begin OPTIONS
The following options are available when @value{AS} is configured for a
PowerPC processor.
@c man end
@c man begin INCLUDE
@include c-ppc.texi
@c ended inside the included file
@end ifset
@end ifset
@c man begin OPTIONS
@ifset RX
See the info pages for documentation of the RX-specific options.
@end ifset
@ifset S390
The following options are available when @value{AS} is configured for the s390
processor family.
@table @gcctabopt
@item -m31
@itemx -m64
Select the word size, either 31/32 bits or 64 bits.
@item -mesa
@item -mzarch
Select the architecture mode, either the Enterprise System
Architecture (esa) or the z/Architecture mode (zarch).
@item -march=@var{processor}
Specify which s390 processor variant is the target, @samp{g6}, @samp{g6},
@samp{z900}, @samp{z990}, @samp{z9-109}, @samp{z9-ec}, @samp{z10},
@samp{z196}, or @samp{zEC12}.
@item -mregnames
@itemx -mno-regnames
Allow or disallow symbolic names for registers.
@item -mwarn-areg-zero
Warn whenever the operand for a base or index register has been specified
but evaluates to zero.
@end table
@end ifset
@c man end
bfd: * Makefile.am (ALL_MACHINES): Add cpu-tic6x.lo. (ALL_MACHINES_CFILES): Add cpu-tic6x.c. (BFD32_BACKENDS): Add elf32-tic6x.lo. (BFD32_BACKENDS_CFILES): Add elf32-tic6x.c. * Makefile.in: Regenerate. * archures.c (bfd_arch_tic6x, bfd_tic6x_arch): New. (bfd_archures_list): Update. * config.bfd (tic6x-*-elf): New. * configure.in (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New. * configure: Regenerate. * cpu-tic6x.c, elf32-tic6x.c: New. * reloc.c (BFD_RELOC_C6000_PCR_S21, BFD_RELOC_C6000_PCR_S12, BFD_RELOC_C6000_PCR_S10, BFD_RELOC_C6000_PCR_S7, BFD_RELOC_C6000_ABS_S16, BFD_RELOC_C6000_ABS_L16, BFD_RELOC_C6000_ABS_H16, BFD_RELOC_C6000_SBR_U15_B, BFD_RELOC_C6000_SBR_U15_H, BFD_RELOC_C6000_SBR_U15_W, BFD_RELOC_C6000_SBR_S16, BFD_RELOC_C6000_SBR_L16_B, BFD_RELOC_C6000_SBR_L16_H, BFD_RELOC_C6000_SBR_L16_W, BFD_RELOC_C6000_SBR_H16_B, BFD_RELOC_C6000_SBR_H16_H, BFD_RELOC_C6000_SBR_H16_W, BFD_RELOC_C6000_SBR_GOT_U15_W, BFD_RELOC_C6000_SBR_GOT_L16_W, BFD_RELOC_C6000_SBR_GOT_H16_W, BFD_RELOC_C6000_DSBT_INDEX, BFD_RELOC_C6000_PREL31, BFD_RELOC_C6000_COPY, BFD_RELOC_C6000_ALIGN, BFD_RELOC_C6000_FPHEAD, BFD_RELOC_C6000_NOCMP): New. * targets.c (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New. (_bfd_target_vector): Update. * bfd-in2.h, libbfd.h: Regenerate. binutils: * MAINTAINERS: Add self as TI C6X maintainer. * NEWS: Add news entry for TI C6X support. * readelf.c: Include elf/tic6x.h. (guess_is_rela): Handle EM_TI_C6000. (dump_relocations): Likewise. (get_tic6x_dynamic_type): New. (get_dynamic_type): Call it. (get_machine_flags): Handle EF_C6000_REL. (get_osabi_name): Handle machine-specific values only for relevant machines. Handle C6X values. (get_tic6x_segment_type): New. (get_segment_type): Call it. (get_tic6x_section_type_name): New. (get_section_type_name): Call it. (is_32bit_abs_reloc, is_16bit_abs_reloc, is_none_reloc): Handle EM_TI_C6000. gas: * Makefile.am (TARGET_CPU_CFILES): Add config/tc-tic6x.c. (TARGET_CPU_HFILES): Add config/tc-tic6x.h. * Makefile.in: Regenerate. * NEWS: Add news entry for TI C6X support. * app.c (do_scrub_chars): Handle "||^" for TI C6X. Handle TC_PREDICATE_START_CHAR and TC_PREDICATE_END_CHAR. Keep spaces in operands if TC_KEEP_OPERAND_SPACES. * configure.tgt (tic6x-*-*): New. * config/tc-ia64.h (TC_PREDICATE_START_CHAR, TC_PREDICATE_END_CHAR): Define. * config/tc-tic6x.c, config/tc-tic6x.h: New. * doc/Makefile.am (CPU_DOCS): Add c-tic6x.texi. * doc/Makefile.in: Regenerate. * doc/all.texi (TIC6X): Define. * doc/as.texinfo: Add TI C6X documentation. Include c-tic6x.texi. * doc/c-tic6x.texi: New. gas/testsuite: * gas/tic6x: New directory and testcases. include: * dis-asm.h (print_insn_tic6x): Declare. include/elf: * common.h (ELFOSABI_C6000_ELFABI, ELFOSABI_C6000_LINUX): Define. * tic6x.h: New. include/opcode: * tic6x-control-registers.h, tic6x-insn-formats.h, tic6x-opcode-table.h, tic6x.h: New. ld: * Makefile.am (ALL_EMULATIONS): Add eelf32_tic6x_be.o and eelf32_tic6x_le.o. (eelf32_tic6x_be.c, eelf32_tic6x_le.c): New. * NEWS: Add news entry for TI C6X support. * configure.tgt (tic6x-*-*): New. * emulparams/elf32_tic6x_be.sh, emulparams/elf32_tic6x_le.sh: New. ld/testsuite: * ld-elf/flags1.d, ld-elf/merge.d: XFAIL for tic6x-*-*. * ld-elf/sec-to-seg.exp: Set B_test_same_seg to 0 for tic6x-*-*. * ld-tic6x: New directory and testcases. opcodes: * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c. * Makefile.in: Regenerate. * configure.in (bfd_tic6x_arch): New. * configure: Regenerate. * disassemble.c (ARCH_tic6x): Define if ARCH_all. (disassembler): Handle TI C6X. * tic6x-dis.c: New.
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@ifset TIC6X
@ifclear man
@xref{TIC6X Options}, for the options available when @value{AS} is configured
for a TMS320C6000 processor.
@end ifclear
@ifset man
@c man begin OPTIONS
bfd: * Makefile.am (ALL_MACHINES): Add cpu-tic6x.lo. (ALL_MACHINES_CFILES): Add cpu-tic6x.c. (BFD32_BACKENDS): Add elf32-tic6x.lo. (BFD32_BACKENDS_CFILES): Add elf32-tic6x.c. * Makefile.in: Regenerate. * archures.c (bfd_arch_tic6x, bfd_tic6x_arch): New. (bfd_archures_list): Update. * config.bfd (tic6x-*-elf): New. * configure.in (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New. * configure: Regenerate. * cpu-tic6x.c, elf32-tic6x.c: New. * reloc.c (BFD_RELOC_C6000_PCR_S21, BFD_RELOC_C6000_PCR_S12, BFD_RELOC_C6000_PCR_S10, BFD_RELOC_C6000_PCR_S7, BFD_RELOC_C6000_ABS_S16, BFD_RELOC_C6000_ABS_L16, BFD_RELOC_C6000_ABS_H16, BFD_RELOC_C6000_SBR_U15_B, BFD_RELOC_C6000_SBR_U15_H, BFD_RELOC_C6000_SBR_U15_W, BFD_RELOC_C6000_SBR_S16, BFD_RELOC_C6000_SBR_L16_B, BFD_RELOC_C6000_SBR_L16_H, BFD_RELOC_C6000_SBR_L16_W, BFD_RELOC_C6000_SBR_H16_B, BFD_RELOC_C6000_SBR_H16_H, BFD_RELOC_C6000_SBR_H16_W, BFD_RELOC_C6000_SBR_GOT_U15_W, BFD_RELOC_C6000_SBR_GOT_L16_W, BFD_RELOC_C6000_SBR_GOT_H16_W, BFD_RELOC_C6000_DSBT_INDEX, BFD_RELOC_C6000_PREL31, BFD_RELOC_C6000_COPY, BFD_RELOC_C6000_ALIGN, BFD_RELOC_C6000_FPHEAD, BFD_RELOC_C6000_NOCMP): New. * targets.c (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New. (_bfd_target_vector): Update. * bfd-in2.h, libbfd.h: Regenerate. binutils: * MAINTAINERS: Add self as TI C6X maintainer. * NEWS: Add news entry for TI C6X support. * readelf.c: Include elf/tic6x.h. (guess_is_rela): Handle EM_TI_C6000. (dump_relocations): Likewise. (get_tic6x_dynamic_type): New. (get_dynamic_type): Call it. (get_machine_flags): Handle EF_C6000_REL. (get_osabi_name): Handle machine-specific values only for relevant machines. Handle C6X values. (get_tic6x_segment_type): New. (get_segment_type): Call it. (get_tic6x_section_type_name): New. (get_section_type_name): Call it. (is_32bit_abs_reloc, is_16bit_abs_reloc, is_none_reloc): Handle EM_TI_C6000. gas: * Makefile.am (TARGET_CPU_CFILES): Add config/tc-tic6x.c. (TARGET_CPU_HFILES): Add config/tc-tic6x.h. * Makefile.in: Regenerate. * NEWS: Add news entry for TI C6X support. * app.c (do_scrub_chars): Handle "||^" for TI C6X. Handle TC_PREDICATE_START_CHAR and TC_PREDICATE_END_CHAR. Keep spaces in operands if TC_KEEP_OPERAND_SPACES. * configure.tgt (tic6x-*-*): New. * config/tc-ia64.h (TC_PREDICATE_START_CHAR, TC_PREDICATE_END_CHAR): Define. * config/tc-tic6x.c, config/tc-tic6x.h: New. * doc/Makefile.am (CPU_DOCS): Add c-tic6x.texi. * doc/Makefile.in: Regenerate. * doc/all.texi (TIC6X): Define. * doc/as.texinfo: Add TI C6X documentation. Include c-tic6x.texi. * doc/c-tic6x.texi: New. gas/testsuite: * gas/tic6x: New directory and testcases. include: * dis-asm.h (print_insn_tic6x): Declare. include/elf: * common.h (ELFOSABI_C6000_ELFABI, ELFOSABI_C6000_LINUX): Define. * tic6x.h: New. include/opcode: * tic6x-control-registers.h, tic6x-insn-formats.h, tic6x-opcode-table.h, tic6x.h: New. ld: * Makefile.am (ALL_EMULATIONS): Add eelf32_tic6x_be.o and eelf32_tic6x_le.o. (eelf32_tic6x_be.c, eelf32_tic6x_le.c): New. * NEWS: Add news entry for TI C6X support. * configure.tgt (tic6x-*-*): New. * emulparams/elf32_tic6x_be.sh, emulparams/elf32_tic6x_le.sh: New. ld/testsuite: * ld-elf/flags1.d, ld-elf/merge.d: XFAIL for tic6x-*-*. * ld-elf/sec-to-seg.exp: Set B_test_same_seg to 0 for tic6x-*-*. * ld-tic6x: New directory and testcases. opcodes: * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c. * Makefile.in: Regenerate. * configure.in (bfd_tic6x_arch): New. * configure: Regenerate. * disassemble.c (ARCH_tic6x): Define if ARCH_all. (disassembler): Handle TI C6X. * tic6x-dis.c: New.
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The following options are available when @value{AS} is configured for a
TMS320C6000 processor.
@c man end
@c man begin INCLUDE
@include c-tic6x.texi
@c ended inside the included file
@end ifset
bfd: * Makefile.am (ALL_MACHINES): Add cpu-tic6x.lo. (ALL_MACHINES_CFILES): Add cpu-tic6x.c. (BFD32_BACKENDS): Add elf32-tic6x.lo. (BFD32_BACKENDS_CFILES): Add elf32-tic6x.c. * Makefile.in: Regenerate. * archures.c (bfd_arch_tic6x, bfd_tic6x_arch): New. (bfd_archures_list): Update. * config.bfd (tic6x-*-elf): New. * configure.in (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New. * configure: Regenerate. * cpu-tic6x.c, elf32-tic6x.c: New. * reloc.c (BFD_RELOC_C6000_PCR_S21, BFD_RELOC_C6000_PCR_S12, BFD_RELOC_C6000_PCR_S10, BFD_RELOC_C6000_PCR_S7, BFD_RELOC_C6000_ABS_S16, BFD_RELOC_C6000_ABS_L16, BFD_RELOC_C6000_ABS_H16, BFD_RELOC_C6000_SBR_U15_B, BFD_RELOC_C6000_SBR_U15_H, BFD_RELOC_C6000_SBR_U15_W, BFD_RELOC_C6000_SBR_S16, BFD_RELOC_C6000_SBR_L16_B, BFD_RELOC_C6000_SBR_L16_H, BFD_RELOC_C6000_SBR_L16_W, BFD_RELOC_C6000_SBR_H16_B, BFD_RELOC_C6000_SBR_H16_H, BFD_RELOC_C6000_SBR_H16_W, BFD_RELOC_C6000_SBR_GOT_U15_W, BFD_RELOC_C6000_SBR_GOT_L16_W, BFD_RELOC_C6000_SBR_GOT_H16_W, BFD_RELOC_C6000_DSBT_INDEX, BFD_RELOC_C6000_PREL31, BFD_RELOC_C6000_COPY, BFD_RELOC_C6000_ALIGN, BFD_RELOC_C6000_FPHEAD, BFD_RELOC_C6000_NOCMP): New. * targets.c (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New. (_bfd_target_vector): Update. * bfd-in2.h, libbfd.h: Regenerate. binutils: * MAINTAINERS: Add self as TI C6X maintainer. * NEWS: Add news entry for TI C6X support. * readelf.c: Include elf/tic6x.h. (guess_is_rela): Handle EM_TI_C6000. (dump_relocations): Likewise. (get_tic6x_dynamic_type): New. (get_dynamic_type): Call it. (get_machine_flags): Handle EF_C6000_REL. (get_osabi_name): Handle machine-specific values only for relevant machines. Handle C6X values. (get_tic6x_segment_type): New. (get_segment_type): Call it. (get_tic6x_section_type_name): New. (get_section_type_name): Call it. (is_32bit_abs_reloc, is_16bit_abs_reloc, is_none_reloc): Handle EM_TI_C6000. gas: * Makefile.am (TARGET_CPU_CFILES): Add config/tc-tic6x.c. (TARGET_CPU_HFILES): Add config/tc-tic6x.h. * Makefile.in: Regenerate. * NEWS: Add news entry for TI C6X support. * app.c (do_scrub_chars): Handle "||^" for TI C6X. Handle TC_PREDICATE_START_CHAR and TC_PREDICATE_END_CHAR. Keep spaces in operands if TC_KEEP_OPERAND_SPACES. * configure.tgt (tic6x-*-*): New. * config/tc-ia64.h (TC_PREDICATE_START_CHAR, TC_PREDICATE_END_CHAR): Define. * config/tc-tic6x.c, config/tc-tic6x.h: New. * doc/Makefile.am (CPU_DOCS): Add c-tic6x.texi. * doc/Makefile.in: Regenerate. * doc/all.texi (TIC6X): Define. * doc/as.texinfo: Add TI C6X documentation. Include c-tic6x.texi. * doc/c-tic6x.texi: New. gas/testsuite: * gas/tic6x: New directory and testcases. include: * dis-asm.h (print_insn_tic6x): Declare. include/elf: * common.h (ELFOSABI_C6000_ELFABI, ELFOSABI_C6000_LINUX): Define. * tic6x.h: New. include/opcode: * tic6x-control-registers.h, tic6x-insn-formats.h, tic6x-opcode-table.h, tic6x.h: New. ld: * Makefile.am (ALL_EMULATIONS): Add eelf32_tic6x_be.o and eelf32_tic6x_le.o. (eelf32_tic6x_be.c, eelf32_tic6x_le.c): New. * NEWS: Add news entry for TI C6X support. * configure.tgt (tic6x-*-*): New. * emulparams/elf32_tic6x_be.sh, emulparams/elf32_tic6x_le.sh: New. ld/testsuite: * ld-elf/flags1.d, ld-elf/merge.d: XFAIL for tic6x-*-*. * ld-elf/sec-to-seg.exp: Set B_test_same_seg to 0 for tic6x-*-*. * ld-tic6x: New directory and testcases. opcodes: * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c. * Makefile.in: Regenerate. * configure.in (bfd_tic6x_arch): New. * configure: Regenerate. * disassemble.c (ARCH_tic6x): Define if ARCH_all. (disassembler): Handle TI C6X. * tic6x-dis.c: New.
2010-03-25 21:12:36 +00:00
@end ifset
* Makefile.am (ALL_MACHINES): Add cpu-tilegx.lo and cpu-tilepro.lo. (ALL_MACHINE_CFILES): Add cpu-tilegx.c and cpu-tilepro.c. (BFD32_BACKENDS): Add elf32-tilegx.lo, elf32-tilepro.lo, and elfxx-tilegx.lo. (BFD32_BACKENDS_CFILES): Add elf32-tilegx.c elf32-tilepro.c, and elfxx-tilegx.c. (BFD64_BACKENDS): Add elf64-tilegx.lo. (BFD64_BACKENDS_CFILES): Add elf64-tilegx.c. * Makefile.in: Regenerate. * arctures.c (bfd_architecture): Define bfd_arch_tilepro, bfd_arch_tilegx, bfd_mach_tilepro, bfd_mach_tilegx. (bfd_arch_info): Add bfd_tilegx_arch, bfd_tilepro_arch. (bfd_archures_list): Add bfd_tilegx_arch, bfd_tilepro_arch. bfd-in2.h: Regenerate. * config.bfd: Handle tilegx-*-* and tilepro-*-*. * configure.in: Handle bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec, and bfd_elf64_tilegx_vec. * configure: Regenerate. * elf-bfd.h (enum elf_target_id): Define TILEGX_ELF_DATA and TILEPRO_ELF_DATA. * libbfd.h: Regenerate. * reloc.c: Add BFD_RELOC_TILEPRO_{COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1, JOFFLONG_X1, JOFFLONG_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM15_X1, MF_IMM15_X1, IMM16_X0, IMM16_X1, IMM16_X0_LO, IMM16_X1_LO, IMM16_X0_HI, IMM16_X1_HI, IMM16_X0_HA, IMM16_X1_HA, IMM16_X0_PCREL, IMM16_X1_PCREL, IMM16_X0_LO_PCREL, IMM16_X1_LO_PCREL, IMM16_X0_HI_PCREL, IMM16_X1_HI_PCREL, IMM16_X0_HA_PCREL, IMM16_X1_HA_PCREL, IMM16_X0_GOT, IMM16_X1_GOT, IMM16_X0_GOT_LO, IMM16_X1_GOT_LO, IMM16_X0_GOT_HI, IMM16_X1_GOT_HI, IMM16_X0_GOT_HA, IMM16_X1_GOT_HA, MMSTART_X0, MMEND_X0, MMSTART_X1, MMEND_X1, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_TLS_GD, IMM16_X1_TLS_GD, IMM16_X0_TLS_GD_LO, IMM16_X1_TLS_GD_LO, IMM16_X0_TLS_GD_HI, IMM16_X1_TLS_GD_HI, IMM16_X0_TLS_GD_HA, IMM16_X1_TLS_GD_HA, IMM16_X0_TLS_IE, IMM16_X1_TLS_IE, IMM16_X0_TLS_IE_LO, IMM16_X1_TLS_IE_LO, IMM16_X0_TLS_IE_HI, IMM16_X1_TLS_IE_HI, IMM16_X0_TLS_IE_HA, IMM16_X1_TLS_IE_HA, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32} Add BFD_RELOC_TILEGX_{HW0, HW1, HW2, HW3, HW0_LAST, HW1_LAST, HW2_LAST, COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1, JUMPOFF_X1, JUMPOFF_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM14_X1, MF_IMM14_X1, MMSTART_X0, MMEND_X0, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_HW0, IMM16_X1_HW0, IMM16_X0_HW1, IMM16_X1_HW1, IMM16_X0_HW2, IMM16_X1_HW2, IMM16_X0_HW3, IMM16_X1_HW3, IMM16_X0_HW0_LAST, IMM16_X1_HW0_LAST, IMM16_X0_HW1_LAST, IMM16_X1_HW1_LAST, IMM16_X0_HW2_LAST, IMM16_X1_HW2_LAST, IMM16_X0_HW0_PCREL, IMM16_X1_HW0_PCREL, IMM16_X0_HW1_PCREL, IMM16_X1_HW1_PCREL, IMM16_X0_HW2_PCREL, IMM16_X1_HW2_PCREL, IMM16_X0_HW3_PCREL, IMM16_X1_HW3_PCREL, IMM16_X0_HW0_LAST_PCREL, IMM16_X1_HW0_LAST_PCREL, IMM16_X0_HW1_LAST_PCREL, IMM16_X1_HW1_LAST_PCREL, IMM16_X0_HW2_LAST_PCREL, IMM16_X1_HW2_LAST_PCREL, IMM16_X0_HW0_GOT, IMM16_X1_HW0_GOT, IMM16_X0_HW1_GOT, IMM16_X1_HW1_GOT, IMM16_X0_HW2_GOT, IMM16_X1_HW2_GOT, IMM16_X0_HW3_GOT, IMM16_X1_HW3_GOT, IMM16_X0_HW0_LAST_GOT, IMM16_X1_HW0_LAST_GOT, IMM16_X0_HW1_LAST_GOT, IMM16_X1_HW1_LAST_GOT, IMM16_X0_HW2_LAST_GOT, IMM16_X1_HW2_LAST_GOT, IMM16_X0_HW0_TLS_GD, IMM16_X1_HW0_TLS_GD, IMM16_X0_HW1_TLS_GD, IMM16_X1_HW1_TLS_GD, IMM16_X0_HW2_TLS_GD, IMM16_X1_HW2_TLS_GD, IMM16_X0_HW3_TLS_GD, IMM16_X1_HW3_TLS_GD, IMM16_X0_HW0_LAST_TLS_GD, IMM16_X1_HW0_LAST_TLS_GD, IMM16_X0_HW1_LAST_TLS_GD, IMM16_X1_HW1_LAST_TLS_GD, IMM16_X0_HW2_LAST_TLS_GD, IMM16_X1_HW2_LAST_TLS_GD, IMM16_X0_HW0_TLS_IE, IMM16_X1_HW0_TLS_IE, IMM16_X0_HW1_TLS_IE, IMM16_X1_HW1_TLS_IE, IMM16_X0_HW2_TLS_IE, IMM16_X1_HW2_TLS_IE, IMM16_X0_HW3_TLS_IE, IMM16_X1_HW3_TLS_IE, IMM16_X0_HW0_LAST_TLS_IE, IMM16_X1_HW0_LAST_TLS_IE, IMM16_X0_HW1_LAST_TLS_IE, IMM16_X1_HW1_LAST_TLS_IE, IMM16_X0_HW2_LAST_TLS_IE, IMM16_X1_HW2_LAST_TLS_IE, TLS_DTPMOD64, TLS_DTPOFF64, TLS_TPOFF64, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32} * targets.c (bfd_elf32_tilegx_vec): Declare. (bfd_elf32_tilepro_vec): Declare. (bfd_elf64_tilegx_vec): Declare. (bfd_target_vector): Add bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec, and bfd_elf64_tilegx_vec. * cpu-tilegx.c: New file. * cpu-tilepro.c: New file. * elf32-tilepro.h: New file. * elf32-tilepro.c: New file. * elf32-tilegx.c: New file. * elf32-tilegx.h: New file. * elf64-tilegx.c: New file. * elf64-tilegx.h: New file. * elfxx-tilegx.c: New file. * elfxx-tilegx.h: New file. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-tilegx.c and config/tc-tilepro.c. (TARGET_CPU_HFILES): Add config/tc-tilegx.h and config/tc-tilepro.h. * Makefile.in: Regenerate. * configure.tgt (tilepro-*-*): New. (tilegx-*-*): Likewise. * config/tc-tilegx.c: New file. * config/tc-tilegx.h: Likewise. * config/tc-tilepro.h: Likewise. * config/tc-tilepro.c: Likewise. * doc/Makefile.am (CPU_DOCS): Add c-tilegx.texi and c-tilepro.texi. * doc/Makefile.in: Regenerate. * doc/all.texi (TILEGX): Define. (TILEPRO): Define. * doc/as.texinfo: Add Tile-Gx and TILEPro documentation. Include c-tilegx.texi and c-tilepro.texi. * doc/c-tilegx.texi: New. * doc/c-tilepro.texi: New. * gas/tilepro/t_constants.s: New file. * gas/tilepro/t_constants.d: Likewise. * gas/tilepro/t_insns.s: Likewise. * gas/tilepro/tilepro.exp: Likewise. * gas/tilepro/t_insns.d: Likewise. * gas/tilegx/tilegx.exp: Likewise. * gas/tilegx/t_insns.d: Likewise. * gas/tilegx/t_insns.s: Likewise. * dis-asm.h (print_insn_tilegx): Declare. (print_insn_tilepro): Likewise. * tilegx.h: New file. * tilepro.h: New file. * common.h: Add EM_TILEGX. * tilegx.h: New file. * tilepro.h: New file. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx.c and eelf32tilepro.c. (ALL_64_EMULATION_SOURCES): Add eelf64tilegx.c. (eelf32tilegx.c): New target. (eelf32tilepro.c): Likewise. (eelf64tilegx.c): Likewise. * Makefile.in: Regenerate. * configure.tgt: Handle tilegx-*-* and tilepro-*-*. * emulparams/elf32tilegx.sh: New file. * emulparams/elf64tilegx.sh: New file. * emulparams/elf32tilepro.sh: New file. * ld-elf/eh5.d: Don't run on tile*. * ld-srec/srec.exp: xfail on tile*. * ld-tilegx/external.s: New file. * ld-tilegx/reloc.d: New file. * ld-tilegx/reloc.s: New file. * ld-tilegx/tilegx.exp: New file. * ld-tilepro/external.s: New file. * ld-tilepro/reloc.d: New file. * ld-tilepro/reloc.s: New file. * ld-tilepro/tilepro.exp: New file. * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tilegx-dis.c, tilegx-opc.c, tilepro-dis.c, and tilepro-opc.c. * Makefile.in: Regenerate. * configure.in: Handle bfd_tilegx_arch and bfd_tilepro_arch. * configure: Regenerate. * disassemble.c (disassembler): Add ARCH_tilegx and ARCH_tilepro. * po/POTFILES.in: Regenerate. * tilegx-dis.c: New file. * tilegx-opc.c: New file. * tilepro-dis.c: New file. * tilepro-opc.c: New file.
2011-06-13 15:18:54 +00:00
@ifset TILEGX
@ifclear man
@xref{TILE-Gx Options}, for the options available when @value{AS} is configured
for a TILE-Gx processor.
@end ifclear
@ifset man
@c man begin OPTIONS
The following options are available when @value{AS} is configured for a TILE-Gx
processor.
@c man end
@c man begin INCLUDE
@include c-tilegx.texi
@c ended inside the included file
@end ifset
@end ifset
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@ifset XTENSA
@ifclear man
@xref{Xtensa Options}, for the options available when @value{AS} is configured
for an Xtensa processor.
@end ifclear
@ifset man
@c man begin OPTIONS
The following options are available when @value{AS} is configured for an
Xtensa processor.
@c man end
@c man begin INCLUDE
@include c-xtensa.texi
@c ended inside the included file
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@end ifset
@end ifset
@c man begin OPTIONS
@ifset Z80
The following options are available when @value{AS} is configured for
a Z80 family processor.
@table @gcctabopt
@item -z80
Assemble for Z80 processor.
@item -r800
Assemble for R800 processor.
@item -ignore-undocumented-instructions
@itemx -Wnud
Assemble undocumented Z80 instructions that also work on R800 without warning.
@item -ignore-unportable-instructions
@itemx -Wnup
Assemble all undocumented Z80 instructions without warning.
@item -warn-undocumented-instructions
@itemx -Wud
Issue a warning for undocumented Z80 instructions that also work on R800.
@item -warn-unportable-instructions
@itemx -Wup
Issue a warning for undocumented Z80 instructions that do not work on R800.
@item -forbid-undocumented-instructions
@itemx -Fud
Treat all undocumented instructions as errors.
@item -forbid-unportable-instructions
@itemx -Fup
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Treat undocumented Z80 instructions that do not work on R800 as errors.
@end table
@end ifset
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@c man end
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@menu
* Manual:: Structure of this Manual
* GNU Assembler:: The GNU Assembler
* Object Formats:: Object File Formats
* Command Line:: Command Line
* Input Files:: Input Files
* Object:: Output (Object) File
* Errors:: Error and Warning Messages
@end menu
@node Manual
@section Structure of this Manual
@cindex manual, structure and purpose
This manual is intended to describe what you need to know to use
@sc{gnu} @command{@value{AS}}. We cover the syntax expected in source files, including
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notation for symbols, constants, and expressions; the directives that
@command{@value{AS}} understands; and of course how to invoke @command{@value{AS}}.
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@ifclear GENERIC
We also cover special features in the @value{TARGET}
configuration of @command{@value{AS}}, including assembler directives.
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@end ifclear
@ifset GENERIC
This manual also describes some of the machine-dependent features of
various flavors of the assembler.
@end ifset
@cindex machine instructions (not covered)
On the other hand, this manual is @emph{not} intended as an introduction
to programming in assembly language---let alone programming in general!
In a similar vein, we make no attempt to introduce the machine
architecture; we do @emph{not} describe the instruction set, standard
mnemonics, registers or addressing modes that are standard to a
particular architecture.
@ifset GENERIC
You may want to consult the manufacturer's
machine architecture manual for this information.
@end ifset
@ifclear GENERIC
@ifset H8/300
For information on the H8/300 machine instruction set, see @cite{H8/300
Series Programming Manual}. For the H8/300H, see @cite{H8/300H Series
Programming Manual} (Renesas).
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@end ifset
@ifset SH
For information on the Renesas (formerly Hitachi) / SuperH SH machine instruction set,
see @cite{SH-Microcomputer User's Manual} (Renesas) or
@cite{SH-4 32-bit CPU Core Architecture} (SuperH) and
@cite{SuperH (SH) 64-Bit RISC Series} (SuperH).
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@end ifset
@ifset Z8000
For information on the Z8000 machine instruction set, see @cite{Z8000 CPU Technical Manual}
@end ifset
@end ifclear
@c I think this is premature---doc@cygnus.com, 17jan1991
@ignore
Throughout this manual, we assume that you are running @dfn{GNU},
the portable operating system from the @dfn{Free Software
Foundation, Inc.}. This restricts our attention to certain kinds of
computer (in particular, the kinds of computers that @sc{gnu} can run on);
once this assumption is granted examples and definitions need less
qualification.
@command{@value{AS}} is part of a team of programs that turn a high-level
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human-readable series of instructions into a low-level
computer-readable series of instructions. Different versions of
@command{@value{AS}} are used for different kinds of computer.
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@end ignore
@c There used to be a section "Terminology" here, which defined
@c "contents", "byte", "word", and "long". Defining "word" to any
@c particular size is confusing when the .word directive may generate 16
@c bits on one machine and 32 bits on another; in general, for the user
@c version of this manual, none of these terms seem essential to define.
@c They were used very little even in the former draft of the manual;
@c this draft makes an effort to avoid them (except in names of
@c directives).
@node GNU Assembler
@section The GNU Assembler
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@c man begin DESCRIPTION
@sc{gnu} @command{as} is really a family of assemblers.
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@ifclear GENERIC
This manual describes @command{@value{AS}}, a member of that family which is
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configured for the @value{TARGET} architectures.
@end ifclear
If you use (or have used) the @sc{gnu} assembler on one architecture, you
should find a fairly similar environment when you use it on another
architecture. Each version has much in common with the others,
including object file formats, most assembler directives (often called
@dfn{pseudo-ops}) and assembler syntax.@refill
@cindex purpose of @sc{gnu} assembler
@command{@value{AS}} is primarily intended to assemble the output of the
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@sc{gnu} C compiler @code{@value{GCC}} for use by the linker
@code{@value{LD}}. Nevertheless, we've tried to make @command{@value{AS}}
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assemble correctly everything that other assemblers for the same
machine would assemble.
@ifset VAX
Any exceptions are documented explicitly (@pxref{Machine Dependencies}).
@end ifset
@ifset M680X0
@c This remark should appear in generic version of manual; assumption
@c here is that generic version sets M680x0.
This doesn't mean @command{@value{AS}} always uses the same syntax as another
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assembler for the same architecture; for example, we know of several
incompatible versions of 680x0 assembly language syntax.
@end ifset
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@c man end
Unlike older assemblers, @command{@value{AS}} is designed to assemble a source
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program in one pass of the source file. This has a subtle impact on the
@kbd{.org} directive (@pxref{Org,,@code{.org}}).
@node Object Formats
@section Object File Formats
@cindex object file format
The @sc{gnu} assembler can be configured to produce several alternative
object file formats. For the most part, this does not affect how you
write assembly language programs; but directives for debugging symbols
are typically different in different file formats. @xref{Symbol
Attributes,,Symbol Attributes}.
@ifclear GENERIC
@ifclear MULTI-OBJ
For the @value{TARGET} target, @command{@value{AS}} is configured to produce
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@value{OBJ-NAME} format object files.
@end ifclear
@c The following should exhaust all configs that set MULTI-OBJ, ideally
@ifset I960
On the @value{TARGET}, @command{@value{AS}} can be configured to produce either
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@code{b.out} or COFF format object files.
@end ifset
@ifset HPPA
On the @value{TARGET}, @command{@value{AS}} can be configured to produce either
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SOM or ELF format object files.
@end ifset
@end ifclear
@node Command Line
@section Command Line
@cindex command line conventions
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After the program name @command{@value{AS}}, the command line may contain
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options and file names. Options may appear in any order, and may be
before, after, or between file names. The order of file names is
significant.
@cindex standard input, as input file
@kindex --
@file{--} (two hyphens) by itself names the standard input file
explicitly, as one of the files for @command{@value{AS}} to assemble.
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@cindex options, command line
Except for @samp{--} any command line argument that begins with a
hyphen (@samp{-}) is an option. Each option changes the behavior of
@command{@value{AS}}. No option changes the way another option works. An
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option is a @samp{-} followed by one or more letters; the case of
the letter is important. All options are optional.
Some options expect exactly one file name to follow them. The file
name may either immediately follow the option's letter (compatible
with older assemblers) or it may be the next command argument (@sc{gnu}
standard). These two command lines are equivalent:
@smallexample
@value{AS} -o my-object-file.o mumble.s
@value{AS} -omy-object-file.o mumble.s
@end smallexample
@node Input Files
@section Input Files
@cindex input
@cindex source program
@cindex files, input
We use the phrase @dfn{source program}, abbreviated @dfn{source}, to
describe the program input to one run of @command{@value{AS}}. The program may
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be in one or more files; how the source is partitioned into files
doesn't change the meaning of the source.
@c I added "con" prefix to "catenation" just to prove I can overcome my
@c APL training... doc@cygnus.com
The source program is a concatenation of the text in all the files, in the
order specified.
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@c man begin DESCRIPTION
Each time you run @command{@value{AS}} it assembles exactly one source
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program. The source program is made up of one or more files.
(The standard input is also a file.)
You give @command{@value{AS}} a command line that has zero or more input file
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names. The input files are read (from left file name to right). A
command line argument (in any position) that has no special meaning
is taken to be an input file name.
If you give @command{@value{AS}} no file names it attempts to read one input file
from the @command{@value{AS}} standard input, which is normally your terminal. You
may have to type @key{ctl-D} to tell @command{@value{AS}} there is no more program
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to assemble.
Use @samp{--} if you need to explicitly name the standard input file
in your command line.
If the source is empty, @command{@value{AS}} produces a small, empty object
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file.
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@c man end
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@subheading Filenames and Line-numbers
@cindex input file linenumbers
@cindex line numbers, in input files
There are two ways of locating a line in the input file (or files) and
either may be used in reporting error messages. One way refers to a line
number in a physical file; the other refers to a line number in a
``logical'' file. @xref{Errors, ,Error and Warning Messages}.
@dfn{Physical files} are those files named in the command line given
to @command{@value{AS}}.
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@dfn{Logical files} are simply names declared explicitly by assembler
directives; they bear no relation to physical files. Logical file names help
error messages reflect the original source file, when @command{@value{AS}} source
is itself synthesized from other files. @command{@value{AS}} understands the
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@samp{#} directives emitted by the @code{@value{GCC}} preprocessor. See also
@ref{File,,@code{.file}}.
@node Object
@section Output (Object) File
@cindex object file
@cindex output file
@kindex a.out
@kindex .o
Every time you run @command{@value{AS}} it produces an output file, which is
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your assembly language program translated into numbers. This file
is the object file. Its default name is
@ifclear BOUT
@code{a.out}.
@end ifclear
@ifset BOUT
@ifset GENERIC
@code{a.out}, or
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@end ifset
@code{b.out} when @command{@value{AS}} is configured for the Intel 80960.
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@end ifset
You can give it another name by using the @option{-o} option. Conventionally,
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object file names end with @file{.o}. The default name is used for historical
reasons: older assemblers were capable of assembling self-contained programs
directly into a runnable program. (For some formats, this isn't currently
possible, but it can be done for the @code{a.out} format.)
@cindex linker
@kindex ld
The object file is meant for input to the linker @code{@value{LD}}. It contains
assembled program code, information to help @code{@value{LD}} integrate
the assembled program into a runnable file, and (optionally) symbolic
information for the debugger.
@c link above to some info file(s) like the description of a.out.
@c don't forget to describe @sc{gnu} info as well as Unix lossage.
@node Errors
@section Error and Warning Messages
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@c man begin DESCRIPTION
@cindex error messages
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@cindex warning messages
@cindex messages from assembler
@command{@value{AS}} may write warnings and error messages to the standard error
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file (usually your terminal). This should not happen when a compiler
runs @command{@value{AS}} automatically. Warnings report an assumption made so
that @command{@value{AS}} could keep assembling a flawed program; errors report a
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grave problem that stops the assembly.
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@c man end
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@cindex format of warning messages
Warning messages have the format
@smallexample
file_name:@b{NNN}:Warning Message Text
@end smallexample
@noindent
@cindex line numbers, in warnings/errors
(where @b{NNN} is a line number). If a logical file name has been given
(@pxref{File,,@code{.file}}) it is used for the filename, otherwise the name of
the current input file is used. If a logical line number was given
@ifset GENERIC
(@pxref{Line,,@code{.line}})
@end ifset
then it is used to calculate the number printed,
otherwise the actual line in the current source file is printed. The
message text is intended to be self explanatory (in the grand Unix
tradition).
@cindex format of error messages
Error messages have the format
@smallexample
file_name:@b{NNN}:FATAL:Error Message Text
@end smallexample
The file name and line number are derived as for warning
messages. The actual message text may be rather less explanatory
because many of them aren't supposed to happen.
@node Invoking
@chapter Command-Line Options
@cindex options, all versions of assembler
This chapter describes command-line options available in @emph{all}
versions of the @sc{gnu} assembler; see @ref{Machine Dependencies},
for options specific
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@ifclear GENERIC
to the @value{TARGET} target.
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@end ifclear
@ifset GENERIC
to particular machine architectures.
@end ifset
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@c man begin DESCRIPTION
If you are invoking @command{@value{AS}} via the @sc{gnu} C compiler,
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you can use the @samp{-Wa} option to pass arguments through to the assembler.
The assembler arguments must be separated from each other (and the @samp{-Wa})
by commas. For example:
@smallexample
gcc -c -g -O -Wa,-alh,-L file.c
@end smallexample
@noindent
This passes two options to the assembler: @samp{-alh} (emit a listing to
standard output with high-level and assembly source) and @samp{-L} (retain
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local symbols in the symbol table).
Usually you do not need to use this @samp{-Wa} mechanism, since many compiler
command-line options are automatically passed to the assembler by the compiler.
(You can call the @sc{gnu} compiler driver with the @samp{-v} option to see
precisely what options it passes to each compilation pass, including the
assembler.)
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@c man end
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@menu
* a:: -a[cdghlns] enable listings
* alternate:: --alternate enable alternate macro syntax
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* D:: -D for compatibility
* f:: -f to work faster
* I:: -I for .include search path
@ifclear DIFF-TBL-KLUGE
* K:: -K for compatibility
@end ifclear
@ifset DIFF-TBL-KLUGE
* K:: -K for difference tables
@end ifset
* L:: -L to retain local symbols
* listing:: --listing-XXX to configure listing output
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* M:: -M or --mri to assemble in MRI compatibility mode
* MD:: --MD for dependency tracking
* o:: -o to name the object file
* R:: -R to join data and text sections
* statistics:: --statistics to see statistics about assembly
* traditional-format:: --traditional-format for compatible output
* v:: -v to announce version
* W:: -W, --no-warn, --warn, --fatal-warnings to control warnings
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* Z:: -Z to make object file even after errors
@end menu
@node a
@section Enable Listings: @option{-a[cdghlns]}
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@kindex -a
@kindex -ac
@kindex -ad
@kindex -ag
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@kindex -ah
@kindex -al
@kindex -an
@kindex -as
@cindex listings, enabling
@cindex assembly listings, enabling
These options enable listing output from the assembler. By itself,
@samp{-a} requests high-level, assembly, and symbols listing.
You can use other letters to select specific options for the list:
@samp{-ah} requests a high-level language listing,
@samp{-al} requests an output-program assembly listing, and
@samp{-as} requests a symbol table listing.
High-level listings require that a compiler debugging option like
@samp{-g} be used, and that assembly listings (@samp{-al}) be requested
also.
Use the @samp{-ag} option to print a first section with general assembly
information, like @value{AS} version, switches passed, or time stamp.
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Use the @samp{-ac} option to omit false conditionals from a listing. Any lines
which are not assembled because of a false @code{.if} (or @code{.ifdef}, or any
other conditional), or a true @code{.if} followed by an @code{.else}, will be
omitted from the listing.
Use the @samp{-ad} option to omit debugging directives from the
listing.
Once you have specified one of these options, you can further control
listing output and its appearance using the directives @code{.list},
@code{.nolist}, @code{.psize}, @code{.eject}, @code{.title}, and
@code{.sbttl}.
The @samp{-an} option turns off all forms processing.
If you do not request listing output with one of the @samp{-a} options, the
listing-control directives have no effect.
The letters after @samp{-a} may be combined into one option,
@emph{e.g.}, @samp{-aln}.
Note if the assembler source is coming from the standard input (e.g.,
because it
is being created by @code{@value{GCC}} and the @samp{-pipe} command line switch
is being used) then the listing will not contain any comments or preprocessor
directives. This is because the listing code buffers input source lines from
stdin only after they have been preprocessed by the assembler. This reduces
memory usage and makes the code more efficient.
@node alternate
@section @option{--alternate}
@kindex --alternate
Begin in alternate macro mode, see @ref{Altmacro,,@code{.altmacro}}.
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@node D
@section @option{-D}
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@kindex -D
This option has no effect whatsoever, but it is accepted to make it more
likely that scripts written for other assemblers also work with
@command{@value{AS}}.
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@node f
@section Work Faster: @option{-f}
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@kindex -f
@cindex trusted compiler
@cindex faster processing (@option{-f})
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@samp{-f} should only be used when assembling programs written by a
(trusted) compiler. @samp{-f} stops the assembler from doing whitespace
and comment preprocessing on
the input file(s) before assembling them. @xref{Preprocessing,
,Preprocessing}.
@quotation
@emph{Warning:} if you use @samp{-f} when the files actually need to be
preprocessed (if they contain comments, for example), @command{@value{AS}} does
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not work correctly.
@end quotation
@node I
@section @code{.include} Search Path: @option{-I} @var{path}
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@kindex -I @var{path}
@cindex paths for @code{.include}
@cindex search path for @code{.include}
@cindex @code{include} directive search path
Use this option to add a @var{path} to the list of directories
@command{@value{AS}} searches for files specified in @code{.include}
directives (@pxref{Include,,@code{.include}}). You may use @option{-I} as
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many times as necessary to include a variety of paths. The current
working directory is always searched first; after that, @command{@value{AS}}
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searches any @samp{-I} directories in the same order as they were
specified (left to right) on the command line.
@node K
@section Difference Tables: @option{-K}
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@kindex -K
@ifclear DIFF-TBL-KLUGE
On the @value{TARGET} family, this option is allowed, but has no effect. It is
permitted for compatibility with the @sc{gnu} assembler on other platforms,
where it can be used to warn when the assembler alters the machine code
generated for @samp{.word} directives in difference tables. The @value{TARGET}
family does not have the addressing limitations that sometimes lead to this
alteration on other platforms.
@end ifclear
@ifset DIFF-TBL-KLUGE
@cindex difference tables, warning
@cindex warning for altered difference tables
@command{@value{AS}} sometimes alters the code emitted for directives of the
form @samp{.word @var{sym1}-@var{sym2}}. @xref{Word,,@code{.word}}.
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You can use the @samp{-K} option if you want a warning issued when this
is done.
@end ifset
@node L
@section Include Local Symbols: @option{-L}
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@kindex -L
@cindex local symbols, retaining in output
Symbols beginning with system-specific local label prefixes, typically
@samp{.L} for ELF systems or @samp{L} for traditional a.out systems, are
called @dfn{local symbols}. @xref{Symbol Names}. Normally you do not see
such symbols when debugging, because they are intended for the use of
programs (like compilers) that compose assembler programs, not for your
notice. Normally both @command{@value{AS}} and @code{@value{LD}} discard
such symbols, so you do not normally debug with them.
This option tells @command{@value{AS}} to retain those local symbols
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in the object file. Usually if you do this you also tell the linker
@code{@value{LD}} to preserve those symbols.
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@node listing
@section Configuring listing output: @option{--listing}
The listing feature of the assembler can be enabled via the command line switch
@samp{-a} (@pxref{a}). This feature combines the input source file(s) with a
hex dump of the corresponding locations in the output object file, and displays
them as a listing file. The format of this listing can be controlled by
directives inside the assembler source (i.e., @code{.list} (@pxref{List}),
@code{.title} (@pxref{Title}), @code{.sbttl} (@pxref{Sbttl}),
@code{.psize} (@pxref{Psize}), and
@code{.eject} (@pxref{Eject}) and also by the following switches:
@table @gcctabopt
@item --listing-lhs-width=@samp{number}
@kindex --listing-lhs-width
@cindex Width of first line disassembly output
Sets the maximum width, in words, of the first line of the hex byte dump. This
dump appears on the left hand side of the listing output.
@item --listing-lhs-width2=@samp{number}
@kindex --listing-lhs-width2
@cindex Width of continuation lines of disassembly output
Sets the maximum width, in words, of any further lines of the hex byte dump for
a given input source line. If this value is not specified, it defaults to being
the same as the value specified for @samp{--listing-lhs-width}. If neither
switch is used the default is to one.
@item --listing-rhs-width=@samp{number}
@kindex --listing-rhs-width
@cindex Width of source line output
Sets the maximum width, in characters, of the source line that is displayed
alongside the hex dump. The default value for this parameter is 100. The
source line is displayed on the right hand side of the listing output.
@item --listing-cont-lines=@samp{number}
@kindex --listing-cont-lines
@cindex Maximum number of continuation lines
Sets the maximum number of continuation lines of hex dump that will be
displayed for a given single line of source input. The default value is 4.
@end table
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@node M
@section Assemble in MRI Compatibility Mode: @option{-M}
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@kindex -M
@cindex MRI compatibility mode
The @option{-M} or @option{--mri} option selects MRI compatibility mode. This
changes the syntax and pseudo-op handling of @command{@value{AS}} to make it
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compatible with the @code{ASM68K} or the @code{ASM960} (depending upon the
configured target) assembler from Microtec Research. The exact nature of the
MRI syntax will not be documented here; see the MRI manuals for more
information. Note in particular that the handling of macros and macro
arguments is somewhat different. The purpose of this option is to permit
assembling existing MRI assembler code using @command{@value{AS}}.
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The MRI compatibility is not complete. Certain operations of the MRI assembler
depend upon its object file format, and can not be supported using other object
file formats. Supporting these would require enhancing each object file format
individually. These are:
@itemize @bullet
@item global symbols in common section
The m68k MRI assembler supports common sections which are merged by the linker.
Other object file formats do not support this. @command{@value{AS}} handles
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common sections by treating them as a single common symbol. It permits local
symbols to be defined within a common section, but it can not support global
symbols, since it has no way to describe them.
@item complex relocations
The MRI assemblers support relocations against a negated section address, and
relocations which combine the start addresses of two or more sections. These
are not support by other object file formats.
@item @code{END} pseudo-op specifying start address
The MRI @code{END} pseudo-op permits the specification of a start address.
This is not supported by other object file formats. The start address may
instead be specified using the @option{-e} option to the linker, or in a linker
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script.
@item @code{IDNT}, @code{.ident} and @code{NAME} pseudo-ops
The MRI @code{IDNT}, @code{.ident} and @code{NAME} pseudo-ops assign a module
name to the output file. This is not supported by other object file formats.
@item @code{ORG} pseudo-op
The m68k MRI @code{ORG} pseudo-op begins an absolute section at a given
address. This differs from the usual @command{@value{AS}} @code{.org} pseudo-op,
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which changes the location within the current section. Absolute sections are
not supported by other object file formats. The address of a section may be
assigned within a linker script.
@end itemize
There are some other features of the MRI assembler which are not supported by
@command{@value{AS}}, typically either because they are difficult or because they
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seem of little consequence. Some of these may be supported in future releases.
@itemize @bullet
@item EBCDIC strings
EBCDIC strings are not supported.
@item packed binary coded decimal
Packed binary coded decimal is not supported. This means that the @code{DC.P}
and @code{DCB.P} pseudo-ops are not supported.
@item @code{FEQU} pseudo-op
The m68k @code{FEQU} pseudo-op is not supported.
@item @code{NOOBJ} pseudo-op
The m68k @code{NOOBJ} pseudo-op is not supported.
@item @code{OPT} branch control options
The m68k @code{OPT} branch control options---@code{B}, @code{BRS}, @code{BRB},
@code{BRL}, and @code{BRW}---are ignored. @command{@value{AS}} automatically
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relaxes all branches, whether forward or backward, to an appropriate size, so
these options serve no purpose.
@item @code{OPT} list control options
The following m68k @code{OPT} list control options are ignored: @code{C},
@code{CEX}, @code{CL}, @code{CRE}, @code{E}, @code{G}, @code{I}, @code{M},
@code{MEX}, @code{MC}, @code{MD}, @code{X}.
@item other @code{OPT} options
The following m68k @code{OPT} options are ignored: @code{NEST}, @code{O},
@code{OLD}, @code{OP}, @code{P}, @code{PCO}, @code{PCR}, @code{PCS}, @code{R}.
@item @code{OPT} @code{D} option is default
The m68k @code{OPT} @code{D} option is the default, unlike the MRI assembler.
@code{OPT NOD} may be used to turn it off.
@item @code{XREF} pseudo-op.
The m68k @code{XREF} pseudo-op is ignored.
@item @code{.debug} pseudo-op
The i960 @code{.debug} pseudo-op is not supported.
@item @code{.extended} pseudo-op
The i960 @code{.extended} pseudo-op is not supported.
@item @code{.list} pseudo-op.
The various options of the i960 @code{.list} pseudo-op are not supported.
@item @code{.optimize} pseudo-op
The i960 @code{.optimize} pseudo-op is not supported.
@item @code{.output} pseudo-op
The i960 @code{.output} pseudo-op is not supported.
@item @code{.setreal} pseudo-op
The i960 @code{.setreal} pseudo-op is not supported.
@end itemize
@node MD
@section Dependency Tracking: @option{--MD}
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@kindex --MD
@cindex dependency tracking
@cindex make rules
@command{@value{AS}} can generate a dependency file for the file it creates. This
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file consists of a single rule suitable for @code{make} describing the
dependencies of the main source file.
The rule is written to the file named in its argument.
This feature is used in the automatic updating of makefiles.
@node o
@section Name the Object File: @option{-o}
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@kindex -o
@cindex naming object file
@cindex object file name
There is always one object file output when you run @command{@value{AS}}. By
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default it has the name
@ifset GENERIC
@ifset I960
@file{a.out} (or @file{b.out}, for Intel 960 targets only).
@end ifset
@ifclear I960
@file{a.out}.
@end ifclear
@end ifset
@ifclear GENERIC
@ifset I960
@file{b.out}.
@end ifset
@ifclear I960
@file{a.out}.
@end ifclear
@end ifclear
You use this option (which takes exactly one filename) to give the
object file a different name.
Whatever the object file is called, @command{@value{AS}} overwrites any
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existing file of the same name.
@node R
@section Join Data and Text Sections: @option{-R}
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@kindex -R
@cindex data and text sections, joining
@cindex text and data sections, joining
@cindex joining text and data sections
@cindex merging text and data sections
@option{-R} tells @command{@value{AS}} to write the object file as if all
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data-section data lives in the text section. This is only done at
the very last moment: your binary data are the same, but data
section parts are relocated differently. The data section part of
your object file is zero bytes long because all its bytes are
appended to the text section. (@xref{Sections,,Sections and Relocation}.)
When you specify @option{-R} it would be possible to generate shorter
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address displacements (because we do not have to cross between text and
data section). We refrain from doing this simply for compatibility with
older versions of @command{@value{AS}}. In future, @option{-R} may work this way.
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@ifset COFF-ELF
When @command{@value{AS}} is configured for COFF or ELF output,
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this option is only useful if you use sections named @samp{.text} and
@samp{.data}.
@end ifset
@ifset HPPA
@option{-R} is not supported for any of the HPPA targets. Using
@option{-R} generates a warning from @command{@value{AS}}.
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@end ifset
@node statistics
@section Display Assembly Statistics: @option{--statistics}
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@kindex --statistics
@cindex statistics, about assembly
@cindex time, total for assembly
@cindex space used, maximum for assembly
Use @samp{--statistics} to display two statistics about the resources used by
@command{@value{AS}}: the maximum amount of space allocated during the assembly
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(in bytes), and the total execution time taken for the assembly (in @sc{cpu}
seconds).
@node traditional-format
@section Compatible Output: @option{--traditional-format}
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@kindex --traditional-format
For some targets, the output of @command{@value{AS}} is different in some ways
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from the output of some existing assembler. This switch requests
@command{@value{AS}} to use the traditional format instead.
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For example, it disables the exception frame optimizations which
@command{@value{AS}} normally does by default on @code{@value{GCC}} output.
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@node v
@section Announce Version: @option{-v}
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@kindex -v
@kindex -version
@cindex assembler version
@cindex version of assembler
You can find out what version of as is running by including the
option @samp{-v} (which you can also spell as @samp{-version}) on the
command line.
@node W
@section Control Warnings: @option{-W}, @option{--warn}, @option{--no-warn}, @option{--fatal-warnings}
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@command{@value{AS}} should never give a warning or error message when
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assembling compiler output. But programs written by people often
cause @command{@value{AS}} to give a warning that a particular assumption was
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made. All such warnings are directed to the standard error file.
@kindex -W
@kindex --no-warn
@cindex suppressing warnings
@cindex warnings, suppressing
If you use the @option{-W} and @option{--no-warn} options, no warnings are issued.
This only affects the warning messages: it does not change any particular of
how @command{@value{AS}} assembles your file. Errors, which stop the assembly,
are still reported.
@kindex --fatal-warnings
@cindex errors, caused by warnings
@cindex warnings, causing error
If you use the @option{--fatal-warnings} option, @command{@value{AS}} considers
files that generate warnings to be in error.
@kindex --warn
@cindex warnings, switching on
You can switch these options off again by specifying @option{--warn}, which
causes warnings to be output as usual.
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@node Z
@section Generate Object File in Spite of Errors: @option{-Z}
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@cindex object file, after errors
@cindex errors, continuing after
After an error message, @command{@value{AS}} normally produces no output. If for
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some reason you are interested in object file output even after
@command{@value{AS}} gives an error message on your program, use the @samp{-Z}
option. If there are any errors, @command{@value{AS}} continues anyways, and
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writes an object file after a final warning message of the form @samp{@var{n}
errors, @var{m} warnings, generating bad object file.}
@node Syntax
@chapter Syntax
@cindex machine-independent syntax
@cindex syntax, machine-independent
This chapter describes the machine-independent syntax allowed in a
source file. @command{@value{AS}} syntax is similar to what many other
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assemblers use; it is inspired by the BSD 4.2
@ifclear VAX
assembler.
@end ifclear
@ifset VAX
assembler, except that @command{@value{AS}} does not assemble Vax bit-fields.
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@end ifset
@menu
PR gas/12390 * doc/all.texi: Add NS32K * doc/as.texinfo: Remove target specific details of which characters act as comment initiators and statement separators into individual target specific files. * doc/c-alpha.texi (Alpha-Chars): Document special behaviour of the hash character at the start of a line. * doc/c-arm.texi (ARM-Chars): Likewise. * doc/c-avr.texi (AVR-Chars): Likewise. * doc/c-d10v.texi (D10V-Chars): Likewise. * doc/c-d30v.texi (D30V-Chars): Likewise. * doc/c-mmix.texi (MMIX-Chars): Likewise. * doc/c-s390.texi (s390 characters): Likewise. * doc/c-sh.texi (SH-Chars): Likewise. * doc/c-sh64.texi (SH64-Chars): Likewise. * doc/c-sparc.texi (SPARC-Chars): Likewise. * doc/c-tic6x.texi (TIC6X Syntax): Likewise. * doc/c-xtensa.texi (Xtensa Syntax): Likewise. * doc/c-z80.texi (Z80-Chars): Likewise. * doc/c-z8k.texi (Z8000-Chars): Likewise. * doc/c-pdp11.texi (PDP11-Syntax): Document line separator character. * doc/c-arc.texi (ARC-Chars): Fill in this subsection. * doc/c-bfin.texi (Blackfin Syntax): Document line comment and line separator characters. * doc/c-cr16.texi (CR16 Syntax): Likewise. * doc/c-i386.texi (i386-Chars): Likewise. * doc/c-i860.texi (i860-Chars): Likewise. * doc/c-i960.texi (i960-Chars): Likewise. * doc/c-ip2k.texi (IP2K-Chars): Likewise. * doc/c-lm32.texi (LM32-Chars): likewise. * doc/c-m32c.texi (M32C-Chars): Likewise. * doc/c-m68hc11.texi (M68HC11-syntax): Likewise. * doc/c-m68k.texi (M68K-Chars): Likewise. * doc/c-microblaze.texi (MicroBlaze-Chars): Likewise. * doc/c-msp430.texi (MSP430-Chars): Likewise. * doc/c-mt.texi (MT-Chars): Likewise. * doc/c-ns32k.texi (NS32K-Chars): Likewise. * doc/c-pj.texi (PJ-Chars): Likewise. * doc/c-ppc.texi (PowerPC-Chars): Likewise. * doc/c-rx.texi (RX-Chars): Likewise. * doc/c-score.texi (SCORE-Chars): Likewise. * doc/c-tic54x.texi (TIC54X-Chars): Likewise. * doc/c-v850.texi (V850-Chars): Likewise. * doc/c-vax.texi (VAX-Chars): Likewise. * doc/c-xc16x.texi (xc16x-Chars): Likewise.
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* Preprocessing:: Preprocessing
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* Whitespace:: Whitespace
* Comments:: Comments
* Symbol Intro:: Symbols
* Statements:: Statements
* Constants:: Constants
@end menu
@node Preprocessing
@section Preprocessing
@cindex preprocessing
The @command{@value{AS}} internal preprocessor:
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@itemize @bullet
@cindex whitespace, removed by preprocessor
@item
adjusts and removes extra whitespace. It leaves one space or tab before
the keywords on a line, and turns any other whitespace on the line into
a single space.
@cindex comments, removed by preprocessor
@item
removes all comments, replacing them with a single space, or an
appropriate number of newlines.
@cindex constants, converted by preprocessor
@item
converts character constants into the appropriate numeric values.
@end itemize
It does not do macro processing, include file handling, or
anything else you may get from your C compiler's preprocessor. You can
do include file processing with the @code{.include} directive
(@pxref{Include,,@code{.include}}). You can use the @sc{gnu} C compiler driver
to get other ``CPP'' style preprocessing by giving the input file a
@samp{.S} suffix. @xref{Overall Options, ,Options Controlling the Kind of
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Output, gcc.info, Using GNU CC}.
Excess whitespace, comments, and character constants
cannot be used in the portions of the input text that are not
preprocessed.
@cindex turning preprocessing on and off
@cindex preprocessing, turning on and off
@kindex #NO_APP
@kindex #APP
If the first line of an input file is @code{#NO_APP} or if you use the
@samp{-f} option, whitespace and comments are not removed from the input file.
Within an input file, you can ask for whitespace and comment removal in
specific portions of the by putting a line that says @code{#APP} before the
text that may contain whitespace or comments, and putting a line that says
@code{#NO_APP} after this text. This feature is mainly intend to support
@code{asm} statements in compilers whose output is otherwise free of comments
and whitespace.
@node Whitespace
@section Whitespace
@cindex whitespace
@dfn{Whitespace} is one or more blanks or tabs, in any order.
Whitespace is used to separate symbols, and to make programs neater for
people to read. Unless within character constants
(@pxref{Characters,,Character Constants}), any whitespace means the same
as exactly one space.
@node Comments
@section Comments
@cindex comments
There are two ways of rendering comments to @command{@value{AS}}. In both
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cases the comment is equivalent to one space.
Anything from @samp{/*} through the next @samp{*/} is a comment.
This means you may not nest these comments.
@smallexample
/*
The only way to include a newline ('\n') in a comment
is to use this sort of comment.
*/
/* This sort of comment does not nest. */
@end smallexample
@cindex line comment character
PR gas/12390 * doc/all.texi: Add NS32K * doc/as.texinfo: Remove target specific details of which characters act as comment initiators and statement separators into individual target specific files. * doc/c-alpha.texi (Alpha-Chars): Document special behaviour of the hash character at the start of a line. * doc/c-arm.texi (ARM-Chars): Likewise. * doc/c-avr.texi (AVR-Chars): Likewise. * doc/c-d10v.texi (D10V-Chars): Likewise. * doc/c-d30v.texi (D30V-Chars): Likewise. * doc/c-mmix.texi (MMIX-Chars): Likewise. * doc/c-s390.texi (s390 characters): Likewise. * doc/c-sh.texi (SH-Chars): Likewise. * doc/c-sh64.texi (SH64-Chars): Likewise. * doc/c-sparc.texi (SPARC-Chars): Likewise. * doc/c-tic6x.texi (TIC6X Syntax): Likewise. * doc/c-xtensa.texi (Xtensa Syntax): Likewise. * doc/c-z80.texi (Z80-Chars): Likewise. * doc/c-z8k.texi (Z8000-Chars): Likewise. * doc/c-pdp11.texi (PDP11-Syntax): Document line separator character. * doc/c-arc.texi (ARC-Chars): Fill in this subsection. * doc/c-bfin.texi (Blackfin Syntax): Document line comment and line separator characters. * doc/c-cr16.texi (CR16 Syntax): Likewise. * doc/c-i386.texi (i386-Chars): Likewise. * doc/c-i860.texi (i860-Chars): Likewise. * doc/c-i960.texi (i960-Chars): Likewise. * doc/c-ip2k.texi (IP2K-Chars): Likewise. * doc/c-lm32.texi (LM32-Chars): likewise. * doc/c-m32c.texi (M32C-Chars): Likewise. * doc/c-m68hc11.texi (M68HC11-syntax): Likewise. * doc/c-m68k.texi (M68K-Chars): Likewise. * doc/c-microblaze.texi (MicroBlaze-Chars): Likewise. * doc/c-msp430.texi (MSP430-Chars): Likewise. * doc/c-mt.texi (MT-Chars): Likewise. * doc/c-ns32k.texi (NS32K-Chars): Likewise. * doc/c-pj.texi (PJ-Chars): Likewise. * doc/c-ppc.texi (PowerPC-Chars): Likewise. * doc/c-rx.texi (RX-Chars): Likewise. * doc/c-score.texi (SCORE-Chars): Likewise. * doc/c-tic54x.texi (TIC54X-Chars): Likewise. * doc/c-v850.texi (V850-Chars): Likewise. * doc/c-vax.texi (VAX-Chars): Likewise. * doc/c-xc16x.texi (xc16x-Chars): Likewise.
2011-01-18 13:37:39 +00:00
Anything from a @dfn{line comment} character up to the next newline is
considered a comment and is ignored. The line comment character is target
specific, and some targets multiple comment characters. Some targets also have
line comment characters that only work if they are the first character on a
line. Some targets use a sequence of two characters to introduce a line
comment. Some targets can also change their line comment characters depending
upon command line options that have been used. For more details see the
@emph{Syntax} section in the documentation for individual targets.
If the line comment character is the hash sign (@samp{#}) then it still has the
special ability to enable and disable preprocessing (@pxref{Preprocessing}) and
to specify logical line numbers:
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@kindex #
@cindex lines starting with @code{#}
@cindex logical line numbers
To be compatible with past assemblers, lines that begin with @samp{#} have a
special interpretation. Following the @samp{#} should be an absolute
expression (@pxref{Expressions}): the logical line number of the @emph{next}
line. Then a string (@pxref{Strings, ,Strings}) is allowed: if present it is a
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new logical file name. The rest of the line, if any, should be whitespace.
If the first non-whitespace characters on the line are not numeric,
the line is ignored. (Just like a comment.)
@smallexample
# This is an ordinary comment.
# 42-6 "new_file_name" # New logical file name
# This is logical line # 36.
@end smallexample
This feature is deprecated, and may disappear from future versions
of @command{@value{AS}}.
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@node Symbol Intro
@section Symbols
@cindex characters used in symbols
@ifclear SPECIAL-SYMS
A @dfn{symbol} is one or more characters chosen from the set of all
letters (both upper and lower case), digits and the three characters
@samp{_.$}.
@end ifclear
@ifset SPECIAL-SYMS
@ifclear GENERIC
@ifset H8
A @dfn{symbol} is one or more characters chosen from the set of all
letters (both upper and lower case), digits and the three characters
@samp{._$}. (Save that, on the H8/300 only, you may not use @samp{$} in
symbol names.)
@end ifset
@end ifclear
@end ifset
@ifset GENERIC
On most machines, you can also use @code{$} in symbol names; exceptions
are noted in @ref{Machine Dependencies}.
@end ifset
No symbol may begin with a digit. Case is significant.
There is no length limit: all characters are significant. Multibyte characters
are supported. Symbols are delimited by characters not in that set, or by the
beginning of a file (since the source program must end with a newline, the end
of a file is not a possible symbol delimiter). @xref{Symbols}.
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@cindex length of symbols
@node Statements
@section Statements
@cindex statements, structure of
@cindex line separator character
@cindex statement separator character
PR gas/12390 * doc/all.texi: Add NS32K * doc/as.texinfo: Remove target specific details of which characters act as comment initiators and statement separators into individual target specific files. * doc/c-alpha.texi (Alpha-Chars): Document special behaviour of the hash character at the start of a line. * doc/c-arm.texi (ARM-Chars): Likewise. * doc/c-avr.texi (AVR-Chars): Likewise. * doc/c-d10v.texi (D10V-Chars): Likewise. * doc/c-d30v.texi (D30V-Chars): Likewise. * doc/c-mmix.texi (MMIX-Chars): Likewise. * doc/c-s390.texi (s390 characters): Likewise. * doc/c-sh.texi (SH-Chars): Likewise. * doc/c-sh64.texi (SH64-Chars): Likewise. * doc/c-sparc.texi (SPARC-Chars): Likewise. * doc/c-tic6x.texi (TIC6X Syntax): Likewise. * doc/c-xtensa.texi (Xtensa Syntax): Likewise. * doc/c-z80.texi (Z80-Chars): Likewise. * doc/c-z8k.texi (Z8000-Chars): Likewise. * doc/c-pdp11.texi (PDP11-Syntax): Document line separator character. * doc/c-arc.texi (ARC-Chars): Fill in this subsection. * doc/c-bfin.texi (Blackfin Syntax): Document line comment and line separator characters. * doc/c-cr16.texi (CR16 Syntax): Likewise. * doc/c-i386.texi (i386-Chars): Likewise. * doc/c-i860.texi (i860-Chars): Likewise. * doc/c-i960.texi (i960-Chars): Likewise. * doc/c-ip2k.texi (IP2K-Chars): Likewise. * doc/c-lm32.texi (LM32-Chars): likewise. * doc/c-m32c.texi (M32C-Chars): Likewise. * doc/c-m68hc11.texi (M68HC11-syntax): Likewise. * doc/c-m68k.texi (M68K-Chars): Likewise. * doc/c-microblaze.texi (MicroBlaze-Chars): Likewise. * doc/c-msp430.texi (MSP430-Chars): Likewise. * doc/c-mt.texi (MT-Chars): Likewise. * doc/c-ns32k.texi (NS32K-Chars): Likewise. * doc/c-pj.texi (PJ-Chars): Likewise. * doc/c-ppc.texi (PowerPC-Chars): Likewise. * doc/c-rx.texi (RX-Chars): Likewise. * doc/c-score.texi (SCORE-Chars): Likewise. * doc/c-tic54x.texi (TIC54X-Chars): Likewise. * doc/c-v850.texi (V850-Chars): Likewise. * doc/c-vax.texi (VAX-Chars): Likewise. * doc/c-xc16x.texi (xc16x-Chars): Likewise.
2011-01-18 13:37:39 +00:00
A @dfn{statement} ends at a newline character (@samp{\n}) or a
@dfn{line separator character}. The line separator character is target
specific and described in the @emph{Syntax} section of each
target's documentation. Not all targets support a line separator character.
The newline or line separator character is considered to be part of the
preceding statement. Newlines and separators within character constants are an
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exception: they do not end statements.
@cindex newline, required at file end
@cindex EOF, newline must precede
It is an error to end any statement with end-of-file: the last
character of any input file should be a newline.@refill
An empty statement is allowed, and may include whitespace. It is ignored.
@cindex instructions and directives
@cindex directives and instructions
@c "key symbol" is not used elsewhere in the document; seems pedantic to
@c @defn{} it in that case, as was done previously... doc@cygnus.com,
@c 13feb91.
A statement begins with zero or more labels, optionally followed by a
key symbol which determines what kind of statement it is. The key
symbol determines the syntax of the rest of the statement. If the
symbol begins with a dot @samp{.} then the statement is an assembler
directive: typically valid for any computer. If the symbol begins with
a letter the statement is an assembly language @dfn{instruction}: it
assembles into a machine language instruction.
@ifset GENERIC
Different versions of @command{@value{AS}} for different computers
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recognize different instructions. In fact, the same symbol may
represent a different instruction in a different computer's assembly
language.@refill
@end ifset
@cindex @code{:} (label)
@cindex label (@code{:})
A label is a symbol immediately followed by a colon (@code{:}).
Whitespace before a label or after a colon is permitted, but you may not
have whitespace between a label's symbol and its colon. @xref{Labels}.
@ifset HPPA
For HPPA targets, labels need not be immediately followed by a colon, but
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the definition of a label must begin in column zero. This also implies that
only one label may be defined on each line.
@end ifset
@smallexample
label: .directive followed by something
another_label: # This is an empty statement.
instruction operand_1, operand_2, @dots{}
@end smallexample
@node Constants
@section Constants
@cindex constants
A constant is a number, written so that its value is known by
inspection, without knowing any context. Like this:
@smallexample
@group
.byte 74, 0112, 092, 0x4A, 0X4a, 'J, '\J # All the same value.
.ascii "Ring the bell\7" # A string constant.
.octa 0x123456789abcdef0123456789ABCDEF0 # A bignum.
.float 0f-314159265358979323846264338327\
95028841971.693993751E-40 # - pi, a flonum.
@end group
@end smallexample
@menu
* Characters:: Character Constants
* Numbers:: Number Constants
@end menu
@node Characters
@subsection Character Constants
@cindex character constants
@cindex constants, character
There are two kinds of character constants. A @dfn{character} stands
for one character in one byte and its value may be used in
numeric expressions. String constants (properly called string
@emph{literals}) are potentially many bytes and their values may not be
used in arithmetic expressions.
@menu
* Strings:: Strings
* Chars:: Characters
@end menu
@node Strings
@subsubsection Strings
@cindex string constants
@cindex constants, string
A @dfn{string} is written between double-quotes. It may contain
double-quotes or null characters. The way to get special characters
into a string is to @dfn{escape} these characters: precede them with
a backslash @samp{\} character. For example @samp{\\} represents
one backslash: the first @code{\} is an escape which tells
@command{@value{AS}} to interpret the second character literally as a backslash
(which prevents @command{@value{AS}} from recognizing the second @code{\} as an
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escape character). The complete list of escapes follows.
@cindex escape codes, character
@cindex character escape codes
@table @kbd
@c @item \a
@c Mnemonic for ACKnowledge; for ASCII this is octal code 007.
@c
@cindex @code{\b} (backspace character)
@cindex backspace (@code{\b})
@item \b
Mnemonic for backspace; for ASCII this is octal code 010.
@c @item \e
@c Mnemonic for EOText; for ASCII this is octal code 004.
@c
@cindex @code{\f} (formfeed character)
@cindex formfeed (@code{\f})
@item \f
Mnemonic for FormFeed; for ASCII this is octal code 014.
@cindex @code{\n} (newline character)
@cindex newline (@code{\n})
@item \n
Mnemonic for newline; for ASCII this is octal code 012.
@c @item \p
@c Mnemonic for prefix; for ASCII this is octal code 033, usually known as @code{escape}.
@c
@cindex @code{\r} (carriage return character)
@cindex carriage return (@code{\r})
@item \r
Mnemonic for carriage-Return; for ASCII this is octal code 015.
@c @item \s
@c Mnemonic for space; for ASCII this is octal code 040. Included for compliance with
@c other assemblers.
@c
@cindex @code{\t} (tab)
@cindex tab (@code{\t})
@item \t
Mnemonic for horizontal Tab; for ASCII this is octal code 011.
@c @item \v
@c Mnemonic for Vertical tab; for ASCII this is octal code 013.
@c @item \x @var{digit} @var{digit} @var{digit}
@c A hexadecimal character code. The numeric code is 3 hexadecimal digits.
@c
@cindex @code{\@var{ddd}} (octal character code)
@cindex octal character code (@code{\@var{ddd}})
@item \ @var{digit} @var{digit} @var{digit}
An octal character code. The numeric code is 3 octal digits.
For compatibility with other Unix systems, 8 and 9 are accepted as digits:
for example, @code{\008} has the value 010, and @code{\009} the value 011.
@cindex @code{\@var{xd...}} (hex character code)
@cindex hex character code (@code{\@var{xd...}})
@item \@code{x} @var{hex-digits...}
A hex character code. All trailing hex digits are combined. Either upper or
lower case @code{x} works.
@cindex @code{\\} (@samp{\} character)
@cindex backslash (@code{\\})
@item \\
Represents one @samp{\} character.
@c @item \'
@c Represents one @samp{'} (accent acute) character.
@c This is needed in single character literals
@c (@xref{Characters,,Character Constants}.) to represent
@c a @samp{'}.
@c
@cindex @code{\"} (doublequote character)
@cindex doublequote (@code{\"})
@item \"
Represents one @samp{"} character. Needed in strings to represent
this character, because an unescaped @samp{"} would end the string.
@item \ @var{anything-else}
Any other character when escaped by @kbd{\} gives a warning, but
assembles as if the @samp{\} was not present. The idea is that if
you used an escape sequence you clearly didn't want the literal
interpretation of the following character. However @command{@value{AS}} has no
other interpretation, so @command{@value{AS}} knows it is giving you the wrong
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code and warns you of the fact.
@end table
Which characters are escapable, and what those escapes represent,
varies widely among assemblers. The current set is what we think
the BSD 4.2 assembler recognizes, and is a subset of what most C
compilers recognize. If you are in doubt, do not use an escape
sequence.
@node Chars
@subsubsection Characters
@cindex single character constant
@cindex character, single
@cindex constant, single character
A single character may be written as a single quote immediately
followed by that character. The same escapes apply to characters as
to strings. So if you want to write the character backslash, you
must write @kbd{'\\} where the first @code{\} escapes the second
@code{\}. As you can see, the quote is an acute accent, not a
grave accent. A newline
@ifclear GENERIC
@ifclear abnormal-separator
(or semicolon @samp{;})
@end ifclear
@ifset abnormal-separator
@ifset H8
(or dollar sign @samp{$}, for the H8/300; or semicolon @samp{;} for the
* README-vms: Delete. * config-gas.com: Delete. * makefile.vms: Delete. * vmsconf.sh: Delete. * config/atof-tahoe.c: Delete. * config/m88k-opcode.h: Delete. * config/obj-bout.c: Delete. * config/obj-bout.h: Delete. * config/obj-hp300.c: Delete. * config/obj-hp300.h: Delete. * config/tc-a29k.c: Delete. * config/tc-a29k.h: Delete. * config/tc-h8500.c: Delete. * config/tc-h8500.h: Delete. * config/tc-m88k.c: Delete. * config/tc-m88k.h: Delete. * config/tc-tahoe.c: Delete. * config/tc-tahoe.h: Delete. * config/tc-tic80.c: Delete. * config/tc-tic80.h: Delete. * config/tc-w65.c: Delete. * config/tc-w65.h: Delete. * config/te-aux.h: Delete. * config/te-delt88.h: Delete. * config/te-delta.h: Delete. * config/te-dpx2.h: Delete. * config/te-hp300.h: Delete. * config/te-ic960.h: Delete. * config/vms-a-conf.h: Delete. * doc/c-a29k.texi: Delete. * doc/c-h8500.texi: Delete. * doc/c-m88k.texi: Delete. * README: Remove obsolete examples, and list of supported targets. * Makefile.am: Remove a29k, h8500, m88k, tahoe, tic80, w65, bout and hp300 support. (DEP_FLAGS): Don't define BFD_ASSEMBLER. * configure.in: Remove --enable-bfd-assembler, need_bfd, primary_bfd_gas. * configure.tgt: Remove a29k, h8300-coff, h8500-*, i960 non-elf, m68k non bfd, m88k, or32-coff, tic80-*, vax non-bfd, w65k-*, *-nindy. * as.c: Remove all non-BFD_ASSEMBLER code, support for above targets. * as.h: Likewise. * dw2gencfi.c: Likewise. * dwarf2dbg.c: Likewise. * ehopt.c: Likewise. * input-file.c: Likewise. * listing.c: Likewise. * literal.c: Likewise. * messages.c: Likewise. * obj.h: Likewise. * output-file.c: Likewise. * read.c: Likewise. * stabs.c: Likewise. * struc-symbol.h: Likewise. * subsegs.c: Likewise. * subsegs.h: Likewise. * symbols.c: Likewise. * symbols.h: Likewise. * tc.h: Likewise. * write.c: Likewise. * write.h: Likewise. * config/aout_gnu.h: Likewise. * config/obj-aout.c: Likewise. * config/obj-aout.h: Likewise. * config/obj-coff.c: Likewise. * config/obj-coff.h: Likewise. * config/obj-evax.h: Likewise. * config/obj-ieee.h: Likewise. * config/tc-arm.c: Likewise. * config/tc-arm.h: Likewise. * config/tc-avr.c: Likewise. * config/tc-avr.h: Likewise. * config/tc-crx.h: Likewise. * config/tc-d10v.h: Likewise. * config/tc-d30v.h: Likewise. * config/tc-dlx.h: Likewise. * config/tc-fr30.h: Likewise. * config/tc-frv.h: Likewise. * config/tc-h8300.c: Likewise. * config/tc-h8300.h: Likewise. * config/tc-hppa.h: Likewise. * config/tc-i370.h: Likewise. * config/tc-i386.c: Likewise. * config/tc-i386.h: Likewise. * config/tc-i860.h: Likewise. * config/tc-i960.c: Likewise. * config/tc-i960.h: Likewise. * config/tc-ip2k.h: Likewise. * config/tc-iq2000.h: Likewise. * config/tc-m32c.h: Likewise. * config/tc-m32r.h: Likewise. * config/tc-m68hc11.h: Likewise. * config/tc-m68k.c: Likewise. * config/tc-m68k.h: Likewise. * config/tc-maxq.c: Likewise. * config/tc-maxq.h: Likewise. * config/tc-mcore.c: Likewise. * config/tc-mcore.h: Likewise. * config/tc-mn10200.h: Likewise. * config/tc-mn10300.c: Likewise. * config/tc-mn10300.h: Likewise. * config/tc-ms1.h: Likewise. * config/tc-msp430.c: Likewise. * config/tc-msp430.h: Likewise. * config/tc-ns32k.c: Likewise. * config/tc-ns32k.h: Likewise. * config/tc-openrisc.h: Likewise. * config/tc-or32.c: Likewise. * config/tc-or32.h: Likewise. * config/tc-ppc.c: Likewise. * config/tc-ppc.h: Likewise. * config/tc-s390.h: Likewise. * config/tc-sh.c: Likewise. * config/tc-sh.h: Likewise. * config/tc-sparc.c: Likewise. * config/tc-tic30.c: Likewise. * config/tc-tic30.h: Likewise. * config/tc-tic4x.c: Likewise. * config/tc-tic4x.h: Likewise. * config/tc-tic54x.c: Likewise. * config/tc-tic54x.h: Likewise. * config/tc-v850.h: Likewise. * config/tc-vax.c: Likewise. * config/tc-vax.h: Likewise. * config/tc-xstormy16.h: Likewise. * config/tc-xtensa.h: Likewise. * config/tc-z8k.c: Likewise. * config/tc-z8k.h: Likewise. * config/vms-a-conf.h * doc/Makefile.am: Likewise. * doc/all.texi: Likewise. * doc/as.texinfo: Likewise. * doc/Makefile.in: Regenerate. * Makefile.in: Regenerate. * configure: Regenerate. * config.in: Regenerate. * po/POTFILES.in: Regenerate.
2005-08-11 01:25:29 +00:00
Renesas SH)
1999-05-03 07:29:11 +00:00
@end ifset
@end ifset
@end ifclear
immediately following an acute accent is taken as a literal character
and does not count as the end of a statement. The value of a character
constant in a numeric expression is the machine's byte-wide code for
that character. @command{@value{AS}} assumes your character code is ASCII:
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@kbd{'A} means 65, @kbd{'B} means 66, and so on. @refill
@node Numbers
@subsection Number Constants
@cindex constants, number
@cindex number constants
@command{@value{AS}} distinguishes three kinds of numbers according to how they
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are stored in the target machine. @emph{Integers} are numbers that
would fit into an @code{int} in the C language. @emph{Bignums} are
integers, but they are stored in more than 32 bits. @emph{Flonums}
are floating point numbers, described below.
@menu
* Integers:: Integers
* Bignums:: Bignums
* Flonums:: Flonums
@ifclear GENERIC
@ifset I960
* Bit Fields:: Bit Fields
@end ifset
@end ifclear
@end menu
@node Integers
@subsubsection Integers
@cindex integers
@cindex constants, integer
@cindex binary integers
@cindex integers, binary
A binary integer is @samp{0b} or @samp{0B} followed by zero or more of
the binary digits @samp{01}.
@cindex octal integers
@cindex integers, octal
An octal integer is @samp{0} followed by zero or more of the octal
digits (@samp{01234567}).
@cindex decimal integers
@cindex integers, decimal
A decimal integer starts with a non-zero digit followed by zero or
more digits (@samp{0123456789}).
@cindex hexadecimal integers
@cindex integers, hexadecimal
A hexadecimal integer is @samp{0x} or @samp{0X} followed by one or
more hexadecimal digits chosen from @samp{0123456789abcdefABCDEF}.
Integers have the usual values. To denote a negative integer, use
the prefix operator @samp{-} discussed under expressions
(@pxref{Prefix Ops,,Prefix Operators}).
@node Bignums
@subsubsection Bignums
@cindex bignums
@cindex constants, bignum
A @dfn{bignum} has the same syntax and semantics as an integer
except that the number (or its negative) takes more than 32 bits to
represent in binary. The distinction is made because in some places
integers are permitted while bignums are not.
@node Flonums
@subsubsection Flonums
@cindex flonums
@cindex floating point numbers
@cindex constants, floating point
@cindex precision, floating point
A @dfn{flonum} represents a floating point number. The translation is
indirect: a decimal floating point number from the text is converted by
@command{@value{AS}} to a generic binary floating point number of more than
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sufficient precision. This generic floating point number is converted
to a particular computer's floating point format (or formats) by a
portion of @command{@value{AS}} specialized to that computer.
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A flonum is written by writing (in order)
@itemize @bullet
@item
The digit @samp{0}.
@ifset HPPA
(@samp{0} is optional on the HPPA.)
@end ifset
@item
A letter, to tell @command{@value{AS}} the rest of the number is a flonum.
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@ifset GENERIC
@kbd{e} is recommended. Case is not important.
@ignore
@c FIXME: verify if flonum syntax really this vague for most cases
(Any otherwise illegal letter works here, but that might be changed. Vax BSD
4.2 assembler seems to allow any of @samp{defghDEFGH}.)
@end ignore
* README-vms: Delete. * config-gas.com: Delete. * makefile.vms: Delete. * vmsconf.sh: Delete. * config/atof-tahoe.c: Delete. * config/m88k-opcode.h: Delete. * config/obj-bout.c: Delete. * config/obj-bout.h: Delete. * config/obj-hp300.c: Delete. * config/obj-hp300.h: Delete. * config/tc-a29k.c: Delete. * config/tc-a29k.h: Delete. * config/tc-h8500.c: Delete. * config/tc-h8500.h: Delete. * config/tc-m88k.c: Delete. * config/tc-m88k.h: Delete. * config/tc-tahoe.c: Delete. * config/tc-tahoe.h: Delete. * config/tc-tic80.c: Delete. * config/tc-tic80.h: Delete. * config/tc-w65.c: Delete. * config/tc-w65.h: Delete. * config/te-aux.h: Delete. * config/te-delt88.h: Delete. * config/te-delta.h: Delete. * config/te-dpx2.h: Delete. * config/te-hp300.h: Delete. * config/te-ic960.h: Delete. * config/vms-a-conf.h: Delete. * doc/c-a29k.texi: Delete. * doc/c-h8500.texi: Delete. * doc/c-m88k.texi: Delete. * README: Remove obsolete examples, and list of supported targets. * Makefile.am: Remove a29k, h8500, m88k, tahoe, tic80, w65, bout and hp300 support. (DEP_FLAGS): Don't define BFD_ASSEMBLER. * configure.in: Remove --enable-bfd-assembler, need_bfd, primary_bfd_gas. * configure.tgt: Remove a29k, h8300-coff, h8500-*, i960 non-elf, m68k non bfd, m88k, or32-coff, tic80-*, vax non-bfd, w65k-*, *-nindy. * as.c: Remove all non-BFD_ASSEMBLER code, support for above targets. * as.h: Likewise. * dw2gencfi.c: Likewise. * dwarf2dbg.c: Likewise. * ehopt.c: Likewise. * input-file.c: Likewise. * listing.c: Likewise. * literal.c: Likewise. * messages.c: Likewise. * obj.h: Likewise. * output-file.c: Likewise. * read.c: Likewise. * stabs.c: Likewise. * struc-symbol.h: Likewise. * subsegs.c: Likewise. * subsegs.h: Likewise. * symbols.c: Likewise. * symbols.h: Likewise. * tc.h: Likewise. * write.c: Likewise. * write.h: Likewise. * config/aout_gnu.h: Likewise. * config/obj-aout.c: Likewise. * config/obj-aout.h: Likewise. * config/obj-coff.c: Likewise. * config/obj-coff.h: Likewise. * config/obj-evax.h: Likewise. * config/obj-ieee.h: Likewise. * config/tc-arm.c: Likewise. * config/tc-arm.h: Likewise. * config/tc-avr.c: Likewise. * config/tc-avr.h: Likewise. * config/tc-crx.h: Likewise. * config/tc-d10v.h: Likewise. * config/tc-d30v.h: Likewise. * config/tc-dlx.h: Likewise. * config/tc-fr30.h: Likewise. * config/tc-frv.h: Likewise. * config/tc-h8300.c: Likewise. * config/tc-h8300.h: Likewise. * config/tc-hppa.h: Likewise. * config/tc-i370.h: Likewise. * config/tc-i386.c: Likewise. * config/tc-i386.h: Likewise. * config/tc-i860.h: Likewise. * config/tc-i960.c: Likewise. * config/tc-i960.h: Likewise. * config/tc-ip2k.h: Likewise. * config/tc-iq2000.h: Likewise. * config/tc-m32c.h: Likewise. * config/tc-m32r.h: Likewise. * config/tc-m68hc11.h: Likewise. * config/tc-m68k.c: Likewise. * config/tc-m68k.h: Likewise. * config/tc-maxq.c: Likewise. * config/tc-maxq.h: Likewise. * config/tc-mcore.c: Likewise. * config/tc-mcore.h: Likewise. * config/tc-mn10200.h: Likewise. * config/tc-mn10300.c: Likewise. * config/tc-mn10300.h: Likewise. * config/tc-ms1.h: Likewise. * config/tc-msp430.c: Likewise. * config/tc-msp430.h: Likewise. * config/tc-ns32k.c: Likewise. * config/tc-ns32k.h: Likewise. * config/tc-openrisc.h: Likewise. * config/tc-or32.c: Likewise. * config/tc-or32.h: Likewise. * config/tc-ppc.c: Likewise. * config/tc-ppc.h: Likewise. * config/tc-s390.h: Likewise. * config/tc-sh.c: Likewise. * config/tc-sh.h: Likewise. * config/tc-sparc.c: Likewise. * config/tc-tic30.c: Likewise. * config/tc-tic30.h: Likewise. * config/tc-tic4x.c: Likewise. * config/tc-tic4x.h: Likewise. * config/tc-tic54x.c: Likewise. * config/tc-tic54x.h: Likewise. * config/tc-v850.h: Likewise. * config/tc-vax.c: Likewise. * config/tc-vax.h: Likewise. * config/tc-xstormy16.h: Likewise. * config/tc-xtensa.h: Likewise. * config/tc-z8k.c: Likewise. * config/tc-z8k.h: Likewise. * config/vms-a-conf.h * doc/Makefile.am: Likewise. * doc/all.texi: Likewise. * doc/as.texinfo: Likewise. * doc/Makefile.in: Regenerate. * Makefile.in: Regenerate. * configure: Regenerate. * config.in: Regenerate. * po/POTFILES.in: Regenerate.
2005-08-11 01:25:29 +00:00
On the H8/300, Renesas / SuperH SH,
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and AMD 29K architectures, the letter must be
one of the letters @samp{DFPRSX} (in upper or lower case).
On the ARC, the letter must be one of the letters @samp{DFRS}
(in upper or lower case).
On the Intel 960 architecture, the letter must be
one of the letters @samp{DFT} (in upper or lower case).
On the HPPA architecture, the letter must be @samp{E} (upper case only).
@end ifset
@ifclear GENERIC
@ifset ARC
One of the letters @samp{DFRS} (in upper or lower case).
@end ifset
@ifset H8
One of the letters @samp{DFPRSX} (in upper or lower case).
@end ifset
@ifset HPPA
The letter @samp{E} (upper case only).
@end ifset
@ifset I960
One of the letters @samp{DFT} (in upper or lower case).
@end ifset
@end ifclear
@item
An optional sign: either @samp{+} or @samp{-}.
@item
An optional @dfn{integer part}: zero or more decimal digits.
@item
An optional @dfn{fractional part}: @samp{.} followed by zero
or more decimal digits.
@item
An optional exponent, consisting of:
@itemize @bullet
@item
An @samp{E} or @samp{e}.
@c I can't find a config where "EXP_CHARS" is other than 'eE', but in
@c principle this can perfectly well be different on different targets.
@item
Optional sign: either @samp{+} or @samp{-}.
@item
One or more decimal digits.
@end itemize
@end itemize
At least one of the integer part or the fractional part must be
present. The floating point number has the usual base-10 value.
@command{@value{AS}} does all processing using integers. Flonums are computed
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independently of any floating point hardware in the computer running
@command{@value{AS}}.
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@ifclear GENERIC
@ifset I960
@c Bit fields are written as a general facility but are also controlled
@c by a conditional-compilation flag---which is as of now (21mar91)
@c turned on only by the i960 config of GAS.
@node Bit Fields
@subsubsection Bit Fields
@cindex bit fields
@cindex constants, bit field
You can also define numeric constants as @dfn{bit fields}.
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Specify two numbers separated by a colon---
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@example
@var{mask}:@var{value}
@end example
@noindent
@command{@value{AS}} applies a bitwise @sc{and} between @var{mask} and
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@var{value}.
The resulting number is then packed
@ifset GENERIC
@c this conditional paren in case bit fields turned on elsewhere than 960
(in host-dependent byte order)
@end ifset
into a field whose width depends on which assembler directive has the
bit-field as its argument. Overflow (a result from the bitwise and
requiring more binary digits to represent) is not an error; instead,
more constants are generated, of the specified width, beginning with the
least significant digits.@refill
The directives @code{.byte}, @code{.hword}, @code{.int}, @code{.long},
@code{.short}, and @code{.word} accept bit-field arguments.
@end ifset
@end ifclear
@node Sections
@chapter Sections and Relocation
@cindex sections
@cindex relocation
@menu
* Secs Background:: Background
* Ld Sections:: Linker Sections
* As Sections:: Assembler Internal Sections
* Sub-Sections:: Sub-Sections
* bss:: bss Section
@end menu
@node Secs Background
@section Background
Roughly, a section is a range of addresses, with no gaps; all data
``in'' those addresses is treated the same for some particular purpose.
For example there may be a ``read only'' section.
@cindex linker, and assembler
@cindex assembler, and linker
The linker @code{@value{LD}} reads many object files (partial programs) and
combines their contents to form a runnable program. When @command{@value{AS}}
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emits an object file, the partial program is assumed to start at address 0.
@code{@value{LD}} assigns the final addresses for the partial program, so that
different partial programs do not overlap. This is actually an
oversimplification, but it suffices to explain how @command{@value{AS}} uses
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sections.
@code{@value{LD}} moves blocks of bytes of your program to their run-time
addresses. These blocks slide to their run-time addresses as rigid
units; their length does not change and neither does the order of bytes
within them. Such a rigid unit is called a @emph{section}. Assigning
run-time addresses to sections is called @dfn{relocation}. It includes
the task of adjusting mentions of object-file addresses so they refer to
the proper run-time addresses.
@ifset H8
* README-vms: Delete. * config-gas.com: Delete. * makefile.vms: Delete. * vmsconf.sh: Delete. * config/atof-tahoe.c: Delete. * config/m88k-opcode.h: Delete. * config/obj-bout.c: Delete. * config/obj-bout.h: Delete. * config/obj-hp300.c: Delete. * config/obj-hp300.h: Delete. * config/tc-a29k.c: Delete. * config/tc-a29k.h: Delete. * config/tc-h8500.c: Delete. * config/tc-h8500.h: Delete. * config/tc-m88k.c: Delete. * config/tc-m88k.h: Delete. * config/tc-tahoe.c: Delete. * config/tc-tahoe.h: Delete. * config/tc-tic80.c: Delete. * config/tc-tic80.h: Delete. * config/tc-w65.c: Delete. * config/tc-w65.h: Delete. * config/te-aux.h: Delete. * config/te-delt88.h: Delete. * config/te-delta.h: Delete. * config/te-dpx2.h: Delete. * config/te-hp300.h: Delete. * config/te-ic960.h: Delete. * config/vms-a-conf.h: Delete. * doc/c-a29k.texi: Delete. * doc/c-h8500.texi: Delete. * doc/c-m88k.texi: Delete. * README: Remove obsolete examples, and list of supported targets. * Makefile.am: Remove a29k, h8500, m88k, tahoe, tic80, w65, bout and hp300 support. (DEP_FLAGS): Don't define BFD_ASSEMBLER. * configure.in: Remove --enable-bfd-assembler, need_bfd, primary_bfd_gas. * configure.tgt: Remove a29k, h8300-coff, h8500-*, i960 non-elf, m68k non bfd, m88k, or32-coff, tic80-*, vax non-bfd, w65k-*, *-nindy. * as.c: Remove all non-BFD_ASSEMBLER code, support for above targets. * as.h: Likewise. * dw2gencfi.c: Likewise. * dwarf2dbg.c: Likewise. * ehopt.c: Likewise. * input-file.c: Likewise. * listing.c: Likewise. * literal.c: Likewise. * messages.c: Likewise. * obj.h: Likewise. * output-file.c: Likewise. * read.c: Likewise. * stabs.c: Likewise. * struc-symbol.h: Likewise. * subsegs.c: Likewise. * subsegs.h: Likewise. * symbols.c: Likewise. * symbols.h: Likewise. * tc.h: Likewise. * write.c: Likewise. * write.h: Likewise. * config/aout_gnu.h: Likewise. * config/obj-aout.c: Likewise. * config/obj-aout.h: Likewise. * config/obj-coff.c: Likewise. * config/obj-coff.h: Likewise. * config/obj-evax.h: Likewise. * config/obj-ieee.h: Likewise. * config/tc-arm.c: Likewise. * config/tc-arm.h: Likewise. * config/tc-avr.c: Likewise. * config/tc-avr.h: Likewise. * config/tc-crx.h: Likewise. * config/tc-d10v.h: Likewise. * config/tc-d30v.h: Likewise. * config/tc-dlx.h: Likewise. * config/tc-fr30.h: Likewise. * config/tc-frv.h: Likewise. * config/tc-h8300.c: Likewise. * config/tc-h8300.h: Likewise. * config/tc-hppa.h: Likewise. * config/tc-i370.h: Likewise. * config/tc-i386.c: Likewise. * config/tc-i386.h: Likewise. * config/tc-i860.h: Likewise. * config/tc-i960.c: Likewise. * config/tc-i960.h: Likewise. * config/tc-ip2k.h: Likewise. * config/tc-iq2000.h: Likewise. * config/tc-m32c.h: Likewise. * config/tc-m32r.h: Likewise. * config/tc-m68hc11.h: Likewise. * config/tc-m68k.c: Likewise. * config/tc-m68k.h: Likewise. * config/tc-maxq.c: Likewise. * config/tc-maxq.h: Likewise. * config/tc-mcore.c: Likewise. * config/tc-mcore.h: Likewise. * config/tc-mn10200.h: Likewise. * config/tc-mn10300.c: Likewise. * config/tc-mn10300.h: Likewise. * config/tc-ms1.h: Likewise. * config/tc-msp430.c: Likewise. * config/tc-msp430.h: Likewise. * config/tc-ns32k.c: Likewise. * config/tc-ns32k.h: Likewise. * config/tc-openrisc.h: Likewise. * config/tc-or32.c: Likewise. * config/tc-or32.h: Likewise. * config/tc-ppc.c: Likewise. * config/tc-ppc.h: Likewise. * config/tc-s390.h: Likewise. * config/tc-sh.c: Likewise. * config/tc-sh.h: Likewise. * config/tc-sparc.c: Likewise. * config/tc-tic30.c: Likewise. * config/tc-tic30.h: Likewise. * config/tc-tic4x.c: Likewise. * config/tc-tic4x.h: Likewise. * config/tc-tic54x.c: Likewise. * config/tc-tic54x.h: Likewise. * config/tc-v850.h: Likewise. * config/tc-vax.c: Likewise. * config/tc-vax.h: Likewise. * config/tc-xstormy16.h: Likewise. * config/tc-xtensa.h: Likewise. * config/tc-z8k.c: Likewise. * config/tc-z8k.h: Likewise. * config/vms-a-conf.h * doc/Makefile.am: Likewise. * doc/all.texi: Likewise. * doc/as.texinfo: Likewise. * doc/Makefile.in: Regenerate. * Makefile.in: Regenerate. * configure: Regenerate. * config.in: Regenerate. * po/POTFILES.in: Regenerate.
2005-08-11 01:25:29 +00:00
For the H8/300, and for the Renesas / SuperH SH,
@command{@value{AS}} pads sections if needed to
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ensure they end on a word (sixteen bit) boundary.
@end ifset
@cindex standard assembler sections
An object file written by @command{@value{AS}} has at least three sections, any
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of which may be empty. These are named @dfn{text}, @dfn{data} and
@dfn{bss} sections.
@ifset COFF-ELF
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@ifset GENERIC
When it generates COFF or ELF output,
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@end ifset
@command{@value{AS}} can also generate whatever other named sections you specify
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using the @samp{.section} directive (@pxref{Section,,@code{.section}}).
If you do not use any directives that place output in the @samp{.text}
or @samp{.data} sections, these sections still exist, but are empty.
@end ifset
@ifset HPPA
@ifset GENERIC
When @command{@value{AS}} generates SOM or ELF output for the HPPA,
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@end ifset
@command{@value{AS}} can also generate whatever other named sections you
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specify using the @samp{.space} and @samp{.subspace} directives. See
@cite{HP9000 Series 800 Assembly Language Reference Manual}
(HP 92432-90001) for details on the @samp{.space} and @samp{.subspace}
assembler directives.
@ifset SOM
Additionally, @command{@value{AS}} uses different names for the standard
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text, data, and bss sections when generating SOM output. Program text
is placed into the @samp{$CODE$} section, data into @samp{$DATA$}, and
BSS into @samp{$BSS$}.
@end ifset
@end ifset
Within the object file, the text section starts at address @code{0}, the
data section follows, and the bss section follows the data section.
@ifset HPPA
When generating either SOM or ELF output files on the HPPA, the text
section starts at address @code{0}, the data section at address
@code{0x4000000}, and the bss section follows the data section.
@end ifset
To let @code{@value{LD}} know which data changes when the sections are
relocated, and how to change that data, @command{@value{AS}} also writes to the
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object file details of the relocation needed. To perform relocation
@code{@value{LD}} must know, each time an address in the object
file is mentioned:
@itemize @bullet
@item
Where in the object file is the beginning of this reference to
an address?
@item
How long (in bytes) is this reference?
@item
Which section does the address refer to? What is the numeric value of
@display
(@var{address}) @minus{} (@var{start-address of section})?
@end display
@item
Is the reference to an address ``Program-Counter relative''?
@end itemize
@cindex addresses, format of
@cindex section-relative addressing
In fact, every address @command{@value{AS}} ever uses is expressed as
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@display
(@var{section}) + (@var{offset into section})
@end display
@noindent
Further, most expressions @command{@value{AS}} computes have this section-relative
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nature.
@ifset SOM
(For some object formats, such as SOM for the HPPA, some expressions are
symbol-relative instead.)
@end ifset
In this manual we use the notation @{@var{secname} @var{N}@} to mean ``offset
@var{N} into section @var{secname}.''
Apart from text, data and bss sections you need to know about the
@dfn{absolute} section. When @code{@value{LD}} mixes partial programs,
addresses in the absolute section remain unchanged. For example, address
@code{@{absolute 0@}} is ``relocated'' to run-time address 0 by
@code{@value{LD}}. Although the linker never arranges two partial programs'
data sections with overlapping addresses after linking, @emph{by definition}
their absolute sections must overlap. Address @code{@{absolute@ 239@}} in one
part of a program is always the same address when the program is running as
address @code{@{absolute@ 239@}} in any other part of the program.
The idea of sections is extended to the @dfn{undefined} section. Any
address whose section is unknown at assembly time is by definition
rendered @{undefined @var{U}@}---where @var{U} is filled in later.
Since numbers are always defined, the only way to generate an undefined
address is to mention an undefined symbol. A reference to a named
common block would be such a symbol: its value is unknown at assembly
time so it has section @emph{undefined}.
By analogy the word @emph{section} is used to describe groups of sections in
the linked program. @code{@value{LD}} puts all partial programs' text
sections in contiguous addresses in the linked program. It is
customary to refer to the @emph{text section} of a program, meaning all
the addresses of all partial programs' text sections. Likewise for
data and bss sections.
Some sections are manipulated by @code{@value{LD}}; others are invented for
use of @command{@value{AS}} and have no meaning except during assembly.
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@node Ld Sections
@section Linker Sections
@code{@value{LD}} deals with just four kinds of sections, summarized below.
@table @strong
@ifset COFF-ELF
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@cindex named sections
@cindex sections, named
@item named sections
@end ifset
@ifset aout-bout
@cindex text section
@cindex data section
@itemx text section
@itemx data section
@end ifset
These sections hold your program. @command{@value{AS}} and @code{@value{LD}} treat them as
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separate but equal sections. Anything you can say of one section is
true of another.
@c @ifset aout-bout
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When the program is running, however, it is
customary for the text section to be unalterable. The
text section is often shared among processes: it contains
instructions, constants and the like. The data section of a running
program is usually alterable: for example, C variables would be stored
in the data section.
@c @end ifset
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@cindex bss section
@item bss section
This section contains zeroed bytes when your program begins running. It
is used to hold uninitialized variables or common storage. The length of
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each partial program's bss section is important, but because it starts
out containing zeroed bytes there is no need to store explicit zero
bytes in the object file. The bss section was invented to eliminate
those explicit zeros from object files.
@cindex absolute section
@item absolute section
Address 0 of this section is always ``relocated'' to runtime address 0.
This is useful if you want to refer to an address that @code{@value{LD}} must
not change when relocating. In this sense we speak of absolute
addresses being ``unrelocatable'': they do not change during relocation.
@cindex undefined section
@item undefined section
This ``section'' is a catch-all for address references to objects not in
the preceding sections.
@c FIXME: ref to some other doc on obj-file formats could go here.
@end table
@cindex relocation example
An idealized example of three relocatable sections follows.
@ifset COFF-ELF
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The example uses the traditional section names @samp{.text} and @samp{.data}.
@end ifset
Memory addresses are on the horizontal axis.
@c TEXI2ROFF-KILL
@ifnottex
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@c END TEXI2ROFF-KILL
@smallexample
+-----+----+--+
partial program # 1: |ttttt|dddd|00|
+-----+----+--+
text data bss
seg. seg. seg.
+---+---+---+
partial program # 2: |TTT|DDD|000|
+---+---+---+
+--+---+-----+--+----+---+-----+~~
linked program: | |TTT|ttttt| |dddd|DDD|00000|
+--+---+-----+--+----+---+-----+~~
addresses: 0 @dots{}
@end smallexample
@c TEXI2ROFF-KILL
@end ifnottex
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@need 5000
@tex
\bigskip
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\line{\it Partial program \#1: \hfil}
\line{\ibox{2.5cm}{\tt text}\ibox{2cm}{\tt data}\ibox{1cm}{\tt bss}\hfil}
\line{\boxit{2.5cm}{\tt ttttt}\boxit{2cm}{\tt dddd}\boxit{1cm}{\tt 00}\hfil}
\line{\it Partial program \#2: \hfil}
\line{\ibox{1cm}{\tt text}\ibox{1.5cm}{\tt data}\ibox{1cm}{\tt bss}\hfil}
\line{\boxit{1cm}{\tt TTT}\boxit{1.5cm}{\tt DDDD}\boxit{1cm}{\tt 000}\hfil}
\line{\it linked program: \hfil}
\line{\ibox{.5cm}{}\ibox{1cm}{\tt text}\ibox{2.5cm}{}\ibox{.75cm}{}\ibox{2cm}{\tt data}\ibox{1.5cm}{}\ibox{2cm}{\tt bss}\hfil}
\line{\boxit{.5cm}{}\boxit{1cm}{\tt TTT}\boxit{2.5cm}{\tt
ttttt}\boxit{.75cm}{}\boxit{2cm}{\tt dddd}\boxit{1.5cm}{\tt
DDDD}\boxit{2cm}{\tt 00000}\ \dots\hfil}
\line{\it addresses: \hfil}
\line{0\dots\hfil}
@end tex
@c END TEXI2ROFF-KILL
@node As Sections
@section Assembler Internal Sections
@cindex internal assembler sections
@cindex sections in messages, internal
These sections are meant only for the internal use of @command{@value{AS}}. They
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have no meaning at run-time. You do not really need to know about these
sections for most purposes; but they can be mentioned in @command{@value{AS}}
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warning messages, so it might be helpful to have an idea of their
meanings to @command{@value{AS}}. These sections are used to permit the
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value of every expression in your assembly language program to be a
section-relative address.
@table @b
@cindex assembler internal logic error
@item ASSEMBLER-INTERNAL-LOGIC-ERROR!
An internal assembler logic error has been found. This means there is a
bug in the assembler.
@cindex expr (internal section)
@item expr section
The assembler stores complex expression internally as combinations of
symbols. When it needs to represent an expression as a symbol, it puts
it in the expr section.
@c FIXME item debug
@c FIXME item transfer[t] vector preload
@c FIXME item transfer[t] vector postload
@c FIXME item register
@end table
@node Sub-Sections
@section Sub-Sections
@cindex numbered subsections
@cindex grouping data
@ifset aout-bout
Assembled bytes
@ifset COFF-ELF
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conventionally
@end ifset
fall into two sections: text and data.
@end ifset
You may have separate groups of
@ifset GENERIC
data in named sections
@end ifset
@ifclear GENERIC
@ifclear aout-bout
data in named sections
@end ifclear
@ifset aout-bout
text or data
@end ifset
@end ifclear
that you want to end up near to each other in the object file, even though they
are not contiguous in the assembler source. @command{@value{AS}} allows you to
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use @dfn{subsections} for this purpose. Within each section, there can be
numbered subsections with values from 0 to 8192. Objects assembled into the
same subsection go into the object file together with other objects in the same
subsection. For example, a compiler might want to store constants in the text
section, but might not want to have them interspersed with the program being
assembled. In this case, the compiler could issue a @samp{.text 0} before each
section of code being output, and a @samp{.text 1} before each group of
constants being output.
Subsections are optional. If you do not use subsections, everything
goes in subsection number zero.
@ifset GENERIC
Each subsection is zero-padded up to a multiple of four bytes.
(Subsections may be padded a different amount on different flavors
of @command{@value{AS}}.)
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@end ifset
@ifclear GENERIC
@ifset H8
* README-vms: Delete. * config-gas.com: Delete. * makefile.vms: Delete. * vmsconf.sh: Delete. * config/atof-tahoe.c: Delete. * config/m88k-opcode.h: Delete. * config/obj-bout.c: Delete. * config/obj-bout.h: Delete. * config/obj-hp300.c: Delete. * config/obj-hp300.h: Delete. * config/tc-a29k.c: Delete. * config/tc-a29k.h: Delete. * config/tc-h8500.c: Delete. * config/tc-h8500.h: Delete. * config/tc-m88k.c: Delete. * config/tc-m88k.h: Delete. * config/tc-tahoe.c: Delete. * config/tc-tahoe.h: Delete. * config/tc-tic80.c: Delete. * config/tc-tic80.h: Delete. * config/tc-w65.c: Delete. * config/tc-w65.h: Delete. * config/te-aux.h: Delete. * config/te-delt88.h: Delete. * config/te-delta.h: Delete. * config/te-dpx2.h: Delete. * config/te-hp300.h: Delete. * config/te-ic960.h: Delete. * config/vms-a-conf.h: Delete. * doc/c-a29k.texi: Delete. * doc/c-h8500.texi: Delete. * doc/c-m88k.texi: Delete. * README: Remove obsolete examples, and list of supported targets. * Makefile.am: Remove a29k, h8500, m88k, tahoe, tic80, w65, bout and hp300 support. (DEP_FLAGS): Don't define BFD_ASSEMBLER. * configure.in: Remove --enable-bfd-assembler, need_bfd, primary_bfd_gas. * configure.tgt: Remove a29k, h8300-coff, h8500-*, i960 non-elf, m68k non bfd, m88k, or32-coff, tic80-*, vax non-bfd, w65k-*, *-nindy. * as.c: Remove all non-BFD_ASSEMBLER code, support for above targets. * as.h: Likewise. * dw2gencfi.c: Likewise. * dwarf2dbg.c: Likewise. * ehopt.c: Likewise. * input-file.c: Likewise. * listing.c: Likewise. * literal.c: Likewise. * messages.c: Likewise. * obj.h: Likewise. * output-file.c: Likewise. * read.c: Likewise. * stabs.c: Likewise. * struc-symbol.h: Likewise. * subsegs.c: Likewise. * subsegs.h: Likewise. * symbols.c: Likewise. * symbols.h: Likewise. * tc.h: Likewise. * write.c: Likewise. * write.h: Likewise. * config/aout_gnu.h: Likewise. * config/obj-aout.c: Likewise. * config/obj-aout.h: Likewise. * config/obj-coff.c: Likewise. * config/obj-coff.h: Likewise. * config/obj-evax.h: Likewise. * config/obj-ieee.h: Likewise. * config/tc-arm.c: Likewise. * config/tc-arm.h: Likewise. * config/tc-avr.c: Likewise. * config/tc-avr.h: Likewise. * config/tc-crx.h: Likewise. * config/tc-d10v.h: Likewise. * config/tc-d30v.h: Likewise. * config/tc-dlx.h: Likewise. * config/tc-fr30.h: Likewise. * config/tc-frv.h: Likewise. * config/tc-h8300.c: Likewise. * config/tc-h8300.h: Likewise. * config/tc-hppa.h: Likewise. * config/tc-i370.h: Likewise. * config/tc-i386.c: Likewise. * config/tc-i386.h: Likewise. * config/tc-i860.h: Likewise. * config/tc-i960.c: Likewise. * config/tc-i960.h: Likewise. * config/tc-ip2k.h: Likewise. * config/tc-iq2000.h: Likewise. * config/tc-m32c.h: Likewise. * config/tc-m32r.h: Likewise. * config/tc-m68hc11.h: Likewise. * config/tc-m68k.c: Likewise. * config/tc-m68k.h: Likewise. * config/tc-maxq.c: Likewise. * config/tc-maxq.h: Likewise. * config/tc-mcore.c: Likewise. * config/tc-mcore.h: Likewise. * config/tc-mn10200.h: Likewise. * config/tc-mn10300.c: Likewise. * config/tc-mn10300.h: Likewise. * config/tc-ms1.h: Likewise. * config/tc-msp430.c: Likewise. * config/tc-msp430.h: Likewise. * config/tc-ns32k.c: Likewise. * config/tc-ns32k.h: Likewise. * config/tc-openrisc.h: Likewise. * config/tc-or32.c: Likewise. * config/tc-or32.h: Likewise. * config/tc-ppc.c: Likewise. * config/tc-ppc.h: Likewise. * config/tc-s390.h: Likewise. * config/tc-sh.c: Likewise. * config/tc-sh.h: Likewise. * config/tc-sparc.c: Likewise. * config/tc-tic30.c: Likewise. * config/tc-tic30.h: Likewise. * config/tc-tic4x.c: Likewise. * config/tc-tic4x.h: Likewise. * config/tc-tic54x.c: Likewise. * config/tc-tic54x.h: Likewise. * config/tc-v850.h: Likewise. * config/tc-vax.c: Likewise. * config/tc-vax.h: Likewise. * config/tc-xstormy16.h: Likewise. * config/tc-xtensa.h: Likewise. * config/tc-z8k.c: Likewise. * config/tc-z8k.h: Likewise. * config/vms-a-conf.h * doc/Makefile.am: Likewise. * doc/all.texi: Likewise. * doc/as.texinfo: Likewise. * doc/Makefile.in: Regenerate. * Makefile.in: Regenerate. * configure: Regenerate. * config.in: Regenerate. * po/POTFILES.in: Regenerate.
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On the H8/300 platform, each subsection is zero-padded to a word
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boundary (two bytes).
The same is true on the Renesas SH.
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@end ifset
@ifset I960
@c FIXME section padding (alignment)?
@c Rich Pixley says padding here depends on target obj code format; that
@c doesn't seem particularly useful to say without further elaboration,
@c so for now I say nothing about it. If this is a generic BFD issue,
@c these paragraphs might need to vanish from this manual, and be
@c discussed in BFD chapter of binutils (or some such).
@end ifset
@end ifclear
Subsections appear in your object file in numeric order, lowest numbered
to highest. (All this to be compatible with other people's assemblers.)
The object file contains no representation of subsections; @code{@value{LD}} and
other programs that manipulate object files see no trace of them.
They just see all your text subsections as a text section, and all your
data subsections as a data section.
To specify which subsection you want subsequent statements assembled
into, use a numeric argument to specify it, in a @samp{.text
@var{expression}} or a @samp{.data @var{expression}} statement.
@ifset COFF
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@ifset GENERIC
When generating COFF output, you
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@end ifset
@ifclear GENERIC
You
@end ifclear
can also use an extra subsection
argument with arbitrary named sections: @samp{.section @var{name},
@var{expression}}.
@end ifset
@ifset ELF
@ifset GENERIC
When generating ELF output, you
@end ifset
@ifclear GENERIC
You
@end ifclear
can also use the @code{.subsection} directive (@pxref{SubSection})
to specify a subsection: @samp{.subsection @var{expression}}.
@end ifset
@var{Expression} should be an absolute expression
(@pxref{Expressions}). If you just say @samp{.text} then @samp{.text 0}
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is assumed. Likewise @samp{.data} means @samp{.data 0}. Assembly
begins in @code{text 0}. For instance:
@smallexample
.text 0 # The default subsection is text 0 anyway.
.ascii "This lives in the first text subsection. *"
.text 1
.ascii "But this lives in the second text subsection."
.data 0
.ascii "This lives in the data section,"
.ascii "in the first data subsection."
.text 0
.ascii "This lives in the first text section,"
.ascii "immediately following the asterisk (*)."
@end smallexample
Each section has a @dfn{location counter} incremented by one for every byte
assembled into that section. Because subsections are merely a convenience
restricted to @command{@value{AS}} there is no concept of a subsection location
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counter. There is no way to directly manipulate a location counter---but the
@code{.align} directive changes it, and any label definition captures its
current value. The location counter of the section where statements are being
assembled is said to be the @dfn{active} location counter.
@node bss
@section bss Section
@cindex bss section
@cindex common variable storage
The bss section is used for local common variable storage.
You may allocate address space in the bss section, but you may
not dictate data to load into it before your program executes. When
your program starts running, all the contents of the bss
section are zeroed bytes.
The @code{.lcomm} pseudo-op defines a symbol in the bss section; see
@ref{Lcomm,,@code{.lcomm}}.
The @code{.comm} pseudo-op may be used to declare a common symbol, which is
another form of uninitialized symbol; see @ref{Comm,,@code{.comm}}.
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@ifset GENERIC
When assembling for a target which supports multiple sections, such as ELF or
COFF, you may switch into the @code{.bss} section and define symbols as usual;
see @ref{Section,,@code{.section}}. You may only assemble zero values into the
section. Typically the section will only contain symbol definitions and
@code{.skip} directives (@pxref{Skip,,@code{.skip}}).
@end ifset
@node Symbols
@chapter Symbols
@cindex symbols
Symbols are a central concept: the programmer uses symbols to name
things, the linker uses symbols to link, and the debugger uses symbols
to debug.
@quotation
@cindex debuggers, and symbol order
@emph{Warning:} @command{@value{AS}} does not place symbols in the object file in
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the same order they were declared. This may break some debuggers.
@end quotation
@menu
* Labels:: Labels
* Setting Symbols:: Giving Symbols Other Values
* Symbol Names:: Symbol Names
* Dot:: The Special Dot Symbol
* Symbol Attributes:: Symbol Attributes
@end menu
@node Labels
@section Labels
@cindex labels
A @dfn{label} is written as a symbol immediately followed by a colon
@samp{:}. The symbol then represents the current value of the
active location counter, and is, for example, a suitable instruction
operand. You are warned if you use the same symbol to represent two
different locations: the first definition overrides any other
definitions.
@ifset HPPA
On the HPPA, the usual form for a label need not be immediately followed by a
colon, but instead must start in column zero. Only one label may be defined on
a single line. To work around this, the HPPA version of @command{@value{AS}} also
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provides a special directive @code{.label} for defining labels more flexibly.
@end ifset
@node Setting Symbols
@section Giving Symbols Other Values
@cindex assigning values to symbols
@cindex symbol values, assigning
A symbol can be given an arbitrary value by writing a symbol, followed
by an equals sign @samp{=}, followed by an expression
(@pxref{Expressions}). This is equivalent to using the @code{.set}
directive. @xref{Set,,@code{.set}}. In the same way, using a double
equals sign @samp{=}@samp{=} here represents an equivalent of the
@code{.eqv} directive. @xref{Eqv,,@code{.eqv}}.
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@ifset Blackfin
Blackfin does not support symbol assignment with @samp{=}.
@end ifset
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@node Symbol Names
@section Symbol Names
@cindex symbol names
@cindex names, symbol
@ifclear SPECIAL-SYMS
Symbol names begin with a letter or with one of @samp{._}. On most
machines, you can also use @code{$} in symbol names; exceptions are
noted in @ref{Machine Dependencies}. That character may be followed by any
string of digits, letters, dollar signs (unless otherwise noted for a
particular target machine), and underscores.
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@end ifclear
@ifset SPECIAL-SYMS
@ifset H8
Symbol names begin with a letter or with one of @samp{._}. On the
* README-vms: Delete. * config-gas.com: Delete. * makefile.vms: Delete. * vmsconf.sh: Delete. * config/atof-tahoe.c: Delete. * config/m88k-opcode.h: Delete. * config/obj-bout.c: Delete. * config/obj-bout.h: Delete. * config/obj-hp300.c: Delete. * config/obj-hp300.h: Delete. * config/tc-a29k.c: Delete. * config/tc-a29k.h: Delete. * config/tc-h8500.c: Delete. * config/tc-h8500.h: Delete. * config/tc-m88k.c: Delete. * config/tc-m88k.h: Delete. * config/tc-tahoe.c: Delete. * config/tc-tahoe.h: Delete. * config/tc-tic80.c: Delete. * config/tc-tic80.h: Delete. * config/tc-w65.c: Delete. * config/tc-w65.h: Delete. * config/te-aux.h: Delete. * config/te-delt88.h: Delete. * config/te-delta.h: Delete. * config/te-dpx2.h: Delete. * config/te-hp300.h: Delete. * config/te-ic960.h: Delete. * config/vms-a-conf.h: Delete. * doc/c-a29k.texi: Delete. * doc/c-h8500.texi: Delete. * doc/c-m88k.texi: Delete. * README: Remove obsolete examples, and list of supported targets. * Makefile.am: Remove a29k, h8500, m88k, tahoe, tic80, w65, bout and hp300 support. (DEP_FLAGS): Don't define BFD_ASSEMBLER. * configure.in: Remove --enable-bfd-assembler, need_bfd, primary_bfd_gas. * configure.tgt: Remove a29k, h8300-coff, h8500-*, i960 non-elf, m68k non bfd, m88k, or32-coff, tic80-*, vax non-bfd, w65k-*, *-nindy. * as.c: Remove all non-BFD_ASSEMBLER code, support for above targets. * as.h: Likewise. * dw2gencfi.c: Likewise. * dwarf2dbg.c: Likewise. * ehopt.c: Likewise. * input-file.c: Likewise. * listing.c: Likewise. * literal.c: Likewise. * messages.c: Likewise. * obj.h: Likewise. * output-file.c: Likewise. * read.c: Likewise. * stabs.c: Likewise. * struc-symbol.h: Likewise. * subsegs.c: Likewise. * subsegs.h: Likewise. * symbols.c: Likewise. * symbols.h: Likewise. * tc.h: Likewise. * write.c: Likewise. * write.h: Likewise. * config/aout_gnu.h: Likewise. * config/obj-aout.c: Likewise. * config/obj-aout.h: Likewise. * config/obj-coff.c: Likewise. * config/obj-coff.h: Likewise. * config/obj-evax.h: Likewise. * config/obj-ieee.h: Likewise. * config/tc-arm.c: Likewise. * config/tc-arm.h: Likewise. * config/tc-avr.c: Likewise. * config/tc-avr.h: Likewise. * config/tc-crx.h: Likewise. * config/tc-d10v.h: Likewise. * config/tc-d30v.h: Likewise. * config/tc-dlx.h: Likewise. * config/tc-fr30.h: Likewise. * config/tc-frv.h: Likewise. * config/tc-h8300.c: Likewise. * config/tc-h8300.h: Likewise. * config/tc-hppa.h: Likewise. * config/tc-i370.h: Likewise. * config/tc-i386.c: Likewise. * config/tc-i386.h: Likewise. * config/tc-i860.h: Likewise. * config/tc-i960.c: Likewise. * config/tc-i960.h: Likewise. * config/tc-ip2k.h: Likewise. * config/tc-iq2000.h: Likewise. * config/tc-m32c.h: Likewise. * config/tc-m32r.h: Likewise. * config/tc-m68hc11.h: Likewise. * config/tc-m68k.c: Likewise. * config/tc-m68k.h: Likewise. * config/tc-maxq.c: Likewise. * config/tc-maxq.h: Likewise. * config/tc-mcore.c: Likewise. * config/tc-mcore.h: Likewise. * config/tc-mn10200.h: Likewise. * config/tc-mn10300.c: Likewise. * config/tc-mn10300.h: Likewise. * config/tc-ms1.h: Likewise. * config/tc-msp430.c: Likewise. * config/tc-msp430.h: Likewise. * config/tc-ns32k.c: Likewise. * config/tc-ns32k.h: Likewise. * config/tc-openrisc.h: Likewise. * config/tc-or32.c: Likewise. * config/tc-or32.h: Likewise. * config/tc-ppc.c: Likewise. * config/tc-ppc.h: Likewise. * config/tc-s390.h: Likewise. * config/tc-sh.c: Likewise. * config/tc-sh.h: Likewise. * config/tc-sparc.c: Likewise. * config/tc-tic30.c: Likewise. * config/tc-tic30.h: Likewise. * config/tc-tic4x.c: Likewise. * config/tc-tic4x.h: Likewise. * config/tc-tic54x.c: Likewise. * config/tc-tic54x.h: Likewise. * config/tc-v850.h: Likewise. * config/tc-vax.c: Likewise. * config/tc-vax.h: Likewise. * config/tc-xstormy16.h: Likewise. * config/tc-xtensa.h: Likewise. * config/tc-z8k.c: Likewise. * config/tc-z8k.h: Likewise. * config/vms-a-conf.h * doc/Makefile.am: Likewise. * doc/all.texi: Likewise. * doc/as.texinfo: Likewise. * doc/Makefile.in: Regenerate. * Makefile.in: Regenerate. * configure: Regenerate. * config.in: Regenerate. * po/POTFILES.in: Regenerate.
2005-08-11 01:25:29 +00:00
Renesas SH you can also use @code{$} in symbol names. That
character may be followed by any string of digits, letters, dollar signs (save
on the H8/300), and underscores.
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@end ifset
@end ifset
Case of letters is significant: @code{foo} is a different symbol name
than @code{Foo}.
Multibyte characters are supported. To generate a symbol name containing
multibyte characters enclose it within double quotes and use escape codes. cf
@xref{Strings}. Generating a multibyte symbol name from a label is not
currently supported.
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Each symbol has exactly one name. Each name in an assembly language program
refers to exactly one symbol. You may use that symbol name any number of times
in a program.
@subheading Local Symbol Names
@cindex local symbol names
@cindex symbol names, local
A local symbol is any symbol beginning with certain local label prefixes.
By default, the local label prefix is @samp{.L} for ELF systems or
@samp{L} for traditional a.out systems, but each target may have its own
set of local label prefixes.
@ifset HPPA
On the HPPA local symbols begin with @samp{L$}.
@end ifset
Local symbols are defined and used within the assembler, but they are
normally not saved in object files. Thus, they are not visible when debugging.
You may use the @samp{-L} option (@pxref{L, ,Include Local Symbols:
@option{-L}}) to retain the local symbols in the object files.
@subheading Local Labels
@cindex local labels
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@cindex temporary symbol names
@cindex symbol names, temporary
Local labels help compilers and programmers use names temporarily.
They create symbols which are guaranteed to be unique over the entire scope of
the input source code and which can be referred to by a simple notation.
To define a local label, write a label of the form @samp{@b{N}:} (where @b{N}
represents any positive integer). To refer to the most recent previous
definition of that label write @samp{@b{N}b}, using the same number as when
you defined the label. To refer to the next definition of a local label, write
@samp{@b{N}f}---the @samp{b} stands for ``backwards'' and the @samp{f} stands
for ``forwards''.
There is no restriction on how you can use these labels, and you can reuse them
too. So that it is possible to repeatedly define the same local label (using
the same number @samp{@b{N}}), although you can only refer to the most recently
defined local label of that number (for a backwards reference) or the next
definition of a specific local label for a forward reference. It is also worth
noting that the first 10 local labels (@samp{@b{0:}}@dots{}@samp{@b{9:}}) are
implemented in a slightly more efficient manner than the others.
Here is an example:
@smallexample
1: branch 1f
2: branch 1b
1: branch 2f
2: branch 1b
@end smallexample
Which is the equivalent of:
@smallexample
label_1: branch label_3
label_2: branch label_1
label_3: branch label_4
label_4: branch label_3
@end smallexample
Local label names are only a notational device. They are immediately
transformed into more conventional symbol names before the assembler uses them.
The symbol names are stored in the symbol table, appear in error messages, and
are optionally emitted to the object file. The names are constructed using
these parts:
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@table @code
@item @emph{local label prefix}
All local symbols begin with the system-specific local label prefix.
Normally both @command{@value{AS}} and @code{@value{LD}} forget symbols
that start with the local label prefix. These labels are
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used for symbols you are never intended to see. If you use the
@samp{-L} option then @command{@value{AS}} retains these symbols in the
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object file. If you also instruct @code{@value{LD}} to retain these symbols,
you may use them in debugging.
@item @var{number}
This is the number that was used in the local label definition. So if the
label is written @samp{55:} then the number is @samp{55}.
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@item @kbd{C-B}
This unusual character is included so you do not accidentally invent a symbol
of the same name. The character has ASCII value of @samp{\002} (control-B).
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@item @emph{ordinal number}
This is a serial number to keep the labels distinct. The first definition of
@samp{0:} gets the number @samp{1}. The 15th definition of @samp{0:} gets the
number @samp{15}, and so on. Likewise the first definition of @samp{1:} gets
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the number @samp{1} and its 15th definition gets @samp{15} as well.
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@end table
So for example, the first @code{1:} may be named @code{.L1@kbd{C-B}1}, and
the 44th @code{3:} may be named @code{.L3@kbd{C-B}44}.
@subheading Dollar Local Labels
@cindex dollar local symbols
@code{@value{AS}} also supports an even more local form of local labels called
dollar labels. These labels go out of scope (i.e., they become undefined) as
soon as a non-local label is defined. Thus they remain valid for only a small
region of the input source code. Normal local labels, by contrast, remain in
scope for the entire file, or until they are redefined by another occurrence of
the same local label.
Dollar labels are defined in exactly the same way as ordinary local labels,
except that they have a dollar sign suffix to their numeric value, e.g.,
@samp{@b{55$:}}.
They can also be distinguished from ordinary local labels by their transformed
names which use ASCII character @samp{\001} (control-A) as the magic character
to distinguish them from ordinary labels. For example, the fifth definition of
@samp{6$} may be named @samp{.L6@kbd{C-A}5}.
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@node Dot
@section The Special Dot Symbol
@cindex dot (symbol)
@cindex @code{.} (symbol)
@cindex current address
@cindex location counter
The special symbol @samp{.} refers to the current address that
@command{@value{AS}} is assembling into. Thus, the expression @samp{melvin:
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.long .} defines @code{melvin} to contain its own address.
Assigning a value to @code{.} is treated the same as a @code{.org}
directive.
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@ifclear no-space-dir
Thus, the expression @samp{.=.+4} is the same as saying
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@samp{.space 4}.
@end ifclear
@node Symbol Attributes
@section Symbol Attributes
@cindex symbol attributes
@cindex attributes, symbol
Every symbol has, as well as its name, the attributes ``Value'' and
``Type''. Depending on output format, symbols can also have auxiliary
attributes.
@ifset INTERNALS
The detailed definitions are in @file{a.out.h}.
@end ifset
If you use a symbol without defining it, @command{@value{AS}} assumes zero for
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all these attributes, and probably won't warn you. This makes the
symbol an externally defined symbol, which is generally what you
would want.
@menu
* Symbol Value:: Value
* Symbol Type:: Type
@ifset aout-bout
@ifset GENERIC
* a.out Symbols:: Symbol Attributes: @code{a.out}
@end ifset
@ifclear GENERIC
@ifclear BOUT
* a.out Symbols:: Symbol Attributes: @code{a.out}
@end ifclear
@ifset BOUT
* a.out Symbols:: Symbol Attributes: @code{a.out}, @code{b.out}
@end ifset
@end ifclear
@end ifset
@ifset COFF
* COFF Symbols:: Symbol Attributes for COFF
@end ifset
@ifset SOM
* SOM Symbols:: Symbol Attributes for SOM
@end ifset
@end menu
@node Symbol Value
@subsection Value
@cindex value of a symbol
@cindex symbol value
The value of a symbol is (usually) 32 bits. For a symbol which labels a
location in the text, data, bss or absolute sections the value is the
number of addresses from the start of that section to the label.
Naturally for text, data and bss sections the value of a symbol changes
as @code{@value{LD}} changes section base addresses during linking. Absolute
symbols' values do not change during linking: that is why they are
called absolute.
The value of an undefined symbol is treated in a special way. If it is
0 then the symbol is not defined in this assembler source file, and
@code{@value{LD}} tries to determine its value from other files linked into the
same program. You make this kind of symbol simply by mentioning a symbol
name without defining it. A non-zero value represents a @code{.comm}
common declaration. The value is how much common storage to reserve, in
bytes (addresses). The symbol refers to the first address of the
allocated storage.
@node Symbol Type
@subsection Type
@cindex type of a symbol
@cindex symbol type
The type attribute of a symbol contains relocation (section)
information, any flag settings indicating that a symbol is external, and
(optionally), other information for linkers and debuggers. The exact
format depends on the object-code output format in use.
@ifset aout-bout
@ifclear GENERIC
@ifset BOUT
@c The following avoids a "widow" subsection title. @group would be
@c better if it were available outside examples.
@need 1000
@node a.out Symbols
@subsection Symbol Attributes: @code{a.out}, @code{b.out}
@cindex @code{b.out} symbol attributes
@cindex symbol attributes, @code{b.out}
These symbol attributes appear only when @command{@value{AS}} is configured for
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one of the Berkeley-descended object output formats---@code{a.out} or
@code{b.out}.
@end ifset
@ifclear BOUT
@node a.out Symbols
@subsection Symbol Attributes: @code{a.out}
@cindex @code{a.out} symbol attributes
@cindex symbol attributes, @code{a.out}
@end ifclear
@end ifclear
@ifset GENERIC
@node a.out Symbols
@subsection Symbol Attributes: @code{a.out}
@cindex @code{a.out} symbol attributes
@cindex symbol attributes, @code{a.out}
@end ifset
@menu
* Symbol Desc:: Descriptor
* Symbol Other:: Other
@end menu
@node Symbol Desc
@subsubsection Descriptor
@cindex descriptor, of @code{a.out} symbol
This is an arbitrary 16-bit value. You may establish a symbol's
descriptor value by using a @code{.desc} statement
(@pxref{Desc,,@code{.desc}}). A descriptor value means nothing to
@command{@value{AS}}.
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@node Symbol Other
@subsubsection Other
@cindex other attribute, of @code{a.out} symbol
This is an arbitrary 8-bit value. It means nothing to @command{@value{AS}}.
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@end ifset
@ifset COFF
@node COFF Symbols
@subsection Symbol Attributes for COFF
@cindex COFF symbol attributes
@cindex symbol attributes, COFF
The COFF format supports a multitude of auxiliary symbol attributes;
like the primary symbol attributes, they are set between @code{.def} and
@code{.endef} directives.
@subsubsection Primary Attributes
@cindex primary attributes, COFF symbols
The symbol name is set with @code{.def}; the value and type,
respectively, with @code{.val} and @code{.type}.
@subsubsection Auxiliary Attributes
@cindex auxiliary attributes, COFF symbols
The @command{@value{AS}} directives @code{.dim}, @code{.line}, @code{.scl},
@code{.size}, @code{.tag}, and @code{.weak} can generate auxiliary symbol
table information for COFF.
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@end ifset
@ifset SOM
@node SOM Symbols
@subsection Symbol Attributes for SOM
@cindex SOM symbol attributes
@cindex symbol attributes, SOM
The SOM format for the HPPA supports a multitude of symbol attributes set with
the @code{.EXPORT} and @code{.IMPORT} directives.
The attributes are described in @cite{HP9000 Series 800 Assembly
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Language Reference Manual} (HP 92432-90001) under the @code{IMPORT} and
@code{EXPORT} assembler directive documentation.
@end ifset
@node Expressions
@chapter Expressions
@cindex expressions
@cindex addresses
@cindex numeric values
An @dfn{expression} specifies an address or numeric value.
Whitespace may precede and/or follow an expression.
The result of an expression must be an absolute number, or else an offset into
a particular section. If an expression is not absolute, and there is not
enough information when @command{@value{AS}} sees the expression to know its
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section, a second pass over the source program might be necessary to interpret
the expression---but the second pass is currently not implemented.
@command{@value{AS}} aborts with an error message in this situation.
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@menu
* Empty Exprs:: Empty Expressions
* Integer Exprs:: Integer Expressions
@end menu
@node Empty Exprs
@section Empty Expressions
@cindex empty expressions
@cindex expressions, empty
An empty expression has no value: it is just whitespace or null.
Wherever an absolute expression is required, you may omit the
expression, and @command{@value{AS}} assumes a value of (absolute) 0. This
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is compatible with other assemblers.
@node Integer Exprs
@section Integer Expressions
@cindex integer expressions
@cindex expressions, integer
An @dfn{integer expression} is one or more @emph{arguments} delimited
by @emph{operators}.
@menu
* Arguments:: Arguments
* Operators:: Operators
* Prefix Ops:: Prefix Operators
* Infix Ops:: Infix Operators
@end menu
@node Arguments
@subsection Arguments
@cindex expression arguments
@cindex arguments in expressions
@cindex operands in expressions
@cindex arithmetic operands
@dfn{Arguments} are symbols, numbers or subexpressions. In other
contexts arguments are sometimes called ``arithmetic operands''. In
this manual, to avoid confusing them with the ``instruction operands'' of
the machine language, we use the term ``argument'' to refer to parts of
expressions only, reserving the word ``operand'' to refer only to machine
instruction operands.
Symbols are evaluated to yield @{@var{section} @var{NNN}@} where
@var{section} is one of text, data, bss, absolute,
or undefined. @var{NNN} is a signed, 2's complement 32 bit
integer.
Numbers are usually integers.
A number can be a flonum or bignum. In this case, you are warned
that only the low order 32 bits are used, and @command{@value{AS}} pretends
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these 32 bits are an integer. You may write integer-manipulating
instructions that act on exotic constants, compatible with other
assemblers.
@cindex subexpressions
Subexpressions are a left parenthesis @samp{(} followed by an integer
expression, followed by a right parenthesis @samp{)}; or a prefix
operator followed by an argument.
@node Operators
@subsection Operators
@cindex operators, in expressions
@cindex arithmetic functions
@cindex functions, in expressions
@dfn{Operators} are arithmetic functions, like @code{+} or @code{%}. Prefix
operators are followed by an argument. Infix operators appear
between their arguments. Operators may be preceded and/or followed by
whitespace.
@node Prefix Ops
@subsection Prefix Operator
@cindex prefix operators
@command{@value{AS}} has the following @dfn{prefix operators}. They each take
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one argument, which must be absolute.
@c the tex/end tex stuff surrounding this small table is meant to make
@c it align, on the printed page, with the similar table in the next
@c section (which is inside an enumerate).
@tex
\global\advance\leftskip by \itemindent
@end tex
@table @code
@item -
@dfn{Negation}. Two's complement negation.
@item ~
@dfn{Complementation}. Bitwise not.
@end table
@tex
\global\advance\leftskip by -\itemindent
@end tex
@node Infix Ops
@subsection Infix Operators
@cindex infix operators
@cindex operators, permitted arguments
@dfn{Infix operators} take two arguments, one on either side. Operators
have precedence, but operations with equal precedence are performed left
to right. Apart from @code{+} or @option{-}, both arguments must be
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absolute, and the result is absolute.
@enumerate
@cindex operator precedence
@cindex precedence of operators
@item
Highest Precedence
@table @code
@item *
@dfn{Multiplication}.
@item /
@dfn{Division}. Truncation is the same as the C operator @samp{/}
@item %
@dfn{Remainder}.
@item <<
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@dfn{Shift Left}. Same as the C operator @samp{<<}.
@item >>
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@dfn{Shift Right}. Same as the C operator @samp{>>}.
@end table
@item
Intermediate precedence
@table @code
@item |
@dfn{Bitwise Inclusive Or}.
@item &
@dfn{Bitwise And}.
@item ^
@dfn{Bitwise Exclusive Or}.
@item !
@dfn{Bitwise Or Not}.
@end table
@item
Low Precedence
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@table @code
@cindex addition, permitted arguments
@cindex plus, permitted arguments
@cindex arguments for addition
@item +
@dfn{Addition}. If either argument is absolute, the result has the section of
the other argument. You may not add together arguments from different
sections.
@cindex subtraction, permitted arguments
@cindex minus, permitted arguments
@cindex arguments for subtraction
@item -
@dfn{Subtraction}. If the right argument is absolute, the
result has the section of the left argument.
If both arguments are in the same section, the result is absolute.
You may not subtract arguments from different sections.
@c FIXME is there still something useful to say about undefined - undefined ?
@cindex comparison expressions
@cindex expressions, comparison
@item ==
@dfn{Is Equal To}
@item <>
@itemx !=
@dfn{Is Not Equal To}
@item <
@dfn{Is Less Than}
@item >
@dfn{Is Greater Than}
@item >=
@dfn{Is Greater Than Or Equal To}
@item <=
@dfn{Is Less Than Or Equal To}
The comparison operators can be used as infix operators. A true results has a
value of -1 whereas a false result has a value of 0. Note, these operators
perform signed comparisons.
@end table
@item Lowest Precedence
@table @code
@item &&
@dfn{Logical And}.
@item ||
@dfn{Logical Or}.
These two logical operations can be used to combine the results of sub
expressions. Note, unlike the comparison operators a true result returns a
value of 1 but a false results does still return 0. Also note that the logical
or operator has a slightly lower precedence than logical and.
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@end table
@end enumerate
In short, it's only meaningful to add or subtract the @emph{offsets} in an
address; you can only have a defined section in one of the two arguments.
@node Pseudo Ops
@chapter Assembler Directives
@cindex directives, machine independent
@cindex pseudo-ops, machine independent
@cindex machine independent directives
All assembler directives have names that begin with a period (@samp{.}).
The rest of the name is letters, usually in lower case.
This chapter discusses directives that are available regardless of the
target machine configuration for the @sc{gnu} assembler.
@ifset GENERIC
Some machine configurations provide additional directives.
@xref{Machine Dependencies}.
@end ifset
@ifclear GENERIC
@ifset machine-directives
@xref{Machine Dependencies}, for additional directives.
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@end ifset
@end ifclear
@menu
* Abort:: @code{.abort}
@ifset COFF
* ABORT (COFF):: @code{.ABORT}
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@end ifset
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* Align:: @code{.align @var{abs-expr} , @var{abs-expr}}
* Altmacro:: @code{.altmacro}
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* Ascii:: @code{.ascii "@var{string}"}@dots{}
* Asciz:: @code{.asciz "@var{string}"}@dots{}
* Balign:: @code{.balign @var{abs-expr} , @var{abs-expr}}
gas/ 2012-03-12 Roland McGrath <mcgrathr@google.com> * config/tc-arm.c (arm_frag_max_var): New function. * config/tc-arm.h: Declare it. (md_frag_max_var): New macro. * config/tc-i386.c (i386_frag_max_var): New function. * config/tc-i386.h: Declare it. (md_frag_max_var): New macro. * doc/as.texinfo (Bundle directives): New node. (Pseudo Ops): Add it to the menu. * NEWS: Mention new feature. * read.c [md_frag_max_var] (HANDLE_BUNDLE): New macro. [HANDLE_BUNDLE] (bundle_align_p2): New variable. [HANDLE_BUNDLE] (bundle_lock_frchain, bundle_lock_frag): New variables. [HANDLE_BUNDLE] (start_bundle, pending_bundle_size, finish_bundle): New functions. (assemble_one): New function if [HANDLE_BUNDLE], #define directly to md_assembly if not. (read_a_source_file): Call assemble_one in place of md_assemble. (read_a_source_file) [HANDLE_BUNDLE]: Check for unterminated .bundle_lock at end of processing. [HANDLE_BUNDLE] (s_bundle_align_mode, s_bundle_lock, s_bundle_unlock): New functions. [HANDLE_BUNDLE] (potable): Add their entries. * read.h: Declare new functions. gas/testsuite/ 2012-03-12 Roland McGrath <mcgrathr@google.com> * gas/i386/bundle-bad.s: New file. * gas/i386/bundle-bad.d: New file. * gas/i386/bundle-bad.l: New file. * gas/i386/i386.exp: Run it. * gas/arm/bundle.s: New file. * gas/arm/bundle.d: New file. * gas/arm/bundle-lock.s: New file. * gas/arm/bundle-lock.d: New file. * gas/i386/bundle.s: New file. * gas/i386/bundle.d: New file. * gas/i386/x86-64-bundle.s: New file. * gas/i386/x86-64-bundle.d: New file. * gas/i386/bundle-lock.s: New file. * gas/i386/bundle-lock.d: New file. * gas/i386/i386.exp: Run them.
2012-03-13 16:59:57 +00:00
* Bundle directives:: @code{.bundle_align_mode @var{abs-expr}}, @code{.bundle_lock}, @code{.bundle_unlock}
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* Byte:: @code{.byte @var{expressions}}
* CFI directives:: @code{.cfi_startproc [simple]}, @code{.cfi_endproc}, etc.
* Comm:: @code{.comm @var{symbol} , @var{length} }
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* Data:: @code{.data @var{subsection}}
@ifset COFF
* Def:: @code{.def @var{name}}
@end ifset
@ifset aout-bout
* Desc:: @code{.desc @var{symbol}, @var{abs-expression}}
@end ifset
@ifset COFF
* Dim:: @code{.dim}
@end ifset
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* Double:: @code{.double @var{flonums}}
* Eject:: @code{.eject}
* Else:: @code{.else}
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* Elseif:: @code{.elseif}
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* End:: @code{.end}
@ifset COFF
* Endef:: @code{.endef}
@end ifset
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* Endfunc:: @code{.endfunc}
* Endif:: @code{.endif}
* Equ:: @code{.equ @var{symbol}, @var{expression}}
* Equiv:: @code{.equiv @var{symbol}, @var{expression}}
* Eqv:: @code{.eqv @var{symbol}, @var{expression}}
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* Err:: @code{.err}
* Error:: @code{.error @var{string}}
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* Exitm:: @code{.exitm}
* Extern:: @code{.extern}
* Fail:: @code{.fail}
* File:: @code{.file}
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* Fill:: @code{.fill @var{repeat} , @var{size} , @var{value}}
* Float:: @code{.float @var{flonums}}
* Func:: @code{.func}
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* Global:: @code{.global @var{symbol}}, @code{.globl @var{symbol}}
@ifset ELF
* Gnu_attribute:: @code{.gnu_attribute @var{tag},@var{value}}
* Hidden:: @code{.hidden @var{names}}
@end ifset
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* hword:: @code{.hword @var{expressions}}
* Ident:: @code{.ident}
* If:: @code{.if @var{absolute expression}}
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* Incbin:: @code{.incbin "@var{file}"[,@var{skip}[,@var{count}]]}
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* Include:: @code{.include "@var{file}"}
* Int:: @code{.int @var{expressions}}
@ifset ELF
* Internal:: @code{.internal @var{names}}
@end ifset
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* Irp:: @code{.irp @var{symbol},@var{values}}@dots{}
* Irpc:: @code{.irpc @var{symbol},@var{values}}@dots{}
* Lcomm:: @code{.lcomm @var{symbol} , @var{length}}
* Lflags:: @code{.lflags}
@ifclear no-line-dir
* Line:: @code{.line @var{line-number}}
@end ifclear
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* Linkonce:: @code{.linkonce [@var{type}]}
* List:: @code{.list}
* Ln:: @code{.ln @var{line-number}}
* Loc:: @code{.loc @var{fileno} @var{lineno}}
* Loc_mark_labels:: @code{.loc_mark_labels @var{enable}}
@ifset ELF
* Local:: @code{.local @var{names}}
@end ifset
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* Long:: @code{.long @var{expressions}}
@ignore
* Lsym:: @code{.lsym @var{symbol}, @var{expression}}
@end ignore
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* Macro:: @code{.macro @var{name} @var{args}}@dots{}
* MRI:: @code{.mri @var{val}}
* Noaltmacro:: @code{.noaltmacro}
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* Nolist:: @code{.nolist}
* Octa:: @code{.octa @var{bignums}}
* Offset:: @code{.offset @var{loc}}
* Org:: @code{.org @var{new-lc}, @var{fill}}
* P2align:: @code{.p2align @var{abs-expr}, @var{abs-expr}, @var{abs-expr}}
@ifset ELF
* PopSection:: @code{.popsection}
* Previous:: @code{.previous}
@end ifset
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* Print:: @code{.print @var{string}}
@ifset ELF
* Protected:: @code{.protected @var{names}}
@end ifset
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* Psize:: @code{.psize @var{lines}, @var{columns}}
* Purgem:: @code{.purgem @var{name}}
@ifset ELF
* PushSection:: @code{.pushsection @var{name}}
@end ifset
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* Quad:: @code{.quad @var{bignums}}
* Reloc:: @code{.reloc @var{offset}, @var{reloc_name}[, @var{expression}]}
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* Rept:: @code{.rept @var{count}}
* Sbttl:: @code{.sbttl "@var{subheading}"}
@ifset COFF
* Scl:: @code{.scl @var{class}}
@end ifset
@ifset COFF-ELF
* Section:: @code{.section @var{name}[, @var{flags}]}
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@end ifset
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* Set:: @code{.set @var{symbol}, @var{expression}}
* Short:: @code{.short @var{expressions}}
* Single:: @code{.single @var{flonums}}
@ifset COFF-ELF
* Size:: @code{.size [@var{name} , @var{expression}]}
@end ifset
@ifclear no-space-dir
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* Skip:: @code{.skip @var{size} , @var{fill}}
@end ifclear
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* Sleb128:: @code{.sleb128 @var{expressions}}
@ifclear no-space-dir
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* Space:: @code{.space @var{size} , @var{fill}}
@end ifclear
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@ifset have-stabs
* Stab:: @code{.stabd, .stabn, .stabs}
@end ifset
* String:: @code{.string "@var{str}"}, @code{.string8 "@var{str}"}, @code{.string16 "@var{str}"}, @code{.string32 "@var{str}"}, @code{.string64 "@var{str}"}
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* Struct:: @code{.struct @var{expression}}
@ifset ELF
* SubSection:: @code{.subsection}
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* Symver:: @code{.symver @var{name},@var{name2@@nodename}}
@end ifset
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@ifset COFF
* Tag:: @code{.tag @var{structname}}
@end ifset
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* Text:: @code{.text @var{subsection}}
* Title:: @code{.title "@var{heading}"}
@ifset COFF-ELF
* Type:: @code{.type <@var{int} | @var{name} , @var{type description}>}
@end ifset
* Uleb128:: @code{.uleb128 @var{expressions}}
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@ifset COFF
* Val:: @code{.val @var{addr}}
@end ifset
@ifset ELF
* Version:: @code{.version "@var{string}"}
* VTableEntry:: @code{.vtable_entry @var{table}, @var{offset}}
* VTableInherit:: @code{.vtable_inherit @var{child}, @var{parent}}
@end ifset
* Warning:: @code{.warning @var{string}}
* Weak:: @code{.weak @var{names}}
gas/ChangeLog: * read.c (potable): Add weakref. (s_weakref): New. * read.h (s_weakref): Declare. * struc-symbol.h (struct symbol): Add sy_weakrefr and sy_weakrefd. * symbols.c (colon): Clear weakrefr. (symbol_find_exact): Rename to, and reimplement in terms of... (symbol_find_exact_noref): ... new function. (symbol_find): Likewise... (symbol_find_noref): ... ditto. (resolve_symbol_value): Resolve weakrefr without setting their values. (S_SET_WEAK): Call hook. (S_GET_VALUE): Follow weakref link. (S_SET_VALUE): Clear weakrefr. (S_IS_WEAK): Follow weakref link. (S_IS_WEAKREFR, S_SET_WEAKREFR, S_CLEAR_WEAKREFR): New. (S_IS_WEAKREFD, S_SET_WEAKREFD, S_CLEAR_WEAKREFD): New. (symbol_set_value_expression, symbol_set_frag): Clear weakrefr. (symbol_mark_used): Follow weakref link. (print_symbol_value_1): Print weak, weakrefr and weakrefd. * symbols.h (symbol_find_noref, symbol_find_exact_noref): Declare. (S_IS_WEAKREFR, S_SET_WEAKREFR, S_CLEAR_WEAKREFR): Declare. (S_IS_WEAKREFD, S_SET_WEAKREFD, S_CLEAR_WEAKREFD): Declare. * write.c (adust_reloc_syms): Follow weakref link. Do not complain if target is undefined. (write_object_file): Likewise. Remove weakrefr symbols. Drop unreferenced weakrefd symbols. * config/obj-coff.c (obj_frob_symbol): Do not force WEAKREFD symbols EXTERNAL. (pecoff_obj_set_weak_hook, pecoff_obj_clear_weak_hook): New. * config/obj-coff.h (obj_set_weak_hook, obj_clear_weak_hook): Define. * doc/as.texinfo: Document weakref. * doc/internals.texi: Document new struct members, internal functions and hooks. gas/testsuite/ChangeLog: * gas/all/weakref1.s, gas/all/weakref1.d: New test. * gas/all/weakref1g.d, gas/all/weakref1l.d: New tests. * gas/all/weakref1u.d, gas/all/weakref1w.d: New tests. * gas/all/weakref2.s, gas/all/weakref3.s: New tests. * gas/all/gas.exp: Run new tests.
2005-10-24 17:51:42 +00:00
* Weakref:: @code{.weakref @var{alias}, @var{symbol}}
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* Word:: @code{.word @var{expressions}}
* Deprecated:: Deprecated Directives
@end menu
@node Abort
@section @code{.abort}
@cindex @code{abort} directive
@cindex stopping the assembly
This directive stops the assembly immediately. It is for
compatibility with other assemblers. The original idea was that the
assembly language source would be piped into the assembler. If the sender
of the source quit, it could use this directive tells @command{@value{AS}} to
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quit also. One day @code{.abort} will not be supported.
@ifset COFF
@node ABORT (COFF)
@section @code{.ABORT} (COFF)
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@cindex @code{ABORT} directive
When producing COFF output, @command{@value{AS}} accepts this directive as a
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synonym for @samp{.abort}.
@ifset BOUT
When producing @code{b.out} output, @command{@value{AS}} accepts this directive,
1999-05-03 07:29:11 +00:00
but ignores it.
@end ifset
@end ifset
@node Align
@section @code{.align @var{abs-expr}, @var{abs-expr}, @var{abs-expr}}
@cindex padding the location counter
@cindex @code{align} directive
Pad the location counter (in the current subsection) to a particular storage
boundary. The first expression (which must be absolute) is the alignment
required, as described below.
The second expression (also absolute) gives the fill value to be stored in the
padding bytes. It (and the comma) may be omitted. If it is omitted, the
padding bytes are normally zero. However, on some systems, if the section is
marked as containing code and the fill value is omitted, the space is filled
with no-op instructions.
The third expression is also absolute, and is also optional. If it is present,
it is the maximum number of bytes that should be skipped by this alignment
directive. If doing the alignment would require skipping more bytes than the
specified maximum, then the alignment is not done at all. You can omit the
fill value (the second argument) entirely by simply using two commas after the
required alignment; this can be useful if you want the alignment to be filled
with no-op instructions when appropriate.
The way the required alignment is specified varies from system to system.
* README-vms: Delete. * config-gas.com: Delete. * makefile.vms: Delete. * vmsconf.sh: Delete. * config/atof-tahoe.c: Delete. * config/m88k-opcode.h: Delete. * config/obj-bout.c: Delete. * config/obj-bout.h: Delete. * config/obj-hp300.c: Delete. * config/obj-hp300.h: Delete. * config/tc-a29k.c: Delete. * config/tc-a29k.h: Delete. * config/tc-h8500.c: Delete. * config/tc-h8500.h: Delete. * config/tc-m88k.c: Delete. * config/tc-m88k.h: Delete. * config/tc-tahoe.c: Delete. * config/tc-tahoe.h: Delete. * config/tc-tic80.c: Delete. * config/tc-tic80.h: Delete. * config/tc-w65.c: Delete. * config/tc-w65.h: Delete. * config/te-aux.h: Delete. * config/te-delt88.h: Delete. * config/te-delta.h: Delete. * config/te-dpx2.h: Delete. * config/te-hp300.h: Delete. * config/te-ic960.h: Delete. * config/vms-a-conf.h: Delete. * doc/c-a29k.texi: Delete. * doc/c-h8500.texi: Delete. * doc/c-m88k.texi: Delete. * README: Remove obsolete examples, and list of supported targets. * Makefile.am: Remove a29k, h8500, m88k, tahoe, tic80, w65, bout and hp300 support. (DEP_FLAGS): Don't define BFD_ASSEMBLER. * configure.in: Remove --enable-bfd-assembler, need_bfd, primary_bfd_gas. * configure.tgt: Remove a29k, h8300-coff, h8500-*, i960 non-elf, m68k non bfd, m88k, or32-coff, tic80-*, vax non-bfd, w65k-*, *-nindy. * as.c: Remove all non-BFD_ASSEMBLER code, support for above targets. * as.h: Likewise. * dw2gencfi.c: Likewise. * dwarf2dbg.c: Likewise. * ehopt.c: Likewise. * input-file.c: Likewise. * listing.c: Likewise. * literal.c: Likewise. * messages.c: Likewise. * obj.h: Likewise. * output-file.c: Likewise. * read.c: Likewise. * stabs.c: Likewise. * struc-symbol.h: Likewise. * subsegs.c: Likewise. * subsegs.h: Likewise. * symbols.c: Likewise. * symbols.h: Likewise. * tc.h: Likewise. * write.c: Likewise. * write.h: Likewise. * config/aout_gnu.h: Likewise. * config/obj-aout.c: Likewise. * config/obj-aout.h: Likewise. * config/obj-coff.c: Likewise. * config/obj-coff.h: Likewise. * config/obj-evax.h: Likewise. * config/obj-ieee.h: Likewise. * config/tc-arm.c: Likewise. * config/tc-arm.h: Likewise. * config/tc-avr.c: Likewise. * config/tc-avr.h: Likewise. * config/tc-crx.h: Likewise. * config/tc-d10v.h: Likewise. * config/tc-d30v.h: Likewise. * config/tc-dlx.h: Likewise. * config/tc-fr30.h: Likewise. * config/tc-frv.h: Likewise. * config/tc-h8300.c: Likewise. * config/tc-h8300.h: Likewise. * config/tc-hppa.h: Likewise. * config/tc-i370.h: Likewise. * config/tc-i386.c: Likewise. * config/tc-i386.h: Likewise. * config/tc-i860.h: Likewise. * config/tc-i960.c: Likewise. * config/tc-i960.h: Likewise. * config/tc-ip2k.h: Likewise. * config/tc-iq2000.h: Likewise. * config/tc-m32c.h: Likewise. * config/tc-m32r.h: Likewise. * config/tc-m68hc11.h: Likewise. * config/tc-m68k.c: Likewise. * config/tc-m68k.h: Likewise. * config/tc-maxq.c: Likewise. * config/tc-maxq.h: Likewise. * config/tc-mcore.c: Likewise. * config/tc-mcore.h: Likewise. * config/tc-mn10200.h: Likewise. * config/tc-mn10300.c: Likewise. * config/tc-mn10300.h: Likewise. * config/tc-ms1.h: Likewise. * config/tc-msp430.c: Likewise. * config/tc-msp430.h: Likewise. * config/tc-ns32k.c: Likewise. * config/tc-ns32k.h: Likewise. * config/tc-openrisc.h: Likewise. * config/tc-or32.c: Likewise. * config/tc-or32.h: Likewise. * config/tc-ppc.c: Likewise. * config/tc-ppc.h: Likewise. * config/tc-s390.h: Likewise. * config/tc-sh.c: Likewise. * config/tc-sh.h: Likewise. * config/tc-sparc.c: Likewise. * config/tc-tic30.c: Likewise. * config/tc-tic30.h: Likewise. * config/tc-tic4x.c: Likewise. * config/tc-tic4x.h: Likewise. * config/tc-tic54x.c: Likewise. * config/tc-tic54x.h: Likewise. * config/tc-v850.h: Likewise. * config/tc-vax.c: Likewise. * config/tc-vax.h: Likewise. * config/tc-xstormy16.h: Likewise. * config/tc-xtensa.h: Likewise. * config/tc-z8k.c: Likewise. * config/tc-z8k.h: Likewise. * config/vms-a-conf.h * doc/Makefile.am: Likewise. * doc/all.texi: Likewise. * doc/as.texinfo: Likewise. * doc/Makefile.in: Regenerate. * Makefile.in: Regenerate. * configure: Regenerate. * config.in: Regenerate. * po/POTFILES.in: Regenerate.
2005-08-11 01:25:29 +00:00
For the arc, hppa, i386 using ELF, i860, iq2000, m68k, or32,
s390, sparc, tic4x, tic80 and xtensa, the first expression is the
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alignment request in bytes. For example @samp{.align 8} advances
the location counter until it is a multiple of 8. If the location counter
is already a multiple of 8, no change is needed. For the tic54x, the
first expression is the alignment request in words.
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For other systems, including ppc, i386 using a.out format, arm and
strongarm, it is the
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number of low-order zero bits the location counter must have after
advancement. For example @samp{.align 3} advances the location
counter until it a multiple of 8. If the location counter is already a
multiple of 8, no change is needed.
This inconsistency is due to the different behaviors of the various
native assemblers for these systems which GAS must emulate.
GAS also provides @code{.balign} and @code{.p2align} directives,
described later, which have a consistent behavior across all
architectures (but are specific to GAS).
@node Altmacro
@section @code{.altmacro}
Enable alternate macro mode, enabling:
@ftable @code
@item LOCAL @var{name} [ , @dots{} ]
One additional directive, @code{LOCAL}, is available. It is used to
generate a string replacement for each of the @var{name} arguments, and
replace any instances of @var{name} in each macro expansion. The
replacement string is unique in the assembly, and different for each
separate macro expansion. @code{LOCAL} allows you to write macros that
define symbols, without fear of conflict between separate macro expansions.
@item String delimiters
You can write strings delimited in these other ways besides
@code{"@var{string}"}:
@table @code
@item '@var{string}'
You can delimit strings with single-quote characters.
@item <@var{string}>
You can delimit strings with matching angle brackets.
@end table
@item single-character string escape
To include any single character literally in a string (even if the
character would otherwise have some special meaning), you can prefix the
character with @samp{!} (an exclamation mark). For example, you can
write @samp{<4.3 !> 5.4!!>} to get the literal text @samp{4.3 > 5.4!}.
@item Expression results as strings
You can write @samp{%@var{expr}} to evaluate the expression @var{expr}
and use the result as a string.
@end ftable
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@node Ascii
@section @code{.ascii "@var{string}"}@dots{}
@cindex @code{ascii} directive
@cindex string literals
@code{.ascii} expects zero or more string literals (@pxref{Strings})
separated by commas. It assembles each string (with no automatic
trailing zero byte) into consecutive addresses.
@node Asciz
@section @code{.asciz "@var{string}"}@dots{}
@cindex @code{asciz} directive
@cindex zero-terminated strings
@cindex null-terminated strings
@code{.asciz} is just like @code{.ascii}, but each string is followed by
a zero byte. The ``z'' in @samp{.asciz} stands for ``zero''.
@node Balign
@section @code{.balign[wl] @var{abs-expr}, @var{abs-expr}, @var{abs-expr}}
@cindex padding the location counter given number of bytes
@cindex @code{balign} directive
Pad the location counter (in the current subsection) to a particular
storage boundary. The first expression (which must be absolute) is the
alignment request in bytes. For example @samp{.balign 8} advances
the location counter until it is a multiple of 8. If the location counter
is already a multiple of 8, no change is needed.
The second expression (also absolute) gives the fill value to be stored in the
padding bytes. It (and the comma) may be omitted. If it is omitted, the
padding bytes are normally zero. However, on some systems, if the section is
marked as containing code and the fill value is omitted, the space is filled
with no-op instructions.
The third expression is also absolute, and is also optional. If it is present,
it is the maximum number of bytes that should be skipped by this alignment
directive. If doing the alignment would require skipping more bytes than the
specified maximum, then the alignment is not done at all. You can omit the
fill value (the second argument) entirely by simply using two commas after the
required alignment; this can be useful if you want the alignment to be filled
with no-op instructions when appropriate.
@cindex @code{balignw} directive
@cindex @code{balignl} directive
The @code{.balignw} and @code{.balignl} directives are variants of the
@code{.balign} directive. The @code{.balignw} directive treats the fill
pattern as a two byte word value. The @code{.balignl} directives treats the
fill pattern as a four byte longword value. For example, @code{.balignw
4,0x368d} will align to a multiple of 4. If it skips two bytes, they will be
filled in with the value 0x368d (the exact placement of the bytes depends upon
the endianness of the processor). If it skips 1 or 3 bytes, the fill value is
undefined.
gas/ 2012-03-12 Roland McGrath <mcgrathr@google.com> * config/tc-arm.c (arm_frag_max_var): New function. * config/tc-arm.h: Declare it. (md_frag_max_var): New macro. * config/tc-i386.c (i386_frag_max_var): New function. * config/tc-i386.h: Declare it. (md_frag_max_var): New macro. * doc/as.texinfo (Bundle directives): New node. (Pseudo Ops): Add it to the menu. * NEWS: Mention new feature. * read.c [md_frag_max_var] (HANDLE_BUNDLE): New macro. [HANDLE_BUNDLE] (bundle_align_p2): New variable. [HANDLE_BUNDLE] (bundle_lock_frchain, bundle_lock_frag): New variables. [HANDLE_BUNDLE] (start_bundle, pending_bundle_size, finish_bundle): New functions. (assemble_one): New function if [HANDLE_BUNDLE], #define directly to md_assembly if not. (read_a_source_file): Call assemble_one in place of md_assemble. (read_a_source_file) [HANDLE_BUNDLE]: Check for unterminated .bundle_lock at end of processing. [HANDLE_BUNDLE] (s_bundle_align_mode, s_bundle_lock, s_bundle_unlock): New functions. [HANDLE_BUNDLE] (potable): Add their entries. * read.h: Declare new functions. gas/testsuite/ 2012-03-12 Roland McGrath <mcgrathr@google.com> * gas/i386/bundle-bad.s: New file. * gas/i386/bundle-bad.d: New file. * gas/i386/bundle-bad.l: New file. * gas/i386/i386.exp: Run it. * gas/arm/bundle.s: New file. * gas/arm/bundle.d: New file. * gas/arm/bundle-lock.s: New file. * gas/arm/bundle-lock.d: New file. * gas/i386/bundle.s: New file. * gas/i386/bundle.d: New file. * gas/i386/x86-64-bundle.s: New file. * gas/i386/x86-64-bundle.d: New file. * gas/i386/bundle-lock.s: New file. * gas/i386/bundle-lock.d: New file. * gas/i386/i386.exp: Run them.
2012-03-13 16:59:57 +00:00
@node Bundle directives
@section @code{.bundle_align_mode @var{abs-expr}}
@cindex @code{bundle_align_mode} directive
@cindex bundle
@cindex instruction bundle
@cindex aligned instruction bundle
@code{.bundle_align_mode} enables or disables @dfn{aligned instruction
gas/ 2012-03-12 Roland McGrath <mcgrathr@google.com> * config/tc-arm.c (arm_frag_max_var): New function. * config/tc-arm.h: Declare it. (md_frag_max_var): New macro. * config/tc-i386.c (i386_frag_max_var): New function. * config/tc-i386.h: Declare it. (md_frag_max_var): New macro. * doc/as.texinfo (Bundle directives): New node. (Pseudo Ops): Add it to the menu. * NEWS: Mention new feature. * read.c [md_frag_max_var] (HANDLE_BUNDLE): New macro. [HANDLE_BUNDLE] (bundle_align_p2): New variable. [HANDLE_BUNDLE] (bundle_lock_frchain, bundle_lock_frag): New variables. [HANDLE_BUNDLE] (start_bundle, pending_bundle_size, finish_bundle): New functions. (assemble_one): New function if [HANDLE_BUNDLE], #define directly to md_assembly if not. (read_a_source_file): Call assemble_one in place of md_assemble. (read_a_source_file) [HANDLE_BUNDLE]: Check for unterminated .bundle_lock at end of processing. [HANDLE_BUNDLE] (s_bundle_align_mode, s_bundle_lock, s_bundle_unlock): New functions. [HANDLE_BUNDLE] (potable): Add their entries. * read.h: Declare new functions. gas/testsuite/ 2012-03-12 Roland McGrath <mcgrathr@google.com> * gas/i386/bundle-bad.s: New file. * gas/i386/bundle-bad.d: New file. * gas/i386/bundle-bad.l: New file. * gas/i386/i386.exp: Run it. * gas/arm/bundle.s: New file. * gas/arm/bundle.d: New file. * gas/arm/bundle-lock.s: New file. * gas/arm/bundle-lock.d: New file. * gas/i386/bundle.s: New file. * gas/i386/bundle.d: New file. * gas/i386/x86-64-bundle.s: New file. * gas/i386/x86-64-bundle.d: New file. * gas/i386/bundle-lock.s: New file. * gas/i386/bundle-lock.d: New file. * gas/i386/i386.exp: Run them.
2012-03-13 16:59:57 +00:00
bundle} mode. In this mode, sequences of adjacent instructions are grouped
into fixed-sized @dfn{bundles}. If the argument is zero, this mode is
disabled (which is the default state). If the argument it not zero, it
gas/ 2012-03-12 Roland McGrath <mcgrathr@google.com> * config/tc-arm.c (arm_frag_max_var): New function. * config/tc-arm.h: Declare it. (md_frag_max_var): New macro. * config/tc-i386.c (i386_frag_max_var): New function. * config/tc-i386.h: Declare it. (md_frag_max_var): New macro. * doc/as.texinfo (Bundle directives): New node. (Pseudo Ops): Add it to the menu. * NEWS: Mention new feature. * read.c [md_frag_max_var] (HANDLE_BUNDLE): New macro. [HANDLE_BUNDLE] (bundle_align_p2): New variable. [HANDLE_BUNDLE] (bundle_lock_frchain, bundle_lock_frag): New variables. [HANDLE_BUNDLE] (start_bundle, pending_bundle_size, finish_bundle): New functions. (assemble_one): New function if [HANDLE_BUNDLE], #define directly to md_assembly if not. (read_a_source_file): Call assemble_one in place of md_assemble. (read_a_source_file) [HANDLE_BUNDLE]: Check for unterminated .bundle_lock at end of processing. [HANDLE_BUNDLE] (s_bundle_align_mode, s_bundle_lock, s_bundle_unlock): New functions. [HANDLE_BUNDLE] (potable): Add their entries. * read.h: Declare new functions. gas/testsuite/ 2012-03-12 Roland McGrath <mcgrathr@google.com> * gas/i386/bundle-bad.s: New file. * gas/i386/bundle-bad.d: New file. * gas/i386/bundle-bad.l: New file. * gas/i386/i386.exp: Run it. * gas/arm/bundle.s: New file. * gas/arm/bundle.d: New file. * gas/arm/bundle-lock.s: New file. * gas/arm/bundle-lock.d: New file. * gas/i386/bundle.s: New file. * gas/i386/bundle.d: New file. * gas/i386/x86-64-bundle.s: New file. * gas/i386/x86-64-bundle.d: New file. * gas/i386/bundle-lock.s: New file. * gas/i386/bundle-lock.d: New file. * gas/i386/i386.exp: Run them.
2012-03-13 16:59:57 +00:00
gives the size of an instruction bundle as a power of two (as for the
@code{.p2align} directive, @pxref{P2align}).
For some targets, it's an ABI requirement that no instruction may span a
certain aligned boundary. A @dfn{bundle} is simply a sequence of
gas/ 2012-03-12 Roland McGrath <mcgrathr@google.com> * config/tc-arm.c (arm_frag_max_var): New function. * config/tc-arm.h: Declare it. (md_frag_max_var): New macro. * config/tc-i386.c (i386_frag_max_var): New function. * config/tc-i386.h: Declare it. (md_frag_max_var): New macro. * doc/as.texinfo (Bundle directives): New node. (Pseudo Ops): Add it to the menu. * NEWS: Mention new feature. * read.c [md_frag_max_var] (HANDLE_BUNDLE): New macro. [HANDLE_BUNDLE] (bundle_align_p2): New variable. [HANDLE_BUNDLE] (bundle_lock_frchain, bundle_lock_frag): New variables. [HANDLE_BUNDLE] (start_bundle, pending_bundle_size, finish_bundle): New functions. (assemble_one): New function if [HANDLE_BUNDLE], #define directly to md_assembly if not. (read_a_source_file): Call assemble_one in place of md_assemble. (read_a_source_file) [HANDLE_BUNDLE]: Check for unterminated .bundle_lock at end of processing. [HANDLE_BUNDLE] (s_bundle_align_mode, s_bundle_lock, s_bundle_unlock): New functions. [HANDLE_BUNDLE] (potable): Add their entries. * read.h: Declare new functions. gas/testsuite/ 2012-03-12 Roland McGrath <mcgrathr@google.com> * gas/i386/bundle-bad.s: New file. * gas/i386/bundle-bad.d: New file. * gas/i386/bundle-bad.l: New file. * gas/i386/i386.exp: Run it. * gas/arm/bundle.s: New file. * gas/arm/bundle.d: New file. * gas/arm/bundle-lock.s: New file. * gas/arm/bundle-lock.d: New file. * gas/i386/bundle.s: New file. * gas/i386/bundle.d: New file. * gas/i386/x86-64-bundle.s: New file. * gas/i386/x86-64-bundle.d: New file. * gas/i386/bundle-lock.s: New file. * gas/i386/bundle-lock.d: New file. * gas/i386/i386.exp: Run them.
2012-03-13 16:59:57 +00:00
instructions that starts on an aligned boundary. For example, if
@var{abs-expr} is @code{5} then the bundle size is 32, so each aligned
chunk of 32 bytes is a bundle. When aligned instruction bundle mode is in
effect, no single instruction may span a boundary between bundles. If an
instruction would start too close to the end of a bundle for the length of
that particular instruction to fit within the bundle, then the space at the
end of that bundle is filled with no-op instructions so the instruction
starts in the next bundle. As a corollary, it's an error if any single
instruction's encoding is longer than the bundle size.
@section @code{.bundle_lock} and @code{.bundle_unlock}
@cindex @code{bundle_lock} directive
@cindex @code{bundle_unlock} directive
The @code{.bundle_lock} and directive @code{.bundle_unlock} directives
allow explicit control over instruction bundle padding. These directives
are only valid when @code{.bundle_align_mode} has been used to enable
aligned instruction bundle mode. It's an error if they appear when
@code{.bundle_align_mode} has not been used at all, or when the last
directive was @w{@code{.bundle_align_mode 0}}.
@cindex bundle-locked
For some targets, it's an ABI requirement that certain instructions may
appear only as part of specified permissible sequences of multiple
instructions, all within the same bundle. A pair of @code{.bundle_lock}
and @code{.bundle_unlock} directives define a @dfn{bundle-locked}
gas/ 2012-03-12 Roland McGrath <mcgrathr@google.com> * config/tc-arm.c (arm_frag_max_var): New function. * config/tc-arm.h: Declare it. (md_frag_max_var): New macro. * config/tc-i386.c (i386_frag_max_var): New function. * config/tc-i386.h: Declare it. (md_frag_max_var): New macro. * doc/as.texinfo (Bundle directives): New node. (Pseudo Ops): Add it to the menu. * NEWS: Mention new feature. * read.c [md_frag_max_var] (HANDLE_BUNDLE): New macro. [HANDLE_BUNDLE] (bundle_align_p2): New variable. [HANDLE_BUNDLE] (bundle_lock_frchain, bundle_lock_frag): New variables. [HANDLE_BUNDLE] (start_bundle, pending_bundle_size, finish_bundle): New functions. (assemble_one): New function if [HANDLE_BUNDLE], #define directly to md_assembly if not. (read_a_source_file): Call assemble_one in place of md_assemble. (read_a_source_file) [HANDLE_BUNDLE]: Check for unterminated .bundle_lock at end of processing. [HANDLE_BUNDLE] (s_bundle_align_mode, s_bundle_lock, s_bundle_unlock): New functions. [HANDLE_BUNDLE] (potable): Add their entries. * read.h: Declare new functions. gas/testsuite/ 2012-03-12 Roland McGrath <mcgrathr@google.com> * gas/i386/bundle-bad.s: New file. * gas/i386/bundle-bad.d: New file. * gas/i386/bundle-bad.l: New file. * gas/i386/i386.exp: Run it. * gas/arm/bundle.s: New file. * gas/arm/bundle.d: New file. * gas/arm/bundle-lock.s: New file. * gas/arm/bundle-lock.d: New file. * gas/i386/bundle.s: New file. * gas/i386/bundle.d: New file. * gas/i386/x86-64-bundle.s: New file. * gas/i386/x86-64-bundle.d: New file. * gas/i386/bundle-lock.s: New file. * gas/i386/bundle-lock.d: New file. * gas/i386/i386.exp: Run them.
2012-03-13 16:59:57 +00:00
instruction sequence. For purposes of aligned instruction bundle mode, a
sequence starting with @code{.bundle_lock} and ending with
@code{.bundle_unlock} is treated as a single instruction. That is, the
entire sequence must fit into a single bundle and may not span a bundle
boundary. If necessary, no-op instructions will be inserted before the
first instruction of the sequence so that the whole sequence starts on an
aligned bundle boundary. It's an error if the sequence is longer than the
bundle size.
For convenience when using @code{.bundle_lock} and @code{.bundle_unlock}
inside assembler macros (@pxref{Macro}), bundle-locked sequences may be
nested. That is, a second @code{.bundle_lock} directive before the next
@code{.bundle_unlock} directive has no effect except that it must be
matched by another closing @code{.bundle_unlock} so that there is the
same number of @code{.bundle_lock} and @code{.bundle_unlock} directives.
gas/ 2012-03-12 Roland McGrath <mcgrathr@google.com> * config/tc-arm.c (arm_frag_max_var): New function. * config/tc-arm.h: Declare it. (md_frag_max_var): New macro. * config/tc-i386.c (i386_frag_max_var): New function. * config/tc-i386.h: Declare it. (md_frag_max_var): New macro. * doc/as.texinfo (Bundle directives): New node. (Pseudo Ops): Add it to the menu. * NEWS: Mention new feature. * read.c [md_frag_max_var] (HANDLE_BUNDLE): New macro. [HANDLE_BUNDLE] (bundle_align_p2): New variable. [HANDLE_BUNDLE] (bundle_lock_frchain, bundle_lock_frag): New variables. [HANDLE_BUNDLE] (start_bundle, pending_bundle_size, finish_bundle): New functions. (assemble_one): New function if [HANDLE_BUNDLE], #define directly to md_assembly if not. (read_a_source_file): Call assemble_one in place of md_assemble. (read_a_source_file) [HANDLE_BUNDLE]: Check for unterminated .bundle_lock at end of processing. [HANDLE_BUNDLE] (s_bundle_align_mode, s_bundle_lock, s_bundle_unlock): New functions. [HANDLE_BUNDLE] (potable): Add their entries. * read.h: Declare new functions. gas/testsuite/ 2012-03-12 Roland McGrath <mcgrathr@google.com> * gas/i386/bundle-bad.s: New file. * gas/i386/bundle-bad.d: New file. * gas/i386/bundle-bad.l: New file. * gas/i386/i386.exp: Run it. * gas/arm/bundle.s: New file. * gas/arm/bundle.d: New file. * gas/arm/bundle-lock.s: New file. * gas/arm/bundle-lock.d: New file. * gas/i386/bundle.s: New file. * gas/i386/bundle.d: New file. * gas/i386/x86-64-bundle.s: New file. * gas/i386/x86-64-bundle.d: New file. * gas/i386/bundle-lock.s: New file. * gas/i386/bundle-lock.d: New file. * gas/i386/i386.exp: Run them.
2012-03-13 16:59:57 +00:00
1999-05-03 07:29:11 +00:00
@node Byte
@section @code{.byte @var{expressions}}
@cindex @code{byte} directive
@cindex integers, one byte
@code{.byte} expects zero or more expressions, separated by commas.
Each expression is assembled into the next byte.
@node CFI directives
@section @code{.cfi_sections @var{section_list}}
@cindex @code{cfi_sections} directive
@code{.cfi_sections} may be used to specify whether CFI directives
should emit @code{.eh_frame} section and/or @code{.debug_frame} section.
If @var{section_list} is @code{.eh_frame}, @code{.eh_frame} is emitted,
if @var{section_list} is @code{.debug_frame}, @code{.debug_frame} is emitted.
To emit both use @code{.eh_frame, .debug_frame}. The default if this
directive is not used is @code{.cfi_sections .eh_frame}.
@section @code{.cfi_startproc [simple]}
@cindex @code{cfi_startproc} directive
@code{.cfi_startproc} is used at the beginning of each function that
should have an entry in @code{.eh_frame}. It initializes some internal
data structures. Don't forget to close the function by
@code{.cfi_endproc}.
Unless @code{.cfi_startproc} is used along with parameter @code{simple}
it also emits some architecture dependent initial CFI instructions.
@section @code{.cfi_endproc}
@cindex @code{cfi_endproc} directive
@code{.cfi_endproc} is used at the end of a function where it closes its
unwind entry previously opened by
2006-07-24 13:49:50 +00:00
@code{.cfi_startproc}, and emits it to @code{.eh_frame}.
@section @code{.cfi_personality @var{encoding} [, @var{exp}]}
@code{.cfi_personality} defines personality routine and its encoding.
@var{encoding} must be a constant determining how the personality
should be encoded. If it is 255 (@code{DW_EH_PE_omit}), second
argument is not present, otherwise second argument should be
a constant or a symbol name. When using indirect encodings,
the symbol provided should be the location where personality
can be loaded from, not the personality routine itself.
The default after @code{.cfi_startproc} is @code{.cfi_personality 0xff},
no personality routine.
@section @code{.cfi_lsda @var{encoding} [, @var{exp}]}
@code{.cfi_lsda} defines LSDA and its encoding.
@var{encoding} must be a constant determining how the LSDA
should be encoded. If it is 255 (@code{DW_EH_PE_omit}), second
argument is not present, otherwise second argument should be a constant
or a symbol name. The default after @code{.cfi_startproc} is @code{.cfi_lsda 0xff},
no LSDA.
@section @code{.cfi_def_cfa @var{register}, @var{offset}}
@code{.cfi_def_cfa} defines a rule for computing CFA as: @i{take
address from @var{register} and add @var{offset} to it}.
@section @code{.cfi_def_cfa_register @var{register}}
@code{.cfi_def_cfa_register} modifies a rule for computing CFA. From
now on @var{register} will be used instead of the old one. Offset
remains the same.
@section @code{.cfi_def_cfa_offset @var{offset}}
@code{.cfi_def_cfa_offset} modifies a rule for computing CFA. Register
remains the same, but @var{offset} is new. Note that it is the
absolute offset that will be added to a defined register to compute
CFA address.
@section @code{.cfi_adjust_cfa_offset @var{offset}}
Same as @code{.cfi_def_cfa_offset} but @var{offset} is a relative
value that is added/substracted from the previous offset.
@section @code{.cfi_offset @var{register}, @var{offset}}
Previous value of @var{register} is saved at offset @var{offset} from
CFA.
@section @code{.cfi_rel_offset @var{register}, @var{offset}}
Previous value of @var{register} is saved at offset @var{offset} from
the current CFA register. This is transformed to @code{.cfi_offset}
using the known displacement of the CFA register from the CFA.
This is often easier to use, because the number will match the
code it's annotating.
@section @code{.cfi_register @var{register1}, @var{register2}}
Previous value of @var{register1} is saved in register @var{register2}.
@section @code{.cfi_restore @var{register}}
@code{.cfi_restore} says that the rule for @var{register} is now the
same as it was at the beginning of the function, after all initial
instruction added by @code{.cfi_startproc} were executed.
@section @code{.cfi_undefined @var{register}}
From now on the previous value of @var{register} can't be restored anymore.
@section @code{.cfi_same_value @var{register}}
Current value of @var{register} is the same like in the previous frame,
i.e. no restoration needed.
@section @code{.cfi_remember_state},
First save all current rules for all registers by @code{.cfi_remember_state},
then totally screw them up by subsequent @code{.cfi_*} directives and when
everything is hopelessly bad, use @code{.cfi_restore_state} to restore
the previous saved state.
@section @code{.cfi_return_column @var{register}}
Change return column @var{register}, i.e. the return address is either
directly in @var{register} or can be accessed by rules for @var{register}.
@section @code{.cfi_signal_frame}
Mark current function as signal trampoline.
@section @code{.cfi_window_save}
SPARC register window has been saved.
@section @code{.cfi_escape} @var{expression}[, @dots{}]
Allows the user to add arbitrary bytes to the unwind info. One
might use this to add OS-specific CFI opcodes, or generic CFI
opcodes that GAS does not yet support.
1999-05-03 07:29:11 +00:00
@section @code{.cfi_val_encoded_addr @var{register}, @var{encoding}, @var{label}}
The current value of @var{register} is @var{label}. The value of @var{label}
will be encoded in the output file according to @var{encoding}; see the
description of @code{.cfi_personality} for details on this encoding.
The usefulness of equating a register to a fixed label is probably
limited to the return address register. Here, it can be useful to
mark a code segment that has only one return address which is reached
by a direct branch and no copy of the return address exists in memory
or another register.
@node Comm
@section @code{.comm @var{symbol} , @var{length} }
@cindex @code{comm} directive
@cindex symbol, common
@code{.comm} declares a common symbol named @var{symbol}. When linking, a
common symbol in one object file may be merged with a defined or common symbol
of the same name in another object file. If @code{@value{LD}} does not see a
definition for the symbol--just one or more common symbols--then it will
allocate @var{length} bytes of uninitialized memory. @var{length} must be an
absolute expression. If @code{@value{LD}} sees multiple common symbols with
the same name, and they do not all have the same size, it will allocate space
using the largest size.
* dwarf2dbg.c (struct line_entry): Replace frag and frag_ofs with label. (dwarf2_loc_mark_labels): New. (dwarf2_gen_line_info_1): Split out of ... (dwarf2_gen_line_info): ... here. Create the temp symbol here. (dwarf2_emit_label): New. (dwarf2_directive_loc_mark_labels): New. (out_set_addr): Take a symbol instead of frag+ofs. (relax_inc_line_addr): Likewise. (emit_inc_line_addr): Assert delta non-negative. (process_entries): Remove dead code. Update to work with temp symbols instead of frag+ofs. * dwarf2dbg.h (dwarf2_directive_loc_mark_labels): Declare. (dwarf2_emit_label, dwarf2_loc_mark_labels): Declare. * config/obj-elf.c (elf_pseudo_tab): Add loc_mark_labels. * config/obj-elf.h (obj_frob_label): New. * config/tc-alpha.c (alpha_define_label): Call dwarf2_emit_label. * config/tc-arm.c, config/tc-hppa.c, config/tc-m68k.c, config/tc-mips.c, config/tc-ppc.c, config/tc-sh.c, config/tc-xtensa.c: Similarly in the respective tc_frob_label implementation functions. * config/tc-i386.c (md_pseudo_table): Move file and loc to non-elf section; add loc_mark_labels. * config/tc-ia64.c (struct label_fix): Add dw2_mark_labels. (ia64_flush_insns): Check for marked labels; emit line entry if so. (emit_one_bundle): Similarly. (ia64_frob_label): Record marked labels. * config/tc-m68hc11.h (tc_frob_label): Remove. * config/tc-ms1.c (md_pseudo_table): Remove file and loc. * config/tc-sh.h (tc_frob_label): Pass sym to sh_frob_label. * config/tc-sh64.h (tc_frob_label): Likewise. * doc/as.texinfo (LNS directives): Docuement .loc_mark_blocks.
2005-09-20 18:24:48 +00:00
==> bfd/ChangeLog <== 2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com> * cofflink.c (process_embedded_commands): Ignore "-aligncomm". ==> gas/ChangeLog <== 2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com> * NEWS: Mention new feature. * config/obj-coff.c (obj_coff_common_parse): New function. (obj_coff_comm): Likewise. (coff_pseudo_table): Override default ".comm" definition on PE. * doc/as.texinfo: Document new feature. ==> gas/testsuite/ChangeLog <== 2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com> * gas/pe/: New directory for PE format-specific tests. * gas/pe/aligncomm-a.d: New test pattern file. * gas/pe/aligncomm-a.s: New test source file. * gas/pe/aligncomm-b.d: New test pattern file. * gas/pe/aligncomm-b.s: New test source file. * gas/pe/aligncomm-c.d: New test pattern file. * gas/pe/aligncomm-c.s: New test source file. * gas/pe/aligncomm-d.d: New test pattern file. * gas/pe/aligncomm-d.s: New test source file. * gas/pe/pe.exp: New test control script. * lib/gas-defs.exp (is_pecoff_format): New function. ==> ld/ChangeLog <== 2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com> * NEWS: Mention new feature. * deffile.h (def_file_aligncomm): Add new struct definition. (def_file): Add new def_file_aligncomm member. * deffilep.y (%token): Add new ALIGNCOMM token. (command): Add production rule for ALIGNCOMM. (def_file_free): Free any chained def_file_aligncomm structs. (diropts[]): Add entry for '-aligncomm' .drectve command. (def_aligncomm): New grammar function. * ld.texinfo: Document new feature. * pe-dll.c (process_def_file): Rename from this ... (process_def_file_and_drectve): ... to this, updating all callers, and process any aligncomms chained to the def file after scanning all .drectve sections. (generate_edata): Updated to match. (pe_dll_build_sections): Likewise. ==> ld/testsuite/ChangeLog <== 2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com> * ld-pe/aligncomm-1.c: New test source file. * ld-pe/aligncomm-2.c: Likewise. * ld-pe/aligncomm-3.c: Likewise. * ld-pe/aligncomm-4.c: Likewise. * ld-pe/aligncomm.d: New test pattern file. * ld-pe/direct.exp: Deleted, and content moved into ... * ld-pe/pe-run.exp: ... New common file for all PE run tests. * ld-pe/vers-script.exp: Deleted, and content merged into ... * ld-pe/pe-compile.exp: ... New common file for PE tests needing a compiler, adding aligned common tests. * ld-pe/pe.exp: Update header comment.
2009-05-19 16:08:08 +00:00
@ifset COFF-ELF
When using ELF or (as a GNU extension) PE, the @code{.comm} directive takes
an optional third argument. This is the desired alignment of the symbol,
==> bfd/ChangeLog <== 2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com> * cofflink.c (process_embedded_commands): Ignore "-aligncomm". ==> gas/ChangeLog <== 2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com> * NEWS: Mention new feature. * config/obj-coff.c (obj_coff_common_parse): New function. (obj_coff_comm): Likewise. (coff_pseudo_table): Override default ".comm" definition on PE. * doc/as.texinfo: Document new feature. ==> gas/testsuite/ChangeLog <== 2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com> * gas/pe/: New directory for PE format-specific tests. * gas/pe/aligncomm-a.d: New test pattern file. * gas/pe/aligncomm-a.s: New test source file. * gas/pe/aligncomm-b.d: New test pattern file. * gas/pe/aligncomm-b.s: New test source file. * gas/pe/aligncomm-c.d: New test pattern file. * gas/pe/aligncomm-c.s: New test source file. * gas/pe/aligncomm-d.d: New test pattern file. * gas/pe/aligncomm-d.s: New test source file. * gas/pe/pe.exp: New test control script. * lib/gas-defs.exp (is_pecoff_format): New function. ==> ld/ChangeLog <== 2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com> * NEWS: Mention new feature. * deffile.h (def_file_aligncomm): Add new struct definition. (def_file): Add new def_file_aligncomm member. * deffilep.y (%token): Add new ALIGNCOMM token. (command): Add production rule for ALIGNCOMM. (def_file_free): Free any chained def_file_aligncomm structs. (diropts[]): Add entry for '-aligncomm' .drectve command. (def_aligncomm): New grammar function. * ld.texinfo: Document new feature. * pe-dll.c (process_def_file): Rename from this ... (process_def_file_and_drectve): ... to this, updating all callers, and process any aligncomms chained to the def file after scanning all .drectve sections. (generate_edata): Updated to match. (pe_dll_build_sections): Likewise. ==> ld/testsuite/ChangeLog <== 2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com> * ld-pe/aligncomm-1.c: New test source file. * ld-pe/aligncomm-2.c: Likewise. * ld-pe/aligncomm-3.c: Likewise. * ld-pe/aligncomm-4.c: Likewise. * ld-pe/aligncomm.d: New test pattern file. * ld-pe/direct.exp: Deleted, and content moved into ... * ld-pe/pe-run.exp: ... New common file for all PE run tests. * ld-pe/vers-script.exp: Deleted, and content merged into ... * ld-pe/pe-compile.exp: ... New common file for PE tests needing a compiler, adding aligned common tests. * ld-pe/pe.exp: Update header comment.
2009-05-19 16:08:08 +00:00
specified for ELF as a byte boundary (for example, an alignment of 16 means
that the least significant 4 bits of the address should be zero), and for PE
as a power of two (for example, an alignment of 5 means aligned to a 32-byte
boundary). The alignment must be an absolute expression, and it must be a
==> bfd/ChangeLog <== 2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com> * cofflink.c (process_embedded_commands): Ignore "-aligncomm". ==> gas/ChangeLog <== 2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com> * NEWS: Mention new feature. * config/obj-coff.c (obj_coff_common_parse): New function. (obj_coff_comm): Likewise. (coff_pseudo_table): Override default ".comm" definition on PE. * doc/as.texinfo: Document new feature. ==> gas/testsuite/ChangeLog <== 2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com> * gas/pe/: New directory for PE format-specific tests. * gas/pe/aligncomm-a.d: New test pattern file. * gas/pe/aligncomm-a.s: New test source file. * gas/pe/aligncomm-b.d: New test pattern file. * gas/pe/aligncomm-b.s: New test source file. * gas/pe/aligncomm-c.d: New test pattern file. * gas/pe/aligncomm-c.s: New test source file. * gas/pe/aligncomm-d.d: New test pattern file. * gas/pe/aligncomm-d.s: New test source file. * gas/pe/pe.exp: New test control script. * lib/gas-defs.exp (is_pecoff_format): New function. ==> ld/ChangeLog <== 2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com> * NEWS: Mention new feature. * deffile.h (def_file_aligncomm): Add new struct definition. (def_file): Add new def_file_aligncomm member. * deffilep.y (%token): Add new ALIGNCOMM token. (command): Add production rule for ALIGNCOMM. (def_file_free): Free any chained def_file_aligncomm structs. (diropts[]): Add entry for '-aligncomm' .drectve command. (def_aligncomm): New grammar function. * ld.texinfo: Document new feature. * pe-dll.c (process_def_file): Rename from this ... (process_def_file_and_drectve): ... to this, updating all callers, and process any aligncomms chained to the def file after scanning all .drectve sections. (generate_edata): Updated to match. (pe_dll_build_sections): Likewise. ==> ld/testsuite/ChangeLog <== 2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com> * ld-pe/aligncomm-1.c: New test source file. * ld-pe/aligncomm-2.c: Likewise. * ld-pe/aligncomm-3.c: Likewise. * ld-pe/aligncomm-4.c: Likewise. * ld-pe/aligncomm.d: New test pattern file. * ld-pe/direct.exp: Deleted, and content moved into ... * ld-pe/pe-run.exp: ... New common file for all PE run tests. * ld-pe/vers-script.exp: Deleted, and content merged into ... * ld-pe/pe-compile.exp: ... New common file for PE tests needing a compiler, adding aligned common tests. * ld-pe/pe.exp: Update header comment.
2009-05-19 16:08:08 +00:00
power of two. If @code{@value{LD}} allocates uninitialized memory for the
common symbol, it will use the alignment when placing the symbol. If no
==> bfd/ChangeLog <== 2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com> * cofflink.c (process_embedded_commands): Ignore "-aligncomm". ==> gas/ChangeLog <== 2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com> * NEWS: Mention new feature. * config/obj-coff.c (obj_coff_common_parse): New function. (obj_coff_comm): Likewise. (coff_pseudo_table): Override default ".comm" definition on PE. * doc/as.texinfo: Document new feature. ==> gas/testsuite/ChangeLog <== 2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com> * gas/pe/: New directory for PE format-specific tests. * gas/pe/aligncomm-a.d: New test pattern file. * gas/pe/aligncomm-a.s: New test source file. * gas/pe/aligncomm-b.d: New test pattern file. * gas/pe/aligncomm-b.s: New test source file. * gas/pe/aligncomm-c.d: New test pattern file. * gas/pe/aligncomm-c.s: New test source file. * gas/pe/aligncomm-d.d: New test pattern file. * gas/pe/aligncomm-d.s: New test source file. * gas/pe/pe.exp: New test control script. * lib/gas-defs.exp (is_pecoff_format): New function. ==> ld/ChangeLog <== 2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com> * NEWS: Mention new feature. * deffile.h (def_file_aligncomm): Add new struct definition. (def_file): Add new def_file_aligncomm member. * deffilep.y (%token): Add new ALIGNCOMM token. (command): Add production rule for ALIGNCOMM. (def_file_free): Free any chained def_file_aligncomm structs. (diropts[]): Add entry for '-aligncomm' .drectve command. (def_aligncomm): New grammar function. * ld.texinfo: Document new feature. * pe-dll.c (process_def_file): Rename from this ... (process_def_file_and_drectve): ... to this, updating all callers, and process any aligncomms chained to the def file after scanning all .drectve sections. (generate_edata): Updated to match. (pe_dll_build_sections): Likewise. ==> ld/testsuite/ChangeLog <== 2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com> * ld-pe/aligncomm-1.c: New test source file. * ld-pe/aligncomm-2.c: Likewise. * ld-pe/aligncomm-3.c: Likewise. * ld-pe/aligncomm-4.c: Likewise. * ld-pe/aligncomm.d: New test pattern file. * ld-pe/direct.exp: Deleted, and content moved into ... * ld-pe/pe-run.exp: ... New common file for all PE run tests. * ld-pe/vers-script.exp: Deleted, and content merged into ... * ld-pe/pe-compile.exp: ... New common file for PE tests needing a compiler, adding aligned common tests. * ld-pe/pe.exp: Update header comment.
2009-05-19 16:08:08 +00:00
alignment is specified, @command{@value{AS}} will set the alignment to the
largest power of two less than or equal to the size of the symbol, up to a
==> bfd/ChangeLog <== 2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com> * cofflink.c (process_embedded_commands): Ignore "-aligncomm". ==> gas/ChangeLog <== 2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com> * NEWS: Mention new feature. * config/obj-coff.c (obj_coff_common_parse): New function. (obj_coff_comm): Likewise. (coff_pseudo_table): Override default ".comm" definition on PE. * doc/as.texinfo: Document new feature. ==> gas/testsuite/ChangeLog <== 2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com> * gas/pe/: New directory for PE format-specific tests. * gas/pe/aligncomm-a.d: New test pattern file. * gas/pe/aligncomm-a.s: New test source file. * gas/pe/aligncomm-b.d: New test pattern file. * gas/pe/aligncomm-b.s: New test source file. * gas/pe/aligncomm-c.d: New test pattern file. * gas/pe/aligncomm-c.s: New test source file. * gas/pe/aligncomm-d.d: New test pattern file. * gas/pe/aligncomm-d.s: New test source file. * gas/pe/pe.exp: New test control script. * lib/gas-defs.exp (is_pecoff_format): New function. ==> ld/ChangeLog <== 2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com> * NEWS: Mention new feature. * deffile.h (def_file_aligncomm): Add new struct definition. (def_file): Add new def_file_aligncomm member. * deffilep.y (%token): Add new ALIGNCOMM token. (command): Add production rule for ALIGNCOMM. (def_file_free): Free any chained def_file_aligncomm structs. (diropts[]): Add entry for '-aligncomm' .drectve command. (def_aligncomm): New grammar function. * ld.texinfo: Document new feature. * pe-dll.c (process_def_file): Rename from this ... (process_def_file_and_drectve): ... to this, updating all callers, and process any aligncomms chained to the def file after scanning all .drectve sections. (generate_edata): Updated to match. (pe_dll_build_sections): Likewise. ==> ld/testsuite/ChangeLog <== 2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com> * ld-pe/aligncomm-1.c: New test source file. * ld-pe/aligncomm-2.c: Likewise. * ld-pe/aligncomm-3.c: Likewise. * ld-pe/aligncomm-4.c: Likewise. * ld-pe/aligncomm.d: New test pattern file. * ld-pe/direct.exp: Deleted, and content moved into ... * ld-pe/pe-run.exp: ... New common file for all PE run tests. * ld-pe/vers-script.exp: Deleted, and content merged into ... * ld-pe/pe-compile.exp: ... New common file for PE tests needing a compiler, adding aligned common tests. * ld-pe/pe.exp: Update header comment.
2009-05-19 16:08:08 +00:00
maximum of 16 on ELF, or the default section alignment of 4 on PE@footnote{This
is not the same as the executable image file alignment controlled by @code{@value{LD}}'s
@samp{--section-alignment} option; image file sections in PE are aligned to
multiples of 4096, which is far too large an alignment for ordinary variables.
It is rather the default alignment for (non-debug) sections within object
(@samp{*.o}) files, which are less strictly aligned.}.
@end ifset
@ifset HPPA
The syntax for @code{.comm} differs slightly on the HPPA. The syntax is
@samp{@var{symbol} .comm, @var{length}}; @var{symbol} is optional.
@end ifset
* dwarf2dbg.c (struct line_entry): Replace frag and frag_ofs with label. (dwarf2_loc_mark_labels): New. (dwarf2_gen_line_info_1): Split out of ... (dwarf2_gen_line_info): ... here. Create the temp symbol here. (dwarf2_emit_label): New. (dwarf2_directive_loc_mark_labels): New. (out_set_addr): Take a symbol instead of frag+ofs. (relax_inc_line_addr): Likewise. (emit_inc_line_addr): Assert delta non-negative. (process_entries): Remove dead code. Update to work with temp symbols instead of frag+ofs. * dwarf2dbg.h (dwarf2_directive_loc_mark_labels): Declare. (dwarf2_emit_label, dwarf2_loc_mark_labels): Declare. * config/obj-elf.c (elf_pseudo_tab): Add loc_mark_labels. * config/obj-elf.h (obj_frob_label): New. * config/tc-alpha.c (alpha_define_label): Call dwarf2_emit_label. * config/tc-arm.c, config/tc-hppa.c, config/tc-m68k.c, config/tc-mips.c, config/tc-ppc.c, config/tc-sh.c, config/tc-xtensa.c: Similarly in the respective tc_frob_label implementation functions. * config/tc-i386.c (md_pseudo_table): Move file and loc to non-elf section; add loc_mark_labels. * config/tc-ia64.c (struct label_fix): Add dw2_mark_labels. (ia64_flush_insns): Check for marked labels; emit line entry if so. (emit_one_bundle): Similarly. (ia64_frob_label): Record marked labels. * config/tc-m68hc11.h (tc_frob_label): Remove. * config/tc-ms1.c (md_pseudo_table): Remove file and loc. * config/tc-sh.h (tc_frob_label): Pass sym to sh_frob_label. * config/tc-sh64.h (tc_frob_label): Likewise. * doc/as.texinfo (LNS directives): Docuement .loc_mark_blocks.
2005-09-20 18:24:48 +00:00
1999-05-03 07:29:11 +00:00
@node Data
@section @code{.data @var{subsection}}
@cindex @code{data} directive
@code{.data} tells @command{@value{AS}} to assemble the following statements onto the
1999-05-03 07:29:11 +00:00
end of the data subsection numbered @var{subsection} (which is an
absolute expression). If @var{subsection} is omitted, it defaults
to zero.
@ifset COFF
@node Def
@section @code{.def @var{name}}
@cindex @code{def} directive
@cindex COFF symbols, debugging
@cindex debugging COFF symbols
Begin defining debugging information for a symbol @var{name}; the
definition extends until the @code{.endef} directive is encountered.
@ifset BOUT
This directive is only observed when @command{@value{AS}} is configured for COFF
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format output; when producing @code{b.out}, @samp{.def} is recognized,
but ignored.
@end ifset
@end ifset
@ifset aout-bout
@node Desc
@section @code{.desc @var{symbol}, @var{abs-expression}}
@cindex @code{desc} directive
@cindex COFF symbol descriptor
@cindex symbol descriptor, COFF
This directive sets the descriptor of the symbol (@pxref{Symbol Attributes})
to the low 16 bits of an absolute expression.
@ifset COFF
The @samp{.desc} directive is not available when @command{@value{AS}} is
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configured for COFF output; it is only for @code{a.out} or @code{b.out}
object format. For the sake of compatibility, @command{@value{AS}} accepts
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it, but produces no output, when configured for COFF.
@end ifset
@end ifset
@ifset COFF
@node Dim
@section @code{.dim}
@cindex @code{dim} directive
@cindex COFF auxiliary symbol information
@cindex auxiliary symbol information, COFF
This directive is generated by compilers to include auxiliary debugging
information in the symbol table. It is only permitted inside
@code{.def}/@code{.endef} pairs.
@ifset BOUT
@samp{.dim} is only meaningful when generating COFF format output; when
@command{@value{AS}} is generating @code{b.out}, it accepts this directive but
1999-05-03 07:29:11 +00:00
ignores it.
@end ifset
@end ifset
@node Double
@section @code{.double @var{flonums}}
@cindex @code{double} directive
@cindex floating point numbers (double)
@code{.double} expects zero or more flonums, separated by commas. It
assembles floating point numbers.
@ifset GENERIC
The exact kind of floating point numbers emitted depends on how
@command{@value{AS}} is configured. @xref{Machine Dependencies}.
1999-05-03 07:29:11 +00:00
@end ifset
@ifclear GENERIC
@ifset IEEEFLOAT
On the @value{TARGET} family @samp{.double} emits 64-bit floating-point numbers
in @sc{ieee} format.
@end ifset
@end ifclear
@node Eject
@section @code{.eject}
@cindex @code{eject} directive
@cindex new page, in listings
@cindex page, in listings
@cindex listing control: new page
Force a page break at this point, when generating assembly listings.
@node Else
@section @code{.else}
@cindex @code{else} directive
@code{.else} is part of the @command{@value{AS}} support for conditional
assembly; see @ref{If,,@code{.if}}. It marks the beginning of a section
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of code to be assembled if the condition for the preceding @code{.if}
was false.
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@node Elseif
@section @code{.elseif}
@cindex @code{elseif} directive
@code{.elseif} is part of the @command{@value{AS}} support for conditional
assembly; see @ref{If,,@code{.if}}. It is shorthand for beginning a new
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@code{.if} block that would otherwise fill the entire @code{.else} section.
1999-05-03 07:29:11 +00:00
@node End
@section @code{.end}
@cindex @code{end} directive
@code{.end} marks the end of the assembly file. @command{@value{AS}} does not
1999-05-03 07:29:11 +00:00
process anything in the file past the @code{.end} directive.
@ifset COFF
@node Endef
@section @code{.endef}
@cindex @code{endef} directive
This directive flags the end of a symbol definition begun with
@code{.def}.
@ifset BOUT
@samp{.endef} is only meaningful when generating COFF format output; if
@command{@value{AS}} is configured to generate @code{b.out}, it accepts this
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directive but ignores it.
@end ifset
@end ifset
@node Endfunc
@section @code{.endfunc}
@cindex @code{endfunc} directive
@code{.endfunc} marks the end of a function specified with @code{.func}.
@node Endif
@section @code{.endif}
@cindex @code{endif} directive
@code{.endif} is part of the @command{@value{AS}} support for conditional assembly;
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it marks the end of a block of code that is only assembled
conditionally. @xref{If,,@code{.if}}.
@node Equ
@section @code{.equ @var{symbol}, @var{expression}}
@cindex @code{equ} directive
@cindex assigning values to symbols
@cindex symbols, assigning values to
This directive sets the value of @var{symbol} to @var{expression}.
It is synonymous with @samp{.set}; see @ref{Set,,@code{.set}}.
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@ifset HPPA
The syntax for @code{equ} on the HPPA is
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@samp{@var{symbol} .equ @var{expression}}.
@end ifset
@ifset Z80
The syntax for @code{equ} on the Z80 is
@samp{@var{symbol} equ @var{expression}}.
On the Z80 it is an eror if @var{symbol} is already defined,
but the symbol is not protected from later redefinition.
Compare @ref{Equiv}.
@end ifset
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@node Equiv
@section @code{.equiv @var{symbol}, @var{expression}}
@cindex @code{equiv} directive
The @code{.equiv} directive is like @code{.equ} and @code{.set}, except that
the assembler will signal an error if @var{symbol} is already defined. Note a
symbol which has been referenced but not actually defined is considered to be
undefined.
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Except for the contents of the error message, this is roughly equivalent to
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@smallexample
.ifdef SYM
.err
.endif
.equ SYM,VAL
@end smallexample
plus it protects the symbol from later redefinition.
@node Eqv
@section @code{.eqv @var{symbol}, @var{expression}}
@cindex @code{eqv} directive
The @code{.eqv} directive is like @code{.equiv}, but no attempt is made to
evaluate the expression or any part of it immediately. Instead each time
the resulting symbol is used in an expression, a snapshot of its current
value is taken.
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@node Err
@section @code{.err}
@cindex @code{err} directive
If @command{@value{AS}} assembles a @code{.err} directive, it will print an error
message and, unless the @option{-Z} option was used, it will not generate an
gas/ acinclude.m4 aclocal.m4 app.c app.o as.c as.h as.h.cvs asintl.h as-new as.o atof-generic.c atof-generic.o atof-ieee.o autom4te.cache bignum.h bit_fix.h cgen.c cgen.h ChangeLog ChangeLog-0001 ChangeLog-0203 ChangeLog.~1.2755.~ ChangeLog-9295 ChangeLog-9697 ChangeLog-9899 cond.c cond.o config config.cache config.h config.in config.log config.status configure configure.in configure.tgt CONTRIBUTORS COPYING CVS debug.c DEP2 DEPDIR depend.c depend.o dep-in.sed DEPOBJ dep.sed DEPTC doc dw2gencfi.c dw2gencfi.h dw2gencfi.o dwarf2dbg.c dwarf2dbg.h dwarf2dbg.o ecoff.c ecoff.h ecoff.o ehopt.c ehopt.o emul.h emul-target.h expr.c expr.c.cvs expr.h expr.o flonum-copy.c flonum-copy.o flonum.h flonum-konst.c flonum-konst.o flonum-mult.c flonum-mult.o frags.c frags.h frags.o gdbinit.in hash.c hash.h hash.o input-file.c input-file.h input-file.o input-scrub.c input-scrub.o itbl-cpu.h itbl-lex.h itbl-lex.l itbl-ops.c itbl-ops.h itbl-parse.y libtool listing.c listing.h listing.o literal.c literal.o long.s macro.c macro.c.bak macro.h macro.o MAINTAINERS Makefile Makefile.am Makefile.in messages.c messages.o NEWS obj-coff.o obj-format.h obj.h output-file.c output-file.h output-file.o po read.c read.h README read.o sb.c sb.h sb.o site.bak site.exp stabs.c stabs.o stamp-h1 stamp-h.in struc-symbol.h subsegs.c subsegs.h subsegs.o symbols.c symbols.h symbols.o targ-cpu.h targ-env.h tc.h tc-z80.o testsuite write.c write.h write.o config/tc-z80.c (z80_start_line_hook): issue an error when redefining a symbol with equ acinclude.m4 aclocal.m4 app.c app.o as.c as.h as.h.cvs asintl.h as-new as.o atof-generic.c atof-generic.o atof-ieee.o autom4te.cache bignum.h bit_fix.h cgen.c cgen.h ChangeLog ChangeLog-0001 ChangeLog-0203 ChangeLog.~1.2755.~ ChangeLog-9295 ChangeLog-9697 ChangeLog-9899 cond.c cond.o config config.cache config.h config.in config.log config.status configure configure.in configure.tgt CONTRIBUTORS COPYING CVS debug.c DEP2 DEPDIR depend.c depend.o dep-in.sed DEPOBJ dep.sed DEPTC doc dw2gencfi.c dw2gencfi.h dw2gencfi.o dwarf2dbg.c dwarf2dbg.h dwarf2dbg.o ecoff.c ecoff.h ecoff.o ehopt.c ehopt.o emul.h emul-target.h expr.c expr.c.cvs expr.h expr.o flonum-copy.c flonum-copy.o flonum.h flonum-konst.c flonum-konst.o flonum-mult.c flonum-mult.o frags.c frags.h frags.o gdbinit.in hash.c hash.h hash.o input-file.c input-file.h input-file.o input-scrub.c input-scrub.o itbl-cpu.h itbl-lex.h itbl-lex.l itbl-ops.c itbl-ops.h itbl-parse.y libtool listing.c listing.h listing.o literal.c literal.o long.s macro.c macro.c.bak macro.h macro.o MAINTAINERS Makefile Makefile.am Makefile.in messages.c messages.o NEWS obj-coff.o obj-format.h obj.h output-file.c output-file.h output-file.o po read.c read.h README read.o sb.c sb.h sb.o site.bak site.exp stabs.c stabs.o stamp-h1 stamp-h.in struc-symbol.h subsegs.c subsegs.h subsegs.o symbols.c symbols.h symbols.o targ-cpu.h targ-env.h tc.h tc-z80.o testsuite write.c write.h write.o doc/as.texinfo(equ<z80>): mention difference with .equiv acinclude.m4 aclocal.m4 app.c app.o as.c as.h as.h.cvs asintl.h as-new as.o atof-generic.c atof-generic.o atof-ieee.o autom4te.cache bignum.h bit_fix.h cgen.c cgen.h ChangeLog ChangeLog-0001 ChangeLog-0203 ChangeLog.~1.2755.~ ChangeLog-9295 ChangeLog-9697 ChangeLog-9899 cond.c cond.o config config.cache config.h config.in config.log config.status configure configure.in configure.tgt CONTRIBUTORS COPYING CVS debug.c DEP2 DEPDIR depend.c depend.o dep-in.sed DEPOBJ dep.sed DEPTC doc dw2gencfi.c dw2gencfi.h dw2gencfi.o dwarf2dbg.c dwarf2dbg.h dwarf2dbg.o ecoff.c ecoff.h ecoff.o ehopt.c ehopt.o emul.h emul-target.h expr.c expr.c.cvs expr.h expr.o flonum-copy.c flonum-copy.o flonum.h flonum-konst.c flonum-konst.o flonum-mult.c flonum-mult.o frags.c frags.h frags.o gdbinit.in hash.c hash.h hash.o input-file.c input-file.h input-file.o input-scrub.c input-scrub.o itbl-cpu.h itbl-lex.h itbl-lex.l itbl-ops.c itbl-ops.h itbl-parse.y libtool listing.c listing.h listing.o literal.c literal.o long.s macro.c macro.c.bak macro.h macro.o MAINTAINERS Makefile Makefile.am Makefile.in messages.c messages.o NEWS obj-coff.o obj-format.h obj.h output-file.c output-file.h output-file.o po read.c read.h README read.o sb.c sb.h sb.o site.bak site.exp stabs.c stabs.o stamp-h1 stamp-h.in struc-symbol.h subsegs.c subsegs.h subsegs.o symbols.c symbols.h symbols.o targ-cpu.h targ-env.h tc.h tc-z80.o testsuite write.c write.h write.o doc/as.texinfo(err): fix typo acinclude.m4 aclocal.m4 app.c app.o as.c as.h as.h.cvs asintl.h as-new as.o atof-generic.c atof-generic.o atof-ieee.o autom4te.cache bignum.h bit_fix.h cgen.c cgen.h ChangeLog ChangeLog-0001 ChangeLog-0203 ChangeLog.~1.2755.~ ChangeLog-9295 ChangeLog-9697 ChangeLog-9899 cond.c cond.o config config.cache config.h config.in config.log config.status configure configure.in configure.tgt CONTRIBUTORS COPYING CVS debug.c DEP2 DEPDIR depend.c depend.o dep-in.sed DEPOBJ dep.sed DEPTC doc dw2gencfi.c dw2gencfi.h dw2gencfi.o dwarf2dbg.c dwarf2dbg.h dwarf2dbg.o ecoff.c ecoff.h ecoff.o ehopt.c ehopt.o emul.h emul-target.h expr.c expr.c.cvs expr.h expr.o flonum-copy.c flonum-copy.o flonum.h flonum-konst.c flonum-konst.o flonum-mult.c flonum-mult.o frags.c frags.h frags.o gdbinit.in hash.c hash.h hash.o input-file.c input-file.h input-file.o input-scrub.c input-scrub.o itbl-cpu.h itbl-lex.h itbl-lex.l itbl-ops.c itbl-ops.h itbl-parse.y libtool listing.c listing.h listing.o literal.c literal.o long.s macro.c macro.c.bak macro.h macro.o MAINTAINERS Makefile Makefile.am Makefile.in messages.c messages.o NEWS obj-coff.o obj-format.h obj.h output-file.c output-file.h output-file.o po read.c read.h README read.o sb.c sb.h sb.o site.bak site.exp stabs.c stabs.o stamp-h1 stamp-h.in struc-symbol.h subsegs.c subsegs.h subsegs.o symbols.c symbols.h symbols.o targ-cpu.h targ-env.h tc.h tc-z80.o testsuite write.c write.h write.o doc/c-z80.texi(equ): redefining a symbol with equ is no longer allowed
2005-11-26 20:03:53 +00:00
object file. This can be used to signal an error in conditionally compiled code.
1999-05-03 07:29:11 +00:00
@node Error
@section @code{.error "@var{string}"}
@cindex error directive
Similarly to @code{.err}, this directive emits an error, but you can specify a
string that will be emitted as the error message. If you don't specify the
message, it defaults to @code{".error directive invoked in source file"}.
@xref{Errors, ,Error and Warning Messages}.
@smallexample
.error "This code has not been assembled and tested."
@end smallexample
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@node Exitm
@section @code{.exitm}
Exit early from the current macro definition. @xref{Macro}.
@node Extern
@section @code{.extern}
@cindex @code{extern} directive
@code{.extern} is accepted in the source program---for compatibility
with other assemblers---but it is ignored. @command{@value{AS}} treats
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all undefined symbols as external.
@node Fail
@section @code{.fail @var{expression}}
@cindex @code{fail} directive
Generates an error or a warning. If the value of the @var{expression} is 500
or more, @command{@value{AS}} will print a warning message. If the value is less
than 500, @command{@value{AS}} will print an error message. The message will
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include the value of @var{expression}. This can occasionally be useful inside
complex nested macros or conditional assembly.
@node File
@section @code{.file}
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@cindex @code{file} directive
@ifclear no-file-dir
There are two different versions of the @code{.file} directive. Targets
that support DWARF2 line number information use the DWARF2 version of
@code{.file}. Other targets use the default version.
@subheading Default Version
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@cindex logical file name
@cindex file name, logical
This version of the @code{.file} directive tells @command{@value{AS}} that we
are about to start a new logical file. The syntax is:
@smallexample
.file @var{string}
@end smallexample
@var{string} is the new file name. In general, the filename is
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recognized whether or not it is surrounded by quotes @samp{"}; but if you wish
to specify an empty file name, you must give the quotes--@code{""}. This
statement may go away in future: it is only recognized to be compatible with
old @command{@value{AS}} programs.
@subheading DWARF2 Version
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@end ifclear
When emitting DWARF2 line number information, @code{.file} assigns filenames
to the @code{.debug_line} file name table. The syntax is:
@smallexample
.file @var{fileno} @var{filename}
@end smallexample
The @var{fileno} operand should be a unique positive integer to use as the
index of the entry in the table. The @var{filename} operand is a C string
literal.
The detail of filename indices is exposed to the user because the filename
table is shared with the @code{.debug_info} section of the DWARF2 debugging
information, and thus the user must know the exact indices that table
entries will have.
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@node Fill
@section @code{.fill @var{repeat} , @var{size} , @var{value}}
@cindex @code{fill} directive
@cindex writing patterns in memory
@cindex patterns, writing in memory
@var{repeat}, @var{size} and @var{value} are absolute expressions.
1999-05-03 07:29:11 +00:00
This emits @var{repeat} copies of @var{size} bytes. @var{Repeat}
may be zero or more. @var{Size} may be zero or more, but if it is
more than 8, then it is deemed to have the value 8, compatible with
other people's assemblers. The contents of each @var{repeat} bytes
is taken from an 8-byte number. The highest order 4 bytes are
zero. The lowest order 4 bytes are @var{value} rendered in the
byte-order of an integer on the computer @command{@value{AS}} is assembling for.
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Each @var{size} bytes in a repetition is taken from the lowest order
@var{size} bytes of this number. Again, this bizarre behavior is
compatible with other people's assemblers.
@var{size} and @var{value} are optional.
If the second comma and @var{value} are absent, @var{value} is
assumed zero. If the first comma and following tokens are absent,
@var{size} is assumed to be 1.
@node Float
@section @code{.float @var{flonums}}
@cindex floating point numbers (single)
@cindex @code{float} directive
This directive assembles zero or more flonums, separated by commas. It
has the same effect as @code{.single}.
@ifset GENERIC
The exact kind of floating point numbers emitted depends on how
@command{@value{AS}} is configured.
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@xref{Machine Dependencies}.
@end ifset
@ifclear GENERIC
@ifset IEEEFLOAT
On the @value{TARGET} family, @code{.float} emits 32-bit floating point numbers
in @sc{ieee} format.
@end ifset
@end ifclear
@node Func
@section @code{.func @var{name}[,@var{label}]}
@cindex @code{func} directive
@code{.func} emits debugging information to denote function @var{name}, and
is ignored unless the file is assembled with debugging enabled.
Only @samp{--gstabs[+]} is currently supported.
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@var{label} is the entry point of the function and if omitted @var{name}
prepended with the @samp{leading char} is used.
@samp{leading char} is usually @code{_} or nothing, depending on the target.
All functions are currently defined to have @code{void} return type.
The function must be terminated with @code{.endfunc}.
@node Global
@section @code{.global @var{symbol}}, @code{.globl @var{symbol}}
@cindex @code{global} directive
@cindex symbol, making visible to linker
@code{.global} makes the symbol visible to @code{@value{LD}}. If you define
@var{symbol} in your partial program, its value is made available to
other partial programs that are linked with it. Otherwise,
@var{symbol} takes its attributes from a symbol of the same name
from another file linked into the same program.
Both spellings (@samp{.globl} and @samp{.global}) are accepted, for
compatibility with other assemblers.
@ifset HPPA
On the HPPA, @code{.global} is not always enough to make it accessible to other
partial programs. You may need the HPPA-only @code{.EXPORT} directive as well.
@xref{HPPA Directives, ,HPPA Assembler Directives}.
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@end ifset
@ifset ELF
@node Gnu_attribute
@section @code{.gnu_attribute @var{tag},@var{value}}
Record a @sc{gnu} object attribute for this file. @xref{Object Attributes}.
@node Hidden
@section @code{.hidden @var{names}}
@cindex @code{hidden} directive
@cindex visibility
This is one of the ELF visibility directives. The other two are
@code{.internal} (@pxref{Internal,,@code{.internal}}) and
@code{.protected} (@pxref{Protected,,@code{.protected}}).
This directive overrides the named symbols default visibility (which is set by
their binding: local, global or weak). The directive sets the visibility to
@code{hidden} which means that the symbols are not visible to other components.
Such symbols are always considered to be @code{protected} as well.
@end ifset
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@node hword
@section @code{.hword @var{expressions}}
@cindex @code{hword} directive
@cindex integers, 16-bit
@cindex numbers, 16-bit
@cindex sixteen bit integers
This expects zero or more @var{expressions}, and emits
a 16 bit number for each.
@ifset GENERIC
This directive is a synonym for @samp{.short}; depending on the target
architecture, it may also be a synonym for @samp{.word}.
@end ifset
@ifclear GENERIC
@ifset W32
This directive is a synonym for @samp{.short}.
@end ifset
@ifset W16
This directive is a synonym for both @samp{.short} and @samp{.word}.
@end ifset
@end ifclear
@node Ident
@section @code{.ident}
@cindex @code{ident} directive
This directive is used by some assemblers to place tags in object files. The
behavior of this directive varies depending on the target. When using the
a.out object file format, @command{@value{AS}} simply accepts the directive for
source-file compatibility with existing assemblers, but does not emit anything
for it. When using COFF, comments are emitted to the @code{.comment} or
@code{.rdata} section, depending on the target. When using ELF, comments are
emitted to the @code{.comment} section.
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@node If
@section @code{.if @var{absolute expression}}
@cindex conditional assembly
@cindex @code{if} directive
@code{.if} marks the beginning of a section of code which is only
considered part of the source program being assembled if the argument
(which must be an @var{absolute expression}) is non-zero. The end of
the conditional section of code must be marked by @code{.endif}
(@pxref{Endif,,@code{.endif}}); optionally, you may include code for the
alternative condition, flagged by @code{.else} (@pxref{Else,,@code{.else}}).
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If you have several conditions to check, @code{.elseif} may be used to avoid
nesting blocks if/else within each subsequent @code{.else} block.
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The following variants of @code{.if} are also supported:
@table @code
@cindex @code{ifdef} directive
@item .ifdef @var{symbol}
Assembles the following section of code if the specified @var{symbol}
has been defined. Note a symbol which has been referenced but not yet defined
is considered to be undefined.
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@cindex @code{ifb} directive
@item .ifb @var{text}
Assembles the following section of code if the operand is blank (empty).
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@cindex @code{ifc} directive
@item .ifc @var{string1},@var{string2}
Assembles the following section of code if the two strings are the same. The
strings may be optionally quoted with single quotes. If they are not quoted,
the first string stops at the first comma, and the second string stops at the
end of the line. Strings which contain whitespace should be quoted. The
string comparison is case sensitive.
@cindex @code{ifeq} directive
@item .ifeq @var{absolute expression}
Assembles the following section of code if the argument is zero.
@cindex @code{ifeqs} directive
@item .ifeqs @var{string1},@var{string2}
Another form of @code{.ifc}. The strings must be quoted using double quotes.
@cindex @code{ifge} directive
@item .ifge @var{absolute expression}
Assembles the following section of code if the argument is greater than or
equal to zero.
@cindex @code{ifgt} directive
@item .ifgt @var{absolute expression}
Assembles the following section of code if the argument is greater than zero.
@cindex @code{ifle} directive
@item .ifle @var{absolute expression}
Assembles the following section of code if the argument is less than or equal
to zero.
@cindex @code{iflt} directive
@item .iflt @var{absolute expression}
Assembles the following section of code if the argument is less than zero.
@cindex @code{ifnb} directive
@item .ifnb @var{text}
Like @code{.ifb}, but the sense of the test is reversed: this assembles the
following section of code if the operand is non-blank (non-empty).
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@cindex @code{ifnc} directive
@item .ifnc @var{string1},@var{string2}.
Like @code{.ifc}, but the sense of the test is reversed: this assembles the
following section of code if the two strings are not the same.
@cindex @code{ifndef} directive
@cindex @code{ifnotdef} directive
@item .ifndef @var{symbol}
@itemx .ifnotdef @var{symbol}
Assembles the following section of code if the specified @var{symbol}
has not been defined. Both spelling variants are equivalent. Note a symbol
which has been referenced but not yet defined is considered to be undefined.
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@cindex @code{ifne} directive
@item .ifne @var{absolute expression}
Assembles the following section of code if the argument is not equal to zero
(in other words, this is equivalent to @code{.if}).
@cindex @code{ifnes} directive
@item .ifnes @var{string1},@var{string2}
Like @code{.ifeqs}, but the sense of the test is reversed: this assembles the
following section of code if the two strings are not the same.
@end table
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@node Incbin
@section @code{.incbin "@var{file}"[,@var{skip}[,@var{count}]]}
@cindex @code{incbin} directive
@cindex binary files, including
The @code{incbin} directive includes @var{file} verbatim at the current
location. You can control the search paths used with the @samp{-I} command-line
option (@pxref{Invoking,,Command-Line Options}). Quotation marks are required
around @var{file}.
The @var{skip} argument skips a number of bytes from the start of the
@var{file}. The @var{count} argument indicates the maximum number of bytes to
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read. Note that the data is not aligned in any way, so it is the user's
responsibility to make sure that proper alignment is provided both before and
after the @code{incbin} directive.
2001-07-09 08:19:18 +00:00
1999-05-03 07:29:11 +00:00
@node Include
@section @code{.include "@var{file}"}
@cindex @code{include} directive
@cindex supporting files, including
@cindex files, including
This directive provides a way to include supporting files at specified
points in your source program. The code from @var{file} is assembled as
if it followed the point of the @code{.include}; when the end of the
included file is reached, assembly of the original file continues. You
can control the search paths used with the @samp{-I} command-line option
(@pxref{Invoking,,Command-Line Options}). Quotation marks are required
around @var{file}.
@node Int
@section @code{.int @var{expressions}}
@cindex @code{int} directive
@cindex integers, 32-bit
Expect zero or more @var{expressions}, of any section, separated by commas.
For each expression, emit a number that, at run time, is the value of that
expression. The byte order and bit size of the number depends on what kind
of target the assembly is for.
@ifclear GENERIC
@ifset H8
* README-vms: Delete. * config-gas.com: Delete. * makefile.vms: Delete. * vmsconf.sh: Delete. * config/atof-tahoe.c: Delete. * config/m88k-opcode.h: Delete. * config/obj-bout.c: Delete. * config/obj-bout.h: Delete. * config/obj-hp300.c: Delete. * config/obj-hp300.h: Delete. * config/tc-a29k.c: Delete. * config/tc-a29k.h: Delete. * config/tc-h8500.c: Delete. * config/tc-h8500.h: Delete. * config/tc-m88k.c: Delete. * config/tc-m88k.h: Delete. * config/tc-tahoe.c: Delete. * config/tc-tahoe.h: Delete. * config/tc-tic80.c: Delete. * config/tc-tic80.h: Delete. * config/tc-w65.c: Delete. * config/tc-w65.h: Delete. * config/te-aux.h: Delete. * config/te-delt88.h: Delete. * config/te-delta.h: Delete. * config/te-dpx2.h: Delete. * config/te-hp300.h: Delete. * config/te-ic960.h: Delete. * config/vms-a-conf.h: Delete. * doc/c-a29k.texi: Delete. * doc/c-h8500.texi: Delete. * doc/c-m88k.texi: Delete. * README: Remove obsolete examples, and list of supported targets. * Makefile.am: Remove a29k, h8500, m88k, tahoe, tic80, w65, bout and hp300 support. (DEP_FLAGS): Don't define BFD_ASSEMBLER. * configure.in: Remove --enable-bfd-assembler, need_bfd, primary_bfd_gas. * configure.tgt: Remove a29k, h8300-coff, h8500-*, i960 non-elf, m68k non bfd, m88k, or32-coff, tic80-*, vax non-bfd, w65k-*, *-nindy. * as.c: Remove all non-BFD_ASSEMBLER code, support for above targets. * as.h: Likewise. * dw2gencfi.c: Likewise. * dwarf2dbg.c: Likewise. * ehopt.c: Likewise. * input-file.c: Likewise. * listing.c: Likewise. * literal.c: Likewise. * messages.c: Likewise. * obj.h: Likewise. * output-file.c: Likewise. * read.c: Likewise. * stabs.c: Likewise. * struc-symbol.h: Likewise. * subsegs.c: Likewise. * subsegs.h: Likewise. * symbols.c: Likewise. * symbols.h: Likewise. * tc.h: Likewise. * write.c: Likewise. * write.h: Likewise. * config/aout_gnu.h: Likewise. * config/obj-aout.c: Likewise. * config/obj-aout.h: Likewise. * config/obj-coff.c: Likewise. * config/obj-coff.h: Likewise. * config/obj-evax.h: Likewise. * config/obj-ieee.h: Likewise. * config/tc-arm.c: Likewise. * config/tc-arm.h: Likewise. * config/tc-avr.c: Likewise. * config/tc-avr.h: Likewise. * config/tc-crx.h: Likewise. * config/tc-d10v.h: Likewise. * config/tc-d30v.h: Likewise. * config/tc-dlx.h: Likewise. * config/tc-fr30.h: Likewise. * config/tc-frv.h: Likewise. * config/tc-h8300.c: Likewise. * config/tc-h8300.h: Likewise. * config/tc-hppa.h: Likewise. * config/tc-i370.h: Likewise. * config/tc-i386.c: Likewise. * config/tc-i386.h: Likewise. * config/tc-i860.h: Likewise. * config/tc-i960.c: Likewise. * config/tc-i960.h: Likewise. * config/tc-ip2k.h: Likewise. * config/tc-iq2000.h: Likewise. * config/tc-m32c.h: Likewise. * config/tc-m32r.h: Likewise. * config/tc-m68hc11.h: Likewise. * config/tc-m68k.c: Likewise. * config/tc-m68k.h: Likewise. * config/tc-maxq.c: Likewise. * config/tc-maxq.h: Likewise. * config/tc-mcore.c: Likewise. * config/tc-mcore.h: Likewise. * config/tc-mn10200.h: Likewise. * config/tc-mn10300.c: Likewise. * config/tc-mn10300.h: Likewise. * config/tc-ms1.h: Likewise. * config/tc-msp430.c: Likewise. * config/tc-msp430.h: Likewise. * config/tc-ns32k.c: Likewise. * config/tc-ns32k.h: Likewise. * config/tc-openrisc.h: Likewise. * config/tc-or32.c: Likewise. * config/tc-or32.h: Likewise. * config/tc-ppc.c: Likewise. * config/tc-ppc.h: Likewise. * config/tc-s390.h: Likewise. * config/tc-sh.c: Likewise. * config/tc-sh.h: Likewise. * config/tc-sparc.c: Likewise. * config/tc-tic30.c: Likewise. * config/tc-tic30.h: Likewise. * config/tc-tic4x.c: Likewise. * config/tc-tic4x.h: Likewise. * config/tc-tic54x.c: Likewise. * config/tc-tic54x.h: Likewise. * config/tc-v850.h: Likewise. * config/tc-vax.c: Likewise. * config/tc-vax.h: Likewise. * config/tc-xstormy16.h: Likewise. * config/tc-xtensa.h: Likewise. * config/tc-z8k.c: Likewise. * config/tc-z8k.h: Likewise. * config/vms-a-conf.h * doc/Makefile.am: Likewise. * doc/all.texi: Likewise. * doc/as.texinfo: Likewise. * doc/Makefile.in: Regenerate. * Makefile.in: Regenerate. * configure: Regenerate. * config.in: Regenerate. * po/POTFILES.in: Regenerate.
2005-08-11 01:25:29 +00:00
On most forms of the H8/300, @code{.int} emits 16-bit
integers. On the H8/300H and the Renesas SH, however, @code{.int} emits
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32-bit integers.
@end ifset
@end ifclear
@ifset ELF
@node Internal
@section @code{.internal @var{names}}
@cindex @code{internal} directive
@cindex visibility
This is one of the ELF visibility directives. The other two are
@code{.hidden} (@pxref{Hidden,,@code{.hidden}}) and
@code{.protected} (@pxref{Protected,,@code{.protected}}).
This directive overrides the named symbols default visibility (which is set by
their binding: local, global or weak). The directive sets the visibility to
@code{internal} which means that the symbols are considered to be @code{hidden}
(i.e., not visible to other components), and that some extra, processor specific
processing must also be performed upon the symbols as well.
@end ifset
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@node Irp
@section @code{.irp @var{symbol},@var{values}}@dots{}
@cindex @code{irp} directive
Evaluate a sequence of statements assigning different values to @var{symbol}.
The sequence of statements starts at the @code{.irp} directive, and is
terminated by an @code{.endr} directive. For each @var{value}, @var{symbol} is
set to @var{value}, and the sequence of statements is assembled. If no
@var{value} is listed, the sequence of statements is assembled once, with
@var{symbol} set to the null string. To refer to @var{symbol} within the
sequence of statements, use @var{\symbol}.
For example, assembling
@example
.irp param,1,2,3
move d\param,sp@@-
.endr
@end example
is equivalent to assembling
@example
move d1,sp@@-
move d2,sp@@-
move d3,sp@@-
@end example
For some caveats with the spelling of @var{symbol}, see also @ref{Macro}.
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@node Irpc
@section @code{.irpc @var{symbol},@var{values}}@dots{}
@cindex @code{irpc} directive
Evaluate a sequence of statements assigning different values to @var{symbol}.
The sequence of statements starts at the @code{.irpc} directive, and is
terminated by an @code{.endr} directive. For each character in @var{value},
@var{symbol} is set to the character, and the sequence of statements is
assembled. If no @var{value} is listed, the sequence of statements is
assembled once, with @var{symbol} set to the null string. To refer to
@var{symbol} within the sequence of statements, use @var{\symbol}.
For example, assembling
@example
.irpc param,123
move d\param,sp@@-
.endr
@end example
is equivalent to assembling
@example
move d1,sp@@-
move d2,sp@@-
move d3,sp@@-
@end example
For some caveats with the spelling of @var{symbol}, see also the discussion
at @xref{Macro}.
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@node Lcomm
@section @code{.lcomm @var{symbol} , @var{length}}
@cindex @code{lcomm} directive
@cindex local common symbols
@cindex symbols, local common
Reserve @var{length} (an absolute expression) bytes for a local common
denoted by @var{symbol}. The section and value of @var{symbol} are
those of the new local common. The addresses are allocated in the bss
section, so that at run-time the bytes start off zeroed. @var{Symbol}
is not declared global (@pxref{Global,,@code{.global}}), so is normally
not visible to @code{@value{LD}}.
@ifset GENERIC
Some targets permit a third argument to be used with @code{.lcomm}. This
argument specifies the desired alignment of the symbol in the bss section.
@end ifset
@ifset HPPA
The syntax for @code{.lcomm} differs slightly on the HPPA. The syntax is
@samp{@var{symbol} .lcomm, @var{length}}; @var{symbol} is optional.
@end ifset
@node Lflags
@section @code{.lflags}
@cindex @code{lflags} directive (ignored)
@command{@value{AS}} accepts this directive, for compatibility with other
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assemblers, but ignores it.
@ifclear no-line-dir
@node Line
@section @code{.line @var{line-number}}
@cindex @code{line} directive
@cindex logical line number
@ifset aout-bout
Change the logical line number. @var{line-number} must be an absolute
expression. The next line has that logical line number. Therefore any other
statements on the current line (after a statement separator character) are
reported as on logical line number @var{line-number} @minus{} 1. One day
@command{@value{AS}} will no longer support this directive: it is recognized only
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for compatibility with existing assembler programs.
@end ifset
Even though this is a directive associated with the @code{a.out} or
@code{b.out} object-code formats, @command{@value{AS}} still recognizes it
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when producing COFF output, and treats @samp{.line} as though it
were the COFF @samp{.ln} @emph{if} it is found outside a
@code{.def}/@code{.endef} pair.
Inside a @code{.def}, @samp{.line} is, instead, one of the directives
used by compilers to generate auxiliary symbol information for
debugging.
@end ifclear
@node Linkonce
@section @code{.linkonce [@var{type}]}
@cindex COMDAT
@cindex @code{linkonce} directive
@cindex common sections
Mark the current section so that the linker only includes a single copy of it.
This may be used to include the same section in several different object files,
but ensure that the linker will only include it once in the final output file.
The @code{.linkonce} pseudo-op must be used for each instance of the section.
Duplicate sections are detected based on the section name, so it should be
unique.
This directive is only supported by a few object file formats; as of this
writing, the only object file format which supports it is the Portable
Executable format used on Windows NT.
The @var{type} argument is optional. If specified, it must be one of the
following strings. For example:
@smallexample
.linkonce same_size
@end smallexample
Not all types may be supported on all object file formats.
@table @code
@item discard
Silently discard duplicate sections. This is the default.
@item one_only
Warn if there are duplicate sections, but still keep only one copy.
@item same_size
Warn if any of the duplicates have different sizes.
@item same_contents
Warn if any of the duplicates do not have exactly the same contents.
@end table
@node List
@section @code{.list}
@cindex @code{list} directive
@cindex listing control, turning on
Control (in conjunction with the @code{.nolist} directive) whether or
not assembly listings are generated. These two directives maintain an
internal counter (which is zero initially). @code{.list} increments the
counter, and @code{.nolist} decrements it. Assembly listings are
generated whenever the counter is greater than zero.
By default, listings are disabled. When you enable them (with the
@samp{-a} command line option; @pxref{Invoking,,Command-Line Options}),
the initial value of the listing counter is one.
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@node Ln
@section @code{.ln @var{line-number}}
@cindex @code{ln} directive
@ifclear no-line-dir
@samp{.ln} is a synonym for @samp{.line}.
@end ifclear
@ifset no-line-dir
Tell @command{@value{AS}} to change the logical line number. @var{line-number}
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must be an absolute expression. The next line has that logical
line number, so any other statements on the current line (after a
statement separator character @code{;}) are reported as on logical
line number @var{line-number} @minus{} 1.
@ifset BOUT
This directive is accepted, but ignored, when @command{@value{AS}} is
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configured for @code{b.out}; its effect is only associated with COFF
output format.
@end ifset
@end ifset
@node Loc
@section @code{.loc @var{fileno} @var{lineno} [@var{column}] [@var{options}]}
@cindex @code{loc} directive
When emitting DWARF2 line number information,
the @code{.loc} directive will add a row to the @code{.debug_line} line
number matrix corresponding to the immediately following assembly
instruction. The @var{fileno}, @var{lineno}, and optional @var{column}
arguments will be applied to the @code{.debug_line} state machine before
the row is added.
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The @var{options} are a sequence of the following tokens in any order:
@table @code
@item basic_block
This option will set the @code{basic_block} register in the
@code{.debug_line} state machine to @code{true}.
@item prologue_end
This option will set the @code{prologue_end} register in the
@code{.debug_line} state machine to @code{true}.
@item epilogue_begin
This option will set the @code{epilogue_begin} register in the
@code{.debug_line} state machine to @code{true}.
@item is_stmt @var{value}
This option will set the @code{is_stmt} register in the
@code{.debug_line} state machine to @code{value}, which must be
either 0 or 1.
@item isa @var{value}
This directive will set the @code{isa} register in the @code{.debug_line}
state machine to @var{value}, which must be an unsigned integer.
@item discriminator @var{value}
This directive will set the @code{discriminator} register in the @code{.debug_line}
state machine to @var{value}, which must be an unsigned integer.
@end table
@node Loc_mark_labels
@section @code{.loc_mark_labels @var{enable}}
@cindex @code{loc_mark_labels} directive
When emitting DWARF2 line number information,
the @code{.loc_mark_labels} directive makes the assembler emit an entry
to the @code{.debug_line} line number matrix with the @code{basic_block}
register in the state machine set whenever a code label is seen.
The @var{enable} argument should be either 1 or 0, to enable or disable
this function respectively.
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@ifset ELF
@node Local
@section @code{.local @var{names}}
@cindex @code{local} directive
This directive, which is available for ELF targets, marks each symbol in
the comma-separated list of @code{names} as a local symbol so that it
will not be externally visible. If the symbols do not already exist,
they will be created.
For targets where the @code{.lcomm} directive (@pxref{Lcomm}) does not
accept an alignment argument, which is the case for most ELF targets,
the @code{.local} directive can be used in combination with @code{.comm}
(@pxref{Comm}) to define aligned local common data.
@end ifset
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@node Long
@section @code{.long @var{expressions}}
@cindex @code{long} directive
@code{.long} is the same as @samp{.int}. @xref{Int,,@code{.int}}.
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@ignore
@c no one seems to know what this is for or whether this description is
@c what it really ought to do
@node Lsym
@section @code{.lsym @var{symbol}, @var{expression}}
@cindex @code{lsym} directive
@cindex symbol, not referenced in assembly
@code{.lsym} creates a new symbol named @var{symbol}, but does not put it in
the hash table, ensuring it cannot be referenced by name during the
rest of the assembly. This sets the attributes of the symbol to be
the same as the expression value:
@smallexample
@var{other} = @var{descriptor} = 0
@var{type} = @r{(section of @var{expression})}
@var{value} = @var{expression}
@end smallexample
@noindent
The new symbol is not flagged as external.
@end ignore
@node Macro
@section @code{.macro}
@cindex macros
The commands @code{.macro} and @code{.endm} allow you to define macros that
generate assembly output. For example, this definition specifies a macro
@code{sum} that puts a sequence of numbers into memory:
@example
.macro sum from=0, to=5
.long \from
.if \to-\from
sum "(\from+1)",\to
.endif
.endm
@end example
@noindent
With that definition, @samp{SUM 0,5} is equivalent to this assembly input:
@example
.long 0
.long 1
.long 2
.long 3
.long 4
.long 5
@end example
@ftable @code
@item .macro @var{macname}
@itemx .macro @var{macname} @var{macargs} @dots{}
@cindex @code{macro} directive
Begin the definition of a macro called @var{macname}. If your macro
definition requires arguments, specify their names after the macro name,
separated by commas or spaces. You can qualify the macro argument to
indicate whether all invocations must specify a non-blank value (through
@samp{:@code{req}}), or whether it takes all of the remaining arguments
(through @samp{:@code{vararg}}). You can supply a default value for any
macro argument by following the name with @samp{=@var{deflt}}. You
cannot define two macros with the same @var{macname} unless it has been
subject to the @code{.purgem} directive (@pxref{Purgem}) between the two
definitions. For example, these are all valid @code{.macro} statements:
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@table @code
@item .macro comm
Begin the definition of a macro called @code{comm}, which takes no
arguments.
@item .macro plus1 p, p1
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@itemx .macro plus1 p p1
Either statement begins the definition of a macro called @code{plus1},
which takes two arguments; within the macro definition, write
@samp{\p} or @samp{\p1} to evaluate the arguments.
@item .macro reserve_str p1=0 p2
Begin the definition of a macro called @code{reserve_str}, with two
arguments. The first argument has a default value, but not the second.
After the definition is complete, you can call the macro either as
@samp{reserve_str @var{a},@var{b}} (with @samp{\p1} evaluating to
@var{a} and @samp{\p2} evaluating to @var{b}), or as @samp{reserve_str
,@var{b}} (with @samp{\p1} evaluating as the default, in this case
@samp{0}, and @samp{\p2} evaluating to @var{b}).
@item .macro m p1:req, p2=0, p3:vararg
Begin the definition of a macro called @code{m}, with at least three
arguments. The first argument must always have a value specified, but
not the second, which instead has a default value. The third formal
will get assigned all remaining arguments specified at invocation time.
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When you call a macro, you can specify the argument values either by
position, or by keyword. For example, @samp{sum 9,17} is equivalent to
@samp{sum to=17, from=9}.
@end table
Note that since each of the @var{macargs} can be an identifier exactly
as any other one permitted by the target architecture, there may be
occasional problems if the target hand-crafts special meanings to certain
characters when they occur in a special position. For example, if the colon
(@code{:}) is generally permitted to be part of a symbol name, but the
architecture specific code special-cases it when occurring as the final
character of a symbol (to denote a label), then the macro parameter
replacement code will have no way of knowing that and consider the whole
construct (including the colon) an identifier, and check only this
identifier for being the subject to parameter substitution. So for example
this macro definition:
@example
.macro label l
\l:
.endm
@end example
might not work as expected. Invoking @samp{label foo} might not create a label
called @samp{foo} but instead just insert the text @samp{\l:} into the
assembler source, probably generating an error about an unrecognised
identifier.
Similarly problems might occur with the period character (@samp{.})
which is often allowed inside opcode names (and hence identifier names). So
for example constructing a macro to build an opcode from a base name and a
length specifier like this:
@example
.macro opcode base length
\base.\length
.endm
@end example
and invoking it as @samp{opcode store l} will not create a @samp{store.l}
instruction but instead generate some kind of error as the assembler tries to
interpret the text @samp{\base.\length}.
There are several possible ways around this problem:
@table @code
@item Insert white space
If it is possible to use white space characters then this is the simplest
solution. eg:
@example
.macro label l
\l :
.endm
@end example
@item Use @samp{\()}
The string @samp{\()} can be used to separate the end of a macro argument from
the following text. eg:
@example
.macro opcode base length
\base\().\length
.endm
@end example
@item Use the alternate macro syntax mode
In the alternative macro syntax mode the ampersand character (@samp{&}) can be
used as a separator. eg:
@example
.altmacro
.macro label l
l&:
.endm
@end example
@end table
Note: this problem of correctly identifying string parameters to pseudo ops
also applies to the identifiers used in @code{.irp} (@pxref{Irp})
and @code{.irpc} (@pxref{Irpc}) as well.
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@item .endm
@cindex @code{endm} directive
Mark the end of a macro definition.
@item .exitm
@cindex @code{exitm} directive
Exit early from the current macro definition.
@cindex number of macros executed
@cindex macros, count executed
@item \@@
@command{@value{AS}} maintains a counter of how many macros it has
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executed in this pseudo-variable; you can copy that number to your
output with @samp{\@@}, but @emph{only within a macro definition}.
@item LOCAL @var{name} [ , @dots{} ]
@emph{Warning: @code{LOCAL} is only available if you select ``alternate
macro syntax'' with @samp{--alternate} or @code{.altmacro}.}
@xref{Altmacro,,@code{.altmacro}}.
@end ftable
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@node MRI
@section @code{.mri @var{val}}
@cindex @code{mri} directive
@cindex MRI mode, temporarily
If @var{val} is non-zero, this tells @command{@value{AS}} to enter MRI mode. If
@var{val} is zero, this tells @command{@value{AS}} to exit MRI mode. This change
affects code assembled until the next @code{.mri} directive, or until the end
of the file. @xref{M, MRI mode, MRI mode}.
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@node Noaltmacro
@section @code{.noaltmacro}
Disable alternate macro mode. @xref{Altmacro}.
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@node Nolist
@section @code{.nolist}
@cindex @code{nolist} directive
@cindex listing control, turning off
Control (in conjunction with the @code{.list} directive) whether or
not assembly listings are generated. These two directives maintain an
internal counter (which is zero initially). @code{.list} increments the
counter, and @code{.nolist} decrements it. Assembly listings are
generated whenever the counter is greater than zero.
@node Octa
@section @code{.octa @var{bignums}}
@c FIXME: double size emitted for "octa" on i960, others? Or warn?
@cindex @code{octa} directive
@cindex integer, 16-byte
@cindex sixteen byte integer
This directive expects zero or more bignums, separated by commas. For each
bignum, it emits a 16-byte integer.
The term ``octa'' comes from contexts in which a ``word'' is two bytes;
hence @emph{octa}-word for 16 bytes.
@node Offset
@section @code{.offset @var{loc}}
@cindex @code{offset} directive
Set the location counter to @var{loc} in the absolute section. @var{loc} must
be an absolute expression. This directive may be useful for defining
symbols with absolute values. Do not confuse it with the @code{.org}
gas/ 2012-03-12 Roland McGrath <mcgrathr@google.com> * config/tc-arm.c (arm_frag_max_var): New function. * config/tc-arm.h: Declare it. (md_frag_max_var): New macro. * config/tc-i386.c (i386_frag_max_var): New function. * config/tc-i386.h: Declare it. (md_frag_max_var): New macro. * doc/as.texinfo (Bundle directives): New node. (Pseudo Ops): Add it to the menu. * NEWS: Mention new feature. * read.c [md_frag_max_var] (HANDLE_BUNDLE): New macro. [HANDLE_BUNDLE] (bundle_align_p2): New variable. [HANDLE_BUNDLE] (bundle_lock_frchain, bundle_lock_frag): New variables. [HANDLE_BUNDLE] (start_bundle, pending_bundle_size, finish_bundle): New functions. (assemble_one): New function if [HANDLE_BUNDLE], #define directly to md_assembly if not. (read_a_source_file): Call assemble_one in place of md_assemble. (read_a_source_file) [HANDLE_BUNDLE]: Check for unterminated .bundle_lock at end of processing. [HANDLE_BUNDLE] (s_bundle_align_mode, s_bundle_lock, s_bundle_unlock): New functions. [HANDLE_BUNDLE] (potable): Add their entries. * read.h: Declare new functions. gas/testsuite/ 2012-03-12 Roland McGrath <mcgrathr@google.com> * gas/i386/bundle-bad.s: New file. * gas/i386/bundle-bad.d: New file. * gas/i386/bundle-bad.l: New file. * gas/i386/i386.exp: Run it. * gas/arm/bundle.s: New file. * gas/arm/bundle.d: New file. * gas/arm/bundle-lock.s: New file. * gas/arm/bundle-lock.d: New file. * gas/i386/bundle.s: New file. * gas/i386/bundle.d: New file. * gas/i386/x86-64-bundle.s: New file. * gas/i386/x86-64-bundle.d: New file. * gas/i386/bundle-lock.s: New file. * gas/i386/bundle-lock.d: New file. * gas/i386/i386.exp: Run them.
2012-03-13 16:59:57 +00:00
directive.
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@node Org
@section @code{.org @var{new-lc} , @var{fill}}
@cindex @code{org} directive
@cindex location counter, advancing
@cindex advancing location counter
@cindex current address, advancing
Advance the location counter of the current section to
@var{new-lc}. @var{new-lc} is either an absolute expression or an
expression with the same section as the current subsection. That is,
you can't use @code{.org} to cross sections: if @var{new-lc} has the
wrong section, the @code{.org} directive is ignored. To be compatible
with former assemblers, if the section of @var{new-lc} is absolute,
@command{@value{AS}} issues a warning, then pretends the section of @var{new-lc}
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is the same as the current subsection.
@code{.org} may only increase the location counter, or leave it
unchanged; you cannot use @code{.org} to move the location counter
backwards.
@c double negative used below "not undefined" because this is a specific
@c reference to "undefined" (as SEG_UNKNOWN is called in this manual)
@c section. doc@cygnus.com 18feb91
Because @command{@value{AS}} tries to assemble programs in one pass, @var{new-lc}
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may not be undefined. If you really detest this restriction we eagerly await
a chance to share your improved assembler.
Beware that the origin is relative to the start of the section, not
to the start of the subsection. This is compatible with other
people's assemblers.
When the location counter (of the current subsection) is advanced, the
intervening bytes are filled with @var{fill} which should be an
absolute expression. If the comma and @var{fill} are omitted,
@var{fill} defaults to zero.
@node P2align
@section @code{.p2align[wl] @var{abs-expr}, @var{abs-expr}, @var{abs-expr}}
@cindex padding the location counter given a power of two
@cindex @code{p2align} directive
Pad the location counter (in the current subsection) to a particular
storage boundary. The first expression (which must be absolute) is the
number of low-order zero bits the location counter must have after
advancement. For example @samp{.p2align 3} advances the location
counter until it a multiple of 8. If the location counter is already a
multiple of 8, no change is needed.
The second expression (also absolute) gives the fill value to be stored in the
padding bytes. It (and the comma) may be omitted. If it is omitted, the
padding bytes are normally zero. However, on some systems, if the section is
marked as containing code and the fill value is omitted, the space is filled
with no-op instructions.
The third expression is also absolute, and is also optional. If it is present,
it is the maximum number of bytes that should be skipped by this alignment
directive. If doing the alignment would require skipping more bytes than the
specified maximum, then the alignment is not done at all. You can omit the
fill value (the second argument) entirely by simply using two commas after the
required alignment; this can be useful if you want the alignment to be filled
with no-op instructions when appropriate.
@cindex @code{p2alignw} directive
@cindex @code{p2alignl} directive
The @code{.p2alignw} and @code{.p2alignl} directives are variants of the
@code{.p2align} directive. The @code{.p2alignw} directive treats the fill
pattern as a two byte word value. The @code{.p2alignl} directives treats the
fill pattern as a four byte longword value. For example, @code{.p2alignw
2,0x368d} will align to a multiple of 4. If it skips two bytes, they will be
filled in with the value 0x368d (the exact placement of the bytes depends upon
the endianness of the processor). If it skips 1 or 3 bytes, the fill value is
undefined.
@ifset ELF
@node PopSection
@section @code{.popsection}
@cindex @code{popsection} directive
@cindex Section Stack
This is one of the ELF section stack manipulation directives. The others are
@code{.section} (@pxref{Section}), @code{.subsection} (@pxref{SubSection}),
@code{.pushsection} (@pxref{PushSection}), and @code{.previous}
(@pxref{Previous}).
This directive replaces the current section (and subsection) with the top
section (and subsection) on the section stack. This section is popped off the
stack.
@end ifset
@ifset ELF
@node Previous
@section @code{.previous}
@cindex @code{previous} directive
@cindex Section Stack
This is one of the ELF section stack manipulation directives. The others are
@code{.section} (@pxref{Section}), @code{.subsection} (@pxref{SubSection}),
@code{.pushsection} (@pxref{PushSection}), and @code{.popsection}
(@pxref{PopSection}).
This directive swaps the current section (and subsection) with most recently
referenced section/subsection pair prior to this one. Multiple
@code{.previous} directives in a row will flip between two sections (and their
subsections). For example:
@smallexample
.section A
.subsection 1
.word 0x1234
.subsection 2
.word 0x5678
.previous
.word 0x9abc
@end smallexample
Will place 0x1234 and 0x9abc into subsection 1 and 0x5678 into subsection 2 of
section A. Whilst:
@smallexample
.section A
.subsection 1
# Now in section A subsection 1
.word 0x1234
.section B
.subsection 0
# Now in section B subsection 0
.word 0x5678
.subsection 1
# Now in section B subsection 1
.word 0x9abc
.previous
# Now in section B subsection 0
.word 0xdef0
@end smallexample
Will place 0x1234 into section A, 0x5678 and 0xdef0 into subsection 0 of
section B and 0x9abc into subsection 1 of section B.
In terms of the section stack, this directive swaps the current section with
the top section on the section stack.
@end ifset
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@node Print
@section @code{.print @var{string}}
@cindex @code{print} directive
@command{@value{AS}} will print @var{string} on the standard output during
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assembly. You must put @var{string} in double quotes.
@ifset ELF
@node Protected
@section @code{.protected @var{names}}
@cindex @code{protected} directive
@cindex visibility
This is one of the ELF visibility directives. The other two are
@code{.hidden} (@pxref{Hidden}) and @code{.internal} (@pxref{Internal}).
This directive overrides the named symbols default visibility (which is set by
their binding: local, global or weak). The directive sets the visibility to
@code{protected} which means that any references to the symbols from within the
components that defines them must be resolved to the definition in that
component, even if a definition in another component would normally preempt
this.
@end ifset
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@node Psize
@section @code{.psize @var{lines} , @var{columns}}
@cindex @code{psize} directive
@cindex listing control: paper size
@cindex paper size, for listings
Use this directive to declare the number of lines---and, optionally, the
number of columns---to use for each page, when generating listings.
If you do not use @code{.psize}, listings use a default line-count
of 60. You may omit the comma and @var{columns} specification; the
default width is 200 columns.
@command{@value{AS}} generates formfeeds whenever the specified number of
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lines is exceeded (or whenever you explicitly request one, using
@code{.eject}).
If you specify @var{lines} as @code{0}, no formfeeds are generated save
those explicitly specified with @code{.eject}.
@node Purgem
@section @code{.purgem @var{name}}
@cindex @code{purgem} directive
Undefine the macro @var{name}, so that later uses of the string will not be
expanded. @xref{Macro}.
@ifset ELF
@node PushSection
@section @code{.pushsection @var{name} [, @var{subsection}] [, "@var{flags}"[, @@@var{type}[,@var{arguments}]]]}
@cindex @code{pushsection} directive
@cindex Section Stack
This is one of the ELF section stack manipulation directives. The others are
@code{.section} (@pxref{Section}), @code{.subsection} (@pxref{SubSection}),
@code{.popsection} (@pxref{PopSection}), and @code{.previous}
(@pxref{Previous}).
This directive pushes the current section (and subsection) onto the
top of the section stack, and then replaces the current section and
subsection with @code{name} and @code{subsection}. The optional
@code{flags}, @code{type} and @code{arguments} are treated the same
as in the @code{.section} (@pxref{Section}) directive.
@end ifset
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@node Quad
@section @code{.quad @var{bignums}}
@cindex @code{quad} directive
@code{.quad} expects zero or more bignums, separated by commas. For
each bignum, it emits
@ifclear bignum-16
an 8-byte integer. If the bignum won't fit in 8 bytes, it prints a
warning message; and just takes the lowest order 8 bytes of the bignum.
@cindex eight-byte integer
@cindex integer, 8-byte
The term ``quad'' comes from contexts in which a ``word'' is two bytes;
hence @emph{quad}-word for 8 bytes.
@end ifclear
@ifset bignum-16
a 16-byte integer. If the bignum won't fit in 16 bytes, it prints a
warning message; and just takes the lowest order 16 bytes of the bignum.
@cindex sixteen-byte integer
@cindex integer, 16-byte
@end ifset
@node Reloc
@section @code{.reloc @var{offset}, @var{reloc_name}[, @var{expression}]}
@cindex @code{reloc} directive
Generate a relocation at @var{offset} of type @var{reloc_name} with value
@var{expression}. If @var{offset} is a number, the relocation is generated in
the current section. If @var{offset} is an expression that resolves to a
symbol plus offset, the relocation is generated in the given symbol's section.
@var{expression}, if present, must resolve to a symbol plus addend or to an
absolute value, but note that not all targets support an addend. e.g. ELF REL
targets such as i386 store an addend in the section contents rather than in the
relocation. This low level interface does not support addends stored in the
section.
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@node Rept
@section @code{.rept @var{count}}
@cindex @code{rept} directive
Repeat the sequence of lines between the @code{.rept} directive and the next
@code{.endr} directive @var{count} times.
For example, assembling
@example
.rept 3
.long 0
.endr
@end example
is equivalent to assembling
@example
.long 0
.long 0
.long 0
@end example
@node Sbttl
@section @code{.sbttl "@var{subheading}"}
@cindex @code{sbttl} directive
@cindex subtitles for listings
@cindex listing control: subtitle
Use @var{subheading} as the title (third line, immediately after the
title line) when generating assembly listings.
This directive affects subsequent pages, as well as the current page if
it appears within ten lines of the top of a page.
@ifset COFF
@node Scl
@section @code{.scl @var{class}}
@cindex @code{scl} directive
@cindex symbol storage class (COFF)
@cindex COFF symbol storage class
Set the storage-class value for a symbol. This directive may only be
used inside a @code{.def}/@code{.endef} pair. Storage class may flag
whether a symbol is static or external, or it may record further
symbolic debugging information.
@ifset BOUT
The @samp{.scl} directive is primarily associated with COFF output; when
configured to generate @code{b.out} output format, @command{@value{AS}}
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accepts this directive but ignores it.
@end ifset
@end ifset
@ifset COFF-ELF
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@node Section
@section @code{.section @var{name}}
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@cindex named section
Use the @code{.section} directive to assemble the following code into a section
named @var{name}.
This directive is only supported for targets that actually support arbitrarily
named sections; on @code{a.out} targets, for example, it is not accepted, even
with a standard @code{a.out} section name.
@ifset COFF
@ifset ELF
@c only print the extra heading if both COFF and ELF are set
@subheading COFF Version
@end ifset
@cindex @code{section} directive (COFF version)
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For COFF targets, the @code{.section} directive is used in one of the following
ways:
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@smallexample
.section @var{name}[, "@var{flags}"]
.section @var{name}[, @var{subsection}]
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@end smallexample
If the optional argument is quoted, it is taken as flags to use for the
section. Each flag is a single character. The following flags are recognized:
@table @code
@item b
bss section (uninitialized data)
@item n
section is not loaded
@item w
writable section
@item d
data section
@item r
read-only section
@item x
executable section
@item s
shared section (meaningful for PE targets)
@item a
ignored. (For compatibility with the ELF version)
@item y
section is not readable (meaningful for PE targets)
@item 0-9
single-digit power-of-two section alignment (GNU extension)
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@end table
If no flags are specified, the default flags depend upon the section name. If
the section name is not recognized, the default will be for the section to be
loaded and writable. Note the @code{n} and @code{w} flags remove attributes
from the section, rather than adding them, so if they are used on their own it
will be as if no flags had been specified at all.
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If the optional argument to the @code{.section} directive is not quoted, it is
taken as a subsection number (@pxref{Sub-Sections}).
@end ifset
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@ifset ELF
@ifset COFF
@c only print the extra heading if both COFF and ELF are set
@subheading ELF Version
@end ifset
@cindex Section Stack
This is one of the ELF section stack manipulation directives. The others are
@code{.subsection} (@pxref{SubSection}), @code{.pushsection}
(@pxref{PushSection}), @code{.popsection} (@pxref{PopSection}), and
@code{.previous} (@pxref{Previous}).
@cindex @code{section} directive (ELF version)
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For ELF targets, the @code{.section} directive is used like this:
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@smallexample
.section @var{name} [, "@var{flags}"[, @@@var{type}[,@var{flag_specific_arguments}]]]
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@end smallexample
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The optional @var{flags} argument is a quoted string which may contain any
combination of the following characters:
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@table @code
@item a
section is allocatable
Implement generic SHF_EXCLUDE. bfd/ 2010-05-18 H.J. Lu <hongjiu.lu@intel.com> PR gas/11600 * elf.c (_bfd_elf_make_section_from_shdr): Handle SHF_EXCLUDE (elf_fake_sections): Likewise. * elf32-i370.c (i370_elf_section_from_shdr): Don't handle SHF_EXCLUDE here. * elf32-ppc.c (ppc_elf_fake_sections): Likewise. binutils/ 2010-05-18 H.J. Lu <hongjiu.lu@intel.com> PR gas/11600 * readelf.c (get_elf_section_flags): Treat SHF_EXCLUDE as a generic flag. binutils/testsuite/ 2010-05-18 H.J. Lu <hongjiu.lu@intel.com> PR gas/11600 * binutils-all/objcopy.exp: Run exclude-1a and exclude-1b for ELF targets. * binutils-all/exclude-1.s: New. * binutils-all/exclude-1a.d: Likewise. * binutils-all/exclude-1b.d: Likewise. gas/ 2010-05-18 H.J. Lu <hongjiu.lu@intel.com> PR gas/11600 * obj-elf.c (obj_elf_change_section): Handle SHF_EXCLUDE. (obj_elf_parse_section_letters): Likewise. (obj_elf_section_word): Likewise. * config/tc-ppc.c (ppc_section_letter): Removed. (ppc_section_word): Likewise. * config/tc-ppc.h (ppc_section_letter): Likewise. (ppc_section_word): Likewise. (md_elf_section_letter): Likewise. (md_elf_section_word): Likewise. * doc/as.texinfo: Document `e' and `#exclude'. gas/testsuite/ 2010-05-18 H.J. Lu <hongjiu.lu@intel.com> PR gas/11600 * gas/elf/elf.exp: Run section8. * gas/elf/section8.d: New. * gas/elf/section8.s: Likewise. include/elf/ 2010-05-18 H.J. Lu <hongjiu.lu@intel.com> PR gas/11600 * common.h (SHF_EXCLUDE): New. * i370.h (SHF_EXCLUDE): Removed. * or32.h (SHF_EXCLUDE): Likewise. * ppc.h (SHF_EXCLUDE): Likewise. * sparc.h (SHF_EXCLUDE): Likewise. ld/testsuite/ 2010-05-18 H.J. Lu <hongjiu.lu@intel.com> PR gas/11600 * ld-elf/exclude3.s: New. * ld-elf/exclude3a.d: Likewise. * ld-elf/exclude3b.d: Likewise. * ld-elf/exclude3c.d: Likewise.
2010-05-18 03:31:07 +00:00
@item e
section is excluded from executable and shared library.
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@item w
section is writable
@item x
section is executable
@item M
section is mergeable
@item S
section contains zero terminated strings
@item G
section is a member of a section group
@item T
section is used for thread-local-storage
@item ?
section is a member of the previously-current section's group, if any
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@end table
The optional @var{type} argument may contain one of the following constants:
@table @code
@item @@progbits
section contains data
@item @@nobits
section does not contain data (i.e., section only occupies space)
@item @@note
section contains data which is used by things other than the program
@item @@init_array
section contains an array of pointers to init functions
@item @@fini_array
section contains an array of pointers to finish functions
@item @@preinit_array
section contains an array of pointers to pre-init functions
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@end table
Many targets only support the first three section types.
Note on targets where the @code{@@} character is the start of a comment (eg
ARM) then another character is used instead. For example the ARM port uses the
@code{%} character.
If @var{flags} contains the @code{M} symbol then the @var{type} argument must
be specified as well as an extra argument---@var{entsize}---like this:
@smallexample
.section @var{name} , "@var{flags}"M, @@@var{type}, @var{entsize}
@end smallexample
Sections with the @code{M} flag but not @code{S} flag must contain fixed size
constants, each @var{entsize} octets long. Sections with both @code{M} and
@code{S} must contain zero terminated strings where each character is
@var{entsize} bytes long. The linker may remove duplicates within sections with
the same name, same entity size and same flags. @var{entsize} must be an
absolute expression. For sections with both @code{M} and @code{S}, a string
which is a suffix of a larger string is considered a duplicate. Thus
@code{"def"} will be merged with @code{"abcdef"}; A reference to the first
@code{"def"} will be changed to a reference to @code{"abcdef"+3}.
If @var{flags} contains the @code{G} symbol then the @var{type} argument must
be present along with an additional field like this:
@smallexample
.section @var{name} , "@var{flags}"G, @@@var{type}, @var{GroupName}[, @var{linkage}]
@end smallexample
The @var{GroupName} field specifies the name of the section group to which this
particular section belongs. The optional linkage field can contain:
@table @code
@item comdat
indicates that only one copy of this section should be retained
@item .gnu.linkonce
an alias for comdat
@end table
Note: if both the @var{M} and @var{G} flags are present then the fields for
the Merge flag should come first, like this:
@smallexample
.section @var{name} , "@var{flags}"MG, @@@var{type}, @var{entsize}, @var{GroupName}[, @var{linkage}]
@end smallexample
If @var{flags} contains the @code{?} symbol then it may not also contain the
@code{G} symbol and the @var{GroupName} or @var{linkage} fields should not be
present. Instead, @code{?} says to consider the section that's current before
this directive. If that section used @code{G}, then the new section will use
@code{G} with those same @var{GroupName} and @var{linkage} fields implicitly.
If not, then the @code{?} symbol has no effect.
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If no flags are specified, the default flags depend upon the section name. If
the section name is not recognized, the default will be for the section to have
none of the above flags: it will not be allocated in memory, nor writable, nor
executable. The section will contain data.
For ELF targets, the assembler supports another type of @code{.section}
directive for compatibility with the Solaris assembler:
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@smallexample
.section "@var{name}"[, @var{flags}...]
@end smallexample
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Note that the section name is quoted. There may be a sequence of comma
separated flags:
@table @code
@item #alloc
section is allocatable
@item #write
section is writable
@item #execinstr
section is executable
Implement generic SHF_EXCLUDE. bfd/ 2010-05-18 H.J. Lu <hongjiu.lu@intel.com> PR gas/11600 * elf.c (_bfd_elf_make_section_from_shdr): Handle SHF_EXCLUDE (elf_fake_sections): Likewise. * elf32-i370.c (i370_elf_section_from_shdr): Don't handle SHF_EXCLUDE here. * elf32-ppc.c (ppc_elf_fake_sections): Likewise. binutils/ 2010-05-18 H.J. Lu <hongjiu.lu@intel.com> PR gas/11600 * readelf.c (get_elf_section_flags): Treat SHF_EXCLUDE as a generic flag. binutils/testsuite/ 2010-05-18 H.J. Lu <hongjiu.lu@intel.com> PR gas/11600 * binutils-all/objcopy.exp: Run exclude-1a and exclude-1b for ELF targets. * binutils-all/exclude-1.s: New. * binutils-all/exclude-1a.d: Likewise. * binutils-all/exclude-1b.d: Likewise. gas/ 2010-05-18 H.J. Lu <hongjiu.lu@intel.com> PR gas/11600 * obj-elf.c (obj_elf_change_section): Handle SHF_EXCLUDE. (obj_elf_parse_section_letters): Likewise. (obj_elf_section_word): Likewise. * config/tc-ppc.c (ppc_section_letter): Removed. (ppc_section_word): Likewise. * config/tc-ppc.h (ppc_section_letter): Likewise. (ppc_section_word): Likewise. (md_elf_section_letter): Likewise. (md_elf_section_word): Likewise. * doc/as.texinfo: Document `e' and `#exclude'. gas/testsuite/ 2010-05-18 H.J. Lu <hongjiu.lu@intel.com> PR gas/11600 * gas/elf/elf.exp: Run section8. * gas/elf/section8.d: New. * gas/elf/section8.s: Likewise. include/elf/ 2010-05-18 H.J. Lu <hongjiu.lu@intel.com> PR gas/11600 * common.h (SHF_EXCLUDE): New. * i370.h (SHF_EXCLUDE): Removed. * or32.h (SHF_EXCLUDE): Likewise. * ppc.h (SHF_EXCLUDE): Likewise. * sparc.h (SHF_EXCLUDE): Likewise. ld/testsuite/ 2010-05-18 H.J. Lu <hongjiu.lu@intel.com> PR gas/11600 * ld-elf/exclude3.s: New. * ld-elf/exclude3a.d: Likewise. * ld-elf/exclude3b.d: Likewise. * ld-elf/exclude3c.d: Likewise.
2010-05-18 03:31:07 +00:00
@item #exclude
section is excluded from executable and shared library.
@item #tls
section is used for thread local storage
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@end table
This directive replaces the current section and subsection. See the
contents of the gas testsuite directory @code{gas/testsuite/gas/elf} for
some examples of how this directive and the other section stack directives
work.
@end ifset
@end ifset
1999-05-03 07:29:11 +00:00
@node Set
@section @code{.set @var{symbol}, @var{expression}}
@cindex @code{set} directive
@cindex symbol value, setting
Set the value of @var{symbol} to @var{expression}. This
changes @var{symbol}'s value and type to conform to
@var{expression}. If @var{symbol} was flagged as external, it remains
flagged (@pxref{Symbol Attributes}).
You may @code{.set} a symbol many times in the same assembly.
If you @code{.set} a global symbol, the value stored in the object
file is the last value stored into it.
@ifset Z80
On Z80 @code{set} is a real instruction, use
@samp{@var{symbol} defl @var{expression}} instead.
@end ifset
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@node Short
@section @code{.short @var{expressions}}
@cindex @code{short} directive
@ifset GENERIC
@code{.short} is normally the same as @samp{.word}.
@xref{Word,,@code{.word}}.
In some configurations, however, @code{.short} and @code{.word} generate
numbers of different lengths. @xref{Machine Dependencies}.
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@end ifset
@ifclear GENERIC
@ifset W16
@code{.short} is the same as @samp{.word}. @xref{Word,,@code{.word}}.
@end ifset
@ifset W32
This expects zero or more @var{expressions}, and emits
a 16 bit number for each.
@end ifset
@end ifclear
@node Single
@section @code{.single @var{flonums}}
@cindex @code{single} directive
@cindex floating point numbers (single)
This directive assembles zero or more flonums, separated by commas. It
has the same effect as @code{.float}.
@ifset GENERIC
The exact kind of floating point numbers emitted depends on how
@command{@value{AS}} is configured. @xref{Machine Dependencies}.
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@end ifset
@ifclear GENERIC
@ifset IEEEFLOAT
On the @value{TARGET} family, @code{.single} emits 32-bit floating point
numbers in @sc{ieee} format.
@end ifset
@end ifclear
@ifset COFF-ELF
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@node Size
@section @code{.size}
This directive is used to set the size associated with a symbol.
@ifset COFF
@ifset ELF
@c only print the extra heading if both COFF and ELF are set
@subheading COFF Version
@end ifset
@cindex @code{size} directive (COFF version)
For COFF targets, the @code{.size} directive is only permitted inside
@code{.def}/@code{.endef} pairs. It is used like this:
@smallexample
.size @var{expression}
@end smallexample
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@ifset BOUT
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@samp{.size} is only meaningful when generating COFF format output; when
@command{@value{AS}} is generating @code{b.out}, it accepts this directive but
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ignores it.
@end ifset
@end ifset
@ifset ELF
@ifset COFF
@c only print the extra heading if both COFF and ELF are set
@subheading ELF Version
@end ifset
@cindex @code{size} directive (ELF version)
For ELF targets, the @code{.size} directive is used like this:
@smallexample
.size @var{name} , @var{expression}
@end smallexample
This directive sets the size associated with a symbol @var{name}.
The size in bytes is computed from @var{expression} which can make use of label
arithmetic. This directive is typically used to set the size of function
symbols.
@end ifset
@end ifset
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@ifclear no-space-dir
@node Skip
@section @code{.skip @var{size} , @var{fill}}
@cindex @code{skip} directive
@cindex filling memory
This directive emits @var{size} bytes, each of value @var{fill}. Both
@var{size} and @var{fill} are absolute expressions. If the comma and
@var{fill} are omitted, @var{fill} is assumed to be zero. This is the same as
@samp{.space}.
@end ifclear
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@node Sleb128
@section @code{.sleb128 @var{expressions}}
@cindex @code{sleb128} directive
@var{sleb128} stands for ``signed little endian base 128.'' This is a
compact, variable length representation of numbers used by the DWARF
symbolic debugging format. @xref{Uleb128, ,@code{.uleb128}}.
@ifclear no-space-dir
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@node Space
@section @code{.space @var{size} , @var{fill}}
@cindex @code{space} directive
@cindex filling memory
This directive emits @var{size} bytes, each of value @var{fill}. Both
@var{size} and @var{fill} are absolute expressions. If the comma
and @var{fill} are omitted, @var{fill} is assumed to be zero. This is the same
as @samp{.skip}.
@ifset HPPA
@quotation
@emph{Warning:} @code{.space} has a completely different meaning for HPPA
targets; use @code{.block} as a substitute. See @cite{HP9000 Series 800
Assembly Language Reference Manual} (HP 92432-90001) for the meaning of the
@code{.space} directive. @xref{HPPA Directives,,HPPA Assembler Directives},
for a summary.
@end quotation
@end ifset
@end ifclear
@ifset have-stabs
@node Stab
@section @code{.stabd, .stabn, .stabs}
@cindex symbolic debuggers, information for
@cindex @code{stab@var{x}} directives
There are three directives that begin @samp{.stab}.
All emit symbols (@pxref{Symbols}), for use by symbolic debuggers.
The symbols are not entered in the @command{@value{AS}} hash table: they
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cannot be referenced elsewhere in the source file.
Up to five fields are required:
@table @var
@item string
This is the symbol's name. It may contain any character except
@samp{\000}, so is more general than ordinary symbol names. Some
debuggers used to code arbitrarily complex structures into symbol names
using this field.
@item type
An absolute expression. The symbol's type is set to the low 8 bits of
this expression. Any bit pattern is permitted, but @code{@value{LD}}
and debuggers choke on silly bit patterns.
@item other
An absolute expression. The symbol's ``other'' attribute is set to the
low 8 bits of this expression.
@item desc
An absolute expression. The symbol's descriptor is set to the low 16
bits of this expression.
@item value
An absolute expression which becomes the symbol's value.
@end table
If a warning is detected while reading a @code{.stabd}, @code{.stabn},
or @code{.stabs} statement, the symbol has probably already been created;
you get a half-formed symbol in your object file. This is
compatible with earlier assemblers!
@table @code
@cindex @code{stabd} directive
@item .stabd @var{type} , @var{other} , @var{desc}
The ``name'' of the symbol generated is not even an empty string.
It is a null pointer, for compatibility. Older assemblers used a
null pointer so they didn't waste space in object files with empty
strings.
The symbol's value is set to the location counter,
relocatably. When your program is linked, the value of this symbol
is the address of the location counter when the @code{.stabd} was
assembled.
@cindex @code{stabn} directive
@item .stabn @var{type} , @var{other} , @var{desc} , @var{value}
The name of the symbol is set to the empty string @code{""}.
@cindex @code{stabs} directive
@item .stabs @var{string} , @var{type} , @var{other} , @var{desc} , @var{value}
All five fields are specified.
@end table
@end ifset
@c end have-stabs
@node String
@section @code{.string} "@var{str}", @code{.string8} "@var{str}", @code{.string16}
"@var{str}", @code{.string32} "@var{str}", @code{.string64} "@var{str}"
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@cindex string, copying to object file
@cindex string8, copying to object file
@cindex string16, copying to object file
@cindex string32, copying to object file
@cindex string64, copying to object file
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@cindex @code{string} directive
@cindex @code{string8} directive
@cindex @code{string16} directive
@cindex @code{string32} directive
@cindex @code{string64} directive
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Copy the characters in @var{str} to the object file. You may specify more than
one string to copy, separated by commas. Unless otherwise specified for a
particular machine, the assembler marks the end of each string with a 0 byte.
You can use any of the escape sequences described in @ref{Strings,,Strings}.
The variants @code{string16}, @code{string32} and @code{string64} differ from
the @code{string} pseudo opcode in that each 8-bit character from @var{str} is
copied and expanded to 16, 32 or 64 bits respectively. The expanded characters
are stored in target endianness byte order.
Example:
@smallexample
.string32 "BYE"
expands to:
.string "B\0\0\0Y\0\0\0E\0\0\0" /* On little endian targets. */
.string "\0\0\0B\0\0\0Y\0\0\0E" /* On big endian targets. */
@end smallexample
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@node Struct
@section @code{.struct @var{expression}}
@cindex @code{struct} directive
Switch to the absolute section, and set the section offset to @var{expression},
which must be an absolute expression. You might use this as follows:
@smallexample
.struct 0
field1:
.struct field1 + 4
field2:
.struct field2 + 4
field3:
@end smallexample
This would define the symbol @code{field1} to have the value 0, the symbol
@code{field2} to have the value 4, and the symbol @code{field3} to have the
value 8. Assembly would be left in the absolute section, and you would need to
use a @code{.section} directive of some sort to change to some other section
before further assembly.
@ifset ELF
@node SubSection
@section @code{.subsection @var{name}}
@cindex @code{subsection} directive
@cindex Section Stack
This is one of the ELF section stack manipulation directives. The others are
@code{.section} (@pxref{Section}), @code{.pushsection} (@pxref{PushSection}),
@code{.popsection} (@pxref{PopSection}), and @code{.previous}
(@pxref{Previous}).
This directive replaces the current subsection with @code{name}. The current
section is not changed. The replaced subsection is put onto the section stack
in place of the then current top of stack subsection.
@end ifset
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@ifset ELF
@node Symver
@section @code{.symver}
@cindex @code{symver} directive
@cindex symbol versioning
@cindex versions of symbols
Use the @code{.symver} directive to bind symbols to specific version nodes
within a source file. This is only supported on ELF platforms, and is
typically used when assembling files to be linked into a shared library.
There are cases where it may make sense to use this in objects to be bound
into an application itself so as to override a versioned symbol from a
shared library.
For ELF targets, the @code{.symver} directive can be used like this:
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@smallexample
.symver @var{name}, @var{name2@@nodename}
@end smallexample
If the symbol @var{name} is defined within the file
being assembled, the @code{.symver} directive effectively creates a symbol
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alias with the name @var{name2@@nodename}, and in fact the main reason that we
just don't try and create a regular alias is that the @var{@@} character isn't
permitted in symbol names. The @var{name2} part of the name is the actual name
of the symbol by which it will be externally referenced. The name @var{name}
itself is merely a name of convenience that is used so that it is possible to
have definitions for multiple versions of a function within a single source
file, and so that the compiler can unambiguously know which version of a
function is being mentioned. The @var{nodename} portion of the alias should be
the name of a node specified in the version script supplied to the linker when
building a shared library. If you are attempting to override a versioned
symbol from a shared library, then @var{nodename} should correspond to the
nodename of the symbol you are trying to override.
If the symbol @var{name} is not defined within the file being assembled, all
references to @var{name} will be changed to @var{name2@@nodename}. If no
reference to @var{name} is made, @var{name2@@nodename} will be removed from the
symbol table.
Another usage of the @code{.symver} directive is:
@smallexample
.symver @var{name}, @var{name2@@@@nodename}
@end smallexample
In this case, the symbol @var{name} must exist and be defined within
the file being assembled. It is similar to @var{name2@@nodename}. The
difference is @var{name2@@@@nodename} will also be used to resolve
references to @var{name2} by the linker.
The third usage of the @code{.symver} directive is:
@smallexample
.symver @var{name}, @var{name2@@@@@@nodename}
@end smallexample
When @var{name} is not defined within the
file being assembled, it is treated as @var{name2@@nodename}. When
@var{name} is defined within the file being assembled, the symbol
name, @var{name}, will be changed to @var{name2@@@@nodename}.
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@end ifset
@ifset COFF
@node Tag
@section @code{.tag @var{structname}}
@cindex COFF structure debugging
@cindex structure debugging, COFF
@cindex @code{tag} directive
This directive is generated by compilers to include auxiliary debugging
information in the symbol table. It is only permitted inside
@code{.def}/@code{.endef} pairs. Tags are used to link structure
definitions in the symbol table with instances of those structures.
@ifset BOUT
@samp{.tag} is only used when generating COFF format output; when
@command{@value{AS}} is generating @code{b.out}, it accepts this directive but
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ignores it.
@end ifset
@end ifset
@node Text
@section @code{.text @var{subsection}}
@cindex @code{text} directive
Tells @command{@value{AS}} to assemble the following statements onto the end of
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the text subsection numbered @var{subsection}, which is an absolute
expression. If @var{subsection} is omitted, subsection number zero
is used.
@node Title
@section @code{.title "@var{heading}"}
@cindex @code{title} directive
@cindex listing control: title line
Use @var{heading} as the title (second line, immediately after the
source file name and pagenumber) when generating assembly listings.
This directive affects subsequent pages, as well as the current page if
it appears within ten lines of the top of a page.
@ifset COFF-ELF
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@node Type
@section @code{.type}
This directive is used to set the type of a symbol.
@ifset COFF
@ifset ELF
@c only print the extra heading if both COFF and ELF are set
@subheading COFF Version
@end ifset
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@cindex COFF symbol type
@cindex symbol type, COFF
@cindex @code{type} directive (COFF version)
For COFF targets, this directive is permitted only within
@code{.def}/@code{.endef} pairs. It is used like this:
@smallexample
.type @var{int}
@end smallexample
This records the integer @var{int} as the type attribute of a symbol table
entry.
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@ifset BOUT
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@samp{.type} is associated only with COFF format output; when
@command{@value{AS}} is configured for @code{b.out} output, it accepts this
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directive but ignores it.
@end ifset
@end ifset
@ifset ELF
@ifset COFF
@c only print the extra heading if both COFF and ELF are set
@subheading ELF Version
@end ifset
@cindex ELF symbol type
@cindex symbol type, ELF
@cindex @code{type} directive (ELF version)
For ELF targets, the @code{.type} directive is used like this:
@smallexample
.type @var{name} , @var{type description}
@end smallexample
This sets the type of symbol @var{name} to be either a
function symbol or an object symbol. There are five different syntaxes
supported for the @var{type description} field, in order to provide
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compatibility with various other assemblers.
Because some of the characters used in these syntaxes (such as @samp{@@} and
@samp{#}) are comment characters for some architectures, some of the syntaxes
below do not work on all architectures. The first variant will be accepted by
the GNU assembler on all architectures so that variant should be used for
maximum portability, if you do not need to assemble your code with other
assemblers.
The syntaxes supported are:
@smallexample
.type <name> STT_<TYPE_IN_UPPER_CASE>
.type <name>,#<type>
.type <name>,@@<type>
include/elf/ * common.h (STT_IFUNC): Define. elfcpp/ * elfcpp.h (enum STT): Add STT_IFUNC. bfd/ * syms.c (struct bfd_symbol): Add new flag BSF_INDIRECT_FUNCTION. Remove redundant flag BFD_FORT_COMM_DEFAULT_VALUE. Renumber flags to remove gaps. (bfd_print_symbol_vandf): Return 'i' for BSF_INDIRECT_FUNCTION. (bfd_decode_symclass): Likewise. * elf.c (swap_out_syms): Translate BSF_INDIRECT_FUNCTION into STT_IFUNC. (elf_find_function): Treat STT_IFUNC in the same way as STT_FUNC. (_bfd_elf_is_function_type): Likewise. * elf32-arm.c (arm_elf_find_function): Likewise. (elf32_arm_adjust_dynamic_symbol): Likewise. (elf32_arm_swap_symbol_in): Likewise. (elf32_arm_additional_program_headers): Likewise. * elf32-i386.c (is_indirect_symbol): New function. (elf_i386_check_relocs): Also generate dynamic relocs for relocations against STT_IFUNC symbols. (allocate_dynrelocs): Likewise. (elf_i386_relocate_section): Likewise. * elf64-x86-64.c (is_indirect_symbol): New function. (elf64_x86_64_check_relocs): Also generate dynamic relocs for relocations against STT_IFUNC symbols. (allocate_dynrelocs): Likewise. (elf64_x86_64_relocate_section): Likewise. * elfcode.h (elf_slurp_symbol_table): Translate STT_IFUNC into BSF_INDIRECT_FUNCTION. * elflink.c (_bfd_elf_adjust_dynamic_reloc_section): Add support for STT_IFUNC symbols. (get_ifunc_reloc_section_name): New function. (_bfd_elf_make_ifunc_reloc_section): New function. * elf-bfd.h (struct bfd_elf_section_data): Add indirect_relocs field. * bfd-in2.h: Regenerate. gas/ * config/obj-elf.c (obj_elf_type): Add support for STT_IFUNC type. * doc/as.texinfo: Document new feature. * NEWS: Mention new feature. gas/testsuite/ * gas/elf/type.s: Add test of STT_IFUNC symbol type. * gas/elf/type.e: Update expected disassembly. * gas/elf/elf.exp: Update grep of symbol types. ld/ * NEWS: Mention new feature. * pe-dll.c (process_def_file): Replace use of redundant BFD_FORT_COMM_DEFAULT_VALUE with 0. * scripttempl/elf.sc: Add .rel.ifunc.dyn and .rela.ifunc.dyn sections. ld/testsuite/ * ld-mips-elf/reloc-1-n32.d: Updated expected output for reloc descriptions. * ld-mips-elf/reloc-1-n64.d: Likewise. * ld-i386/ifunc.d: New test. * ld-i386/ifunc.s: Source file for the new test. * ld-i386/i386.exp: Run the new test.
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.type <name>,%<type>
.type <name>,"<type>"
@end smallexample
The types supported are:
@table @gcctabopt
@item STT_FUNC
@itemx function
Mark the symbol as being a function name.
include/elf 2009-04-30 Nick Clifton <nickc@redhat.com> * common.h (STT_GNU_IFUNC): Define. elfcpp 2009-04-30 Nick Clifton <nickc@redhat.com> * (enum STT): Add STT_GNU_IFUNC. gas 2009-04-30 Nick Clifton <nickc@redhat.com> * config/obj-elf.c (obj_elf_type): Add support for a gnu_indirect_function type. * config/tc-i386.c (tc_i386_fix_adjustable): Do not adjust fixups against indirect function symbols. * doc/as.texinfo (.type): Document the support for the gnu_indirect_function symbol type. * NEWS: Mention the new feature. gas/testsuite 2009-04-30 Nick Clifton <nickc@redhat.com> * gas/elf/elf.exp: Extend type test to include an ifunc symbol. Provide an alternative test for targets which do not support ifunc symbols. (type.s): Add entry for an ifunc symbol. (type.e): Add ifunc entry to expected symbol dump. (section2.e-armelf): Add entry for ifunc symbol. (type-noifunc.s): New file. (type-noifunc.e): New file. bfd/ 2009-04-30 Nick Clifton <nickc@redhat.com> * elf-bfd.h (struct bfd_elf_section_data): Add indirect_relocs section pointer. (struct elf_obj_data): Add has_ifunc_symbols boolean. * elf.c (swap_out_syms): Convert BSF_GNU_INDIRECT_FUNCTION flags into a STT_GNU_IFUNC symbol type. (_bfd_elf_is_function_type): Accept STT_GNU_IFUNC as a function type. (_bfd_elf_set_osabi): Set the osasbi field to ELFOSABI_LINUX if the binary contains ifunc symbols. * elfcode.h (elf_slurp_symbol_table): Translate the STT_GNU_IFUNC symbol type into a BSF_GNU_INDIRECT_FUNCTION flag. * elf32-i386.c (is_indirect_function): New function. (elf_i386_check_relocs): Create an ifunc output section. (allocate_dynrelocs): Create dynamic relocs in the ifunc output section if necessary. (elf_i386_relocate_section): Emit a reloc against an ifunc symbol if necessary. (elf_i386_add_symbol_hook): New function. Set the has_ifunc_symbols field of the elf_obj_data structure if an ifunc symbol is encountered. (elf_backend_post_process_headers): Define. (elf_backend_add_symbol_hook): Define. (elf_i386_post_process_headers): Rename to elf_i388_fbsd_post_process_headers. * elf64-x86_64.c (IS_X86_64_PCREL_TYPE): New macro. (is_indirect_function): New function. (elf64_x86_64_check_relocs): Create an ifunc output section. (allocate_dynrelocs): Create dynamic relocs in the ifunc output section if necessary. (elf64_x86_64_relocate_section): Emit a reloc against an ifunc symbol if necessary. (elf_i386_add_symbol_hook): Set the has_ifunc_symbols field of the elf_obj_data structure if an ifunc symbol is encountered. (elf_backend_post_process_headers): Define. * elflink.c (_bfd_elf_adjust_dynamic_symbol): Always create a PLT if we have ifunc symbols to handle. (get_ifunc_reloc_section_name): New function. Computes the name for an ifunc section. (_bfd_elf_make_ifunc_reloc_section): New function. Creates a section to hold ifunc relocs. * syms.c (BSF_GNU_INDIRECT_FUNCTION): Define. (bfd_print_symbol_vandf): Handle ifunc symbols. (bfd_decode_symclass): Likewise. * bfd-in2.h: Regenerate. binutils 2009-04-30 Nick Clifton <nickc@redhat.com> * readelf.c (dump_relocations): Display a relocation against an ifunc symbol as if it were a function invocation. (get_symbol_type): Handle STT_GNU_IFUNC. ld 2009-04-30 Nick Clifton <nickc@redhat.com> * NEWS: Mention support for IFUNC symbols. ld/testsuite 2009-04-30 Nick Clifton <nickc@redhat.com> * ld-ifunc: New directory. * ld-ifunc/ifunc.exp: New file: Run the IFUNC tests. * ld-ifunc/prog.c: New file. * ld-ifunc/lib.c: New file.
2009-04-30 15:47:13 +00:00
@item STT_GNU_IFUNC
@itemx gnu_indirect_function
Mark the symbol as an indirect function when evaluated during reloc
processing. (This is only supported on assemblers targeting GNU systems).
include/elf 2009-04-30 Nick Clifton <nickc@redhat.com> * common.h (STT_GNU_IFUNC): Define. elfcpp 2009-04-30 Nick Clifton <nickc@redhat.com> * (enum STT): Add STT_GNU_IFUNC. gas 2009-04-30 Nick Clifton <nickc@redhat.com> * config/obj-elf.c (obj_elf_type): Add support for a gnu_indirect_function type. * config/tc-i386.c (tc_i386_fix_adjustable): Do not adjust fixups against indirect function symbols. * doc/as.texinfo (.type): Document the support for the gnu_indirect_function symbol type. * NEWS: Mention the new feature. gas/testsuite 2009-04-30 Nick Clifton <nickc@redhat.com> * gas/elf/elf.exp: Extend type test to include an ifunc symbol. Provide an alternative test for targets which do not support ifunc symbols. (type.s): Add entry for an ifunc symbol. (type.e): Add ifunc entry to expected symbol dump. (section2.e-armelf): Add entry for ifunc symbol. (type-noifunc.s): New file. (type-noifunc.e): New file. bfd/ 2009-04-30 Nick Clifton <nickc@redhat.com> * elf-bfd.h (struct bfd_elf_section_data): Add indirect_relocs section pointer. (struct elf_obj_data): Add has_ifunc_symbols boolean. * elf.c (swap_out_syms): Convert BSF_GNU_INDIRECT_FUNCTION flags into a STT_GNU_IFUNC symbol type. (_bfd_elf_is_function_type): Accept STT_GNU_IFUNC as a function type. (_bfd_elf_set_osabi): Set the osasbi field to ELFOSABI_LINUX if the binary contains ifunc symbols. * elfcode.h (elf_slurp_symbol_table): Translate the STT_GNU_IFUNC symbol type into a BSF_GNU_INDIRECT_FUNCTION flag. * elf32-i386.c (is_indirect_function): New function. (elf_i386_check_relocs): Create an ifunc output section. (allocate_dynrelocs): Create dynamic relocs in the ifunc output section if necessary. (elf_i386_relocate_section): Emit a reloc against an ifunc symbol if necessary. (elf_i386_add_symbol_hook): New function. Set the has_ifunc_symbols field of the elf_obj_data structure if an ifunc symbol is encountered. (elf_backend_post_process_headers): Define. (elf_backend_add_symbol_hook): Define. (elf_i386_post_process_headers): Rename to elf_i388_fbsd_post_process_headers. * elf64-x86_64.c (IS_X86_64_PCREL_TYPE): New macro. (is_indirect_function): New function. (elf64_x86_64_check_relocs): Create an ifunc output section. (allocate_dynrelocs): Create dynamic relocs in the ifunc output section if necessary. (elf64_x86_64_relocate_section): Emit a reloc against an ifunc symbol if necessary. (elf_i386_add_symbol_hook): Set the has_ifunc_symbols field of the elf_obj_data structure if an ifunc symbol is encountered. (elf_backend_post_process_headers): Define. * elflink.c (_bfd_elf_adjust_dynamic_symbol): Always create a PLT if we have ifunc symbols to handle. (get_ifunc_reloc_section_name): New function. Computes the name for an ifunc section. (_bfd_elf_make_ifunc_reloc_section): New function. Creates a section to hold ifunc relocs. * syms.c (BSF_GNU_INDIRECT_FUNCTION): Define. (bfd_print_symbol_vandf): Handle ifunc symbols. (bfd_decode_symclass): Likewise. * bfd-in2.h: Regenerate. binutils 2009-04-30 Nick Clifton <nickc@redhat.com> * readelf.c (dump_relocations): Display a relocation against an ifunc symbol as if it were a function invocation. (get_symbol_type): Handle STT_GNU_IFUNC. ld 2009-04-30 Nick Clifton <nickc@redhat.com> * NEWS: Mention support for IFUNC symbols. ld/testsuite 2009-04-30 Nick Clifton <nickc@redhat.com> * ld-ifunc: New directory. * ld-ifunc/ifunc.exp: New file: Run the IFUNC tests. * ld-ifunc/prog.c: New file. * ld-ifunc/lib.c: New file.
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@item STT_OBJECT
@itemx object
Mark the symbol as being a data object.
@item STT_TLS
@itemx tls_object
Mark the symbol as being a thead-local data object.
@item STT_COMMON
@itemx common
Mark the symbol as being a common data object.
include/elf/ * common.h (STT_IFUNC): Define. elfcpp/ * elfcpp.h (enum STT): Add STT_IFUNC. bfd/ * syms.c (struct bfd_symbol): Add new flag BSF_INDIRECT_FUNCTION. Remove redundant flag BFD_FORT_COMM_DEFAULT_VALUE. Renumber flags to remove gaps. (bfd_print_symbol_vandf): Return 'i' for BSF_INDIRECT_FUNCTION. (bfd_decode_symclass): Likewise. * elf.c (swap_out_syms): Translate BSF_INDIRECT_FUNCTION into STT_IFUNC. (elf_find_function): Treat STT_IFUNC in the same way as STT_FUNC. (_bfd_elf_is_function_type): Likewise. * elf32-arm.c (arm_elf_find_function): Likewise. (elf32_arm_adjust_dynamic_symbol): Likewise. (elf32_arm_swap_symbol_in): Likewise. (elf32_arm_additional_program_headers): Likewise. * elf32-i386.c (is_indirect_symbol): New function. (elf_i386_check_relocs): Also generate dynamic relocs for relocations against STT_IFUNC symbols. (allocate_dynrelocs): Likewise. (elf_i386_relocate_section): Likewise. * elf64-x86-64.c (is_indirect_symbol): New function. (elf64_x86_64_check_relocs): Also generate dynamic relocs for relocations against STT_IFUNC symbols. (allocate_dynrelocs): Likewise. (elf64_x86_64_relocate_section): Likewise. * elfcode.h (elf_slurp_symbol_table): Translate STT_IFUNC into BSF_INDIRECT_FUNCTION. * elflink.c (_bfd_elf_adjust_dynamic_reloc_section): Add support for STT_IFUNC symbols. (get_ifunc_reloc_section_name): New function. (_bfd_elf_make_ifunc_reloc_section): New function. * elf-bfd.h (struct bfd_elf_section_data): Add indirect_relocs field. * bfd-in2.h: Regenerate. gas/ * config/obj-elf.c (obj_elf_type): Add support for STT_IFUNC type. * doc/as.texinfo: Document new feature. * NEWS: Mention new feature. gas/testsuite/ * gas/elf/type.s: Add test of STT_IFUNC symbol type. * gas/elf/type.e: Update expected disassembly. * gas/elf/elf.exp: Update grep of symbol types. ld/ * NEWS: Mention new feature. * pe-dll.c (process_def_file): Replace use of redundant BFD_FORT_COMM_DEFAULT_VALUE with 0. * scripttempl/elf.sc: Add .rel.ifunc.dyn and .rela.ifunc.dyn sections. ld/testsuite/ * ld-mips-elf/reloc-1-n32.d: Updated expected output for reloc descriptions. * ld-mips-elf/reloc-1-n64.d: Likewise. * ld-i386/ifunc.d: New test. * ld-i386/ifunc.s: Source file for the new test. * ld-i386/i386.exp: Run the new test.
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@item STT_NOTYPE
@itemx notype
Does not mark the symbol in any way. It is supported just for completeness.
* config/obj-elf.c (obj_elf_type): Add code to support a type of gnu_unique_object. * doc/as.texinfo: Document new feature of .type directive. * NEWS: Mention support for gnu_unique_object symbol type. * common.h (STB_GNU_UNIQUE): Define. * NEWS: Mention the linker's support for symbols with a binding of STB_GNU_UNIQUE. * gas/elf/type.s: Add unique global symbol definition. * gas/elf/type.e: Add expected readelf output for global unique symbol. * elfcpp.h (enum STB): Add STB_GNU_UNIQUE. * readelf.c (get_symbol_binding): For Linux targeted files return UNIQUE for symbols with the STB_GNU_UNIQUE binding. * doc/binutils.texi: Document the meaning of the 'u' symbol binding in the output of nm and objdump --syms. * elf-bfd.h (struct elf_link_hash_entry): Add unique_global field. * elf.c (swap_out_syms): Set binding to STB_GNU_UNIQUE for symbols with the BSF_GNU_UNIQUE flag bit set. * elfcode.h (elf_slurp_symbol_table): Set the BSF_GNU_UNIQUE flag for symbols with STB_GNU_UNIQUE binding. * elflink.c (_bfd_elf_merge_symbol): Set unique_global for symbols with the STB_GNU_UNIQUE binding. (elf_link_add_object_symbols): Set the BSF_GNU_UNIQUE flag for symbols with STB_GNU_UNIQUE binding. Set STB_GNU_UNIQUE for symbols with the unique_global field set. (elf_link_output_extsym): Set unique_global field for symbols with the STB_GNU_UNIQUE binding. * syms.c (struct bfd_symbol): Define BSF_GNU_UNIQUE flag bit. (bfd_print_symbol_vandf): Print a 'u' character for BSF_GNU_UNIQUE symbols. (bfd_decode_symclass): Return a 'u' character for BSF_GNU_UNIQUE symbols. * bfd-in2.h: Regenerate.
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@item gnu_unique_object
Marks the symbol as being a globally unique data object. The dynamic linker
will make sure that in the entire process there is just one symbol with this
name and type in use. (This is only supported on assemblers targeting GNU
systems).
* config/obj-elf.c (obj_elf_type): Add code to support a type of gnu_unique_object. * doc/as.texinfo: Document new feature of .type directive. * NEWS: Mention support for gnu_unique_object symbol type. * common.h (STB_GNU_UNIQUE): Define. * NEWS: Mention the linker's support for symbols with a binding of STB_GNU_UNIQUE. * gas/elf/type.s: Add unique global symbol definition. * gas/elf/type.e: Add expected readelf output for global unique symbol. * elfcpp.h (enum STB): Add STB_GNU_UNIQUE. * readelf.c (get_symbol_binding): For Linux targeted files return UNIQUE for symbols with the STB_GNU_UNIQUE binding. * doc/binutils.texi: Document the meaning of the 'u' symbol binding in the output of nm and objdump --syms. * elf-bfd.h (struct elf_link_hash_entry): Add unique_global field. * elf.c (swap_out_syms): Set binding to STB_GNU_UNIQUE for symbols with the BSF_GNU_UNIQUE flag bit set. * elfcode.h (elf_slurp_symbol_table): Set the BSF_GNU_UNIQUE flag for symbols with STB_GNU_UNIQUE binding. * elflink.c (_bfd_elf_merge_symbol): Set unique_global for symbols with the STB_GNU_UNIQUE binding. (elf_link_add_object_symbols): Set the BSF_GNU_UNIQUE flag for symbols with STB_GNU_UNIQUE binding. Set STB_GNU_UNIQUE for symbols with the unique_global field set. (elf_link_output_extsym): Set unique_global field for symbols with the STB_GNU_UNIQUE binding. * syms.c (struct bfd_symbol): Define BSF_GNU_UNIQUE flag bit. (bfd_print_symbol_vandf): Print a 'u' character for BSF_GNU_UNIQUE symbols. (bfd_decode_symclass): Return a 'u' character for BSF_GNU_UNIQUE symbols. * bfd-in2.h: Regenerate.
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@end table
Note: Some targets support extra types in addition to those listed above.
@end ifset
@end ifset
@node Uleb128
@section @code{.uleb128 @var{expressions}}
@cindex @code{uleb128} directive
@var{uleb128} stands for ``unsigned little endian base 128.'' This is a
compact, variable length representation of numbers used by the DWARF
symbolic debugging format. @xref{Sleb128, ,@code{.sleb128}}.
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@ifset COFF
@node Val
@section @code{.val @var{addr}}
@cindex @code{val} directive
@cindex COFF value attribute
@cindex value attribute, COFF
This directive, permitted only within @code{.def}/@code{.endef} pairs,
records the address @var{addr} as the value attribute of a symbol table
entry.
@ifset BOUT
@samp{.val} is used only for COFF output; when @command{@value{AS}} is
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configured for @code{b.out}, it accepts this directive but ignores it.
@end ifset
@end ifset
@ifset ELF
@node Version
@section @code{.version "@var{string}"}
@cindex @code{version} directive
This directive creates a @code{.note} section and places into it an ELF
formatted note of type NT_VERSION. The note's name is set to @code{string}.
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@end ifset
@ifset ELF
@node VTableEntry
@section @code{.vtable_entry @var{table}, @var{offset}}
@cindex @code{vtable_entry} directive
This directive finds or creates a symbol @code{table} and creates a
@code{VTABLE_ENTRY} relocation for it with an addend of @code{offset}.
@node VTableInherit
@section @code{.vtable_inherit @var{child}, @var{parent}}
@cindex @code{vtable_inherit} directive
This directive finds the symbol @code{child} and finds or creates the symbol
@code{parent} and then creates a @code{VTABLE_INHERIT} relocation for the
parent whose addend is the value of the child symbol. As a special case the
parent name of @code{0} is treated as referring to the @code{*ABS*} section.
@end ifset
@node Warning
@section @code{.warning "@var{string}"}
@cindex warning directive
Similar to the directive @code{.error}
(@pxref{Error,,@code{.error "@var{string}"}}), but just emits a warning.
@node Weak
@section @code{.weak @var{names}}
@cindex @code{weak} directive
This directive sets the weak attribute on the comma separated list of symbol
@code{names}. If the symbols do not already exist, they will be created.
On COFF targets other than PE, weak symbols are a GNU extension. This
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directive sets the weak attribute on the comma separated list of symbol
@code{names}. If the symbols do not already exist, they will be created.
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On the PE target, weak symbols are supported natively as weak aliases.
When a weak symbol is created that is not an alias, GAS creates an
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alternate symbol to hold the default value.
gas/ChangeLog: * read.c (potable): Add weakref. (s_weakref): New. * read.h (s_weakref): Declare. * struc-symbol.h (struct symbol): Add sy_weakrefr and sy_weakrefd. * symbols.c (colon): Clear weakrefr. (symbol_find_exact): Rename to, and reimplement in terms of... (symbol_find_exact_noref): ... new function. (symbol_find): Likewise... (symbol_find_noref): ... ditto. (resolve_symbol_value): Resolve weakrefr without setting their values. (S_SET_WEAK): Call hook. (S_GET_VALUE): Follow weakref link. (S_SET_VALUE): Clear weakrefr. (S_IS_WEAK): Follow weakref link. (S_IS_WEAKREFR, S_SET_WEAKREFR, S_CLEAR_WEAKREFR): New. (S_IS_WEAKREFD, S_SET_WEAKREFD, S_CLEAR_WEAKREFD): New. (symbol_set_value_expression, symbol_set_frag): Clear weakrefr. (symbol_mark_used): Follow weakref link. (print_symbol_value_1): Print weak, weakrefr and weakrefd. * symbols.h (symbol_find_noref, symbol_find_exact_noref): Declare. (S_IS_WEAKREFR, S_SET_WEAKREFR, S_CLEAR_WEAKREFR): Declare. (S_IS_WEAKREFD, S_SET_WEAKREFD, S_CLEAR_WEAKREFD): Declare. * write.c (adust_reloc_syms): Follow weakref link. Do not complain if target is undefined. (write_object_file): Likewise. Remove weakrefr symbols. Drop unreferenced weakrefd symbols. * config/obj-coff.c (obj_frob_symbol): Do not force WEAKREFD symbols EXTERNAL. (pecoff_obj_set_weak_hook, pecoff_obj_clear_weak_hook): New. * config/obj-coff.h (obj_set_weak_hook, obj_clear_weak_hook): Define. * doc/as.texinfo: Document weakref. * doc/internals.texi: Document new struct members, internal functions and hooks. gas/testsuite/ChangeLog: * gas/all/weakref1.s, gas/all/weakref1.d: New test. * gas/all/weakref1g.d, gas/all/weakref1l.d: New tests. * gas/all/weakref1u.d, gas/all/weakref1w.d: New tests. * gas/all/weakref2.s, gas/all/weakref3.s: New tests. * gas/all/gas.exp: Run new tests.
2005-10-24 17:51:42 +00:00
@node Weakref
@section @code{.weakref @var{alias}, @var{target}}
@cindex @code{weakref} directive
This directive creates an alias to the target symbol that enables the symbol to
be referenced with weak-symbol semantics, but without actually making it weak.
If direct references or definitions of the symbol are present, then the symbol
will not be weak, but if all references to it are through weak references, the
symbol will be marked as weak in the symbol table.
The effect is equivalent to moving all references to the alias to a separate
assembly source file, renaming the alias to the symbol in it, declaring the
symbol as weak there, and running a reloadable link to merge the object files
resulting from the assembly of the new source file and the old source file that
had the references to the alias removed.
The alias itself never makes to the symbol table, and is entirely handled
within the assembler.
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@node Word
@section @code{.word @var{expressions}}
@cindex @code{word} directive
This directive expects zero or more @var{expressions}, of any section,
separated by commas.
@ifclear GENERIC
@ifset W32
For each expression, @command{@value{AS}} emits a 32-bit number.
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@end ifset
@ifset W16
For each expression, @command{@value{AS}} emits a 16-bit number.
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@end ifset
@end ifclear
@ifset GENERIC
The size of the number emitted, and its byte order,
depend on what target computer the assembly is for.
@end ifset
@c on amd29k, i960, sparc the "special treatment to support compilers" doesn't
@c happen---32-bit addressability, period; no long/short jumps.
@ifset DIFF-TBL-KLUGE
@cindex difference tables altered
@cindex altered difference tables
@quotation
@emph{Warning: Special Treatment to support Compilers}
@end quotation
@ifset GENERIC
Machines with a 32-bit address space, but that do less than 32-bit
addressing, require the following special treatment. If the machine of
interest to you does 32-bit addressing (or doesn't require it;
@pxref{Machine Dependencies}), you can ignore this issue.
@end ifset
In order to assemble compiler output into something that works,
@command{@value{AS}} occasionally does strange things to @samp{.word} directives.
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Directives of the form @samp{.word sym1-sym2} are often emitted by
compilers as part of jump tables. Therefore, when @command{@value{AS}} assembles a
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directive of the form @samp{.word sym1-sym2}, and the difference between
@code{sym1} and @code{sym2} does not fit in 16 bits, @command{@value{AS}}
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creates a @dfn{secondary jump table}, immediately before the next label.
This secondary jump table is preceded by a short-jump to the
first byte after the secondary table. This short-jump prevents the flow
of control from accidentally falling into the new table. Inside the
table is a long-jump to @code{sym2}. The original @samp{.word}
contains @code{sym1} minus the address of the long-jump to
@code{sym2}.
If there were several occurrences of @samp{.word sym1-sym2} before the
secondary jump table, all of them are adjusted. If there was a
@samp{.word sym3-sym4}, that also did not fit in sixteen bits, a
long-jump to @code{sym4} is included in the secondary jump table,
and the @code{.word} directives are adjusted to contain @code{sym3}
minus the address of the long-jump to @code{sym4}; and so on, for as many
entries in the original jump table as necessary.
@ifset INTERNALS
@emph{This feature may be disabled by compiling @command{@value{AS}} with the
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@samp{-DWORKING_DOT_WORD} option.} This feature is likely to confuse
assembly language programmers.
@end ifset
@end ifset
@c end DIFF-TBL-KLUGE
@node Deprecated
@section Deprecated Directives
@cindex deprecated directives
@cindex obsolescent directives
One day these directives won't work.
They are included for compatibility with older assemblers.
@table @t
@item .abort
@item .line
@end table
@ifset ELF
@node Object Attributes
@chapter Object Attributes
@cindex object attributes
@command{@value{AS}} assembles source files written for a specific architecture
into object files for that architecture. But not all object files are alike.
Many architectures support incompatible variations. For instance, floating
point arguments might be passed in floating point registers if the object file
requires hardware floating point support---or floating point arguments might be
passed in integer registers if the object file supports processors with no
hardware floating point unit. Or, if two objects are built for different
generations of the same architecture, the combination may require the
newer generation at run-time.
This information is useful during and after linking. At link time,
@command{@value{LD}} can warn about incompatible object files. After link
time, tools like @command{gdb} can use it to process the linked file
correctly.
Compatibility information is recorded as a series of object attributes. Each
attribute has a @dfn{vendor}, @dfn{tag}, and @dfn{value}. The vendor is a
string, and indicates who sets the meaning of the tag. The tag is an integer,
and indicates what property the attribute describes. The value may be a string
or an integer, and indicates how the property affects this object. Missing
attributes are the same as attributes with a zero value or empty string value.
Object attributes were developed as part of the ABI for the ARM Architecture.
The file format is documented in @cite{ELF for the ARM Architecture}.
@menu
* GNU Object Attributes:: @sc{gnu} Object Attributes
* Defining New Object Attributes:: Defining New Object Attributes
@end menu
@node GNU Object Attributes
@section @sc{gnu} Object Attributes
The @code{.gnu_attribute} directive records an object attribute
with vendor @samp{gnu}.
Except for @samp{Tag_compatibility}, which has both an integer and a string for
its value, @sc{gnu} attributes have a string value if the tag number is odd and
an integer value if the tag number is even. The second bit (@code{@var{tag} &
2} is set for architecture-independent attributes and clear for
architecture-dependent ones.
@subsection Common @sc{gnu} attributes
These attributes are valid on all architectures.
@table @r
@item Tag_compatibility (32)
The compatibility attribute takes an integer flag value and a vendor name. If
the flag value is 0, the file is compatible with other toolchains. If it is 1,
then the file is only compatible with the named toolchain. If it is greater
than 1, the file can only be processed by other toolchains under some private
arrangement indicated by the flag value and the vendor name.
@end table
@subsection MIPS Attributes
@table @r
@item Tag_GNU_MIPS_ABI_FP (4)
The floating-point ABI used by this object file. The value will be:
@itemize @bullet
@item
0 for files not affected by the floating-point ABI.
@item
1 for files using the hardware floating-point with a standard double-precision
FPU.
@item
2 for files using the hardware floating-point ABI with a single-precision FPU.
@item
3 for files using the software floating-point ABI.
@item
4 for files using the hardware floating-point ABI with 64-bit wide
double-precision floating-point registers and 32-bit wide general
purpose registers.
@end itemize
@end table
@subsection PowerPC Attributes
@table @r
@item Tag_GNU_Power_ABI_FP (4)
The floating-point ABI used by this object file. The value will be:
@itemize @bullet
@item
0 for files not affected by the floating-point ABI.
@item
1 for files using double-precision hardware floating-point ABI.
@item
2 for files using the software floating-point ABI.
@item
3 for files using single-precision hardware floating-point ABI.
@end itemize
@item Tag_GNU_Power_ABI_Vector (8)
The vector ABI used by this object file. The value will be:
@itemize @bullet
@item
0 for files not affected by the vector ABI.
@item
1 for files using general purpose registers to pass vectors.
@item
2 for files using AltiVec registers to pass vectors.
@item
3 for files using SPE registers to pass vectors.
@end itemize
@end table
@node Defining New Object Attributes
@section Defining New Object Attributes
If you want to define a new @sc{gnu} object attribute, here are the places you
will need to modify. New attributes should be discussed on the @samp{binutils}
mailing list.
@itemize @bullet
@item
This manual, which is the official register of attributes.
@item
The header for your architecture @file{include/elf}, to define the tag.
@item
The @file{bfd} support file for your architecture, to merge the attribute
and issue any appropriate link warnings.
@item
Test cases in @file{ld/testsuite} for merging and link warnings.
@item
@file{binutils/readelf.c} to display your attribute.
@item
GCC, if you want the compiler to mark the attribute automatically.
@end itemize
@end ifset
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@ifset GENERIC
@node Machine Dependencies
@chapter Machine Dependent Features
@cindex machine dependencies
The machine instruction sets are (almost by definition) different on
each machine where @command{@value{AS}} runs. Floating point representations
vary as well, and @command{@value{AS}} often supports a few additional
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directives or command-line options for compatibility with other
assemblers on a particular platform. Finally, some versions of
@command{@value{AS}} support special pseudo-instructions for branch
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optimization.
This chapter discusses most of these differences, though it does not
include details on any machine's instruction set. For details on that
subject, see the hardware manufacturer's manual.
@menu
@ifset AARCH64
* AArch64-Dependent:: AArch64 Dependent Features
@end ifset
@ifset ALPHA
* Alpha-Dependent:: Alpha Dependent Features
@end ifset
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@ifset ARC
* ARC-Dependent:: ARC Dependent Features
@end ifset
@ifset ARM
* ARM-Dependent:: ARM Dependent Features
@end ifset
@ifset AVR
* AVR-Dependent:: AVR Dependent Features
@end ifset
@ifset Blackfin
* Blackfin-Dependent:: Blackfin Dependent Features
@end ifset
@ifset CR16
* CR16-Dependent:: CR16 Dependent Features
@end ifset
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@ifset CRIS
* CRIS-Dependent:: CRIS Dependent Features
@end ifset
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@ifset D10V
* D10V-Dependent:: D10V Dependent Features
@end ifset
@ifset D30V
* D30V-Dependent:: D30V Dependent Features
@end ifset
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
@ifset EPIPHANY
* Epiphany-Dependent:: EPIPHANY Dependent Features
@end ifset
1999-05-03 07:29:11 +00:00
@ifset H8/300
* H8/300-Dependent:: Renesas H8/300 Dependent Features
1999-05-03 07:29:11 +00:00
@end ifset
@ifset HPPA
* HPPA-Dependent:: HPPA Dependent Features
@end ifset
2000-02-23 13:52:23 +00:00
@ifset I370
* ESA/390-Dependent:: IBM ESA/390 Dependent Features
@end ifset
1999-05-03 07:29:11 +00:00
@ifset I80386
* i386-Dependent:: Intel 80386 and AMD x86-64 Dependent Features
1999-05-03 07:29:11 +00:00
@end ifset
@ifset I860
* i860-Dependent:: Intel 80860 Dependent Features
@end ifset
1999-05-03 07:29:11 +00:00
@ifset I960
* i960-Dependent:: Intel 80960 Dependent Features
@end ifset
@ifset IA64
* IA-64-Dependent:: Intel IA-64 Dependent Features
@end ifset
2002-07-19 07:52:40 +00:00
@ifset IP2K
* IP2K-Dependent:: IP2K Dependent Features
@end ifset
2008-12-23 19:10:25 +00:00
@ifset LM32
* LM32-Dependent:: LM32 Dependent Features
@end ifset
ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * configure.in: Add cases for Renesas m32c. * configure: Regenerated. bfd/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for m32c-*-elf (Renesas m32c and m16c). * Makefile.am (ALL_MACHINES): Add cpu-m32c.lo. (ALL_MACHINES_CFILES): Add cpu-m32c.c. (BFD32_BACKENDS): Add elf32-m32c.lo. (BFD32_BACKENDS_CFILES): Add elf32-m32c.c. (cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'. * Makefile.in: Regenerated. * archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New arch and mach codes. (bfd_m32c_arch): New arch info object. (bfd_archures_list): List bfd_m32c_arch. * bfd-in2.h: Regenerated. * config.bfd: Add case for the m32c. * configure.in: Add case for the m32c. * configure: Regenerated. * cpu-m32c.c, elf32-m32c.c: New files. * libbfd.h: Regenerated. * targets.c (bfd_elf32_m32c_vec): Declare. (_bfd_target_vector): List bfd_elf32_m32c_vec. binutils/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * readelf.c: #include "elf/m32c.h" (guess_is_rela, dump_relocations, get_machine_name): Add cases for EM_M32C. * Makefile.am (readelf.o): Update dependencies. * Makefile.in: Regenerated. cpu/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. gas/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C. * Makefile.am (CPU_TYPES): List m32c. (TARGET_CPU_CFILES): List config/tc-m32c.c. (TARGET_CPU_HFILES): List config/tc-m32c.h. * configure.in: Add case for m32c. * configure.tgt: Add cases for m32c and m32c-*-elf. * configure: Regenerated. * config/tc-m32c.c, config/tc-m32c.h: New files. * doc/Makefile.am (CPU_DOCS): Add c-m32c.texi. * doc/Makefile.in: Regenerated. * doc/all.texi: Set M32C. * doc/as.texinfo: Add text for the M32C-specific options and line comment characters, and refer to c-m32c.texi. * doc/c-m32c.texi: New file. include/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * dis-asm.h (print_insn_m32c): New declaration. include/elf/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for Renesas M32C and M16C. * common.h (EM_M32C): New machine number. * m32c.h: New file. ld/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o. (eelf32m32c.c): New target. * Makefile.in: Regenerated. * configure.tgt: Add case for m32c-*-elf. * emulparams/elf32m32c.sh: New file. opcodes/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New. * m32c-desc.h, m32c-opc.h: New. * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h. (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c. (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo. (CLEANFILES): List stamp-m32c. (M32C_DEPS): List stamp-m32c, if CGEN_MAINT. (CGEN_CPUS): Add m32c. (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c) (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS. (m32c_opc_h): New variable. (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo) (m32c-opc.lo): New rules. * Makefile.in: Regenerated. * configure.in: Add case for bfd_m32c_arch. * configure: Regenerated. * disassemble.c (ARCH_m32c): New. [ARCH_m32c]: #include "m32c-desc.h". (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c. (disassemble_init_for_target) [ARCH_m32c]: Same. * cgen-ops.h, cgen-types.h: New files. * Makefile.am (HFILES): List them. * Makefile.in: Regenerated.
2005-07-14 22:52:28 +00:00
@ifset M32C
* M32C-Dependent:: M32C Dependent Features
@end ifset
@ifset M32R
* M32R-Dependent:: M32R Dependent Features
@end ifset
1999-05-03 07:29:11 +00:00
@ifset M680X0
* M68K-Dependent:: M680x0 Dependent Features
@end ifset
@ifset M68HC11
* M68HC11-Dependent:: M68HC11 and 68HC12 Dependent Features
@end ifset
Add support for Xilinx MicroBlaze processor. * bfd/Makefile.am: Add cpu-microblaze.{lo,c}, elf32-microblaze.{lo,c}. * bfd/Makefile.in: Same. * bfd/archures.c: Add bfd_arch_microblaze. * bfd/bfd-in2.h: Regenerate. * bfd/config.bfd: Add microblaze target. * bfd/configure: Add bfd_elf32_microblaze_vec target. * bfd/configure.in: Same. * bfd/cpu-microblaze.c: New. * bfd/elf32-microblaze.c: New. * bfd/libbfd-in.h: Add prototype _bfd_dwarf2_fixup_section_debug_loc(). * bfd/libbfd.h: Regenerate. * bfd/reloc.c: Add MICROBLAZE relocations. * bfd/section.c: Add struct relax_table and relax_count to section. * bfd/targets.c: Add bfd_elf32_microblaze_vec. * binutils/MAINTAINERS: Add self as maintainer. * binutils/readelf.c: Include elf/microblaze.h, add EM_MICROBLAZE & EM_MICROBLAZE_OLD to guess_is_rela(), dump_relocations(), get_machine_name(). * config.sub: Add microblaze target. * configure: Same. * configure.ac: Same. * gas/Makefile.am: add microblaze to CPU_TYPES, config/tc-microblaze.c to TARGET_CPU_CFILES, config/tc-microblaze.h to TARGET_CPU_HFILES, add DEP_microblaze_elf target. * gas/Makefile.in: Same. * gas/config/tc-microblaze.c: Add MicroBlaze assembler. * gas/config/tc-microblaze.h: Add header for tc-microblaze.c. * gas/configure: Add microblaze target. * gas/configure.in: Same. * gas/configure.tgt: Same. * gas/doc/Makefile.am: Add c-microblaze.texi to CPU_DOCS. * gas/doc/Makefile.in: Same. * gas/doc/all.texi: Set MICROBLAZE. * gas/doc/as.texinfo: Add MicroBlaze doc links. * gas/doc/c-microblaze.texi: New MicroBlaze docs. * include/dis-asm.h: Decl print_insn_microblaze(). * include/elf/common.h: Define EM_MICROBLAZE & EM_MICROBLAZE_OLD. * include/elf/microblaze.h: New reloc definitions. * ld/Makefile.am: Add eelf32mb_linux.o, eelf32microblaze.o to ALL_EMULATIONS, targets. * ld/Makefile.in: Same. * ld/configure.tgt: Add microblaze*-linux*, microblaze* targets. * ld/emulparams/elf32mb_linux.sh: New. * ld/emulparams/elf32microblaze.sh. New. * ld/scripttempl/elfmicroblaze.sc: New. * opcodes/Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to CFILES, microblaze-dis.lo to ALL_MACHINES, targets. * opcodes/Makefile.in: Same. * opcodes/configure: Add bfd_microblaze_arch target. * opcodes/configure.in: Same. * opcodes/disassemble.c: Define ARCH_microblaze, return print_insn_microblaze(). * opcodes/microblaze-dis.c: New MicroBlaze disassembler. * opcodes/microblaze-opc.h: New MicroBlaze opcode definitions. * opcodes/microblaze-opcm.h: New MicroBlaze opcode types.
2009-08-06 17:38:04 +00:00
@ifset MICROBLAZE
* MicroBlaze-Dependent:: MICROBLAZE Dependent Features
@end ifset
1999-05-03 07:29:11 +00:00
@ifset MIPS
* MIPS-Dependent:: MIPS Dependent Features
@end ifset
2001-10-30 15:20:14 +00:00
@ifset MMIX
* MMIX-Dependent:: MMIX Dependent Features
@end ifset
2002-12-30 19:25:13 +00:00
@ifset MSP430
* MSP430-Dependent:: MSP430 Dependent Features
@end ifset
PR gas/12390 * doc/all.texi: Add NS32K * doc/as.texinfo: Remove target specific details of which characters act as comment initiators and statement separators into individual target specific files. * doc/c-alpha.texi (Alpha-Chars): Document special behaviour of the hash character at the start of a line. * doc/c-arm.texi (ARM-Chars): Likewise. * doc/c-avr.texi (AVR-Chars): Likewise. * doc/c-d10v.texi (D10V-Chars): Likewise. * doc/c-d30v.texi (D30V-Chars): Likewise. * doc/c-mmix.texi (MMIX-Chars): Likewise. * doc/c-s390.texi (s390 characters): Likewise. * doc/c-sh.texi (SH-Chars): Likewise. * doc/c-sh64.texi (SH64-Chars): Likewise. * doc/c-sparc.texi (SPARC-Chars): Likewise. * doc/c-tic6x.texi (TIC6X Syntax): Likewise. * doc/c-xtensa.texi (Xtensa Syntax): Likewise. * doc/c-z80.texi (Z80-Chars): Likewise. * doc/c-z8k.texi (Z8000-Chars): Likewise. * doc/c-pdp11.texi (PDP11-Syntax): Document line separator character. * doc/c-arc.texi (ARC-Chars): Fill in this subsection. * doc/c-bfin.texi (Blackfin Syntax): Document line comment and line separator characters. * doc/c-cr16.texi (CR16 Syntax): Likewise. * doc/c-i386.texi (i386-Chars): Likewise. * doc/c-i860.texi (i860-Chars): Likewise. * doc/c-i960.texi (i960-Chars): Likewise. * doc/c-ip2k.texi (IP2K-Chars): Likewise. * doc/c-lm32.texi (LM32-Chars): likewise. * doc/c-m32c.texi (M32C-Chars): Likewise. * doc/c-m68hc11.texi (M68HC11-syntax): Likewise. * doc/c-m68k.texi (M68K-Chars): Likewise. * doc/c-microblaze.texi (MicroBlaze-Chars): Likewise. * doc/c-msp430.texi (MSP430-Chars): Likewise. * doc/c-mt.texi (MT-Chars): Likewise. * doc/c-ns32k.texi (NS32K-Chars): Likewise. * doc/c-pj.texi (PJ-Chars): Likewise. * doc/c-ppc.texi (PowerPC-Chars): Likewise. * doc/c-rx.texi (RX-Chars): Likewise. * doc/c-score.texi (SCORE-Chars): Likewise. * doc/c-tic54x.texi (TIC54X-Chars): Likewise. * doc/c-v850.texi (V850-Chars): Likewise. * doc/c-vax.texi (VAX-Chars): Likewise. * doc/c-xc16x.texi (xc16x-Chars): Likewise.
2011-01-18 13:37:39 +00:00
@ifset NS32K
* NS32K-Dependent:: NS32K Dependent Features
@end ifset
1999-05-03 07:29:11 +00:00
@ifset SH
* SH-Dependent:: Renesas / SuperH SH Dependent Features
* SH64-Dependent:: SuperH SH64 Dependent Features
1999-05-03 07:29:11 +00:00
@end ifset
2001-02-18 23:33:11 +00:00
@ifset PDP11
* PDP-11-Dependent:: PDP-11 Dependent Features
@end ifset
@ifset PJ
* PJ-Dependent:: picoJava Dependent Features
@end ifset
[gas/ChangeLog] * config/tc-ppc.c (md_parse_option): New -m7410, -m7450 and -m7455 flags, equivalent to -m7400. New -maltivec to enable AltiVec instructions. New -mbook64 and -mbooke/-mbooke32 flags to enable 64-bit and 32-bit BookE support, respectively. Change -m403 and -m405 to set PPC403 option. (md_show_usage): Adjust for new options. * doc/all.texi: Set PPC. * doc/as.texinfo: Add PPC support and pull in c-ppc.texi. * doc/c-ppc.texi: New file. * doc/Makefile.am (CPU_DOCS): Add c-ppc.texi. * doc/Makefile.in: Regenerate. [gas/testsuite/ChangeLog] * gas/ppc/booke.s: New test for Motorola BookE. * gas/ppc/booke.d: New file. * gas/ppc/ppc.exp: Test booke.s. [include/opcode/ChangeLog] * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_403): New opcode flags for BookE and PowerPC403 instructions. [opcodes/ChangeLog] * ppc-opc.c (insert_de, extract_de, insert_des, extract_des): New instruction field instruction/extraction functions for new BookE DE form instructions. (CT): New macro for CT field in an X form instruction. (DE, DES, DEO, DE_MASK): New macros for DE/DES fields in DE form instructions. (PPC64): Don't include PPC_OPCODE_PPC. (403): New opcode macro for PPC403 processors. (BOOKE): New opcode macro for BookE processors. (bce, bcel, bcea, bcela, bclre, bclrel: New BookE instructions. (bcctre, bcctrel, be, bel, bea, bela, icbt, icbte, lwzxe): Likewise. (dcbste, lwzuxe, luxe, dcbfe, lbzxe, lwarxe, lbzuxe): Likewise. (stwcxe, stwxe, stxe, stwuxe, stuxe, stbxe, dcbtste, stbuxe): Likewise. (mfapidi, dcbte, lhzxe, lhzuxe, lhaxe, lhauxe, subfe64): Likewise. (subfeo64, adde64, addeo64, sthxe, sthuxe, subfze64): Likewise. (subfzeo64, addze64, addzeo64, dcbie, subfme64, subfmeo64): Likewise. (addme64, addmeo64, stdcxe., mcrxr64, lwbrxe, lfsxe, lfsuxe): Likewise. (lfdxe, lfduxe, stwbrxe, stfsxe, stfsuxe, stfdxe, dcbae): Likewise. (stfduxe, tlbivax, tlbivaxe, lhbrxe, ldxe, lduxe, tlbsx): Likewise. (tlbsxe, sthbrxe, stdxe, stduxe, icbie, stfiwxe, dcbze, lbze): Likewise. (lbzue, ldue, lhze, lhzue, lhae, lhaue, lwze, lwzue): Likewise. (stbe, stbue, sthe, sthue, stwe, stwue, lfse, lfsue, lfde): Likewise. (lfdue, stde, stdue, stfse, stfsue, stfde, stfdue): Likewise. * ppc-dis.c (print_insn_big_powerpc, print_insn_little_powerpc): Look for a disassembler option of `booke', `booke32' or `booke64' to enable BookE support in the disassembler.
2001-10-13 01:59:09 +00:00
@ifset PPC
* PPC-Dependent:: PowerPC Dependent Features
@end ifset
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 03:09:11 +00:00
@ifset RL78
* RL78-Dependent:: RL78 Dependent Features
@end ifset
@ifset RX
* RX-Dependent:: RX Dependent Features
@end ifset
@ifset S390
* S/390-Dependent:: IBM S/390 Dependent Features
@end ifset
2009-03-27 08:26:18 +00:00
@ifset SCORE
* SCORE-Dependent:: SCORE Dependent Features
@end ifset
1999-05-03 07:29:11 +00:00
@ifset SPARC
* Sparc-Dependent:: SPARC Dependent Features
@end ifset
2000-06-20 13:52:32 +00:00
@ifset TIC54X
* TIC54X-Dependent:: TI TMS320C54x Dependent Features
@end ifset
bfd: * Makefile.am (ALL_MACHINES): Add cpu-tic6x.lo. (ALL_MACHINES_CFILES): Add cpu-tic6x.c. (BFD32_BACKENDS): Add elf32-tic6x.lo. (BFD32_BACKENDS_CFILES): Add elf32-tic6x.c. * Makefile.in: Regenerate. * archures.c (bfd_arch_tic6x, bfd_tic6x_arch): New. (bfd_archures_list): Update. * config.bfd (tic6x-*-elf): New. * configure.in (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New. * configure: Regenerate. * cpu-tic6x.c, elf32-tic6x.c: New. * reloc.c (BFD_RELOC_C6000_PCR_S21, BFD_RELOC_C6000_PCR_S12, BFD_RELOC_C6000_PCR_S10, BFD_RELOC_C6000_PCR_S7, BFD_RELOC_C6000_ABS_S16, BFD_RELOC_C6000_ABS_L16, BFD_RELOC_C6000_ABS_H16, BFD_RELOC_C6000_SBR_U15_B, BFD_RELOC_C6000_SBR_U15_H, BFD_RELOC_C6000_SBR_U15_W, BFD_RELOC_C6000_SBR_S16, BFD_RELOC_C6000_SBR_L16_B, BFD_RELOC_C6000_SBR_L16_H, BFD_RELOC_C6000_SBR_L16_W, BFD_RELOC_C6000_SBR_H16_B, BFD_RELOC_C6000_SBR_H16_H, BFD_RELOC_C6000_SBR_H16_W, BFD_RELOC_C6000_SBR_GOT_U15_W, BFD_RELOC_C6000_SBR_GOT_L16_W, BFD_RELOC_C6000_SBR_GOT_H16_W, BFD_RELOC_C6000_DSBT_INDEX, BFD_RELOC_C6000_PREL31, BFD_RELOC_C6000_COPY, BFD_RELOC_C6000_ALIGN, BFD_RELOC_C6000_FPHEAD, BFD_RELOC_C6000_NOCMP): New. * targets.c (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New. (_bfd_target_vector): Update. * bfd-in2.h, libbfd.h: Regenerate. binutils: * MAINTAINERS: Add self as TI C6X maintainer. * NEWS: Add news entry for TI C6X support. * readelf.c: Include elf/tic6x.h. (guess_is_rela): Handle EM_TI_C6000. (dump_relocations): Likewise. (get_tic6x_dynamic_type): New. (get_dynamic_type): Call it. (get_machine_flags): Handle EF_C6000_REL. (get_osabi_name): Handle machine-specific values only for relevant machines. Handle C6X values. (get_tic6x_segment_type): New. (get_segment_type): Call it. (get_tic6x_section_type_name): New. (get_section_type_name): Call it. (is_32bit_abs_reloc, is_16bit_abs_reloc, is_none_reloc): Handle EM_TI_C6000. gas: * Makefile.am (TARGET_CPU_CFILES): Add config/tc-tic6x.c. (TARGET_CPU_HFILES): Add config/tc-tic6x.h. * Makefile.in: Regenerate. * NEWS: Add news entry for TI C6X support. * app.c (do_scrub_chars): Handle "||^" for TI C6X. Handle TC_PREDICATE_START_CHAR and TC_PREDICATE_END_CHAR. Keep spaces in operands if TC_KEEP_OPERAND_SPACES. * configure.tgt (tic6x-*-*): New. * config/tc-ia64.h (TC_PREDICATE_START_CHAR, TC_PREDICATE_END_CHAR): Define. * config/tc-tic6x.c, config/tc-tic6x.h: New. * doc/Makefile.am (CPU_DOCS): Add c-tic6x.texi. * doc/Makefile.in: Regenerate. * doc/all.texi (TIC6X): Define. * doc/as.texinfo: Add TI C6X documentation. Include c-tic6x.texi. * doc/c-tic6x.texi: New. gas/testsuite: * gas/tic6x: New directory and testcases. include: * dis-asm.h (print_insn_tic6x): Declare. include/elf: * common.h (ELFOSABI_C6000_ELFABI, ELFOSABI_C6000_LINUX): Define. * tic6x.h: New. include/opcode: * tic6x-control-registers.h, tic6x-insn-formats.h, tic6x-opcode-table.h, tic6x.h: New. ld: * Makefile.am (ALL_EMULATIONS): Add eelf32_tic6x_be.o and eelf32_tic6x_le.o. (eelf32_tic6x_be.c, eelf32_tic6x_le.c): New. * NEWS: Add news entry for TI C6X support. * configure.tgt (tic6x-*-*): New. * emulparams/elf32_tic6x_be.sh, emulparams/elf32_tic6x_le.sh: New. ld/testsuite: * ld-elf/flags1.d, ld-elf/merge.d: XFAIL for tic6x-*-*. * ld-elf/sec-to-seg.exp: Set B_test_same_seg to 0 for tic6x-*-*. * ld-tic6x: New directory and testcases. opcodes: * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c. * Makefile.in: Regenerate. * configure.in (bfd_tic6x_arch): New. * configure: Regenerate. * disassemble.c (ARCH_tic6x): Define if ARCH_all. (disassembler): Handle TI C6X. * tic6x-dis.c: New.
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@ifset TIC6X
* TIC6X-Dependent :: TI TMS320C6x Dependent Features
@end ifset
* Makefile.am (ALL_MACHINES): Add cpu-tilegx.lo and cpu-tilepro.lo. (ALL_MACHINE_CFILES): Add cpu-tilegx.c and cpu-tilepro.c. (BFD32_BACKENDS): Add elf32-tilegx.lo, elf32-tilepro.lo, and elfxx-tilegx.lo. (BFD32_BACKENDS_CFILES): Add elf32-tilegx.c elf32-tilepro.c, and elfxx-tilegx.c. (BFD64_BACKENDS): Add elf64-tilegx.lo. (BFD64_BACKENDS_CFILES): Add elf64-tilegx.c. * Makefile.in: Regenerate. * arctures.c (bfd_architecture): Define bfd_arch_tilepro, bfd_arch_tilegx, bfd_mach_tilepro, bfd_mach_tilegx. (bfd_arch_info): Add bfd_tilegx_arch, bfd_tilepro_arch. (bfd_archures_list): Add bfd_tilegx_arch, bfd_tilepro_arch. bfd-in2.h: Regenerate. * config.bfd: Handle tilegx-*-* and tilepro-*-*. * configure.in: Handle bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec, and bfd_elf64_tilegx_vec. * configure: Regenerate. * elf-bfd.h (enum elf_target_id): Define TILEGX_ELF_DATA and TILEPRO_ELF_DATA. * libbfd.h: Regenerate. * reloc.c: Add BFD_RELOC_TILEPRO_{COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1, JOFFLONG_X1, JOFFLONG_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM15_X1, MF_IMM15_X1, IMM16_X0, IMM16_X1, IMM16_X0_LO, IMM16_X1_LO, IMM16_X0_HI, IMM16_X1_HI, IMM16_X0_HA, IMM16_X1_HA, IMM16_X0_PCREL, IMM16_X1_PCREL, IMM16_X0_LO_PCREL, IMM16_X1_LO_PCREL, IMM16_X0_HI_PCREL, IMM16_X1_HI_PCREL, IMM16_X0_HA_PCREL, IMM16_X1_HA_PCREL, IMM16_X0_GOT, IMM16_X1_GOT, IMM16_X0_GOT_LO, IMM16_X1_GOT_LO, IMM16_X0_GOT_HI, IMM16_X1_GOT_HI, IMM16_X0_GOT_HA, IMM16_X1_GOT_HA, MMSTART_X0, MMEND_X0, MMSTART_X1, MMEND_X1, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_TLS_GD, IMM16_X1_TLS_GD, IMM16_X0_TLS_GD_LO, IMM16_X1_TLS_GD_LO, IMM16_X0_TLS_GD_HI, IMM16_X1_TLS_GD_HI, IMM16_X0_TLS_GD_HA, IMM16_X1_TLS_GD_HA, IMM16_X0_TLS_IE, IMM16_X1_TLS_IE, IMM16_X0_TLS_IE_LO, IMM16_X1_TLS_IE_LO, IMM16_X0_TLS_IE_HI, IMM16_X1_TLS_IE_HI, IMM16_X0_TLS_IE_HA, IMM16_X1_TLS_IE_HA, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32} Add BFD_RELOC_TILEGX_{HW0, HW1, HW2, HW3, HW0_LAST, HW1_LAST, HW2_LAST, COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1, JUMPOFF_X1, JUMPOFF_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM14_X1, MF_IMM14_X1, MMSTART_X0, MMEND_X0, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_HW0, IMM16_X1_HW0, IMM16_X0_HW1, IMM16_X1_HW1, IMM16_X0_HW2, IMM16_X1_HW2, IMM16_X0_HW3, IMM16_X1_HW3, IMM16_X0_HW0_LAST, IMM16_X1_HW0_LAST, IMM16_X0_HW1_LAST, IMM16_X1_HW1_LAST, IMM16_X0_HW2_LAST, IMM16_X1_HW2_LAST, IMM16_X0_HW0_PCREL, IMM16_X1_HW0_PCREL, IMM16_X0_HW1_PCREL, IMM16_X1_HW1_PCREL, IMM16_X0_HW2_PCREL, IMM16_X1_HW2_PCREL, IMM16_X0_HW3_PCREL, IMM16_X1_HW3_PCREL, IMM16_X0_HW0_LAST_PCREL, IMM16_X1_HW0_LAST_PCREL, IMM16_X0_HW1_LAST_PCREL, IMM16_X1_HW1_LAST_PCREL, IMM16_X0_HW2_LAST_PCREL, IMM16_X1_HW2_LAST_PCREL, IMM16_X0_HW0_GOT, IMM16_X1_HW0_GOT, IMM16_X0_HW1_GOT, IMM16_X1_HW1_GOT, IMM16_X0_HW2_GOT, IMM16_X1_HW2_GOT, IMM16_X0_HW3_GOT, IMM16_X1_HW3_GOT, IMM16_X0_HW0_LAST_GOT, IMM16_X1_HW0_LAST_GOT, IMM16_X0_HW1_LAST_GOT, IMM16_X1_HW1_LAST_GOT, IMM16_X0_HW2_LAST_GOT, IMM16_X1_HW2_LAST_GOT, IMM16_X0_HW0_TLS_GD, IMM16_X1_HW0_TLS_GD, IMM16_X0_HW1_TLS_GD, IMM16_X1_HW1_TLS_GD, IMM16_X0_HW2_TLS_GD, IMM16_X1_HW2_TLS_GD, IMM16_X0_HW3_TLS_GD, IMM16_X1_HW3_TLS_GD, IMM16_X0_HW0_LAST_TLS_GD, IMM16_X1_HW0_LAST_TLS_GD, IMM16_X0_HW1_LAST_TLS_GD, IMM16_X1_HW1_LAST_TLS_GD, IMM16_X0_HW2_LAST_TLS_GD, IMM16_X1_HW2_LAST_TLS_GD, IMM16_X0_HW0_TLS_IE, IMM16_X1_HW0_TLS_IE, IMM16_X0_HW1_TLS_IE, IMM16_X1_HW1_TLS_IE, IMM16_X0_HW2_TLS_IE, IMM16_X1_HW2_TLS_IE, IMM16_X0_HW3_TLS_IE, IMM16_X1_HW3_TLS_IE, IMM16_X0_HW0_LAST_TLS_IE, IMM16_X1_HW0_LAST_TLS_IE, IMM16_X0_HW1_LAST_TLS_IE, IMM16_X1_HW1_LAST_TLS_IE, IMM16_X0_HW2_LAST_TLS_IE, IMM16_X1_HW2_LAST_TLS_IE, TLS_DTPMOD64, TLS_DTPOFF64, TLS_TPOFF64, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32} * targets.c (bfd_elf32_tilegx_vec): Declare. (bfd_elf32_tilepro_vec): Declare. (bfd_elf64_tilegx_vec): Declare. (bfd_target_vector): Add bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec, and bfd_elf64_tilegx_vec. * cpu-tilegx.c: New file. * cpu-tilepro.c: New file. * elf32-tilepro.h: New file. * elf32-tilepro.c: New file. * elf32-tilegx.c: New file. * elf32-tilegx.h: New file. * elf64-tilegx.c: New file. * elf64-tilegx.h: New file. * elfxx-tilegx.c: New file. * elfxx-tilegx.h: New file. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-tilegx.c and config/tc-tilepro.c. (TARGET_CPU_HFILES): Add config/tc-tilegx.h and config/tc-tilepro.h. * Makefile.in: Regenerate. * configure.tgt (tilepro-*-*): New. (tilegx-*-*): Likewise. * config/tc-tilegx.c: New file. * config/tc-tilegx.h: Likewise. * config/tc-tilepro.h: Likewise. * config/tc-tilepro.c: Likewise. * doc/Makefile.am (CPU_DOCS): Add c-tilegx.texi and c-tilepro.texi. * doc/Makefile.in: Regenerate. * doc/all.texi (TILEGX): Define. (TILEPRO): Define. * doc/as.texinfo: Add Tile-Gx and TILEPro documentation. Include c-tilegx.texi and c-tilepro.texi. * doc/c-tilegx.texi: New. * doc/c-tilepro.texi: New. * gas/tilepro/t_constants.s: New file. * gas/tilepro/t_constants.d: Likewise. * gas/tilepro/t_insns.s: Likewise. * gas/tilepro/tilepro.exp: Likewise. * gas/tilepro/t_insns.d: Likewise. * gas/tilegx/tilegx.exp: Likewise. * gas/tilegx/t_insns.d: Likewise. * gas/tilegx/t_insns.s: Likewise. * dis-asm.h (print_insn_tilegx): Declare. (print_insn_tilepro): Likewise. * tilegx.h: New file. * tilepro.h: New file. * common.h: Add EM_TILEGX. * tilegx.h: New file. * tilepro.h: New file. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx.c and eelf32tilepro.c. (ALL_64_EMULATION_SOURCES): Add eelf64tilegx.c. (eelf32tilegx.c): New target. (eelf32tilepro.c): Likewise. (eelf64tilegx.c): Likewise. * Makefile.in: Regenerate. * configure.tgt: Handle tilegx-*-* and tilepro-*-*. * emulparams/elf32tilegx.sh: New file. * emulparams/elf64tilegx.sh: New file. * emulparams/elf32tilepro.sh: New file. * ld-elf/eh5.d: Don't run on tile*. * ld-srec/srec.exp: xfail on tile*. * ld-tilegx/external.s: New file. * ld-tilegx/reloc.d: New file. * ld-tilegx/reloc.s: New file. * ld-tilegx/tilegx.exp: New file. * ld-tilepro/external.s: New file. * ld-tilepro/reloc.d: New file. * ld-tilepro/reloc.s: New file. * ld-tilepro/tilepro.exp: New file. * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tilegx-dis.c, tilegx-opc.c, tilepro-dis.c, and tilepro-opc.c. * Makefile.in: Regenerate. * configure.in: Handle bfd_tilegx_arch and bfd_tilepro_arch. * configure: Regenerate. * disassemble.c (disassembler): Add ARCH_tilegx and ARCH_tilepro. * po/POTFILES.in: Regenerate. * tilegx-dis.c: New file. * tilegx-opc.c: New file. * tilepro-dis.c: New file. * tilepro-opc.c: New file.
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@ifset TILEGX
* TILE-Gx-Dependent :: Tilera TILE-Gx Dependent Features
@end ifset
@ifset TILEPRO
* TILEPro-Dependent :: Tilera TILEPro Dependent Features
@end ifset
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@ifset V850
* V850-Dependent:: V850 Dependent Features
@end ifset
@ifset XGATE
* XGATE-Dependent:: XGATE Features
@end ifset
@ifset XSTORMY16
* XSTORMY16-Dependent:: XStormy16 Dependent Features
@end ifset
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@ifset XTENSA
* Xtensa-Dependent:: Xtensa Dependent Features
@end ifset
@ifset Z80
* Z80-Dependent:: Z80 Dependent Features
@end ifset
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@ifset Z8000
* Z8000-Dependent:: Z8000 Dependent Features
@end ifset
@ifset VAX
* Vax-Dependent:: VAX Dependent Features
@end ifset
@end menu
@lowersections
@end ifset
@c The following major nodes are *sections* in the GENERIC version, *chapters*
@c in single-cpu versions. This is mainly achieved by @lowersections. There is a
@c peculiarity: to preserve cross-references, there must be a node called
@c "Machine Dependencies". Hence the conditional nodenames in each
@c major node below. Node defaulting in makeinfo requires adjacency of
@c node and sectioning commands; hence the repetition of @chapter BLAH
@c in both conditional blocks.
@ifset AARCH64
@include c-aarch64.texi
@end ifset
@ifset ALPHA
@include c-alpha.texi
@end ifset
@ifset ARC
@include c-arc.texi
@end ifset
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@ifset ARM
@include c-arm.texi
@end ifset
@ifset AVR
@include c-avr.texi
@end ifset
@ifset Blackfin
@include c-bfin.texi
@end ifset
@ifset CR16
@include c-cr16.texi
@end ifset
@ifset CRIS
@include c-cris.texi
@end ifset
@ifset Renesas-all
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@ifclear GENERIC
@node Machine Dependencies
@chapter Machine Dependent Features
The machine instruction sets are different on each Renesas chip family,
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and there are also some syntax differences among the families. This
chapter describes the specific @command{@value{AS}} features for each
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family.
@menu
* H8/300-Dependent:: Renesas H8/300 Dependent Features
* SH-Dependent:: Renesas SH Dependent Features
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@end menu
@lowersections
@end ifclear
@end ifset
@ifset D10V
@include c-d10v.texi
@end ifset
@ifset D30V
@include c-d30v.texi
@end ifset
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
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@ifset EPIPHANY
@include c-epiphany.texi
@end ifset
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@ifset H8/300
@include c-h8300.texi
@end ifset
@ifset HPPA
@include c-hppa.texi
@end ifset
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@ifset I370
@include c-i370.texi
@end ifset
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@ifset I80386
@include c-i386.texi
@end ifset
@ifset I860
@include c-i860.texi
@end ifset
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@ifset I960
@include c-i960.texi
@end ifset
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@ifset IA64
@include c-ia64.texi
@end ifset
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@ifset IP2K
@include c-ip2k.texi
@end ifset
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@ifset LM32
@include c-lm32.texi
@end ifset
ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * configure.in: Add cases for Renesas m32c. * configure: Regenerated. bfd/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for m32c-*-elf (Renesas m32c and m16c). * Makefile.am (ALL_MACHINES): Add cpu-m32c.lo. (ALL_MACHINES_CFILES): Add cpu-m32c.c. (BFD32_BACKENDS): Add elf32-m32c.lo. (BFD32_BACKENDS_CFILES): Add elf32-m32c.c. (cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'. * Makefile.in: Regenerated. * archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New arch and mach codes. (bfd_m32c_arch): New arch info object. (bfd_archures_list): List bfd_m32c_arch. * bfd-in2.h: Regenerated. * config.bfd: Add case for the m32c. * configure.in: Add case for the m32c. * configure: Regenerated. * cpu-m32c.c, elf32-m32c.c: New files. * libbfd.h: Regenerated. * targets.c (bfd_elf32_m32c_vec): Declare. (_bfd_target_vector): List bfd_elf32_m32c_vec. binutils/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * readelf.c: #include "elf/m32c.h" (guess_is_rela, dump_relocations, get_machine_name): Add cases for EM_M32C. * Makefile.am (readelf.o): Update dependencies. * Makefile.in: Regenerated. cpu/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. gas/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C. * Makefile.am (CPU_TYPES): List m32c. (TARGET_CPU_CFILES): List config/tc-m32c.c. (TARGET_CPU_HFILES): List config/tc-m32c.h. * configure.in: Add case for m32c. * configure.tgt: Add cases for m32c and m32c-*-elf. * configure: Regenerated. * config/tc-m32c.c, config/tc-m32c.h: New files. * doc/Makefile.am (CPU_DOCS): Add c-m32c.texi. * doc/Makefile.in: Regenerated. * doc/all.texi: Set M32C. * doc/as.texinfo: Add text for the M32C-specific options and line comment characters, and refer to c-m32c.texi. * doc/c-m32c.texi: New file. include/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * dis-asm.h (print_insn_m32c): New declaration. include/elf/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for Renesas M32C and M16C. * common.h (EM_M32C): New machine number. * m32c.h: New file. ld/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o. (eelf32m32c.c): New target. * Makefile.in: Regenerated. * configure.tgt: Add case for m32c-*-elf. * emulparams/elf32m32c.sh: New file. opcodes/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New. * m32c-desc.h, m32c-opc.h: New. * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h. (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c. (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo. (CLEANFILES): List stamp-m32c. (M32C_DEPS): List stamp-m32c, if CGEN_MAINT. (CGEN_CPUS): Add m32c. (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c) (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS. (m32c_opc_h): New variable. (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo) (m32c-opc.lo): New rules. * Makefile.in: Regenerated. * configure.in: Add case for bfd_m32c_arch. * configure: Regenerated. * disassemble.c (ARCH_m32c): New. [ARCH_m32c]: #include "m32c-desc.h". (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c. (disassemble_init_for_target) [ARCH_m32c]: Same. * cgen-ops.h, cgen-types.h: New files. * Makefile.am (HFILES): List them. * Makefile.in: Regenerated.
2005-07-14 22:52:28 +00:00
@ifset M32C
@include c-m32c.texi
@end ifset
@ifset M32R
@include c-m32r.texi
@end ifset
1999-05-03 07:29:11 +00:00
@ifset M680X0
@include c-m68k.texi
@end ifset
@ifset M68HC11
@include c-m68hc11.texi
@end ifset
@ifset MICROBLAZE
Add support for Xilinx MicroBlaze processor. * bfd/Makefile.am: Add cpu-microblaze.{lo,c}, elf32-microblaze.{lo,c}. * bfd/Makefile.in: Same. * bfd/archures.c: Add bfd_arch_microblaze. * bfd/bfd-in2.h: Regenerate. * bfd/config.bfd: Add microblaze target. * bfd/configure: Add bfd_elf32_microblaze_vec target. * bfd/configure.in: Same. * bfd/cpu-microblaze.c: New. * bfd/elf32-microblaze.c: New. * bfd/libbfd-in.h: Add prototype _bfd_dwarf2_fixup_section_debug_loc(). * bfd/libbfd.h: Regenerate. * bfd/reloc.c: Add MICROBLAZE relocations. * bfd/section.c: Add struct relax_table and relax_count to section. * bfd/targets.c: Add bfd_elf32_microblaze_vec. * binutils/MAINTAINERS: Add self as maintainer. * binutils/readelf.c: Include elf/microblaze.h, add EM_MICROBLAZE & EM_MICROBLAZE_OLD to guess_is_rela(), dump_relocations(), get_machine_name(). * config.sub: Add microblaze target. * configure: Same. * configure.ac: Same. * gas/Makefile.am: add microblaze to CPU_TYPES, config/tc-microblaze.c to TARGET_CPU_CFILES, config/tc-microblaze.h to TARGET_CPU_HFILES, add DEP_microblaze_elf target. * gas/Makefile.in: Same. * gas/config/tc-microblaze.c: Add MicroBlaze assembler. * gas/config/tc-microblaze.h: Add header for tc-microblaze.c. * gas/configure: Add microblaze target. * gas/configure.in: Same. * gas/configure.tgt: Same. * gas/doc/Makefile.am: Add c-microblaze.texi to CPU_DOCS. * gas/doc/Makefile.in: Same. * gas/doc/all.texi: Set MICROBLAZE. * gas/doc/as.texinfo: Add MicroBlaze doc links. * gas/doc/c-microblaze.texi: New MicroBlaze docs. * include/dis-asm.h: Decl print_insn_microblaze(). * include/elf/common.h: Define EM_MICROBLAZE & EM_MICROBLAZE_OLD. * include/elf/microblaze.h: New reloc definitions. * ld/Makefile.am: Add eelf32mb_linux.o, eelf32microblaze.o to ALL_EMULATIONS, targets. * ld/Makefile.in: Same. * ld/configure.tgt: Add microblaze*-linux*, microblaze* targets. * ld/emulparams/elf32mb_linux.sh: New. * ld/emulparams/elf32microblaze.sh. New. * ld/scripttempl/elfmicroblaze.sc: New. * opcodes/Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to CFILES, microblaze-dis.lo to ALL_MACHINES, targets. * opcodes/Makefile.in: Same. * opcodes/configure: Add bfd_microblaze_arch target. * opcodes/configure.in: Same. * opcodes/disassemble.c: Define ARCH_microblaze, return print_insn_microblaze(). * opcodes/microblaze-dis.c: New MicroBlaze disassembler. * opcodes/microblaze-opc.h: New MicroBlaze opcode definitions. * opcodes/microblaze-opcm.h: New MicroBlaze opcode types.
2009-08-06 17:38:04 +00:00
@include c-microblaze.texi
@end ifset
1999-05-03 07:29:11 +00:00
@ifset MIPS
@include c-mips.texi
@end ifset
2001-10-30 15:20:14 +00:00
@ifset MMIX
@include c-mmix.texi
@end ifset
2002-12-30 19:25:13 +00:00
@ifset MSP430
@include c-msp430.texi
@end ifset
1999-05-03 07:29:11 +00:00
@ifset NS32K
@include c-ns32k.texi
@end ifset
2001-02-18 23:33:11 +00:00
@ifset PDP11
@include c-pdp11.texi
@end ifset
@ifset PJ
@include c-pj.texi
@end ifset
[gas/ChangeLog] * config/tc-ppc.c (md_parse_option): New -m7410, -m7450 and -m7455 flags, equivalent to -m7400. New -maltivec to enable AltiVec instructions. New -mbook64 and -mbooke/-mbooke32 flags to enable 64-bit and 32-bit BookE support, respectively. Change -m403 and -m405 to set PPC403 option. (md_show_usage): Adjust for new options. * doc/all.texi: Set PPC. * doc/as.texinfo: Add PPC support and pull in c-ppc.texi. * doc/c-ppc.texi: New file. * doc/Makefile.am (CPU_DOCS): Add c-ppc.texi. * doc/Makefile.in: Regenerate. [gas/testsuite/ChangeLog] * gas/ppc/booke.s: New test for Motorola BookE. * gas/ppc/booke.d: New file. * gas/ppc/ppc.exp: Test booke.s. [include/opcode/ChangeLog] * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_403): New opcode flags for BookE and PowerPC403 instructions. [opcodes/ChangeLog] * ppc-opc.c (insert_de, extract_de, insert_des, extract_des): New instruction field instruction/extraction functions for new BookE DE form instructions. (CT): New macro for CT field in an X form instruction. (DE, DES, DEO, DE_MASK): New macros for DE/DES fields in DE form instructions. (PPC64): Don't include PPC_OPCODE_PPC. (403): New opcode macro for PPC403 processors. (BOOKE): New opcode macro for BookE processors. (bce, bcel, bcea, bcela, bclre, bclrel: New BookE instructions. (bcctre, bcctrel, be, bel, bea, bela, icbt, icbte, lwzxe): Likewise. (dcbste, lwzuxe, luxe, dcbfe, lbzxe, lwarxe, lbzuxe): Likewise. (stwcxe, stwxe, stxe, stwuxe, stuxe, stbxe, dcbtste, stbuxe): Likewise. (mfapidi, dcbte, lhzxe, lhzuxe, lhaxe, lhauxe, subfe64): Likewise. (subfeo64, adde64, addeo64, sthxe, sthuxe, subfze64): Likewise. (subfzeo64, addze64, addzeo64, dcbie, subfme64, subfmeo64): Likewise. (addme64, addmeo64, stdcxe., mcrxr64, lwbrxe, lfsxe, lfsuxe): Likewise. (lfdxe, lfduxe, stwbrxe, stfsxe, stfsuxe, stfdxe, dcbae): Likewise. (stfduxe, tlbivax, tlbivaxe, lhbrxe, ldxe, lduxe, tlbsx): Likewise. (tlbsxe, sthbrxe, stdxe, stduxe, icbie, stfiwxe, dcbze, lbze): Likewise. (lbzue, ldue, lhze, lhzue, lhae, lhaue, lwze, lwzue): Likewise. (stbe, stbue, sthe, sthue, stwe, stwue, lfse, lfsue, lfde): Likewise. (lfdue, stde, stdue, stfse, stfsue, stfde, stfdue): Likewise. * ppc-dis.c (print_insn_big_powerpc, print_insn_little_powerpc): Look for a disassembler option of `booke', `booke32' or `booke64' to enable BookE support in the disassembler.
2001-10-13 01:59:09 +00:00
@ifset PPC
@include c-ppc.texi
@end ifset
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 03:09:11 +00:00
@ifset RL78
@include c-rl78.texi
@end ifset
@ifset RX
@include c-rx.texi
@end ifset
@ifset S390
@include c-s390.texi
@end ifset
2009-03-27 08:26:18 +00:00
@ifset SCORE
@include c-score.texi
@end ifset
1999-05-03 07:29:11 +00:00
@ifset SH
@include c-sh.texi
Contribute sh64-elf. 2002-02-08 Alexandre Oliva <aoliva@redhat.com> Stephen Clarke <Stephen.Clarke@st.com> * doc/c-sh64.texi: Fix citation of SH64 architecture manual. 2002-01-31 Alexandre Oliva <aoliva@redhat.com> * config/tc-sh.c (md_relax_table): Added default sizes for non-PC-relative UNDEF_MOVI, and relaxation sequences for MOVI_16, MOVI_32 and MOVI_48. * config/tc-sh64.c (shmedia_md_apply_fix3): Fix warning. (shmedia_md_convert_frag): Handle non-PC-relative UNDEF_MOVI and MOVI_16. (shmedia_md_estimate_size_before_relax): Remove redundant blocks. Set fragP->fr_var even if relaxation type unchanged. Retain UNDEF_MOVI until expression decays to number. 2002-01-24 Alexandre Oliva <aoliva@redhat.com> * config/tc-sh64.c (shmedia_init_reloc): Handle new SHmedia PIC relocation types. Take fixP->fx_addnumber into account too. (shmedia_md_apply_fix): Likewise. (shmedia_md_convert_frag): Likewise. (shmedia_build_Mytes): Likewise. (sh64_consume_datalabel): Complain about nested datalabel. Support PIC relocs. Call sh_parse_name. * config/tc-sh64.h (TC_RELOC_RTSYM_LOC_FIXUP): Extend definition in tc-sh.h to SHmedia reloc types. * config/tc-sh.c (SH64PCRELPLT, MOVI_PLT, MOVI_GOTOFF, MOVI_GOTPC): New relaxation constants. (md_relax_table): Introduce relaxation directives for PIC-related constants. (sh_PIC_related_p): Handle datalabel. (sh_check_fixup): Choose SH5 PIC relocations. (sh_cons_fix_new): Added BDF_RELOC_64. (md_apply_fix3, sh_parse_name): Handle GOTPLT. 2002-01-18 Alexandre Oliva <aoliva@redhat.com> * config/tc-sh64.c (sh64_max_mem_for_rs_align_code): If the current ISA is SHmedia, get 7 bytes. 2001-11-28 Nick Clifton <nickc@cambridge.redhat.com> * config/tc-sh.c (md_apply_fix3): Treat shmedia_md_apply_fix3 as a void function. * config/tc-sh64.c (shmedia_apply_fix): Rename to shmedia_apply_fix3 and make void. 2001-05-17 Alexandre Oliva <aoliva@redhat.com> * config/tc-sh64.c (s_sh64_abi): Remove unused arguments passed to as_bad. 2001-04-12 Alexandre Oliva <aoliva@redhat.com> * config/tc-sh64.h (md_parse_name): Take &c as argument. 2001-03-14 DJ Delorie <dj@redhat.com> * doc/Makefile.am (CPU_DOCS): Added c-sh64.texi * doc/Makefile.in(CPU_DOCS): Ditto. * doc/c-sh64.texi: New file. * doc/as.texinfo: Add SH64 support. 2001-03-13 DJ Delorie <dj@redhat.com> * config/tc-sh64.c (shmedia_get_operands): Rename A_RESV_Fx to A_REUSE_PREV so that its purpose is more obvious. (shmedia_build_Mytes): Ditto. 2001-03-07 DJ Delorie <dj@redhat.com> * config/tc-sh64.c (sh64_vtable_entry): New, strip datalabels before processing. (sh64_vtable_inherit): Ditto. (strip_datalabels): New, strip "datalabel" from given line. * config/tc-sh.c (md_pseudo_table): Add sh64-specific vtable pseudos. 2001-03-06 Hans-Peter Nilsson <hpn@cygnus.com> * config/tc-sh64.c (shmedia_md_assemble): Move dwarf2_emit_insn call ... (shmedia_build_Mytes): ... to here. 2001-03-06 DJ Delorie <dj@redhat.com> * config/tc-sh.c: Remove sh64-specific uaquad now that there is a generic one. 2001-01-21 Hans-Peter Nilsson <hpn@cygnus.com> * config/tc-sh64.h (DWARF2_LINE_MIN_INSN_LENGTH): Override. * config/tc-sh64.c (shmedia_md_assemble): Offset recorded insn address by one in call to dwarf2_emit_insn. 2001-01-13 Hans-Peter Nilsson <hpn@cygnus.com> Implement ".abi" pseudo and correct .cranges descriptors. Correct alignment handling broken by imported changes. * config/tc-sh64.h (HANDLE_ALIGN): Override definition in tc-sh.h. (sh64_handle_align): Declare. (MAX_MEM_FOR_RS_ALIGN_CODE): Override definition in tc-sh.h. (sh64_max_mem_for_rs_align_code): Declare. (enum sh64_isa_values): Moved here from tc-sh64.c. (md_do_align): Define. (sh64_do_align): Declare. (struct sh64_tc_frag_data): New. (TC_FRAG_TYPE): Change to struct sh64_tc_frag_data. Users changed. (TC_FRAG_INIT): Change to set new datatype. (struct sh64_segment_info_type): Rename member last_flushed_location to last_contents_mark. All users changed. (md_elf_section_change_hook, TC_CONS_FIX_NEW): Do not define. (shmedia_elf_new_section, sh64_tc_cons_fix_new): Do not prototype. * config/tc-sh.c (md_pseudo_table): Add ".abi". (sh_elf_cons) [HAVE_SH64]: Call sh64_update_contents_mark instead of unsetting seen_insn. (md_assemble) [HAVE_SH64] <before new SHcompact sequence>: Also call sh64_update_contents_mark. (sh_handle_align): Remove HAVE_SH64-conditioned code. * config/tc-sh64.c (sh64_isa_mode): Correct type from boolean to enum sh64_isa_values. (sh64_set_contents_type): Drop segT parameter. All callers changed. (emitting_crange): Boolean guard moved to file scope from function scope in sh64_set_contents_type. (s_sh64_abi): New. (sh64_update_contents_mark): New; most split out from sh64_flush_pending_output. (shmedia_md_end): Call sh64_update_contents_mark. Set sh64_isa_mode to sh64_isa_sh5_guard unless sh64_isa_unspecified. (sh64_do_align): New function. (sh64_max_mem_for_rs_align_code): New function. (sh64_handle_align): Rename from shmedia_do_align. Make non-static. Add head comment. Emit zero bytes for n bytes modulo four. Change return-type to void. (shmedia_elf_new_section): Remove. (shmedia_md_assemble): Call sh64_update_contents_mark. (s_sh64_mode): Ditto. Do not call md_flush_pending_output. Make new frag. Call sh64_update_contents_mark after making the new frag. (sh64_flush_pending_output): Just call sh64_update_contents_mark and sh_flush_pending_output. (sh64_flag_output): Also call md_flush_pending_output, but add condition on not emitting_crange. (sh64_tc_cons_fix_new): Remove. 2001-01-12 Nick Clifton <nickc@redhat.com> * config/tc-sh64.c (shmedia_do_align): Fix to work with new alignment handling scheme imported from sourceware. 2001-01-12 Hans-Peter Nilsson <hpn@cygnus.com> * config/tc-sh64.h (TARGET_FORMAT): Define. (sh64_target_format): Prototype. * config/tc-sh64.c (sh64_target_mach): New function. 2001-01-07 Hans-Peter Nilsson <hpn@cygnus.com> * config/tc-sh64.c (shmedia_md_end): When equating a symbol, use zero_address_frag instead of copying the frag of the symbol. (shmedia_frob_file_before_adjust): Ditto. (shmedia_md_apply_fix) <case BFD_RELOC_SH_IMM_MEDLOW16>: Cast mask to valueT to remove signedness. (shmedia_md_convert_frag): Add parameter final. Rename parameter headers to output_bfd. Do not evaluate symbols if final is false; do emit fixups. (shmedia_md_estimate_size_before_relax) <case C (MOVI_IMM_32, UNDEF_MOVI) et al>: If symbol cannot be modified to be PC-relative to the current frag, call shmedia_md_convert_frag to emit fixups and make frag_wane neutralize the frag. Update comments. * config/tc-sh.c (md_convert_frag): Change caller of shmedia_md_convert_frag. 2001-01-06 Hans-Peter Nilsson <hpn@cygnus.com> * config/tc-sh64.h: Tweak comments and correct formatting. * config/tc-sh64.c: Ditto. (shmedia_md_convert_frag) <PT/PTA/PTB 32, 48 and 64 bit expansion, MOVI pcrel expansion>: Fix thinko calculating offset for the no-relocation case. (shmedia_check_limits): Fix range check being off-by-one for PTA. * config/tc-sh.c: Ditto. Add proper comments to #ifdef/#ifndef wrappers. (SH64PCREL16_F): Increment for proper max-PTA handling. Update comment. (SH64PCREL16_M, MOVI_16_M): Correct range thinko. (SH64PCREL48_M, MOVI_48_M): Similar; don't count in length of expansion. (SH64PCREL32_M, MOVI_32_M): Ditto; handle overflowing expression. Correct comment. 2001-01-05 Hans-Peter Nilsson <hpn@cygnus.com> * config/tc-sh64.c (shmedia_md_apply_fix) <second switch, case BFD_RELOC_SH_PT_16>: Set lowest bit in field to be relocated to 1. (shmedia_md_convert_frag) <case C (SH64PCREL16_32, SH64PCREL16) et al>: Set lowest bit of field to relocate to 1 and rest to empty, if reloc is emitted. 2000-12-31 Hans-Peter Nilsson <hpn@cygnus.com> New options plus bugfixes. * config/tc-sh.c (md_longopts): New options "-no-expand" and "-expand-pt32". (md_parse_option): Handle new options. (md_show_usage): Add blurb for new options. * config/tc-sh64.c (SHMEDIA_BFD_RELOC_PT): New macro. (sh64_expand, sh64_pt32): New variables. (shmedia_init_reloc): Handle BFD_RELOC_SH_PT_16. (shmedia_md_apply_fix): Hold original fixP->fx_r_type in orig_fx_r_type. Change SHMEDIA_BFD_RELOC_PT into BFD_RELOC_SH_PT_16. Handle BFD_RELOC_SH_PT_16 as pc-relative. <resolved previously-pc-relative relocs>: Handle SHMEDIA_BFD_RELOC_PT and BFD_RELOC_SH_PT_16. (shmedia_md_convert_frag) <case C (SH64PCREL16PT_64, SH64PCREL16), case C (SH64PCREL16PT_32, SH64PCREL16)>: Modify to PTB if operand points to SHcompact code. <case C (SH64PCREL16_32, SH64PCREL16), case C (SH64PCREL16_64, SH64PCREL16)>: Check that ISA of what operand points at and PTA/PTB matches, or emit error. (shmedia_check_limits): Handle BFD_RELOC_SH_PT_16 and SHMEDIA_BFD_RELOC_PT. (shmedia_immediate_op): If pcrel, emit fixup also for constant operand. (shmedia_build_Mytes) <case A_IMMS16>: Also check sh64_expand in condition for MOVI expansion. <case A_PCIMMS16BY4>: Handle expansion to 32 bits only, if sh64_pt32. Emit only a BFD_RELOC_SH_PT_16 fixup if not sh64_expand. <case A_PCIMMS16BY4_PT>: Likewise, but emit a SHMEDIA_BFD_RELOC_PT fixup. (sh64_target_format): Error-check setting of sh64_pt32 and sh64_expand. Fix typo in check for sh64_shcompact_const_crange. (shmedia_md_pcrel_from_section): Handle BFD_RELOC_SH_PT_16 and SHMEDIA_BFD_RELOC_PT as coming from SHmedia code. 2000-12-31 Hans-Peter Nilsson <hpn@cygnus.com> * config/tc-sh64.c: Improve comments. (shmedia_md_convert_frag): Remove inactive is_pt_variant code. Do not say the linker will check correctness of PTA/PTB expansion. (shmedia_md_end): Make non-static. * config/tc-sh64.h (md_end): Define to shmedia_md_end. Add prototype. * config/tc-sh.c (sh_finalize): Remove. * config/tc-sh.h (md_end): Do not define. Remove prototype for sh_finalize. 2000-12-30 Hans-Peter Nilsson <hpn@cygnus.com> * config/tc-sh64.c (shmedia_frob_section_type): Use a struct sh64_section_data container when storing section type in tdata field in elf_section_data. * config/tc-sh.c (sh_elf_final_processing): Change from EF_SH64 to EF_SH5. * Makefile.am: Update dependencies. * Makefile.in: Regenerate. 2000-12-22 Hans-Peter Nilsson <hpn@cygnus.com> * config/tc-sh64.c (shmedia_md_assemble): Don't protect dwarf2_emit_insn call with test on debug_type. 2000-12-19 Hans-Peter Nilsson <hpn@cygnus.com> * config/tc-sh64.c (sh64_set_contents_type): Make contents-type CRT_SH5_ISA32 sticky for 64-bit. 2000-12-18 Hans-Peter Nilsson <hpn@cygnus.com> Generate .crange sections when switching ISA mode or emitting constants in same section as code. * config/tc-sh64.c: Reformat structure definitions. (sh64_end_of_assembly, sh64_mix, sh64_shcompact_const_crange): New variables. (sh64_set_contents_type): Rename from sh64_init_section. Rewrite to emit a .cranges descriptor when contents type changes. Only emit error if changing contents type and -no-mix is in effect. (sh64_emit_crange, sh64_flush_last_crange, sh64_flag_output, sh64_flush_pending_output, sh64_tc_cons_fix_new): New functions. (shmedia_md_end): Set sh64_end_of_assembly. Pass sh64_flush_last_crange over sections. When checking main symbol of datalabel symbol, check for STO_SH5_ISA32, not ISA type of section in definition. (shmedia_frob_file_before_adjust): Check main symbol for STO_SH5_ISA32; don't check ISA type of section in definition. (shmedia_frob_section_type): Adjust for .cranges; set section flag to SHF_SH5_ISA32_MIXED or SHF_SH5_ISA32 according to whether .cranges entries have been output. (shmedia_elf_new_section): Just call md_flush_pending_output. (shmedia_md_assemble): Do not emit a BFD_RELOC_SH_SHMEDIA_CODE fix. Do not set tc_segment_info_data.in_code for section. Call sh64_set_contents_type for SHmedia code. (s_sh64_mode): Do not call sh64_init_section or set seen_insn to false. Call md_flush_pending_output. (sh64_target_format): Check that -no-mix and -shcompact-const-crange are used in sane combination with other options. (shmedia_md_pcrel_from_section): Check type of fix for how to adjust pc-relative. (sh64_consume_datalabel): Check symbol for having STO_SH5_ISA32, not ISA type of section in definition. * config/tc-sh64.h (struct sh64_segment_info_type): Rewrite to hold contents-type state. (md_flush_pending_output): Redefine to sh64_flush_pending_output. (sh64_flush_pending_output): Declare. (TC_CONS_FIX_NEW): Define to sh64_tc_cons_fix_new. (sh64_tc_cons_fix_new): Declare. * config/tc-sh.c (sh_elf_cons) [HAVE_SH64]: Unset seen_insn and call sh64_flag_output. (md_assemble) [HAVE_SH64]: Do not emit BFD_RELOC_SH_CODE. Just call sh64_set_contents_type to mark SHcompact code and set seen_insn. (md_longopts): New options "-no-mix" and "-shcompact-const-crange". (md_parse_option): Handle new options. (md_show_usage): Add blurb for new options. (md_number_to_chars) [HAVE_SH64]: Call sh64_flag_output. 2000-12-15 Hans-Peter Nilsson <hpn@cygnus.com> * config/tc-sh64.c: Delete investigated and obsolete fixme:s. (sh64_last_insn_frag): New. (shmedia_md_convert_frag): Use tc_frag_data field of incoming frag to get frag for insn opcode for generating fixups; do not assume it is the same frag. (shmedia_build_Mytes): Set sh64_last_insn_frag after growing frag for new insn. * config/tc-sh64.h (ELF_TC_SPECIAL_SECTIONS): Define for .cranges section. (TC_FRAG_TYPE): Define as fragS *. (TC_FRAG_INIT): Define to set tc_frag_data to sh64_last_insn_frag. (sh64_last_insn_frag): Declare. (sh64_consume_datalabel): Fix typo; check for seginfo != NULL, not == NULL before dereferencing. 2000-12-12 Hans-Peter Nilsson <hpn@cygnus.com> Get rid of BFD section flag and EF_SH64_ABI64. * config/tc-sh64.c (shmedia_frob_section_type): Use elf_section_data (sec)->tdata, not a specific BFD section flag, to communicate the section as containing SHmedia code. Describe why. * config/tc-sh.c (sh_elf_final_processing): Tweak comment. Set EF_SH64 regardless of ABI. * config/tc-sh64.c (shmedia_md_apply_fix): Decapitalize "invalid" in error message. Handle resolved expressions for BFD_RELOC_SH_IMMS10, BFD_RELOC_SH_IMMS10BY2, BFD_RELOC_SH_IMMS10BY4 and BFD_RELOC_64. (shmedia_check_limits): Handle BFD_RELOC_64. (sh64_adjust_symtab): Do not decrement the GAS symbol value for a STO_SH5_ISA32 symbol, only the BFD value. 2000-12-11 Ben Elliston <bje@redhat.com> * config/tc-sh64.c: Call dwarf2_emit_insn, not the defunct dwarf2_generate_asm_lineno. 2000-12-11 Hans-Peter Nilsson <hpn@cygnus.com> Handle PC-relative MOVI expansions with assembler relaxation. Generate PC-relative relocs from 16-bit PC-relative expressions. * config/tc-sh64.c (SHMEDIA_MD_PCREL_FROM_FIX): Break out from... (shmedia_md_pcrel_from_section): ...here. (shmedia_md_apply_fix): Handle fixups for 16-bit operands that has turned completely resolved. Adjust relocation type for 16-bit immediate operands that has turned PC-relative. Adjust back for MD_PCREL_FROM_SECTION being applied twice. (shmedia_md_convert_frag): Always emit reloc for expression with global or weak symbol. Handle relaxation result for PC-relative expressions. (shmedia_md_estimate_size_before_relax): An expression with a weak or global symbol can not be relaxed. Break out tests for relaxable symbol into variable sym_relaxable. <cases C (MOVI_IMM_64, UNDEF_MOVI) and C (MOVI_IMM_32, UNDEF_MOVI)>: Break out any PC-relative expression and change relaxation type. (shmedia_build_Mytes): CSE &operands->operands[j] into variable opjp. <case A_IMMS16>: Fix typo for initial minor relaxation type of MOVI expansion. If X_op_symbol of the immediate expression is set, make an expression symbol for the argument to frag_var. * config/tc-sh.c (MOVI_IMM_32_PCREL, MOVI_IMM_64_PCREL): New relaxations. (END): Adjust for new relaxations. (md_relax_table): Add entries for new relaxations. 2000-12-07 Ben Elliston <bje@redhat.com> * config/tc-sh64.c (shmedia_parse_reg): Initialize variable len. 2000-12-07 Hans-Peter Nilsson <hpn@cygnus.com> * config/tc-sh64.c (shmedia_md_convert_frag): Correct all MOVI and SHORI operand offsets in PT/PTA/PTB expansions. 2000-12-05 Hans-Peter Nilsson <hpn@cygnus.com> Implement DataLabel semantics. * config/tc-sh.c (sh_frob_file) [HAVE_SH64]: Call shmedia_frob_file_before_adjust. * config/tc-sh64.c [! OBJ_ELF]: Emit #error. (DATALABEL_SUFFIX): Define. (shmedia_md_end) <before adjusting STO_SH5_ISA32 symbols>: Walk symbol list to update "datalabel" symbols to their main symbol counterparts. (shmedia_frob_file_before_adjust): New. (sh64_adjust_symtab): For remaining datalabel symbols, set to undefined and set STT_DATALABEL. (sh64_frob_label): Initialize TC symbol field. (sh64_consume_datalabel): Actually implement semantics. New parameter operandf, call it instead of expression. (sh64_exclude_symbol): New. * config/tc-sh64.h (md_parse_name): Pass on the function operand to sh64_consume_datalabel. (tc_symbol_new_hook): Define to tc_frob_symbol. (TC_SYMFIELD_TYPE): Define to symbolS *. (tc_frob_symbol): Define to call sh64_exclude_symbol. 2000-12-01 Hans-Peter Nilsson <hpn@cygnus.com> * config/tc-sh64.c (shmedia_init_reloc): Tweak comment for default case. (shmedia_md_assemble): Call dwarf2_generate_asm_lineno if generating dwarf2 debug information. 2000-11-30 Hans-Peter Nilsson <hpn@cygnus.com> * config/tc-sh64.c (sh64_target_format): Use elf64-sh64l and elf64-sh64 for the 64-bit ABI. * config/tc-sh.c (md_show_usage): Tweak usage output for -abi=* option. 2000-11-29 Hans-Peter Nilsson <hpn@cygnus.com> * config/tc-sh.c: Remove conditionalizing on HAVE_SH64 for case-insensitivity. 2000-11-27 Hans-Peter Nilsson <hpn@cygnus.com> * config/tc-sh64.c: Tweak comments, formatting and error messages. (enum sh64_abi_values): New type. (enum sh64_isa_values): New type. (sh64_isa_mode): Replace shmedia_mode. All referers changed. (seen_shcompact_mode, seen_shmedia_mode): Delete. (sh64_abi): Replace shmedia_64. (shmedia_md_convert_frag) <C (MOVI_IMM_64, MOVI_64), C (MOVI_IMM_32, MOVI_32)>: Correct register number handling. (s_sh64_mode): Check validity for this target. (sh64_target_format): Initialize defaults for ISA and ABI. Fallback to old object format if no SH64 ISA or ABI has been specified. * config/tc-sh.c (md_parse_option): Check combinations for errors. (sh_elf_final_processing): Change to have EF_SH64_ABI64 for 64-bit ABI and EF_SH64 for 32-bit ABI, if SH64 options are specified. * config/tc-sh64.h: Fix typo in comment. 2000-11-25 Hans-Peter Nilsson <hpn@cygnus.com> * config/tc-sh64.c (shmedia_md_estimate_size_before_relax) <PT fixups for absolute values>: Size will be longest, not shortest. (shmedia_md_convert_frag): Disable PTB-warning machinery. Correct all MOVI and SHORI operand offsets in PT/PTA/PTB expansions. * config/tc-sh.c (parse_reg) [HAVE_SH64]: Add local variables l0 and l1 to hold lowercase of two first characters. Change all remaining TO_LOWER to tolower. * config/tc-sh64.c (TO_LOWER): Delete. (shmedia_find_cooked_opcode): Use tolower, not TO_LOWER. (md_parse_name): Define. (sh64_consume_datalabel): Declare. (DOLLAR_DOT): Define. * config/tc-sh64.c (shmedia_parse_exp): New. (sh64_consume_datalabel): New; just ignoring datalabel semantics. (shmedia_parse_reg): Remove const from src parameter. (shmedia_get_operands): Ditto for args parameter and ptr variable. (shmedia_md_assemble): Ditto for op_end variable. (shmedia_get_operand): Ditto for ptr parameter and src variable. Use shmedia_parse_exp, not parse_exp. * config/tc-sh64.c (shmedia_parse_reg): Add shmedia_arg_type parameter. All callers changed. (shmedia_get_operand): Add shmedia_arg_type parameter. All callers changed. (shmedia_parse_reg): Put first two character in local variables. Use tolower, not TO_LOWER. If no register is found and argtype indicates a control register, scan shmedia_creg_table case-insensitive. 2000-11-24 Hans-Peter Nilsson <hpn@cygnus.com> * Makefile.am (CPU_TYPES): Add sh64. (TARGET_CPU_CFILES): Add config/tc-sh64.c. (TARGET_CPU_HFILES): Add config/tc-sh64.h. Regenerate dependencies. * Makefile.in: Regenerate. * configure.in: Add support for sh64-*-elf*. * configure: Regenerate. * config/tc-sh64.h: New. * config/tc-sh64.c: New. * config/tc-sh.c (md_pseudo_table) [HAVE_SH64]: New pseudos .mode, .isa and .uaquad. [HAVE_SH64] (SH64PCREL16_32, SH64PCREL16_64, SH64PCREL16PT_32, SH64PCREL16PT_64, MOVI_IMM_32, MOVI_IMM_64): Define. [HAVE_SH64] (END): Define as 10. [HAVE_SH64] (UNDEF_SH64PCREL, SH64PCREL16, SH64PCREL32, SH64PCREL48, SH64PCREL64, UNDEF_MOVI, MOVI_16, MOVI_32, MOVI_48, MOVI_64): Define. [HAVE_SH64] (SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, SH64PCREL32_F, SH64PCREL32_M, SH64PCREL32_LENGTH, SH64PCREL48_F, SH64PCREL48_M, SH64PCREL48_LENGTH, SH64PCREL64_LENGTH, MOVI_16_LENGTH, MOVI_32_LENGTH, MOVI_48_LENGTH, MOVI_64_LENGTH): Define. (md_relax_table) [HAVE_SH64]: Provide relaxations for SHmedia. (md_begin) [HAVE_SH64]: Call shmedia_md_begin. (parse_reg) [HAVE_SH64]: Parse register names case-insensitive. (md_assemble) [HAVE_SH64]: Call shmedia_md_assemble if assembling SHmedia instructions. Handle state-change after switching to SHcompact. (md_longopts) [HAVE_SH64]: New options --isa=* and --abi=*. (md_parse_option) [HAVE_SH64]: Parse new options. (md_show_usage) [HAVE_SH64]: Show usage of new options. (md_convert_frag) [HAVE_SH64] <default>: Call shmedia_md_convert_frag instead of abort. (sh_force_relocation) [HAVE_SH64]: Also force relocation for BFD_RELOC_SH_SHMEDIA_CODE. (sh_elf_final_processing) [HAVE_SH64]: Set flags identifying SHcompact or SHmedia code. (md_apply_fix) [HAVE_SH64] <default>: Return result from calling shmedia_md_apply_fix instead of abort. (md_estimate_size_before_relax) [HAVE_SH64] <default>: Return result from calling shmedia_md_estimate_size_before_relax instead of calling abort. (sh_do_align) [HAVE_SH64]: If shmedia_mode, let shmedia_do_align do the work. (tc_gen_reloc) [HAVE_SH64]: For unrecognized relocs, call shmedia_init_reloc and do nothing more if it returns non-zero. (sh_finalize) [HAVE_SH64]: Call shmedia_md_end. * po/POTFILES.in: Regenerate. * po/gas.pot: Regenerate.
2002-02-08 06:32:23 +00:00
@include c-sh64.texi
1999-05-03 07:29:11 +00:00
@end ifset
@ifset SPARC
@include c-sparc.texi
@end ifset
2000-06-20 13:52:32 +00:00
@ifset TIC54X
@include c-tic54x.texi
@end ifset
bfd: * Makefile.am (ALL_MACHINES): Add cpu-tic6x.lo. (ALL_MACHINES_CFILES): Add cpu-tic6x.c. (BFD32_BACKENDS): Add elf32-tic6x.lo. (BFD32_BACKENDS_CFILES): Add elf32-tic6x.c. * Makefile.in: Regenerate. * archures.c (bfd_arch_tic6x, bfd_tic6x_arch): New. (bfd_archures_list): Update. * config.bfd (tic6x-*-elf): New. * configure.in (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New. * configure: Regenerate. * cpu-tic6x.c, elf32-tic6x.c: New. * reloc.c (BFD_RELOC_C6000_PCR_S21, BFD_RELOC_C6000_PCR_S12, BFD_RELOC_C6000_PCR_S10, BFD_RELOC_C6000_PCR_S7, BFD_RELOC_C6000_ABS_S16, BFD_RELOC_C6000_ABS_L16, BFD_RELOC_C6000_ABS_H16, BFD_RELOC_C6000_SBR_U15_B, BFD_RELOC_C6000_SBR_U15_H, BFD_RELOC_C6000_SBR_U15_W, BFD_RELOC_C6000_SBR_S16, BFD_RELOC_C6000_SBR_L16_B, BFD_RELOC_C6000_SBR_L16_H, BFD_RELOC_C6000_SBR_L16_W, BFD_RELOC_C6000_SBR_H16_B, BFD_RELOC_C6000_SBR_H16_H, BFD_RELOC_C6000_SBR_H16_W, BFD_RELOC_C6000_SBR_GOT_U15_W, BFD_RELOC_C6000_SBR_GOT_L16_W, BFD_RELOC_C6000_SBR_GOT_H16_W, BFD_RELOC_C6000_DSBT_INDEX, BFD_RELOC_C6000_PREL31, BFD_RELOC_C6000_COPY, BFD_RELOC_C6000_ALIGN, BFD_RELOC_C6000_FPHEAD, BFD_RELOC_C6000_NOCMP): New. * targets.c (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New. (_bfd_target_vector): Update. * bfd-in2.h, libbfd.h: Regenerate. binutils: * MAINTAINERS: Add self as TI C6X maintainer. * NEWS: Add news entry for TI C6X support. * readelf.c: Include elf/tic6x.h. (guess_is_rela): Handle EM_TI_C6000. (dump_relocations): Likewise. (get_tic6x_dynamic_type): New. (get_dynamic_type): Call it. (get_machine_flags): Handle EF_C6000_REL. (get_osabi_name): Handle machine-specific values only for relevant machines. Handle C6X values. (get_tic6x_segment_type): New. (get_segment_type): Call it. (get_tic6x_section_type_name): New. (get_section_type_name): Call it. (is_32bit_abs_reloc, is_16bit_abs_reloc, is_none_reloc): Handle EM_TI_C6000. gas: * Makefile.am (TARGET_CPU_CFILES): Add config/tc-tic6x.c. (TARGET_CPU_HFILES): Add config/tc-tic6x.h. * Makefile.in: Regenerate. * NEWS: Add news entry for TI C6X support. * app.c (do_scrub_chars): Handle "||^" for TI C6X. Handle TC_PREDICATE_START_CHAR and TC_PREDICATE_END_CHAR. Keep spaces in operands if TC_KEEP_OPERAND_SPACES. * configure.tgt (tic6x-*-*): New. * config/tc-ia64.h (TC_PREDICATE_START_CHAR, TC_PREDICATE_END_CHAR): Define. * config/tc-tic6x.c, config/tc-tic6x.h: New. * doc/Makefile.am (CPU_DOCS): Add c-tic6x.texi. * doc/Makefile.in: Regenerate. * doc/all.texi (TIC6X): Define. * doc/as.texinfo: Add TI C6X documentation. Include c-tic6x.texi. * doc/c-tic6x.texi: New. gas/testsuite: * gas/tic6x: New directory and testcases. include: * dis-asm.h (print_insn_tic6x): Declare. include/elf: * common.h (ELFOSABI_C6000_ELFABI, ELFOSABI_C6000_LINUX): Define. * tic6x.h: New. include/opcode: * tic6x-control-registers.h, tic6x-insn-formats.h, tic6x-opcode-table.h, tic6x.h: New. ld: * Makefile.am (ALL_EMULATIONS): Add eelf32_tic6x_be.o and eelf32_tic6x_le.o. (eelf32_tic6x_be.c, eelf32_tic6x_le.c): New. * NEWS: Add news entry for TI C6X support. * configure.tgt (tic6x-*-*): New. * emulparams/elf32_tic6x_be.sh, emulparams/elf32_tic6x_le.sh: New. ld/testsuite: * ld-elf/flags1.d, ld-elf/merge.d: XFAIL for tic6x-*-*. * ld-elf/sec-to-seg.exp: Set B_test_same_seg to 0 for tic6x-*-*. * ld-tic6x: New directory and testcases. opcodes: * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c. * Makefile.in: Regenerate. * configure.in (bfd_tic6x_arch): New. * configure: Regenerate. * disassemble.c (ARCH_tic6x): Define if ARCH_all. (disassembler): Handle TI C6X. * tic6x-dis.c: New.
2010-03-25 21:12:36 +00:00
@ifset TIC6X
@include c-tic6x.texi
@end ifset
* Makefile.am (ALL_MACHINES): Add cpu-tilegx.lo and cpu-tilepro.lo. (ALL_MACHINE_CFILES): Add cpu-tilegx.c and cpu-tilepro.c. (BFD32_BACKENDS): Add elf32-tilegx.lo, elf32-tilepro.lo, and elfxx-tilegx.lo. (BFD32_BACKENDS_CFILES): Add elf32-tilegx.c elf32-tilepro.c, and elfxx-tilegx.c. (BFD64_BACKENDS): Add elf64-tilegx.lo. (BFD64_BACKENDS_CFILES): Add elf64-tilegx.c. * Makefile.in: Regenerate. * arctures.c (bfd_architecture): Define bfd_arch_tilepro, bfd_arch_tilegx, bfd_mach_tilepro, bfd_mach_tilegx. (bfd_arch_info): Add bfd_tilegx_arch, bfd_tilepro_arch. (bfd_archures_list): Add bfd_tilegx_arch, bfd_tilepro_arch. bfd-in2.h: Regenerate. * config.bfd: Handle tilegx-*-* and tilepro-*-*. * configure.in: Handle bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec, and bfd_elf64_tilegx_vec. * configure: Regenerate. * elf-bfd.h (enum elf_target_id): Define TILEGX_ELF_DATA and TILEPRO_ELF_DATA. * libbfd.h: Regenerate. * reloc.c: Add BFD_RELOC_TILEPRO_{COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1, JOFFLONG_X1, JOFFLONG_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM15_X1, MF_IMM15_X1, IMM16_X0, IMM16_X1, IMM16_X0_LO, IMM16_X1_LO, IMM16_X0_HI, IMM16_X1_HI, IMM16_X0_HA, IMM16_X1_HA, IMM16_X0_PCREL, IMM16_X1_PCREL, IMM16_X0_LO_PCREL, IMM16_X1_LO_PCREL, IMM16_X0_HI_PCREL, IMM16_X1_HI_PCREL, IMM16_X0_HA_PCREL, IMM16_X1_HA_PCREL, IMM16_X0_GOT, IMM16_X1_GOT, IMM16_X0_GOT_LO, IMM16_X1_GOT_LO, IMM16_X0_GOT_HI, IMM16_X1_GOT_HI, IMM16_X0_GOT_HA, IMM16_X1_GOT_HA, MMSTART_X0, MMEND_X0, MMSTART_X1, MMEND_X1, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_TLS_GD, IMM16_X1_TLS_GD, IMM16_X0_TLS_GD_LO, IMM16_X1_TLS_GD_LO, IMM16_X0_TLS_GD_HI, IMM16_X1_TLS_GD_HI, IMM16_X0_TLS_GD_HA, IMM16_X1_TLS_GD_HA, IMM16_X0_TLS_IE, IMM16_X1_TLS_IE, IMM16_X0_TLS_IE_LO, IMM16_X1_TLS_IE_LO, IMM16_X0_TLS_IE_HI, IMM16_X1_TLS_IE_HI, IMM16_X0_TLS_IE_HA, IMM16_X1_TLS_IE_HA, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32} Add BFD_RELOC_TILEGX_{HW0, HW1, HW2, HW3, HW0_LAST, HW1_LAST, HW2_LAST, COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1, JUMPOFF_X1, JUMPOFF_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM14_X1, MF_IMM14_X1, MMSTART_X0, MMEND_X0, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_HW0, IMM16_X1_HW0, IMM16_X0_HW1, IMM16_X1_HW1, IMM16_X0_HW2, IMM16_X1_HW2, IMM16_X0_HW3, IMM16_X1_HW3, IMM16_X0_HW0_LAST, IMM16_X1_HW0_LAST, IMM16_X0_HW1_LAST, IMM16_X1_HW1_LAST, IMM16_X0_HW2_LAST, IMM16_X1_HW2_LAST, IMM16_X0_HW0_PCREL, IMM16_X1_HW0_PCREL, IMM16_X0_HW1_PCREL, IMM16_X1_HW1_PCREL, IMM16_X0_HW2_PCREL, IMM16_X1_HW2_PCREL, IMM16_X0_HW3_PCREL, IMM16_X1_HW3_PCREL, IMM16_X0_HW0_LAST_PCREL, IMM16_X1_HW0_LAST_PCREL, IMM16_X0_HW1_LAST_PCREL, IMM16_X1_HW1_LAST_PCREL, IMM16_X0_HW2_LAST_PCREL, IMM16_X1_HW2_LAST_PCREL, IMM16_X0_HW0_GOT, IMM16_X1_HW0_GOT, IMM16_X0_HW1_GOT, IMM16_X1_HW1_GOT, IMM16_X0_HW2_GOT, IMM16_X1_HW2_GOT, IMM16_X0_HW3_GOT, IMM16_X1_HW3_GOT, IMM16_X0_HW0_LAST_GOT, IMM16_X1_HW0_LAST_GOT, IMM16_X0_HW1_LAST_GOT, IMM16_X1_HW1_LAST_GOT, IMM16_X0_HW2_LAST_GOT, IMM16_X1_HW2_LAST_GOT, IMM16_X0_HW0_TLS_GD, IMM16_X1_HW0_TLS_GD, IMM16_X0_HW1_TLS_GD, IMM16_X1_HW1_TLS_GD, IMM16_X0_HW2_TLS_GD, IMM16_X1_HW2_TLS_GD, IMM16_X0_HW3_TLS_GD, IMM16_X1_HW3_TLS_GD, IMM16_X0_HW0_LAST_TLS_GD, IMM16_X1_HW0_LAST_TLS_GD, IMM16_X0_HW1_LAST_TLS_GD, IMM16_X1_HW1_LAST_TLS_GD, IMM16_X0_HW2_LAST_TLS_GD, IMM16_X1_HW2_LAST_TLS_GD, IMM16_X0_HW0_TLS_IE, IMM16_X1_HW0_TLS_IE, IMM16_X0_HW1_TLS_IE, IMM16_X1_HW1_TLS_IE, IMM16_X0_HW2_TLS_IE, IMM16_X1_HW2_TLS_IE, IMM16_X0_HW3_TLS_IE, IMM16_X1_HW3_TLS_IE, IMM16_X0_HW0_LAST_TLS_IE, IMM16_X1_HW0_LAST_TLS_IE, IMM16_X0_HW1_LAST_TLS_IE, IMM16_X1_HW1_LAST_TLS_IE, IMM16_X0_HW2_LAST_TLS_IE, IMM16_X1_HW2_LAST_TLS_IE, TLS_DTPMOD64, TLS_DTPOFF64, TLS_TPOFF64, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32} * targets.c (bfd_elf32_tilegx_vec): Declare. (bfd_elf32_tilepro_vec): Declare. (bfd_elf64_tilegx_vec): Declare. (bfd_target_vector): Add bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec, and bfd_elf64_tilegx_vec. * cpu-tilegx.c: New file. * cpu-tilepro.c: New file. * elf32-tilepro.h: New file. * elf32-tilepro.c: New file. * elf32-tilegx.c: New file. * elf32-tilegx.h: New file. * elf64-tilegx.c: New file. * elf64-tilegx.h: New file. * elfxx-tilegx.c: New file. * elfxx-tilegx.h: New file. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-tilegx.c and config/tc-tilepro.c. (TARGET_CPU_HFILES): Add config/tc-tilegx.h and config/tc-tilepro.h. * Makefile.in: Regenerate. * configure.tgt (tilepro-*-*): New. (tilegx-*-*): Likewise. * config/tc-tilegx.c: New file. * config/tc-tilegx.h: Likewise. * config/tc-tilepro.h: Likewise. * config/tc-tilepro.c: Likewise. * doc/Makefile.am (CPU_DOCS): Add c-tilegx.texi and c-tilepro.texi. * doc/Makefile.in: Regenerate. * doc/all.texi (TILEGX): Define. (TILEPRO): Define. * doc/as.texinfo: Add Tile-Gx and TILEPro documentation. Include c-tilegx.texi and c-tilepro.texi. * doc/c-tilegx.texi: New. * doc/c-tilepro.texi: New. * gas/tilepro/t_constants.s: New file. * gas/tilepro/t_constants.d: Likewise. * gas/tilepro/t_insns.s: Likewise. * gas/tilepro/tilepro.exp: Likewise. * gas/tilepro/t_insns.d: Likewise. * gas/tilegx/tilegx.exp: Likewise. * gas/tilegx/t_insns.d: Likewise. * gas/tilegx/t_insns.s: Likewise. * dis-asm.h (print_insn_tilegx): Declare. (print_insn_tilepro): Likewise. * tilegx.h: New file. * tilepro.h: New file. * common.h: Add EM_TILEGX. * tilegx.h: New file. * tilepro.h: New file. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx.c and eelf32tilepro.c. (ALL_64_EMULATION_SOURCES): Add eelf64tilegx.c. (eelf32tilegx.c): New target. (eelf32tilepro.c): Likewise. (eelf64tilegx.c): Likewise. * Makefile.in: Regenerate. * configure.tgt: Handle tilegx-*-* and tilepro-*-*. * emulparams/elf32tilegx.sh: New file. * emulparams/elf64tilegx.sh: New file. * emulparams/elf32tilepro.sh: New file. * ld-elf/eh5.d: Don't run on tile*. * ld-srec/srec.exp: xfail on tile*. * ld-tilegx/external.s: New file. * ld-tilegx/reloc.d: New file. * ld-tilegx/reloc.s: New file. * ld-tilegx/tilegx.exp: New file. * ld-tilepro/external.s: New file. * ld-tilepro/reloc.d: New file. * ld-tilepro/reloc.s: New file. * ld-tilepro/tilepro.exp: New file. * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tilegx-dis.c, tilegx-opc.c, tilepro-dis.c, and tilepro-opc.c. * Makefile.in: Regenerate. * configure.in: Handle bfd_tilegx_arch and bfd_tilepro_arch. * configure: Regenerate. * disassemble.c (disassembler): Add ARCH_tilegx and ARCH_tilepro. * po/POTFILES.in: Regenerate. * tilegx-dis.c: New file. * tilegx-opc.c: New file. * tilepro-dis.c: New file. * tilepro-opc.c: New file.
2011-06-13 15:18:54 +00:00
@ifset TILEGX
@include c-tilegx.texi
@end ifset
@ifset TILEPRO
@include c-tilepro.texi
@end ifset
@ifset Z80
@include c-z80.texi
@end ifset
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@ifset Z8000
@include c-z8k.texi
@end ifset
@ifset VAX
@include c-vax.texi
@end ifset
@ifset V850
@include c-v850.texi
@end ifset
@ifset XGATE
@include c-xgate.texi
@end ifset
@ifset XSTORMY16
@include c-xstormy16.texi
@end ifset
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@ifset XTENSA
@include c-xtensa.texi
@end ifset
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@ifset GENERIC
@c reverse effect of @down at top of generic Machine-Dep chapter
@raisesections
@end ifset
@node Reporting Bugs
@chapter Reporting Bugs
@cindex bugs in assembler
@cindex reporting bugs in assembler
Your bug reports play an essential role in making @command{@value{AS}} reliable.
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Reporting a bug may help you by bringing a solution to your problem, or it may
not. But in any case the principal function of a bug report is to help the
entire community by making the next version of @command{@value{AS}} work better.
Bug reports are your contribution to the maintenance of @command{@value{AS}}.
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In order for a bug report to serve its purpose, you must include the
information that enables us to fix the bug.
@menu
* Bug Criteria:: Have you found a bug?
* Bug Reporting:: How to report bugs
@end menu
@node Bug Criteria
@section Have You Found a Bug?
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@cindex bug criteria
If you are not sure whether you have found a bug, here are some guidelines:
@itemize @bullet
@cindex fatal signal
@cindex assembler crash
@cindex crash of assembler
@item
If the assembler gets a fatal signal, for any input whatever, that is a
@command{@value{AS}} bug. Reliable assemblers never crash.
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@cindex error on valid input
@item
If @command{@value{AS}} produces an error message for valid input, that is a bug.
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@cindex invalid input
@item
If @command{@value{AS}} does not produce an error message for invalid input, that
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is a bug. However, you should note that your idea of ``invalid input'' might
be our idea of ``an extension'' or ``support for traditional practice''.
@item
If you are an experienced user of assemblers, your suggestions for improvement
of @command{@value{AS}} are welcome in any case.
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@end itemize
@node Bug Reporting
@section How to Report Bugs
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@cindex bug reports
@cindex assembler bugs, reporting
A number of companies and individuals offer support for @sc{gnu} products. If
you obtained @command{@value{AS}} from a support organization, we recommend you
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contact that organization first.
You can find contact information for many support companies and
individuals in the file @file{etc/SERVICE} in the @sc{gnu} Emacs
distribution.
@ifset BUGURL
In any event, we also recommend that you send bug reports for @command{@value{AS}}
to @value{BUGURL}.
@end ifset
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The fundamental principle of reporting bugs usefully is this:
@strong{report all the facts}. If you are not sure whether to state a
fact or leave it out, state it!
Often people omit facts because they think they know what causes the problem
and assume that some details do not matter. Thus, you might assume that the
name of a symbol you use in an example does not matter. Well, probably it does
not, but one cannot be sure. Perhaps the bug is a stray memory reference which
happens to fetch from the location where that name is stored in memory;
perhaps, if the name were different, the contents of that location would fool
the assembler into doing the right thing despite the bug. Play it safe and
give a specific, complete example. That is the easiest thing for you to do,
and the most helpful.
Keep in mind that the purpose of a bug report is to enable us to fix the bug if
it is new to us. Therefore, always write your bug reports on the assumption
that the bug has not been reported previously.
Sometimes people give a few sketchy facts and ask, ``Does this ring a
bell?'' This cannot help us fix a bug, so it is basically useless. We
respond by asking for enough details to enable us to investigate.
You might as well expedite matters by sending them to begin with.
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To enable us to fix the bug, you should include all these things:
@itemize @bullet
@item
The version of @command{@value{AS}}. @command{@value{AS}} announces it if you start
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it with the @samp{--version} argument.
Without this, we will not know whether there is any point in looking for
the bug in the current version of @command{@value{AS}}.
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@item
Any patches you may have applied to the @command{@value{AS}} source.
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@item
The type of machine you are using, and the operating system name and
version number.
@item
What compiler (and its version) was used to compile @command{@value{AS}}---e.g.
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``@code{gcc-2.7}''.
@item
The command arguments you gave the assembler to assemble your example and
observe the bug. To guarantee you will not omit something important, list them
all. A copy of the Makefile (or the output from make) is sufficient.
If we were to try to guess the arguments, we would probably guess wrong
and then we might not encounter the bug.
@item
A complete input file that will reproduce the bug. If the bug is observed when
the assembler is invoked via a compiler, send the assembler source, not the
high level language source. Most compilers will produce the assembler source
when run with the @samp{-S} option. If you are using @code{@value{GCC}}, use
the options @samp{-v --save-temps}; this will save the assembler source in a
file with an extension of @file{.s}, and also show you exactly how
@command{@value{AS}} is being run.
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@item
A description of what behavior you observe that you believe is
incorrect. For example, ``It gets a fatal signal.''
Of course, if the bug is that @command{@value{AS}} gets a fatal signal, then we
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will certainly notice it. But if the bug is incorrect output, we might not
notice unless it is glaringly wrong. You might as well not give us a chance to
make a mistake.
Even if the problem you experience is a fatal signal, you should still say so
explicitly. Suppose something strange is going on, such as, your copy of
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@command{@value{AS}} is out of sync, or you have encountered a bug in the C
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library on your system. (This has happened!) Your copy might crash and ours
would not. If you told us to expect a crash, then when ours fails to crash, we
would know that the bug was not happening for us. If you had not told us to
expect a crash, then we would not be able to draw any conclusion from our
observations.
@item
If you wish to suggest changes to the @command{@value{AS}} source, send us context
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diffs, as generated by @code{diff} with the @samp{-u}, @samp{-c}, or @samp{-p}
option. Always send diffs from the old file to the new file. If you even
discuss something in the @command{@value{AS}} source, refer to it by context, not
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by line number.
The line numbers in our development sources will not match those in your
sources. Your line numbers would convey no useful information to us.
@end itemize
Here are some things that are not necessary:
@itemize @bullet
@item
A description of the envelope of the bug.
Often people who encounter a bug spend a lot of time investigating
which changes to the input file will make the bug go away and which
changes will not affect it.
This is often time consuming and not very useful, because the way we
will find the bug is by running a single example under the debugger
with breakpoints, not by pure deduction from a series of examples.
We recommend that you save your time for something else.
Of course, if you can find a simpler example to report @emph{instead}
of the original one, that is a convenience for us. Errors in the
output will be easier to spot, running under the debugger will take
less time, and so on.
However, simplification is not vital; if you do not want to do this,
report the bug anyway and send us the entire test case you used.
@item
A patch for the bug.
A patch for the bug does help us if it is a good one. But do not omit
the necessary information, such as the test case, on the assumption that
a patch is all we need. We might see problems with your patch and decide
to fix the problem another way, or we might not understand it at all.
Sometimes with a program as complicated as @command{@value{AS}} it is very hard to
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construct an example that will make the program follow a certain path through
the code. If you do not send us the example, we will not be able to construct
one, so we will not be able to verify that the bug is fixed.
And if we cannot understand what bug you are trying to fix, or why your
patch should be an improvement, we will not install it. A test case will
help us to understand.
@item
A guess about what the bug is or what it depends on.
Such guesses are usually wrong. Even we cannot guess right about such
things without first using the debugger to find the facts.
@end itemize
@node Acknowledgements
@chapter Acknowledgements
If you have contributed to GAS and your name isn't listed here,
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it is not meant as a slight. We just don't know about it. Send mail to the
maintainer, and we'll correct the situation. Currently
@c (January 1994),
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the maintainer is Ken Raeburn (email address @code{raeburn@@cygnus.com}).
Dean Elsner wrote the original @sc{gnu} assembler for the VAX.@footnote{Any
more details?}
Jay Fenlason maintained GAS for a while, adding support for GDB-specific debug
information and the 68k series machines, most of the preprocessing pass, and
extensive changes in @file{messages.c}, @file{input-file.c}, @file{write.c}.
K. Richard Pixley maintained GAS for a while, adding various enhancements and
many bug fixes, including merging support for several processors, breaking GAS
up to handle multiple object file format back ends (including heavy rewrite,
testing, an integration of the coff and b.out back ends), adding configuration
including heavy testing and verification of cross assemblers and file splits
and renaming, converted GAS to strictly ANSI C including full prototypes, added
support for m680[34]0 and cpu32, did considerable work on i960 including a COFF
port (including considerable amounts of reverse engineering), a SPARC opcode
file rewrite, DECstation, rs6000, and hp300hpux host ports, updated ``know''
assertions and made them work, much other reorganization, cleanup, and lint.
Ken Raeburn wrote the high-level BFD interface code to replace most of the code
in format-specific I/O modules.
The original VMS support was contributed by David L. Kashtan. Eric Youngdale
has done much work with it since.
The Intel 80386 machine description was written by Eliot Dresselhaus.
Minh Tran-Le at IntelliCorp contributed some AIX 386 support.
The Motorola 88k machine description was contributed by Devon Bowen of Buffalo
University and Torbjorn Granlund of the Swedish Institute of Computer Science.
Keith Knowles at the Open Software Foundation wrote the original MIPS back end
(@file{tc-mips.c}, @file{tc-mips.h}), and contributed Rose format support
(which hasn't been merged in yet). Ralph Campbell worked with the MIPS code to
support a.out format.
* README-vms: Delete. * config-gas.com: Delete. * makefile.vms: Delete. * vmsconf.sh: Delete. * config/atof-tahoe.c: Delete. * config/m88k-opcode.h: Delete. * config/obj-bout.c: Delete. * config/obj-bout.h: Delete. * config/obj-hp300.c: Delete. * config/obj-hp300.h: Delete. * config/tc-a29k.c: Delete. * config/tc-a29k.h: Delete. * config/tc-h8500.c: Delete. * config/tc-h8500.h: Delete. * config/tc-m88k.c: Delete. * config/tc-m88k.h: Delete. * config/tc-tahoe.c: Delete. * config/tc-tahoe.h: Delete. * config/tc-tic80.c: Delete. * config/tc-tic80.h: Delete. * config/tc-w65.c: Delete. * config/tc-w65.h: Delete. * config/te-aux.h: Delete. * config/te-delt88.h: Delete. * config/te-delta.h: Delete. * config/te-dpx2.h: Delete. * config/te-hp300.h: Delete. * config/te-ic960.h: Delete. * config/vms-a-conf.h: Delete. * doc/c-a29k.texi: Delete. * doc/c-h8500.texi: Delete. * doc/c-m88k.texi: Delete. * README: Remove obsolete examples, and list of supported targets. * Makefile.am: Remove a29k, h8500, m88k, tahoe, tic80, w65, bout and hp300 support. (DEP_FLAGS): Don't define BFD_ASSEMBLER. * configure.in: Remove --enable-bfd-assembler, need_bfd, primary_bfd_gas. * configure.tgt: Remove a29k, h8300-coff, h8500-*, i960 non-elf, m68k non bfd, m88k, or32-coff, tic80-*, vax non-bfd, w65k-*, *-nindy. * as.c: Remove all non-BFD_ASSEMBLER code, support for above targets. * as.h: Likewise. * dw2gencfi.c: Likewise. * dwarf2dbg.c: Likewise. * ehopt.c: Likewise. * input-file.c: Likewise. * listing.c: Likewise. * literal.c: Likewise. * messages.c: Likewise. * obj.h: Likewise. * output-file.c: Likewise. * read.c: Likewise. * stabs.c: Likewise. * struc-symbol.h: Likewise. * subsegs.c: Likewise. * subsegs.h: Likewise. * symbols.c: Likewise. * symbols.h: Likewise. * tc.h: Likewise. * write.c: Likewise. * write.h: Likewise. * config/aout_gnu.h: Likewise. * config/obj-aout.c: Likewise. * config/obj-aout.h: Likewise. * config/obj-coff.c: Likewise. * config/obj-coff.h: Likewise. * config/obj-evax.h: Likewise. * config/obj-ieee.h: Likewise. * config/tc-arm.c: Likewise. * config/tc-arm.h: Likewise. * config/tc-avr.c: Likewise. * config/tc-avr.h: Likewise. * config/tc-crx.h: Likewise. * config/tc-d10v.h: Likewise. * config/tc-d30v.h: Likewise. * config/tc-dlx.h: Likewise. * config/tc-fr30.h: Likewise. * config/tc-frv.h: Likewise. * config/tc-h8300.c: Likewise. * config/tc-h8300.h: Likewise. * config/tc-hppa.h: Likewise. * config/tc-i370.h: Likewise. * config/tc-i386.c: Likewise. * config/tc-i386.h: Likewise. * config/tc-i860.h: Likewise. * config/tc-i960.c: Likewise. * config/tc-i960.h: Likewise. * config/tc-ip2k.h: Likewise. * config/tc-iq2000.h: Likewise. * config/tc-m32c.h: Likewise. * config/tc-m32r.h: Likewise. * config/tc-m68hc11.h: Likewise. * config/tc-m68k.c: Likewise. * config/tc-m68k.h: Likewise. * config/tc-maxq.c: Likewise. * config/tc-maxq.h: Likewise. * config/tc-mcore.c: Likewise. * config/tc-mcore.h: Likewise. * config/tc-mn10200.h: Likewise. * config/tc-mn10300.c: Likewise. * config/tc-mn10300.h: Likewise. * config/tc-ms1.h: Likewise. * config/tc-msp430.c: Likewise. * config/tc-msp430.h: Likewise. * config/tc-ns32k.c: Likewise. * config/tc-ns32k.h: Likewise. * config/tc-openrisc.h: Likewise. * config/tc-or32.c: Likewise. * config/tc-or32.h: Likewise. * config/tc-ppc.c: Likewise. * config/tc-ppc.h: Likewise. * config/tc-s390.h: Likewise. * config/tc-sh.c: Likewise. * config/tc-sh.h: Likewise. * config/tc-sparc.c: Likewise. * config/tc-tic30.c: Likewise. * config/tc-tic30.h: Likewise. * config/tc-tic4x.c: Likewise. * config/tc-tic4x.h: Likewise. * config/tc-tic54x.c: Likewise. * config/tc-tic54x.h: Likewise. * config/tc-v850.h: Likewise. * config/tc-vax.c: Likewise. * config/tc-vax.h: Likewise. * config/tc-xstormy16.h: Likewise. * config/tc-xtensa.h: Likewise. * config/tc-z8k.c: Likewise. * config/tc-z8k.h: Likewise. * config/vms-a-conf.h * doc/Makefile.am: Likewise. * doc/all.texi: Likewise. * doc/as.texinfo: Likewise. * doc/Makefile.in: Regenerate. * Makefile.in: Regenerate. * configure: Regenerate. * config.in: Regenerate. * po/POTFILES.in: Regenerate.
2005-08-11 01:25:29 +00:00
Support for the Zilog Z8k and Renesas H8/300 processors (tc-z8k,
tc-h8300), and IEEE 695 object file format (obj-ieee), was written by
1999-05-03 07:29:11 +00:00
Steve Chamberlain of Cygnus Support. Steve also modified the COFF back end to
use BFD for some low-level operations, for use with the H8/300 and AMD 29k
targets.
John Gilmore built the AMD 29000 support, added @code{.include} support, and
simplified the configuration of which versions accept which directives. He
updated the 68k machine description so that Motorola's opcodes always produced
fixed-size instructions (e.g., @code{jsr}), while synthetic instructions
1999-05-03 07:29:11 +00:00
remained shrinkable (@code{jbsr}). John fixed many bugs, including true tested
cross-compilation support, and one bug in relaxation that took a week and
required the proverbial one-bit fix.
Ian Lance Taylor of Cygnus Support merged the Motorola and MIT syntax for the
68k, completed support for some COFF targets (68k, i386 SVR3, and SCO Unix),
added support for MIPS ECOFF and ELF targets, wrote the initial RS/6000 and
PowerPC assembler, and made a few other minor patches.
Steve Chamberlain made GAS able to generate listings.
1999-05-03 07:29:11 +00:00
Hewlett-Packard contributed support for the HP9000/300.
Jeff Law wrote GAS and BFD support for the native HPPA object format (SOM)
along with a fairly extensive HPPA testsuite (for both SOM and ELF object
formats). This work was supported by both the Center for Software Science at
the University of Utah and Cygnus Support.
Support for ELF format files has been worked on by Mark Eichin of Cygnus
Support (original, incomplete implementation for SPARC), Pete Hoogenboom and
Jeff Law at the University of Utah (HPPA mainly), Michael Meissner of the Open
Software Foundation (i386 mainly), and Ken Raeburn of Cygnus Support (sparc,
and some initial 64-bit support).
Linas Vepstas added GAS support for the ESA/390 ``IBM 370'' architecture.
2000-02-23 13:52:23 +00:00
1999-05-03 07:29:11 +00:00
Richard Henderson rewrote the Alpha assembler. Klaus Kaempf wrote GAS and BFD
support for openVMS/Alpha.
2000-06-20 13:52:32 +00:00
Timothy Wall, Michael Hayes, and Greg Smart contributed to the various tic*
flavors.
2003-04-01 15:50:31 +00:00
David Heine, Sterling Augustine, Bob Wilson and John Ruttenberg from Tensilica,
2006-07-24 13:49:50 +00:00
Inc.@: added support for Xtensa processors.
2003-04-01 15:50:31 +00:00
1999-05-03 07:29:11 +00:00
Several engineers at Cygnus Support have also provided many small bug fixes and
configuration enhancements.
2008-12-23 19:10:25 +00:00
Jon Beniston added support for the Lattice Mico32 architecture.
1999-05-03 07:29:11 +00:00
Many others have contributed large or small bugfixes and enhancements. If
you have contributed significant work and are not mentioned on this list, and
want to be, let us know. Some of the history has been lost; we are not
intentionally leaving anyone out.
@node GNU Free Documentation License
@appendix GNU Free Documentation License
@include fdl.texi
2000-11-06 20:27:26 +00:00
@node AS Index
@unnumbered AS Index
1999-05-03 07:29:11 +00:00
@printindex cp
@bye
@c Local Variables:
@c fill-column: 79
@c End: