darkkirb/old-cross-binutils
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

2000-07-31 Jason Eckhardt <jle@cygnus.com>

Browse source 
* doc/c-i860.texi: New file.
        * doc/Makefile.am (CPU_DOCS): Add c-i860.texi.
        * doc/Makefile.in: Regenerate.
        * doc/all.texi: Add I860 as relevant architecture.
        * doc/as.texinfo: Include i860 dependent file c-i860.texi.
This commit is contained in:
Jason Eckhardt 2000-08-01 01:57:46 +00:00
parent a87fdb8d10
commit e3308d0d5b
6 changed files with 108 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

8
gas/ChangeLog
View file

@ -1,3 +1,11 @@
2000-07-31 Jason Eckhardt <jle@cygnus.com>
* doc/c-i860.texi: New file.
* doc/Makefile.am (CPU_DOCS): Add c-i860.texi.
* doc/Makefile.in: Regenerate.
* doc/all.texi: Add I860 as relevant architecture.
* doc/as.texinfo: Include i860 dependent file c-i860.texi.
2000-07-31 Kazu Hirata <kazu@hxi.com>
* config/tc-d30v.c: Fix formatting.

1
gas/doc/Makefile.am
View file

@ -24,6 +24,7 @@ CPU_DOCS = \
c-hppa.texi \
c-i370.texi \
c-i386.texi \
c-i860.texi \
c-i960.texi \
c-m32r.texi \
c-m68hc11.texi \

1
gas/doc/Makefile.in
View file

@ -128,6 +128,7 @@ CPU_DOCS = \
c-hppa.texi \
c-i370.texi \
c-i386.texi \
c-i860.texi \
c-i960.texi \
c-m32r.texi \
c-m68hc11.texi \

1
gas/doc/all.texi
View file

@ -35,6 +35,7 @@
@set HPPA
@set I370
@set I80386
@set I860
@set I960
@set M32R
@set M68HC11

7
gas/doc/as.texinfo
View file

@ -5027,6 +5027,9 @@ subject, see the hardware manufacturer's manual.
@ifset I80386
* i386-Dependent:: Intel 80386 Dependent Features
@end ifset
@ifset I860
* i860-Dependent:: Intel 80860 Dependent Features
@end ifset
@ifset I960
* i960-Dependent:: Intel 80960 Dependent Features
@end ifset
@ -5208,6 +5211,10 @@ family.
@include c-i386.texi
@end ifset
@ifset I860
@include c-i860.texi
@end ifset
@ifset I960
@include c-i960.texi
@end ifset

90
gas/doc/c-i860.texi Normal file
View file

@ -0,0 +1,90 @@
@c Copyright (C) 2000 Free Software Foundation, Inc.
@c This is part of the GAS manual.
@c For copying conditions, see the file as.texinfo.
@ifset GENERIC
@page
@node i860-Dependent
@chapter Intel i860 Dependent Features
@end ifset
@ifclear GENERIC
@node Machine Dependencies
@chapter Intel i860 Dependent Features
@end ifclear
@ignore
@c FIXME: This is basically a stub for i860. There is tons more information
that I will add later (jle@cygnus.com). The assembler is still being
written. The i860 assembler that existed previously was never finished
and doesn't even build. Further, its not BFD_ASSEMBLER and it doesn't
do ELF (it doesn't do anything, but you get the point).
@end ignore
@cindex i860 support
@menu
* Options-i860:: i860 Command-line Options
* Directives-i860:: i860 Machine Directives
* Opcodes for i860:: i860 Opcodes
@end menu
@node Options-i860
@section i860 Command-line Options
@subsection SVR4 compatibility options
@table @code
@item -V
Print assembler version.
@item -Qy
Ignored.
@item -Qn
Ignored.
@end table
@subsection Other options
@table @code
@item -EL
Select little endian output (this is the default).
@item -EB
Select big endian output. Note that the i860 always reads instructions
as little endian data, so this option only effects data and not
instructions.
@end table
@node Directives-i860
@section i860 Machine Directives
@cindex machine directives, i860
@cindex i860 machine directives
@table @code
@cindex @code{dual} directive, i860
@item .dual
Enter dual instruction mode. While this directive is supported, the
preferred way to use dual instruction mode is to explicitly code
the dual bit with the @code{d.} prefix.
@end table
@table @code
@cindex @code{enddual} directive, i860
@item .enddual
Exit dual instruction mode. While this directive is supported, the
preferred way to use dual instruction mode is to explicitly code
the dual bit with the @code{d.} prefix.
@end table
@table @code
@cindex @code{atmp} directive, i860
@item .atmp
Change the temporary register used when expanding pseudo operations. The
default register is @code{r31}.
@end table
@node Opcodes for i860
@section i860 Opcodes
@cindex opcodes, i860
@cindex i860 opcodes
All of the Intel i860 machine instructions are supported.
Some opcodes are processed beyond simply emitting a single corresponding
instruction. For example, @samp{mov} and other instructions with larg
displacements may be expanded into 2 or 3 instructions (FIXME: add details).