2002-12-30 Chris Demetriou <cgd@broadcom.com>
* aoutx.h (NAME(aout,machine_type)): Add bfd_mach_mipsisa32r2 case.
* archures.c (bfd_mach_mipsisa32r2): New define.
* bfd-in2.h: Regenerate.
* cpu-mips.c (I_mipsisa32r2): New enum value.
(arch_info_struct): Add entry for I_mipsisa32r2.
* elfxx-mips.c (elf_mips_isa, _bfd_elf_mips_mach)
(_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_32R2.
(_bfd_mips_elf_final_write_processing): Add
bfd_mach_mipsisa32r2 case.
(_bfd_mips_elf_merge_private_bfd_data): Handle merging of
binaries marked as using MIPS32 Release 2.
[ binutils/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* doc/binutils.texi (objdump): Note MIPS HWR (Hardware Register)
changes in MIPS -M options.
[ gas/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* configure.in: Recognize mipsisa32r2, mipsisa32r2el, and
CPU variants.
* configure: Regenerate.
* config/tc-mips.c (ISA_HAS_DROR, ISA_HAS_ROR): New defines.
(macro_build): Handle "K" operand.
(macro2): Use ISA_HAS_DROR and ISA_HAS_ROR in the places where
CPU_HAS_DROR and CPU_HAS_ROR are currently used.
(mips_ip): New variable "lastpos", and implement "+A", "+B",
and "+C" operands for MIPS32 Release 2 ins/ext instructions.
Implement "K" operand for MIPS32 Release 2 rdhwr instruction.
(validate_mips_insn): Implement "+" as a way to extend the
allowed operands, and implement "K", "+A", "+B", and "+C"
operands.
(OPTION_MIPS32R2): New define.
(md_longopts): Add entry for OPTION_MIPS32R2.
(OPTION_ELF_BASE): Adjust to accomodate OPTIONS_MIPS32R2.
(md_parse_option): Handle OPTION_MIPS32R2.
(s_mipsset): Reimplement handling of ".set mipsN" options
and add support for ".set mips32r2".
(mips_cpu_info_table): Add entry for "mips32r2" (MIPS32 Release 2).
(md_show_usage): Document "-mips32r2" option.
* doc/as.texinfo: Document "-mips32r2" option.
* doc/c-mips.texi: Likewise.
[ gas/testsuite/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* gas/mips/cp0-names-mips32r2.d: New test.
* gas/mips/hwr-names-mips32r2.d: New test.
* gas/mips/hwr-names-numeric.d: New test.
* gas/mips/hwr-names.s: New test source file.
* gas/mips/mips32r2.d: New test.
* gas/mips/mips32r2.s: New test source file.
* gas/mips/mips32r2-ill.l: New test.
* gas/mips/mips32r2-ill.s: New test source file.
* gas/mips/mips.exp: Add mips32r2 architecture data array
entry. Run new tests mentioned above.
[ include/elf/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* mips.h (E_MIPS_ARCH_32R2): New define.
[ include/opcode/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* mips.h: Document "+" as the start of two-character operand
type names, and add new "K", "+A", "+B", and "+C" operand types.
(OP_MASK_INSMSB, OP_SH_INSMSB, OP_MASK_EXTMSB)
(OP_SH_EXTMSB, INSN_ISA32R2, ISA_MIPS32R2, CPU_MIPS32R2): New
defines.
[ opcodes/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* mips-dis.c (mips_cp0_names_mips3264r2, mips_hwr_names_numeric)
(mips_hwr_names_mips3264r2): New arrays.
(mips_arch_choice): New "hwr_names" member.
(mips_arch_choices): Adjust for structure change, and add a new
entry for "mips32r2" ISA.
(mips_hwr_names): New variable.
(set_default_mips_dis_options): Set mips_hwr_names.
(parse_mips_dis_option): New "hwr-names" option which sets
mips_hwr_names, and adjust "reg-names=ARCH" to set mips_hwr_names.
(print_insn_arg): Change return type to "int"
and use that to indicate number of characters consumed.
Add support for "+" operand extension character, "+A", "+B",
"+C", and "K" operands.
(print_insn_mips): Adjust for changes to print_insn_arg.
(print_mips_disassembler_options): Adjust for "hwr-names"
addition and "reg-names" change.
* mips-opc (I33): New define (shorthand for INSN_ISA32R2).
(mips_builtin_opcodes): Note that "nop" and "ssnop" are special
forms of "sll". Add new MIPS32 Release 2 instructions: ehb,
di, ei, ext, ins, jr.hb, jalr.hb, mfhc1, mfhc2, mthc1, mthc2,
rdhwr, rdpgpr, seb, seh, synci, wrpgpr, wsbh.
Note that hardware rotate instructions (ror, rorv) can be
used on MIPS32 Release 2, and add the official mnemonics
for them (rotr, rotrv) and the similar "rotl" mnemonic for
left-rotate.
* doc/c-mips.texi: Add entries for -march=vr4120,vr4130,vr4181,
vr5400 and vr5500. Add entry for -mfix-vr4122-bugs.
* config/tc-mips.c (CPU_HAS_DROR, CPU_HAS_ROR): New macros.
(hilo_interlocks): True for CPU_VR5500.
(gpr_interlocks, cop_interlocks): True for CPU_VR5400 and CPU_VR5500.
(mips_fix_vr4122_bugs): New.
(append_insn): Work around 4122 errors if mips_fix_vr4122_bugs.
(mips_emit_delays): Likewise.
(macro2) [M_DROLI]: Use dror or dror32 if CPU_HAS_DROR.
[M_ROLI]: Likewise ror if CPU_HAS_ROR.
(validate_mips_insn, mips_ip): Handle '[', ']', 'e' and '%'.
(OPTION_FIX_VR4122, OPTION_NO_FIX_VR4122): New options.
(md_longopts): Add -mfix-vr4122-bugs and -no-mfix-vr4122-bugs.
(OPTION_ELF_BASE): Bump.
(md_parse_option): Handle the new options.
(mips_cpu_info_table): Add entries for vr4120, vr4130, vr4181,
vr5400 and vr5500.
[gas/testsuite/]
* gas/mips/mips4100.[sd]: Move dmadd16 and madd16 checks to...
* gas/mips/vr4111.[sd]: ...this new test.
* gas/mips/vr4120.[sd],
* gas/mips/vr4122.[sd],
* gas/mips/vr5400.[sd],
* gas/mips/vr5500.[sd]: New tests.
* mips.exp: Run them.
* doc/c-mips.texi: Remove -mcpu. Document -mabi.
* configure.in (MIPS_CPU_STRING_DEFAULT): New configuration macro.
(USE_E_MIPS_ABI_O32, MIPS_DEFAULT_64BIT): New configuration macros.
* configure, config.in: Regenerate.
* config/tc-mips.c (file_mips_abi): Rename to mips_abi.
(mips_set_options): Remove "abi" field.
(mips_opts): Update accordingly. Replace all uses of mips_opts.abi
with mips_abi.
(mips_cpu): Remove.
(mips_arch_string, mips_arch_info): New vars.
(mips_tune_string, mips_tune_info): New vars.
(ABI_NEEDS_32BIT_REGS, ABI_NEEDS_64BIT_REGS): New macros.
(HAVE_32BIT_GPRS, HAVE_32BIT_FPRS): Don't check the ABI.
(mips_isa_to_str, mips_cpu_to_str): Remove.
(mips_ip): If the selected architecture is a generic ISA rather
than a processor, only mention the ISA level in error messages.
(OPTION_MCPU): Remove.
(OPTION_FP64): New.
(md_longopts): Add -mfp64, remove -mcpu.
(mips_set_option_string): New fn.
(md_parse_option): Make -mipsN update file_mips_isa rather than
mips_opts.isa. Use mips_set_option_string to set -march or -mtune.
Don't let -mgp32 and -mfp32 change the ABI.
(show): Move to end of file. Constify string argument.
(md_show_usage): Move to the end of the file. Read available
architectures from mips_cpu_info_table.
(mips_set_architecture): New fn.
(mips_after_parse_args): Rework. Remove -mcpu handling. -mipsN
is an alias for -march=mipsN. Don't change the ABI based on other
flags. Infer the register size from the ABI as well as the
architecture. Complain about more conflicting arguments.
Unify logic with GCC.
(s_mipsset): Don't change the ABI.
(mips_elf_final_processing): Check USE_E_MIPS_ABI_O32.
(mips_cpu_info_table): Remove Generic-MIPS* entries, keeping just
"mipsN"-type entries. Remove entries that vary only in the
manufacturer's prefix, or that have "000" replaced by "k".
Remove TARGET_CPU entries. Make r2000 entry use CPU_R3000.
(mips_strict_matching_cpu_name_p, mips_matching_cpu_name_p): New fns.
(mips_parse_cpu): New fn.
(mips_cpu_info_from_name, mips_cpu_info_from_cpu): Remove.
(mips_cpu_info_from_isa): Minor formatting tweak.
[gas/testsuite]
* gas/mips/mips-gp32-fp64.d,
* gas/mips/mips-gp32-fp64-pic.d: Add -mfp64.
2002-05-30 Chris G. Demetriou <cgd@broadcom.com>
Ed Satterthwaite <ehs@broadcom.com>
* config/tc-mips.c (mips_set_options): New "ase_mdmx" member.
(mips_opts): Initialize "ase_mdmx" member.
(file_ase_mdmx): New variable.
(CPU_HAS_MDMX): New macro.
(md_begin): Initialize mips_opts.ase_mdmx and file_ase_mdmx
based on command line options and configuration defaults.
(macro_build): Note in comment that use of MDMX in macros is
not currently allowed.
(validate_mips_insn): Add support for the "O", "Q", "X", "Y", and
"Z" MDMX operand types.
(mips_ip): Accept MDMX instructions if mips_opts.ase_mdmx is set,
and add support for the "O", "Q", "X", "Y", and "Z" MDMX operand
types.
(OPTION_MDMX, OPTION_NO_MDMX, md_longopts, md_parse_option):
Add support for "-mdmx" and "-no-mdmx" options.
(OPTION_ELF_BASE): Move to accomodate new options.
(s_mipsset): Support ".set mdmx" and ".set nomdmx".
(mips_elf_final_processing): Set MDMX ASE ELF header flag if
file_ase_mdmx was set.
* doc/as.texinfo: Document -mdmx and -no-mdmx options.
* doc/c-mips.texi: Likewise, and document ".set mdmx" and ".set
nomdmx" directives.
[ gas/testsuite/ChangeLog ]
2002-05-30 Chris G. Demetriou <cgd@broadcom.com>
* gas/mips/mips64-mdmx.s: New file.
* gas/mips/mips64-mdmx.d: Likewise.
* gas/mips/mips.exp: Run new "mips64-mdmx" test.
[ include/opcode/ChangeLog ]
2002-05-30 Chris G. Demetriou <cgd@broadcom.com>
* mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL)
(MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH)
(MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC)
(INSN_MDMX): New constants, for MDMX support.
(opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX.
[ opcodes/ChangeLog ]
2002-05-30 Chris G. Demetriou <cgd@broadcom.com>
Ed Satterthwaite <ehs@broadcom.com>
* mips-dis.c (print_insn_arg): Add support for 'O', 'Q', 'X', 'Y',
and 'Z' formats, for MDMX.
(mips_isa_type): Add MDMX instructions to the ISA
bit mask for bfd_mach_mipsisa64.
* mips-opc.c: Add support for MDMX instructions.
(MX): New definition.
* mips-dis.c: Update copyright years to include 2002.
2002-03-15 Chris G. Demetriou <cgd@broadcom.com>
* config/tc-mips.c (mips_set_options): New "ase_mips3d" member.
(mips_opts): Initialize "ase_mips3d" member.
(file_ase_mips3d): New variable.
(CPU_HAS_MIPS3D): New macro.
(md_begin): Initialize mips_opts.ase_mips3d and file_ase_mips3d
based on command line options and configuration defaults.
(macro_build, mips_ip): Accept MIPS-3D instructions if
mips_opts.ase_mips3d is set.
(OPTION_MIPS3D, OPTION_NO_MIPS3D, md_longopts, md_parse_option):
Add support for "-mips3d" and "-no-mips3d" options.
(OPTION_ELF_BASE): Move to accomodate new options.
(s_mipsset): Support ".set mips3d" and ".set nomips3d".
(mips_elf_final_processing): Add a comment indicating that a
MIPS-3D ASE ELF header flag should be set, when one exists.
* doc/as.texinfo: Document -mips3d and -no-mips3d options.
* doc/c-mips.texi: Likewise, and document ".set mips3d" and ".set
nomips3d" directives.
[ gas/testsuite/ChangeLog ]
2002-03-15 Chris G. Demetriou <cgd@broadcom.com>
* gas/mips/mips64-mips3d.s: New file.
* gas/mips/mips64-mips3d.d: Likewise.
* gas/mips/mips.exp: Run new "mips64-mips3d" test.
[ include/opcode/ChangeLog ]
2002-03-15 Chris G. Demetriou <cgd@broadcom.com>
* mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D
instructions.
(OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks
may be passed along with the ISA bitmask.
[ opcodes/ChangeLog ]
2002-03-15 Chris G. Demetriou <cgd@broadcom.com>
* mips-dis.c (mips_isa_type): Add MIPS3D instructions to the ISA
bit masks for bfd_mach_mips_sb1 and bfd_mach_mipsisa64. Add
comments for bfd_mach_mipsisa32 and bfd_mach_mipsisa64 that
indicate that they should dissassemble all applicable
MIPS-specified ASEs.
* mips-opc.c: Add support for MIPS-3D instructions.
(M3D): New definition.
* mips-opc.c: Update copyright years.
* config/tc-mips.c (mips_fp32, mips_32bit_abi): New static variables.
(md_long_opts): Add -mfp32 option.
(md_parse_option): Handle it. Set mips_32bit_abi given -mabi=32.
(md_show_usage): Show usage for -mfp32 and -mgp32.
(HAVE_32BIT_GPRS, HAVE_32BIT_FPRS): New macros.
(HAVE_64BIT_GPRS, HAVE_64BIT_FPRS): New macros, inverse of the above.
(HAVE_32BIT_ADDRESSES): New macro.
(load_register): Use HAVE_32BIT_GPRS to determine the register width.
(load_address): Use HAVE_32BIT_ADDRESSES to determine the address size.
(s_cprestore, s_cpadd): Likewise.
(macro): Use HAVE_32BIT_GPRS to determine the width of registers
used in branch and M_LI_D macros. Use HAVE_64BIT_FPRS to determine
the width registers used in M_LI_DD macros. Use HAVE_32BIT_ADDRESSES
to determine the width of addresses in load, store and jump macros.
(macro2): Use HAVE_32BIT_GPRS to determine the width of registers
used in set instructions; do not check the address size for them.
Use HAVE_32BIT_ADDRESSES to determine the width of addresses in
unaligned load and store macros.
(mips_ip): Use the new macros to check the width of a register when
processing float constants. Force a constant into memory if it is
destined for an FPR and the FPRs are wider than the GPRs. Warn about
odd FPR numbers if HAVE_32BIT_FPRS. Use HAVE_32BIT_GPRS rather
than mips_gp32 to select synthetic instructions.
(macro_build): Use HAVE_32BIT_GPRS rather than mips_gp32 to select
synthetic instructions.
* NEWS: Updated for the new -n option for the MIPS assembler.
* config/tc-mips.c (md_show_usage): Add -n.
* doc/as.texinfo: Document the new -n option.
* doc/c-mips.texi: Likewise.
* doc/as.1: Regenerated.
