Fix formatting.
This commit is contained in:
Nick Clifton
parent
846b8f1ed9
commit
584da044d9
5 changed files with 426 additions and 404 deletions
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@ -1,3 +1,7 @@
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2000-12-12 Nick Clifton <nickc@redhat.com>
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* readelf.c: Fix formatting.
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Mon Dec 11 14:30:21 MET 2000 Jan Hubicka <jh@suse.cz>
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* MAINTAINERS: Add myself and Andreas Jaeger as x86_64 maintainer.
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File diff suppressed because it is too large
Load diff
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@ -872,6 +872,7 @@ dump_relocations (file, rel_offset, rel_size, symtab, nsyms, strtab, is_rela)
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break;
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case EM_CYGNUS_ARC:
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case EM_ARC:
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rtype = elf_arc_reloc_type (type);
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break;
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@ -1224,7 +1225,7 @@ get_machine_name (e_machine)
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case EM_SH: return "Hitachi SH";
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case EM_SPARCV9: return "Sparc v9";
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case EM_TRICORE: return "Siemens Tricore";
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case EM_ARC: return "Argonaut RISC Core";
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case EM_ARC: return "ARC";
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case EM_H8_300: return "Hitachi H8/300";
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case EM_H8_300H: return "Hitachi H8/300H";
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case EM_H8S: return "Hitachi H8S";
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@ -1236,7 +1237,7 @@ get_machine_name (e_machine)
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case EM_ALPHA: return "Alpha";
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case EM_CYGNUS_D10V: return "d10v";
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case EM_CYGNUS_D30V: return "d30v";
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case EM_CYGNUS_ARC: return "Arc";
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case EM_CYGNUS_ARC: return "ARC";
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case EM_CYGNUS_M32R: return "Mitsubishi M32r";
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case EM_CYGNUS_V850: return "NEC v850";
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case EM_CYGNUS_MN10300: return "mn10300";
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@ -1269,7 +1270,6 @@ get_machine_name (e_machine)
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case EM_MMIX: return "Donald Knuth's educational 64-bit processor";
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case EM_HUANY: return "Harvard Universitys's machine-independent object format";
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case EM_PRISM: return "SiTera Prism";
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default:
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sprintf (buff, _("<unknown>: %x"), e_machine);
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return buff;
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@ -4654,13 +4654,13 @@ process_symbol_table (file)
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if (do_histogram && buckets != NULL)
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{
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int *lengths;
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int *counts;
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int hn;
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int si;
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int maxlength = 0;
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int nzero_counts = 0;
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int nsyms = 0;
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int * lengths;
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int * counts;
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int hn;
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int si;
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int maxlength = 0;
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int nzero_counts = 0;
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int nsyms = 0;
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printf (_("\nHistogram for bucket list length (total of %d buckets):\n"),
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nbuckets);
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@ -5678,7 +5678,7 @@ display_debug_abbrev (section, start, file)
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unsigned char * start;
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FILE * file ATTRIBUTE_UNUSED;
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{
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abbrev_entry * entry;
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abbrev_entry * entry;
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unsigned char * end = start + section->sh_size;
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printf (_("Contents of the %s section:\n\n"), SECTION_NAME (section));
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@ -5731,12 +5731,12 @@ static void
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decode_location_expression (data, pointer_size, length)
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unsigned char * data;
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unsigned int pointer_size;
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unsigned long length;
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unsigned long length;
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{
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unsigned op;
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int bytes_read;
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unsigned long uvalue;
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unsigned char *end = data + length;
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unsigned op;
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int bytes_read;
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unsigned long uvalue;
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unsigned char * end = data + length;
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while (data < end)
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{
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@ -6467,7 +6467,7 @@ display_debug_aranges (section, start, file)
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ranges = start + sizeof (* external);
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/* Must pad to an alignment boundary that is twice the pointer size. */
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excess = sizeof (*external) % (2 * arange.ar_pointer_size);
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excess = sizeof (* external) % (2 * arange.ar_pointer_size);
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if (excess)
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ranges += (2 * arange.ar_pointer_size) - excess;
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@ -6498,20 +6498,20 @@ display_debug_aranges (section, start, file)
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typedef struct Frame_Chunk
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{
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struct Frame_Chunk *next;
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unsigned char *chunk_start;
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int ncols;
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struct Frame_Chunk * next;
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unsigned char * chunk_start;
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int ncols;
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/* DW_CFA_{undefined,same_value,offset,register,unreferenced} */
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short int *col_type;
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int *col_offset;
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char *augmentation;
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unsigned int code_factor;
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unsigned int data_factor;
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unsigned long pc_begin;
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unsigned long pc_range;
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int cfa_reg;
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int cfa_offset;
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int ra;
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short int * col_type;
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int * col_offset;
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char * augmentation;
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unsigned int code_factor;
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unsigned int data_factor;
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unsigned long pc_begin;
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unsigned long pc_range;
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int cfa_reg;
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int cfa_offset;
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int ra;
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}
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Frame_Chunk;
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@ -6521,13 +6521,14 @@ Frame_Chunk;
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static void
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frame_need_space (fc, reg)
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Frame_Chunk *fc;
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Frame_Chunk * fc;
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int reg;
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{
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int prev = fc->ncols;
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if (reg < fc->ncols)
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return;
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fc->ncols = reg + 1;
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fc->col_type = (short int *) xrealloc (fc->col_type,
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fc->ncols * sizeof (short int));
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@ -6544,20 +6545,23 @@ frame_need_space (fc, reg)
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static void
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frame_display_row (fc, need_col_headers, max_regs)
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Frame_Chunk *fc;
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int *need_col_headers;
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int *max_regs;
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Frame_Chunk * fc;
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int * need_col_headers;
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int * max_regs;
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{
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int r;
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char tmp[100];
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if (*max_regs < fc->ncols)
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*max_regs = fc->ncols;
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if (*need_col_headers)
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if (* max_regs < fc->ncols)
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* max_regs = fc->ncols;
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if (* need_col_headers)
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{
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*need_col_headers = 0;
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* need_col_headers = 0;
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printf (" LOC CFA ");
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for (r=0; r<*max_regs; r++)
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for (r = 0; r < * max_regs; r++)
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if (fc->col_type[r] != DW_CFA_unreferenced)
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{
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if (r == fc->ra)
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@ -6565,12 +6569,15 @@ frame_display_row (fc, need_col_headers, max_regs)
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else
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printf ("r%-4d", r);
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}
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printf ("\n");
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}
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printf ("%08x ", (unsigned int) fc->pc_begin);
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sprintf (tmp, "r%d%+d", fc->cfa_reg, fc->cfa_offset);
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printf ("%-8s ", tmp);
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for (r=0; r<fc->ncols; r++)
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for (r = 0; r < fc->ncols; r++)
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{
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if (fc->col_type[r] != DW_CFA_unreferenced)
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{
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@ -6599,8 +6606,8 @@ frame_display_row (fc, need_col_headers, max_regs)
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}
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#define GET(N) byte_get (start, N); start += N
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#define LEB() read_leb128 (start, &length_return, 0); start += length_return
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#define SLEB() read_leb128 (start, &length_return, 1); start += length_return
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#define LEB() read_leb128 (start, & length_return, 0); start += length_return
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#define SLEB() read_leb128 (start, & length_return, 1); start += length_return
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static int
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display_debug_frames (section, start, file)
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@ -6609,21 +6616,25 @@ display_debug_frames (section, start, file)
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FILE * file ATTRIBUTE_UNUSED;
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{
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unsigned char * end = start + section->sh_size;
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unsigned char *section_start = start;
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Frame_Chunk *chunks = 0;
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Frame_Chunk *remembered_state = 0, *rs;
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int is_eh = (strcmp (SECTION_NAME (section), ".eh_frame") == 0);
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int length_return;
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int max_regs = 0;
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unsigned char * section_start = start;
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Frame_Chunk * chunks = 0;
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Frame_Chunk * remembered_state = 0;
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Frame_Chunk * rs;
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int is_eh = (strcmp (SECTION_NAME (section), ".eh_frame") == 0);
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int length_return;
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int max_regs = 0;
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printf (_("The section %s contains:\n"), SECTION_NAME (section));
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while (start < end)
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{
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unsigned char *saved_start, *block_end;
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unsigned long length, cie_id;
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Frame_Chunk *fc, *cie;
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int need_col_headers = 1;
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unsigned char * saved_start;
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unsigned char * block_end;
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unsigned long length;
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unsigned long cie_id;
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Frame_Chunk * fc;
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Frame_Chunk * cie;
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int need_col_headers = 1;
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saved_start = start;
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length = byte_get (start, 4); start += 4;
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@ -6651,7 +6662,12 @@ display_debug_frames (section, start, file)
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start ++; /* version */
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fc->augmentation = start;
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while (*start) start++; start++; /* skip past NUL */
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while (* start)
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start++;
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start++; /* skip past NUL */
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if (fc->augmentation[0] == 'z')
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{
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int xtra;
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@ -6683,9 +6699,10 @@ display_debug_frames (section, start, file)
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}
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else
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{
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unsigned char *look_for;
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unsigned char * look_for;
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static Frame_Chunk fde_fc;
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fc = &fde_fc;
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fc = & fde_fc;
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memset (fc, 0, sizeof (Frame_Chunk));
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look_for = is_eh ? start-4-cie_id : (unsigned char *) cie_id;
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@ -6701,7 +6718,7 @@ display_debug_frames (section, start, file)
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fc->ncols = 0;
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fc->col_type = (short int *) xmalloc (sizeof (short int));
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fc->col_offset = (int *) xmalloc (sizeof (int));
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frame_need_space (fc, max_regs-1);
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frame_need_space (fc, max_regs - 1);
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cie = fc;
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fc->augmentation = "";
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}
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@ -6741,15 +6758,15 @@ display_debug_frames (section, start, file)
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{
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/* Start by making a pass over the chunk, allocating storage
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and taking note of what registers are used. */
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unsigned char * tmp = start;
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unsigned char *tmp = start;
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while (start < block_end)
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{
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unsigned op, opa;
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unsigned long reg;
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bfd_vma vma;
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op = *start++;
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op = * start ++;
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opa = op & 0x3f;
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if (op & 0xc0)
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op &= 0xc0;
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@ -7156,6 +7173,7 @@ display_debug_section (section, file)
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/* See if we know how to display the contents of this section. */
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if (strncmp (name, ".gnu.linkonce.wi.", 17) == 0)
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name = ".debug_info";
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for (i = NUM_ELEM (debug_displays); i--;)
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if (strcmp (debug_displays[i].name, name) == 0)
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{
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@ -7392,7 +7410,7 @@ process_mips_specific (file)
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Elf_External_Options *, "options");
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iopt = (Elf_Internal_Options *) malloc ((sect->sh_size / sizeof (eopt))
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* sizeof (*iopt));
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* sizeof (* iopt));
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if (iopt == NULL)
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{
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error (_("Out of memory"));
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@ -7439,8 +7457,8 @@ process_mips_specific (file)
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if (elf_header.e_machine == EM_MIPS)
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{
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/* 32bit form. */
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Elf32_External_RegInfo *ereg;
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Elf32_RegInfo reginfo;
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Elf32_External_RegInfo * ereg;
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Elf32_RegInfo reginfo;
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ereg = (Elf32_External_RegInfo *) (option + 1);
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reginfo.ri_gprmask = BYTE_GET (ereg->ri_gprmask);
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@ -7557,7 +7575,7 @@ process_mips_specific (file)
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break;
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}
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len = sizeof (*eopt);
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len = sizeof (* eopt);
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while (len < option->size)
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if (((char *) option)[len] >= ' '
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&& ((char *) option)[len] < 0x7f)
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@ -7585,7 +7603,7 @@ process_mips_specific (file)
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return 0;
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}
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iconf = (Elf32_Conflict *) malloc (conflictsno * sizeof (*iconf));
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iconf = (Elf32_Conflict *) malloc (conflictsno * sizeof (* iconf));
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if (iconf == NULL)
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{
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error (_("Out of memory"));
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@ -7594,7 +7612,7 @@ process_mips_specific (file)
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if (is_32bit_elf)
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{
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GET_DATA_ALLOC (conflicts_offset, conflictsno * sizeof (*econf32),
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GET_DATA_ALLOC (conflicts_offset, conflictsno * sizeof (* econf32),
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econf32, Elf32_External_Conflict *, "conflict");
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for (cnt = 0; cnt < conflictsno; ++cnt)
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@ -7602,7 +7620,7 @@ process_mips_specific (file)
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}
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else
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{
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GET_DATA_ALLOC (conflicts_offset, conflictsno * sizeof (*econf64),
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GET_DATA_ALLOC (conflicts_offset, conflictsno * sizeof (* econf64),
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econf64, Elf64_External_Conflict *, "conflict");
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for (cnt = 0; cnt < conflictsno; ++cnt)
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@ -4,7 +4,8 @@
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* input-scrub.c: Fix formatting.
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* macro.c: Fix formatting.
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* config/tc-mips.c: Fix formatting.
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* doc/c-mips.texi: Fix formatting.
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Mon Dec 11 14:35:42 MET 2000 Jan hubicka <jh@suse.cz>
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* tc-i386.c (md_assemble): Refuse 's' and 'l' suffixes in the intel
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@ -14,11 +14,10 @@
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@cindex MIPS processor
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@sc{gnu} @code{@value{AS}} for @sc{mips} architectures supports several
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different @sc{mips} processors, and MIPS ISA levels I through V, MIPS32,
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and MIPS64. For
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information about the @sc{mips} instruction set, see @cite{MIPS RISC
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Architecture}, by Kane and Heindrich (Prentice-Hall). For an overview
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of @sc{mips} assembly conventions, see ``Appendix D: Assembly Language
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Programming'' in the same work.
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and MIPS64. For information about the @sc{mips} instruction set, see
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@cite{MIPS RISC Architecture}, by Kane and Heindrich (Prentice-Hall).
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For an overview of @sc{mips} assembly conventions, see ``Appendix D:
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Assembly Language Programming'' in the same work.
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@menu
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* MIPS Opts:: Assembler options
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@ -68,12 +67,11 @@ Generate code for a particular MIPS Instruction Set Architecture level.
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@samp{-mips1} corresponds to the @sc{r2000} and @sc{r3000} processors,
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@samp{-mips2} to the @sc{r6000} processor, @samp{-mips3} to the
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@sc{r4000} processor, and @samp{-mips4} to the @sc{r8000} and
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@sc{r10000} processors.
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@samp{-mips5}, @samp{-mips32}, and @samp{-mips64} correspond
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to generic @sc{MIPS V}, @sc{MIPS32}, and @sc{MIPS64} ISA
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processors, respectively.
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You can also switch instruction sets during the
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assembly; see @ref{MIPS ISA, Directives to override the ISA level}.
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@sc{r10000} processors. @samp{-mips5}, @samp{-mips32}, and
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@samp{-mips64} correspond to generic @sc{MIPS V}, @sc{MIPS32}, and
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@sc{MIPS64} ISA processors, respectively. You can also switch
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instruction sets during the assembly; see @ref{MIPS ISA, Directives to
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override the ISA level}.
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@item -mgp32
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Assume that 32-bit general purpose registers are available. This
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@ -248,14 +246,14 @@ assembly language programmers!
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the @sc{mips} Instruction Set Architecture level on the fly: @code{.set
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mips@var{n}}. @var{n} should be a number from 0 to 5, or 32 or 64.
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The values 1 to 5, 32, and 64 make the assembler accept instructions
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for the corresponding
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@sc{isa} level, from that point on in the assembly. @code{.set
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mips@var{n}} affects not only which instructions are permitted, but also
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how certain macros are expanded. @code{.set mips0} restores the
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@sc{isa} level to its original level: either the level you selected with
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command line options, or the default for your configuration. You can
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use this feature to permit specific @sc{r4000} instructions while
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assembling in 32 bit mode. Use this directive with care!
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for the corresponding @sc{isa} level, from that point on in the
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assembly. @code{.set mips@var{n}} affects not only which instructions
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are permitted, but also how certain macros are expanded. @code{.set
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mips0} restores the @sc{isa} level to its original level: either the
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level you selected with command line options, or the default for your
|
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configuration. You can use this feature to permit specific @sc{r4000}
|
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instructions while assembling in 32 bit mode. Use this directive with
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care!
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The directive @samp{.set mips16} puts the assembler into MIPS 16 mode,
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in which it will assemble instructions for the MIPS 16 processor. Use
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Reference in a new issue