* config/tc-mips.c (mips_set_options, mips_opts, file_ase_dspr2,
ISA_SUPPORTS_DSPR2_ASE, MIPS_CPU_ASE_DSPR2): Add DSP R2 ASE support.
(macro_build): Add case '2'.
(macro): Expand M_BALIGN to nop, packrl.ph or balign.
(validate_mips_insn): Add support for balign instruction.
(mips_ip): Handle DSP R2 instructions. Support balign instruction.
(OPTION_DSPR2, OPTION_NO_DSPR2, OPTION_COMPAT_ARCH_BASE,
md_parse_option, mips_after_parse_args): Add -mdspr2 and -mno-dspr2
command line options.
(s_mipsset): Add support for .set dspr2 and .set nodspr2 directives.
(md_show_usage): Add -mdspr2 and -mno-dspr2 help output.
* doc/c-mips.texi, doc/as.texinfo: Document -mdspr2, -mno-dspr2,
.set dspr2, .set nodspr2.
[ gas/testsuite/ChangeLog ]
* gas/mips/mips32-dspr2.s, gas/mips/mips32-dspr2.d: New test for
DSP R2.
* gas/mips/mips.exp: Run new test.
[ include/opcode/Changelog ]
* mips.h (OP_SH_BP, OP_MASK_BP): Add support for balign instruction.
(INSN_DSPR2): Add flag for DSP R2 instructions.
(M_BALIGN): New macro.
[ opcodes/ChangeLog ]
* mips-dis.c (mips_arch_choices): Add DSP R2 support.
(print_insn_args): Add support for balign instruction.
* mips-opc.c (D33): New shortcut for DSP R2 instructions.
(mips_builtin_opcodes): Add DSP R2 instructions.
[ sim/mips/ChangeLog ]
* Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
* configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
Add dsp2 to sim_igen_machine.
* configure: Regenerate.
* dsp.igen (do_ph_op): Add MUL support when op = 2.
(do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
(mulq_rs.ph): Use do_ph_mulq.
(MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
* mips.igen: Add dsp2 model and include dsp2.igen.
(MFHI, MFLO, MTHI, MTLO): Extend these instructions for
for *mips32r2, *mips64r2, *dsp.
(MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
for *mips32r2, *mips64r2, *dsp2.
* dsp2.igen: New file for MIPS DSP REV 2 ASE.
[ sim/testsuite/sim/mips/ChangeLog ]
* basic.exp: Run the dsp2 test.
* utils-dsp.inc (dspckacc_astio, dspck_tsimm): New macro.
* mips32-dsp2.s: New test.
* config/tc-m68k.c (mcfv4e_ctrl): Add ColdFire specific names.
(mcf5475_ctrl, mcf5485_ctrl): New.
(m68k_cpus): Use mcf5485_ctrl and mcf5485_ctrl for those families.
(m68k_ip): Add ASID, MMUBAR, ROMBAR0 handling.
(init_table): Add asid, mmubar, adjust rombar0.
* config/tc-i386.h (Seg2ShortForm, Seg3ShortForm): Delete.
* config/tc-i386.c: Wrap overly long lines, whitespace fixes.
(process_operands): Move old Seg2ShortForm and Seg3ShortForm
code, and test for these insns using a combination of
opcode_modifier and operand_types.
include/opcode/
* i386.h (i386_optab): Replace all occurrences of Seg2ShortForm
and Seg3ShortFrom with Shortform.
2007-02-11 H.J. Lu <hongjiu.lu@intel.com>
PR gas/4027
* gas/i386/opcode.s: Add more tests for "test".
* i386/opcode-intel.d: Updated.
* gas/i386/opcode-suffix.d: Likewise.
* gas/i386/opcode.d: Likewise.
include/opcode/
2007-02-11 H.J. Lu <hongjiu.lu@intel.com>
PR gas/4027
* i386.h (i386_optab): Put the real "test" before the pseudo
one.
* gas/elf/elf.exp: Expect the redef test to fail on targets which do not
convert fixups against ordinary symbols into relocs against section symbols.
* gas/all/gas.exp: Likewise.
(xtensa_elf_suffix): Use suffix_relocs instead of local mapping table.
(map_suffix_reloc_to_operator): New.
(map_operator_to_reloc): New.
(expression_maybe_register): Fix incorrect test of return value from
xtensa_elf_suffix. Rearrange to use map_suffix_reloc_to_operator.
(xg_assemble_literal, convert_frag_immed): Use map_operator_to_reloc.
option as volatile so that they can be overridden later on by a
.set directive. This maintains compatibility with the behaviour
of earlier versions of the assembler.
* doc/as.texinfo (--defsym): Document that the defined symbol's
value can be overridden via a .set directive.
gas/
* config/tc-arm.c (do_t_add_sub): Use Rd and Rs.
gas/testsuite/
* gas/arm/thumb2_add.d: Add test for missing operand.
* gas/arm/thumb2_add.s: Ditto.
* archures.c (bfd_mach_cpu32_fido): Rename to bfd_mach_fido.
* bfd-in2.h: Regenerate.
* cpu-m68k.c (arch_info_struct): Use bfd_mach_fido instead of
bfd_mach_cpu32_fido.
(m68k_arch_features): Use fido_a instead of cpu32.
(bfd_m68k_compatible): Reject the combination of Fido and
ColdFire. Accept the combination of CPU32 and Fido with a
warning.
* elf32-m68k.c (elf32_m68k_object_p,
elf32_m68k_merge_private_bfd_data,
elf32_m68k_print_private_bfd_data): Treat Fido as an
architecture by itself.
binutils/
* readelf.c (get_machine_flags): Treat Fido as an architecture
by itself.
gas/
* config/tc-m68k.c (m68k_archs, m68k_cpus): Treat Fido as an
architecture by itself.
(m68k_ip): Don't issue a warning for tbl instructions on fido.
(m68k_elf_final_processing): Treat Fido as an architecture by
itself.
include/elf/
* m68k.h (EF_M68K_FIDO): New.
(EF_M68K_ARCH_MASK): OR EF_M68K_FIDO.
(EF_M68K_CPU32_FIDO_A, EF_M68K_CPU32_MASK): Remove.
include/opcode/
* m68k.h (m68010up): OR fido_a.
opcodes/
* m68k-opc.c (m68k_opcodes): Replace cpu32 with
cpu32 | fido_a except on tbl instructions.
PR gas/3826
* config/tc-i386.c (register_prefix): New.
(set_intel_syntax): Set set_intel_syntax to "" if register
prefix is needed.
(check_byte_reg): Use register_prefix for error message.
(check_long_reg): Likewise.
(check_qword_reg): Likewise.
(check_word_reg): Likewise.
(do_neon_qshl_imm): Likewise.
(do_neon_rshl): New function. Handle rounding variants of
v{q}shl-by-register.
(insns): Use do_neon_rshl for vrshl, vqrshl.
* config/tc-i386.c (process_operands): Check i.reg_operands
and increment i.operands when adding a register operand.
(build_modrm_byte): Fix 4 operand instruction handling.
* config/tc-i386.c (disp_expressions): Use MAX_MEMORY_OPERANDS
for array size instead of 2.
(im_expressions): Use MAX_IMMEDIATE_OPERANDS for for array size
instead of 2.
(i386_immediate): Update immediate operand overflow error
message.
(i386_displacement): Check displacement operand overflow.
* config/m68k-parse.h (m68k_register): Add CAC and MBB.
* config/tc-m68k.c (fido_ctrl): New.
(m68k_archs): Use fido_ctrl for -mfidoa.
(m68k_cpus): Use fido_ctrl on fido-*-*.
(m68k_ip): Add support for CAC and MBB.
(init_table): Add CAC and MBB.
opcodes/
* m68k-dis.c (print_insn_arg): Add support for cac and mbb.
Delete the code handling large constant for PIC.
Modify some comments.
(score_relax_frag): Decrease insn_addr in certain situation.
(s_score_cprestore): Change .cprestore syntax from ".cprestore offset"
to ".cprestore reg, offset".
2006-12-13 H.J. Lu <hongjiu.lu@intel.com>
PR gas/3712
* config/tc-i386.c (match_template): Use MAX_OPERANDS for the
number of operands. Issue an error if MAX_OPERANDS != 4. Add
the 4th operand check.
gas/testsuite/
2006-12-13 H.J. Lu <hongjiu.lu@intel.com>
PR gas/3712
* gas/i386/inval.s: Add invalid insertq.
* gas/i386/x86-64-inval.s: Likewise.
* gas/i386/inval.l: Updated.
* gas/i386/x86-64-inval.l: Likewise.
Return NULL if symbol name characters follow the register number.
(parse_reg): Use NULL instead of 0 for pointer values. Stop
processing if whatreg returned NULL.
2006-12-04 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (OP_J): Update used_prefixes in v_mode.
gas/testsuite/
2006-12-04 Jan Beulich <jbeulich@novell.com>
* gas/i386/opcode-intel.d: Fix wrong expectation. Make white space
expectations more consistent.
gas/
* config/tc-arm.c (arm_force_relocation): Return 1 for relocs against
function symbols.
gas/testsuite/
* gas/arm/thumbrel.s: New test.
* gas/arm/thumbrel.d: New test.
2006-11-30 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (SEG_Fixup): Delete.
(Sv): Use OP_SEG.
(putop): New suffix character 'D'.
(dis386): Use it.
(grps): Likewise.
(OP_SEG): Handle bytemode other than w_mode.
gas/testsuite/
2006-11-30 Jan Beulich <jbeulich@novell.com>
* gas/i386/intel.d: Adjust.
* gas/i386/naked.d: Adjust.
* gas/i386/opcode.d: Adjust.
2006-11-30 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (dis386): Use 'R' and 'O' for cbw/cwd unconditionally.
(putop): For 'O' suffix, print 'q' in Intel mode, and mark data prefix
used. For 'R' and 'W' suffix, simplify and fix Intel mode.
gas/testsuite/
2006-11-30 Jan Beulich <jbeulich@novell.com>
* gas/i386/intel.s: Use Intel syntax in Intel syntax test.
* gas/i386/x86-64-cbw.[sd]: New.
* gas/i386/x86-64-cbw-intel.d: New.
* gas/i386/i386.exp: Run new tests.
gas/
* config/tc-arm.c (arm_is_eabi): New function.
* config/tc-arm.h (arm_is_eabi): New prototype.
(THUMB_IS_FUNC): Use ELF function type for EABI objects.
* doc/c-arm.texi (.thumb_func): Update documentation.
* elf32-xtensa.c (elf_xtensa_special_sections): Add .xtensa.info.
gas/
* config/tc-xtensa.c (XSHAL_ABI): Add default definition.
(directive_state): Disable scheduling by default.
(xtensa_add_config_info): New.
(xtensa_end): Call xtensa_add_config_info.
gas/testsuite/
* gas/elf/section2.e-xtensa: New file.
* gas/elf/elf.exp: Use it.
include/
* xtensa-config.h (XSHAL_ABI): New.
(XTHAL_ABI_WINDOWED, XTHAL_ABI_CALL0): New.
ld/
* emultempl/xtensaelf.em (XSHAL_ABI): Add default definition.
(replace_insn_sec_with_prop_sec): Use bfd_make_section_with_flags.
Delete redundant code to set sections flags and alignment.
(xt_config_info_unpack_and_check, check_xtensa_info): New.
(elf_xtensa_after_open): Iterate over input statements instead of
link_info.input_bfds.
(elf_xtensa_before_allocation): Likewise. Call check_xtensa_info for
each input, and write a new .xtensa.info section in the output.
* arm-dis.c (last_is_thumb): Delete.
(enum map_type, last_type): New.
(print_insn_data): New.
(get_sym_code_type): Take MAP_TYPE argument. Check the type of
the right symbol. Handle $d.
(print_insn): Check for mapping symbols even without a normal
symbol. Adjust searching. If $d is found see how much data
to print. Handle data.
gas/
* config/tc-arm.h (md_cons_align): Define.
(mapping_state): New prototype.
* config/tc-arm.c (mapping_state): Make global.
gas/testsuite/
* gas/arm/arm7t.d, gas/arm/neon-ldst-rm.d, gas/arm/thumb2_pool.d,
gas/arm/tls.d: Update for $d support.
* gas/arm/mapshort.d, gas/arm/mapshort.s: New test.
* gas/elf/section2.e-armeabi: Update.
* gas/elf/section2.e-armelf: New file.
* gas/elf/elf.exp: Use it.
ld/testsuite/
* ld-arm/mixed-app.d, ld-arm/tls-app.d, ld-arm/tls-lib.d: Update
for $d support.
* config/tc-score.c (score_relax_frag): If next frag contains 32 bit branch
instruction, handle it specially.
(score_insns): Modify 32 bit branch instruction.
* config/tc-m68k.c (m68k_ip): Correct output of cpu aliases.
gas/testsuite/
* gas/m68k/all.exp: Add mcf-trap.
* gas/m68k/mcf-trap.[sd]: New.
opcodes/
* m68k-opc.c (m68k_opcodes): Place trap instructions before set
conditionals. Add tpf coldfire instruction as alias for trapf.
2006-11-15 Jan Beulich <jbeulich@novell.com>
PR/3469
* symbols.c (symbol_clone): Mark symbol ending up not on symbol
chain by linking it to itself.
(resolve_symbol_value): Also check symbol_shadow_p().
(symbol_shadow_p): New.
* symbols.h (symbol_shadow_p): Declare.
gas/testsuite/
2006-11-15 Jan Beulich <jbeulich@novell.com>
* gas/elf/equ-reloc.[sd]: New.
* gas/elf/elf.exp: Run new test.
(arm_fix_adjustable) [OBJ_ELF]: Use it on coff targets too.
* gas/arm/local_label_coff.s: New test.
* gas/arm/local_label_coff.d: New test.
* gas/arm/local_label_elf.s: New test.
* gas/arm/local_label_elf.d: New test.
* gas/arm/local_label_wince.s: New test.
* gas/arm/local_label_wince.d: New test.
* pei-arm-wince.c (LOCAL_LABEL_PREFIX): Likewise.
* coff-arm.c (LOCAL_LABEL_PREFIX): Only define if not defined before.
* gas/arm/undefined.d: Run test on Windows CE.
* gas/arm/undefined_coff.d: Don't run test on Windows CE.
* config/tc-mips.c (pic_need_relax): Return true for section symbols.
gas/testsuite:
* gas/mips/elf-rel26.s: New test.
* gas/mips/elf-rel26.d: Ditto.
* gas/mips/mips.exp: Run it.
personality and lsda.
(struct cie_entry): Add per_encoding, lsda_encoding and personality.
(alloc_fde_entry): Initialize per_encoding and lsda_encoding.
(cfi_pseudo_table): Handle .cfi_personality and .cfi_lsda.
(dot_cfi_personality, dot_cfi_lsda, encoding_size): New functions.
(output_cie): Output personality including its encoding and LSDA encoding.
(output_fde): Output LSDA.
(select_cie_for_fde): Don't share CIE if personality, its encoding or
LSDA encoding are different. Copy the 3 fields from fde_entry to
cie_entry.
* doc/as.texinfo (.cfi_personality, .cfi_lsda): Document.
* gas/cfi/cfi-common-6.d: New test.
* gas/cfi/cfi-common-6.s: New.
* gas/cfi/cfi.exp: Add cfi-common-6 test.
* elf-bfd.h (local_call_stubs): New member.
* elfxx-mips.c (FN_STUB_P, CALL_STUB_P, CALL_FP_STUB_P): New macros.
(mips_elf_calculate_relocation): Handle local mips16 call stubs.
(mips16_stub_section_p): Rename from mips_elf_stub_section_p, use
the new stub macros.
(_bfd_mips_elf_check_relocs): Handle call stubs for code which
mixes mips16 and mips32 functions. Use mips16_stub_section_p. Mark
used stubs with SEC_KEEP. Use the new stub macros.
[ gas/testsuite/ChangeLog ]
* gas/mips/mips16-intermix.d, gas/mips/mips16-intermix.s: New
testcase.
* gas/mips/mips.exp: Run new testcase.
[ ld/testsuite/ChangeLog ]
* ld-mips-elf/mips16-intermix-1.s, ld-mips-elf/mips16-intermix-2.s,
ld-mips-elf/mips16-intermix.d: New testcase.
* ld-mips-elf/mips-elf.exp (mips16_intermix_test): Run new testcases.
(my_get_expression): Const operand of some instructions can not be symbol in assembly.
(get_insn_class_from_type): Handle instruction type Insn_internal.
(do_macro_ldst_label): Modify inst.type.
(Insn_PIC): Delete.
* score-inst.h (enum score_insn_type): Add Insn_internal.
* tc-score.c (data_op2): The immediate value in lw is 15 bit signed.
* score-dis.c (print_insn): Correct the error code to print correct PCE instruction disassembly.
* bfd/elf64-sparc.c: Add FreeBSD support.
(elf64_sparc_fbsd_post_process_headers): New function.
* bfd/targets.c (_bfd_target_vector): Add bfd_elf64_sparc_freebsd_vec.
* bfd/config.bfd (sparc64-*-freebsd*): Set targ_defvec to bfd_elf64_sparc_freebsd_vec.
* bfd/configure.in: Add entry for bfd_elf64_sparc_freebsd_vec.
* bfd/configure: Regenerate.
* gas/config/tc-sparc.c (md_parse_option): Treat any target starting with elf32-sparc
as a viable target for the -32 switch and any target starting with elf64-sparc as a
viable target for the -64 switch.
(sparc_target_format): For 64-bit ELF flavoured output use ELF_TARGET_FORMAT64
while for 32-bit ELF flavoured output use ELF_TARGET_FORMAT.
* gas/config/tc-sparc.h (ELF_TARGET_FORMAT, ELF_TARGET_FORMAT64): Define.
* ld/emulparams/elf64_sparc_fbsd.sh (OUTPUT_FORMAT): Define as elf64-sparc-freebsd.
2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Ian Lance Taylor <ian@wasabisystems.com>
Ben Elliston <bje@wasabisystems.com>
* archures.c: Add definition for bfd_mach_arm_iWMMXt2.
* cpu-arm.c (processors): Add bfd_mach_arm_iWMMXt2.
(arch_info_struct, bfd_arm_update_notes): Likewise.
(architectures): Likewise.
(bfd_arm_merge_machines): Check for iWMMXt2.
* bfd-in2.h: Rebuild.
gas/
2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Ian Lance Taylor <ian@wasabisystems.com>
Ben Elliston <bje@wasabisystems.com>
* config/tc-arm.c (arm_cext_iwmmxt2): New.
(enum operand_parse_code): New code OP_RIWR_I32z.
(parse_operands): Handle OP_RIWR_I32z.
(do_iwmmxt_wmerge): New function.
(do_iwmmxt_wldstd): Handle iwmmxt2 case where second operand is
a register.
(do_iwmmxt_wrwrwr_or_imm5): New function.
(insns): Mark instructions as RIWR_I32z as appropriate.
Also add torvsc<b,h,w>, wabs<b,h,w>, wabsdiff<b,h,w>,
waddbhus<l,m>, waddhc, waddwc, waddsubhx, wavg4{r}, wmaddu{x,n},
wmadds{x,n}, wmerge, wmiaxy{n}, wmiawxy{n}, wmul<sm,um>{r},
wmulw<um,sm,l>{r}, wqmiaxy{n}, wqmulm{r}, wqmulwm{r}, wsubaddhx.
(md_begin): Handle IWMMXT2.
(arm_cpus): Add iwmmxt2.
(arm_extensions): Likewise.
(arm_archs): Likewise.
gas/testsuite/
2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Ian Lance Taylor <ian@wasabisystems.com>
Ben Elliston <bje@wasabisystems.com>
* gas/arm/iwmmxt2.s: New file.
* gas/arm/iwmmxt2.d: New file.
include/opcode/
2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Ian Lance Taylor <ian@wasabisystems.com>
Ben Elliston <bje@wasabisystems.com>
* arm.h (ARM_CEXT_IWMMXT2, ARM_ARCH_IWMMXT2): Define.
opcodes/
2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Ian Lance Taylor <ian@wasabisystems.com>
Ben Elliston <bje@wasabisystems.com>
* arm-dis.c (coprocessor_opcodes): The X-qualifier to WMADD may
only be used with the default multiply-add operation, so if N is
set, don't bother printing X. Add new iwmmxt instructions.
(IWMMXT_INSN_COUNT): Update.
(iwmmxt_wwssnames): Qualify "wwss" names at index 2, 6, 10 and 14
with a 'c' suffix.
(print_insn_coprocessor): Check for iWMMXt2. Handle format
specifiers 'r', 'i'.
Add xref to "Symbol Names".
(L): Refer to "local symbols" instead of "local labels". Move
definition to "Symbol Names" section; add xref to that section.
(Symbol Names): Use "Local Symbol Names" section to define local
symbols. Add "Local Labels" heading for description of temporary
forward/backward labels, and refer to those as "local labels".
gas/
* config/tc-arm.c (do_neon_dyadic_if_i): Remove.
(do_neon_dyadic_if_i_d): Avoid setting U bit.
(do_neon_mac_maybe_scalar): Ditto.
(do_neon_dyadic_narrow): Force operand type to NT_integer.
(insns): Remove out of date comments.
gas/testsuite/
* gas/arm/neon-cov.s: Test .u and .s aliases for .i suffixes.
* gas/arm/neon-cov.d: Adjust expected output.
opcodes/
* arm-dis.c (neon_opcode): Fix suffix on VMOVN.
compiler complaints about it being used without being initialized.
(s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
s_float_space, s_struct, cons_worker, equals): Likewise.
* elf32-xtensa.c (xtensa_get_property_section_name): Delete.
(xtensa_get_property_section): New.
(xtensa_read_table_entries): Use xtensa_get_property_section.
(relax_property_section, xtensa_get_property_predef_flags): Handle
group name suffixes in property section names.
(match_section_group): New.
gas/
* config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
(INIT_LITERAL_SECTION_NAME): Delete.
(lit_state struct): Remove segment names, init_lit_seg, and
fini_lit_seg. Add lit_prefix and current_text_seg.
(init_literal_head_h, init_literal_head): Delete.
(fini_literal_head_h, fini_literal_head): Delete.
(xtensa_begin_directive): Move argument parsing to
xtensa_literal_prefix function.
(xtensa_end_directive): Deallocate lit_prefix field of lit_state.
(xtensa_literal_prefix): Parse the directive argument here and
record it in the lit_prefix field. Remove code to derive literal
section names.
(linkonce_len): New.
(get_is_linkonce_section): Use linkonce_len. Check for any
".gnu.linkonce.*" section, not just text sections.
(md_begin): Remove initialization of deleted lit_state fields.
(xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
to init_literal_head and fini_literal_head.
(xtensa_move_literals): Likewise. Skip literals for .init and .fini
when traversing literal_head list.
(match_section_group): New.
(cache_literal_section): Rewrite to determine the literal section
name on the fly, create the section and return it.
(xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
(xtensa_switch_to_non_abs_literal_fragment): Likewise.
(xtensa_create_property_segments, xtensa_create_xproperty_segments):
Use xtensa_get_property_section from bfd.
(retrieve_xtensa_section): Delete.
* doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
description to refer to plural literal sections and add xref to
the Literal Directive section.
(Literal Directive): Describe new rules for deriving literal section
names. Add footnote for special case of .init/.fini with
--text-section-literals.
(Literal Prefix Directive): Replace old naming rules with xref to the
Literal Directive section.
ld/
* emulparams/elf32xtensa.sh (.xt.prop): Add .xt.prop.*.
* scripttempl/elfxtensa.sc (.text): Add .literal.*.
