Commit graph

515 commits

Author SHA1 Message Date
Stephane Carrez
7eccd7f6f1 * m68hc11-opc.c: Update call operand to accept the page definition.
Identify instructions that are branches and calls to generate a
	RL_JUMP relocation.
2002-08-13 19:09:01 +00:00
Stephane Carrez
f07534f64e * m68hc11-dis.c (print_insn): Take into account 68HC12 memory
banks and fix disassembling of call instruction.
	(print_indexed_operand): New param to tell whether
	it was an indirect addressing operand (for disassembling call).
2002-08-13 19:01:25 +00:00
Nick Clifton
2b692c5912 Updated Swedish translation 2002-08-09 15:07:57 +00:00
Maciej W. Rozycki
0c11417f42 * config/tc-mips.c (macro): Handle a register plus a 16-bit
immediate offset in "dla" and "la" expansions.
* gas/mips/empic.d: Treat "addiu" and "daddiu" as equivalent when
$0 is source.
* mips-opc.c (mips_builtin_opcodes): Remove "dla" and "la" as
aliases to "daddiu" and "addiu".
2002-08-09 11:07:24 +00:00
Nick Clifton
83e1617e06 Updated Translations 2002-07-30 15:53:18 +00:00
Nick Clifton
219576a4db New translations 2002-07-25 10:31:28 +00:00
Nick Clifton
ff3063f557 Update Spanish and Swedish translations 2002-07-24 09:34:08 +00:00
Alan Modra
8c3bb577a6 * Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
	* po/POTFILES.in: Regenerate.
2002-07-23 12:42:32 +00:00
Nick Clifton
2c71db8993 oops - omitted from previous delta 2002-07-23 09:59:47 +00:00
Nick Clifton
0461a601af update translations. 2002-07-23 09:58:05 +00:00
Nick Clifton
a40cbfa3c9 Add IP2k GAS and OPCODES support. 2002-07-19 07:52:40 +00:00
H.J. Lu
ae66e5d720 2002-07-17 David Mosberger <davidm@hpl.hp.com>
* ia64-opc-b.c (bWhc): New macro.
	(mWhc): Ditto.
	(OpPaWhcD): Ditto.
	(ia64_opcodes_b): Correct patterns for indirect call
	instructions to use 3-bit "wh" field.
	* ia64-asmtab.c: Regnerate.
2002-07-17 07:27:40 +00:00
Thiemo Seufer
aec421e08b * config/tc-mips.c (macro_build): Handle MIPS16 insns.
(mips_ip): Likewise.
	* mips.h (INSN_MIPS16): New define.
	* mips-dis.c (mips_isa_type): Add MIPS16 insn handling.
	* mips-opc.c (I16): New define.
	(mips_builtin_opcodes): Make jalx an I16 insn.
2002-07-09 14:21:40 +00:00
Dave Brolley
fd3c93d5a7 2002-06-18 Dave Brolley <brolley@redhat.com>
* po/POTFILES.in: Add frv-*.[ch].
	* disassemble.c (ARCH_frv): New macro.
	(disassembler): Handle bfd_arch_frv.
	* configure.in: Support frv_bfd_arch.
	* Makefile.am (HFILES): Add frv-*.h.
	(CFILES): Add frv-*.c
	(ALL_MACHINES): Add frv-*.lo.
	(CLEANFILES): Add stamp-frv.
	(FRV_DEPS): New variable.
	(stamp-frv): New target.
	(frv-asm.lo): New target.
	(frv-desc.lo): New target.
	(frv-dis.lo): New target.
	(frv-ibld.lo): New target.
	(frv-opc.lo): New target.
	(frv-*.[ch]): New files.
2002-06-18 21:21:05 +00:00
Ben Elliston
bc98a6310f * Makefile.am (CGENDEPS): Remove unnecessary stamp-cgen.
* Makefile.in: Regenerate.
2002-06-18 17:43:07 +00:00
Alan Modra
56da5fedc7 * a29k-dis.c: Replace CONST with const.
* h8300-dis.c: Likewise.
	* m68k-dis.c: Likewise.
	* or32-dis.c: Likewise.
	* sparc-dis.c: Likewise.
2002-06-08 07:29:27 +00:00
Jason Thorpe
5b0e55b627 bfd:
* Makefile.am (BFD32_BACKENDS): Add elf32-sh64-nbsd.lo.
(BFD32_BACKENDS_CFILES): Add elf32-sh64-nbsd.c.
(BFD64_BACKENDS): Add elf64-sh64-nbsd.lo.
(BFD64_BACKENDS_CFILES): Add elf64-sh64-nbsd.c.
(elf32-sh64-nbsd.lo, elf64-sh64-nbsd.lo): New rules.
* Makefile.in: Regenerate.
* config.bfd (sh5le-*-netbsd*, sh5-*-netbsd*, sh64le-*-netbsd*)
(sh64-*-netbsd*): New targets.
* configure.in: Add bfd_elf32_sh64nbsd_vec, bfd_elf32_sh64lnbsd_vec,
bfd_elf64_sh64nbsd_vec, and bfd_elf64_sh64lnbsd_vec.
* configure: Regenerate.
* elf32-sh64-nbsd.c: New file.
* elf64-sh64-nbsd.c: New file.
* targets.c: Add extern decls for bfd_elf32_sh64nbsd_vec,
bfd_elf32_sh64lnbsd_vec, bfd_elf64_sh64nbsd_vec, and
bfd_elf64_sh64lnbsd_vec.

gas:
* configure.in (sh5*): Set cpu_type to sh64 and endian to big.
(sh5le*, sh64le*): Set cpu_type to sh64 and endian to little.
(sh5*-*-netbsd*, sh64*-*-netbsd*): New targets.
* configure: Regenerate.
* config/tc-sh64.c (sh64_target_format): Add support for NetBSD
environment.

ld:
* Makefile.am (ALL_EMULATIONS): Add eshelf32_nbsd.o,
eshlelf32_nbsd.o, eshelf64_nbsd.o, and eshlelf64_nbsd.o.
(eshelf32_nbsd.c, eshelf64_nbsd.c, eshlelf32_nbsd.c)
(eshlelf64_nbsd.c): New rules.
* Makefile.in: Regenerate.
* configure.tgt (sh5le-*-netbsd*, sh5-*-netbsd*, sh64le-*-netbsd*)
(sh64-*-netbsd*): New targets.
* emulparams/shelf32_nbsd.sh: New file.
* emulparams/shelf64_nbsd.sh: New file.
* emulparams/shlelf32_nbsd.sh: New file.
* emulparams/shlelf64_nbsd.sh: New file.

opcodes:
* configure.in: Add "sh5*-*" to list of targets which include
sh64 support.
* configure: Regenerate.
2002-06-04 02:57:44 +00:00
Chris Demetriou
154bce22d5 2002-05-31 Chris G. Demetriou <cgd@broadcom.com>
* mips-opc.c: Clean up a few whitespace issues, and sort a
        few entries understanding that 'x' follows 'w' in the alphabet.
2002-05-31 20:46:07 +00:00
Chris Demetriou
107c6e1ad8 [ opcodes/ChangeLog ]
2002-05-31  Chris G. Demetriou  <cgd@broadcom.com>
            Ed Satterthwaite  <ehs@broadcom.com>

        * mips-opc.c: Add support for SB-1 MDMX subset and extensions.

[ gas/testsuite/ChangeLog ]
2002-05-31  Chris G. Demetriou  <cgd@broadcom.com>

        * gas/mips/sb1-ext-mdmx.s: New file.
        * gas/mips/sb1-ext-mdmx.d: Likewise.
        * gas/mips/mips.exp: Run new "sb1-ext-mdmx" test.
2002-05-31 18:27:03 +00:00
Alan Modra
194b521088 * Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
	* po/POTFILES.in: Regenerate.
2002-05-31 04:27:37 +00:00
Chris Demetriou
deec17343c [ gas/ChangeLog ]
2002-05-30  Chris G. Demetriou  <cgd@broadcom.com>
            Ed Satterthwaite  <ehs@broadcom.com>

	* config/tc-mips.c (mips_set_options): New "ase_mdmx" member.
	(mips_opts): Initialize "ase_mdmx" member.
	(file_ase_mdmx): New variable.
	(CPU_HAS_MDMX): New macro.
	(md_begin): Initialize mips_opts.ase_mdmx and file_ase_mdmx
	based on command line options and configuration defaults.
	(macro_build): Note in comment that use of MDMX in macros is
	not currently allowed.
	(validate_mips_insn): Add support for the "O", "Q", "X", "Y", and
	"Z" MDMX operand types.
	(mips_ip): Accept MDMX instructions if mips_opts.ase_mdmx is set,
	and add support for the "O", "Q", "X", "Y", and "Z" MDMX operand
	types.
	(OPTION_MDMX, OPTION_NO_MDMX, md_longopts, md_parse_option):
	Add support for "-mdmx" and "-no-mdmx" options.
	(OPTION_ELF_BASE): Move to accomodate new options.
	(s_mipsset): Support ".set mdmx" and ".set nomdmx".
	(mips_elf_final_processing): Set MDMX ASE ELF header flag if
	file_ase_mdmx was set.
	* doc/as.texinfo: Document -mdmx and -no-mdmx options.
	* doc/c-mips.texi: Likewise, and document ".set mdmx" and ".set
	nomdmx" directives.

[ gas/testsuite/ChangeLog ]
2002-05-30  Chris G. Demetriou  <cgd@broadcom.com>

	* gas/mips/mips64-mdmx.s: New file.
	* gas/mips/mips64-mdmx.d: Likewise.
	* gas/mips/mips.exp: Run new "mips64-mdmx" test.

[ include/opcode/ChangeLog ]
2002-05-30  Chris G. Demetriou  <cgd@broadcom.com>

	* mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL)
	(MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH)
	(MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC)
	(INSN_MDMX): New constants, for MDMX support.
	(opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX.

[ opcodes/ChangeLog ]
2002-05-30  Chris G. Demetriou  <cgd@broadcom.com>
            Ed Satterthwaite  <ehs@broadcom.com>

	* mips-dis.c (print_insn_arg): Add support for 'O', 'Q', 'X', 'Y',
	and 'Z' formats, for MDMX.
        (mips_isa_type): Add MDMX instructions to the ISA
	bit mask for bfd_mach_mipsisa64.
	* mips-opc.c: Add support for MDMX instructions.
	(MX): New definition.

	* mips-dis.c: Update copyright years to include 2002.
2002-05-31 01:17:18 +00:00
Tom Rix
c20129930b Fix for invalid conflict warning. 2002-05-30 15:25:37 +00:00
Nick Clifton
d172d4ba03 Add DLX target 2002-05-28 14:08:47 +00:00
Alan Modra
19f33eeef5 * Makefile.am (sh-dis.lo): Don't put make commands in deps.
* Makefile.in: Regenerate.
	* arc-dis.c: Use #include "" instead of <> for local header files.
	* m68k-dis.c: Likewise.
2002-05-25 12:55:19 +00:00
Nick Clifton
baf0cc5e96 Fix handling of BLX instruction to conform to Operations definition in the
ARM ARM.
2002-05-23 12:48:23 +00:00
Joern Rennecke
9ccc8931b8 * Makefile.am (sh-dis.lo): Compile with @archdefs@.
* Makefile.in: regenerate.
2002-05-22 19:18:16 +00:00
Joern Rennecke
4ee33023a0 Avoid dereferencing null pointer in:
* sh-dis.c (print_insn_sh): If coff and bfd_mach_sh, use arch_sh4
	for disassembly.
2002-05-22 18:16:45 +00:00
Joern Rennecke
426e6456c0 * sh-dis.c (print_insn_sh): If coff and bfd_mach_sh, use arch_sh4
for disassembly.
2002-05-22 13:17:27 +00:00
Thiemo Seufer
771c7ce4bc ? gas/testsuite/gas/mips/rol64.d
? gas/testsuite/gas/mips/rol64.s
Index: gas/ChangeLog
===================================================================
RCS file: /cvs/src/src/gas/ChangeLog,v
retrieving revision 1.1334
diff -u -p -r1.1334 ChangeLog
--- gas/ChangeLog	21 May 2002 20:01:51 -0000	1.1334
+++ gas/ChangeLog	21 May 2002 23:32:51 -0000
@@ -1,3 +1,8 @@
+2002-05-22  Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
+
+	* config/tc-mips.c (macro2): Add 64 bit drol, dror macros.
+	Optimize the rotate by zero case.
+
 2002-05-21  Nick Clifton  <nickc@cambridge.redhat.com>

 	* configure.in: Remove accidental enabling of bfd_gas=yes for
Index: gas/config/tc-mips.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-mips.c,v
retrieving revision 1.123
diff -u -p -r1.123 tc-mips.c
--- gas/config/tc-mips.c	14 May 2002 23:35:59 -0000	1.123
+++ gas/config/tc-mips.c	21 May 2002 23:32:52 -0000
@@ -6686,6 +6686,17 @@ macro2 (ip)
       --mips_opts.noreorder;
       break;

+    case M_DROL:
+      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsubu",
+		   "d,v,t", AT, 0, treg);
+      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsrlv",
+		   "d,t,s", AT, sreg, AT);
+      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsllv",
+		   "d,t,s", dreg, sreg, treg);
+      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
+		   "d,v,t", dreg, dreg, AT);
+      break;
+
     case M_ROL:
       macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "subu",
 		   "d,v,t", AT, 0, treg);
@@ -6697,15 +6708,55 @@ macro2 (ip)
 		   "d,v,t", dreg, dreg, AT);
       break;

+    case M_DROL_I:
+      {
+	unsigned int rot;
+	char *l, *r;
+
+	if (imm_expr.X_op != O_constant)
+	  as_bad (_("rotate count too large"));
+	rot = imm_expr.X_add_number & 0x3f;
+	if (! rot)
+	  break;
+	l = (rot < 0x20) ? "dsll" : "dsll32";
+	r = ((0x40 - rot) < 0x20) ? "dsrl" : "dsrl32";
+	rot &= 0x1f;
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, l,
+		     "d,w,<", AT, sreg, rot);
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, r,
+		     "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f);
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
+		     "d,v,t", dreg, dreg, AT);
+      }
+      break;
+
     case M_ROL_I:
-      if (imm_expr.X_op != O_constant)
-	as_bad (_("rotate count too large"));
-      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll", "d,w,<",
-		   AT, sreg, (int) (imm_expr.X_add_number & 0x1f));
-      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl", "d,w,<",
-		   dreg, sreg, (int) ((0 - imm_expr.X_add_number) & 0x1f));
-      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", "d,v,t",
-		   dreg, dreg, AT);
+      {
+	unsigned int rot;
+
+	if (imm_expr.X_op != O_constant)
+	  as_bad (_("rotate count too large"));
+	rot = imm_expr.X_add_number & 0x1f;
+	if (! rot)
+	  break;
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll",
+		     "d,w,<", AT, sreg, rot);
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl",
+		     "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f);
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
+		     "d,v,t", dreg, dreg, AT);
+      }
+      break;
+
+    case M_DROR:
+      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsubu",
+		   "d,v,t", AT, 0, treg);
+      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsllv",
+		   "d,t,s", AT, sreg, AT);
+      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsrlv",
+		   "d,t,s", dreg, sreg, treg);
+      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
+		   "d,v,t", dreg, dreg, AT);
       break;

     case M_ROR:
@@ -6719,15 +6770,44 @@ macro2 (ip)
 		   "d,v,t", dreg, dreg, AT);
       break;

+    case M_DROR_I:
+      {
+	unsigned int rot;
+	char *l, *r;
+
+	if (imm_expr.X_op != O_constant)
+	  as_bad (_("rotate count too large"));
+	rot = imm_expr.X_add_number & 0x3f;
+	if (! rot)
+	  break;
+	r = (rot < 0x20) ? "dsrl" : "dsrl32";
+	l = ((0x40 - rot) < 0x20) ? "dsll" : "dsll32";
+	rot &= 0x1f;
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, r,
+		     "d,w,<", AT, sreg, rot);
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, l,
+		     "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f);
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
+		     "d,v,t", dreg, dreg, AT);
+      }
+      break;
+
     case M_ROR_I:
-      if (imm_expr.X_op != O_constant)
-	as_bad (_("rotate count too large"));
-      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl", "d,w,<",
-		   AT, sreg, (int) (imm_expr.X_add_number & 0x1f));
-      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll", "d,w,<",
-		   dreg, sreg, (int) ((0 - imm_expr.X_add_number) & 0x1f));
-      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", "d,v,t",
-		   dreg, dreg, AT);
+      {
+	unsigned int rot;
+
+	if (imm_expr.X_op != O_constant)
+	  as_bad (_("rotate count too large"));
+	rot = imm_expr.X_add_number & 0x1f;
+	if (! rot)
+	  break;
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl",
+		     "d,w,<", AT, sreg, rot);
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll",
+		     "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f);
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
+		     "d,v,t", dreg, dreg, AT);
+      }
       break;

     case M_S_DOB:
Index: gas/testsuite/ChangeLog
===================================================================
RCS file: /cvs/src/src/gas/testsuite/ChangeLog,v
retrieving revision 1.315
diff -u -p -r1.315 ChangeLog
--- gas/testsuite/ChangeLog	20 May 2002 17:05:34 -0000	1.315
+++ gas/testsuite/ChangeLog	21 May 2002 23:32:54 -0000
@@ -1,3 +1,9 @@
+2002-05-22  Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
+
+	* gas/mips/rol64.s: New file, test of drol, dror macros.
+	* gas/mips/rol64.d: Likewise.
+	* gas/mips/mips.exp: Add new test.
+
 2002-05-20  Nick Clifton  <nickc@cambridge.redhat.com>

 	* gas/arm/arm.exp: Replace deprecated command line switches
Index: gas/testsuite/gas/mips/mips.exp
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/mips/mips.exp,v
retrieving revision 1.32
diff -u -p -r1.32 mips.exp
--- gas/testsuite/gas/mips/mips.exp	4 Apr 2002 08:23:30 -0000	1.32
+++ gas/testsuite/gas/mips/mips.exp	21 May 2002 23:32:54 -0000
@@ -122,6 +122,7 @@ if { [istarget mips*-*-*] } then {
 	run_dump_test "mul"
     }
     run_dump_test "rol"
+    run_dump_test "rol64"
     if !$aout { run_dump_test "sb" }
     run_dump_test "trunc"
     if !$aout { run_dump_test "ulh" }
Index: include/opcode/ChangeLog
===================================================================
RCS file: /cvs/src/src/include/opcode/ChangeLog,v
retrieving revision 1.167
diff -u -p -r1.167 ChangeLog
--- include/opcode/ChangeLog	17 May 2002 19:01:03 -0000	1.167
+++ include/opcode/ChangeLog	21 May 2002 23:32:57 -0000
@@ -1,3 +1,7 @@
+2002-05-22  Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
+
+	* mips.h: Add M_DROL, M_DROL_I, M_DROR, M_DROR_I macro cases.
+
 2002-05-17  Andrey Volkov  <avolkov@sources.redhat.com>

         * h8300.h: Corrected defs of all control regs
Index: include/opcode/mips.h
===================================================================
RCS file: /cvs/src/src/include/opcode/mips.h,v
retrieving revision 1.24
diff -u -p -r1.24 mips.h
--- include/opcode/mips.h	16 Mar 2002 03:09:18 -0000	1.24
+++ include/opcode/mips.h	21 May 2002 23:32:57 -0000
@@ -526,9 +526,13 @@ enum
   M_REM_3I,
   M_REMU_3,
   M_REMU_3I,
+  M_DROL,
   M_ROL,
+  M_DROL_I,
   M_ROL_I,
+  M_DROR,
   M_ROR,
+  M_DROR_I,
   M_ROR_I,
   M_S_DA,
   M_S_DOB,
Index: opcodes/ChangeLog
===================================================================
RCS file: /cvs/src/src/opcodes/ChangeLog,v
retrieving revision 1.447
diff -u -p -r1.447 ChangeLog
--- opcodes/ChangeLog	17 May 2002 14:36:45 -0000	1.447
+++ opcodes/ChangeLog	21 May 2002 23:33:00 -0000
@@ -1,3 +1,7 @@
+2002-05-22  Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
+
+	* mips-opc.c (mips_builtin_opcodes): Add drol, dror macros.
+
 Fri May 17 14:26:44 2002  J"orn Rennecke <joern.rennecke@superh.com>

 	* disassemble.c (disassembler): Just use print_insn_sh for bfd_arch_sh.
Index: opcodes/mips-opc.c
===================================================================
RCS file: /cvs/src/src/opcodes/mips-opc.c,v
retrieving revision 1.32
diff -u -p -r1.32 mips-opc.c
--- opcodes/mips-opc.c	17 Mar 2002 02:42:25 -0000	1.32
+++ opcodes/mips-opc.c	21 May 2002 23:33:00 -0000
@@ -492,6 +492,10 @@ const struct mips_opcode mips_builtin_op
 {"dremu",   "z,s,t",    0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HILO,      I3      },
 {"dremu",   "d,v,t",	3,    (int) M_DREMU_3,	INSN_MACRO,		I3	},
 {"dremu",   "d,v,I",	3,    (int) M_DREMU_3I,	INSN_MACRO,		I3	},
+{"drol",    "d,v,t",	0,    (int) M_DROL,	INSN_MACRO,		I3	},
+{"drol",    "d,v,I",	0,    (int) M_DROL_I,	INSN_MACRO,		I3	},
+{"dror",    "d,v,t",	0,    (int) M_DROR,	INSN_MACRO,		I3	},
+{"dror",    "d,v,I",	0,    (int) M_DROR_I,	INSN_MACRO,		I3	},
 {"dsllv",   "d,t,s",	0x00000014, 0xfc0007ff,	WR_d|RD_t|RD_s,		I3	},
 {"dsll32",  "d,w,<",	0x0000003c, 0xffe0003f, WR_d|RD_t,		I3	},
 {"dsll",    "d,w,s",	0x00000014, 0xfc0007ff,	WR_d|RD_t|RD_s,		I3	}, /* dsllv */
2002-05-21 23:54:48 +00:00
Joern Rennecke
1c509ca821 print_insn_sh cleanup:
include:
	* dis-asm.h (print_insn_shl, print_insn_sh64l): Remove prototype.
gdb:
	* sh-tdep.c (gdb_print_insn_sh64): Delete.
	(gdb_print_insn_sh): Just set info->endian and use print_insn_sh.
	(sh_gdbarch_init): Always use gdb_print_insn_sh.
opcodes:
	* disassemble.c (disassembler): Just use print_insn_sh for bfd_arch_sh.
	* sh-dis.c (LITTLE_BIT): Delete.
	(print_insn_sh, print_insn_shl): Deleted.
	(print_insn_shx): Renamed to
	(print_insn_sh).  No longer static.  Handle SHmedia instructions.
	Use info->endian to determine endianness.
	* sh64-dis.c (print_insn_sh64, print_insn_sh64l): Delete.
	(print_insn_sh64x): No longer static.  Renamed to
	(print_insn_sh64).  Removed pfun_compact and endian arguments.
	If we got an uneven address to indicate SHmedia, adjust it.
	Return -2 for SHcompact instructions.
sim/sh64:
	* sim-if.c (sh64_disassemble_insn): Use  print_insn_sh instead of
	print_insn_shl.
2002-05-17 14:36:46 +00:00
Alan Modra
81172ff2bd * acinclude.m4 (AM_INSTALL_LIBBFD): Fake to fool autotools.
* configure.in: Invoke AM_INSTALL_LIBBFD.
	* Makefile.am (install-data-local): Move to..
	(install_libopcodes): .. New target.
	(uninstall_libopcodes): Likewise.
	(install-bfdlibLTLIBRARIES): Likewise.
	(uninstall-bfdlibLTLIBRARIES): Likewise.
	(bfdlibdir): New.
	(bfdincludedir): New.
	(lib_LTLIBRARIES): Rename to bfdlib_LTLIBRARIES.
	* aclocal.m4: Regenerate.
	* configure: Regenerate.
	* Makefile.in: Regenerate.
2002-05-17 10:34:29 +00:00
Nick Clifton
a978a3e5d8 Regernate cgen built files. 2002-05-15 20:54:50 +00:00
Thiemo Seufer
563773fe03 * mips-dis.c (is_newabi): EABI is not a NewABI. 2002-05-14 23:34:00 +00:00
Jason Thorpe
942e7dd911 * configure.in (shle-*-*elf*): Include sh64 support.
* configure: Regenerate.
2002-05-13 15:39:44 +00:00
Jason Thorpe
d85cdfabd5 * vax-dis.c (print_insn_arg): Pass the insn info to print_insn_mode.
(print_insn_mode): Print some basic info about floating point values.
2002-05-09 23:11:30 +00:00
Alan Modra
c1a34e6066 * ppc-opc.c: Add "tlbiel" for POWER4. 2002-05-09 11:15:47 +00:00
Graydon Hoare
748f46d42a [ cgen/ChangeLog ]
2002-05-01  Graydon Hoare  <graydon@redhat.com>

	* desc-cpu.scm (@arch@_cgen_cpu_close): Fix memory leaks.

[ opcodes/ChangeLog ]

2002-05-07  Graydon Hoare  <graydon@redhat.com>

	* cgen-dis.in: (print_insn_@arch@): Cache list of opened CPUs rather
	than just most-recently-opened.
2002-05-08 20:47:07 +00:00
Alan Modra
7d4a12d20f * ppc-opc.c: Add "tlbsx." and "tlbsxe." for booke. 2002-05-01 01:22:00 +00:00
Nick Clifton
3c25c5f6e8 The patch contains mostly fixes for the disassembler. It also fixes
a crash of the assembler with some malformed source input.
Long segmented addresses are now correctly relocated.
Finally it updates my email address in the MAINTAINERS file.
2002-04-25 10:59:24 +00:00
Nick Clifton
c6ed57bdd2 Add Indonesian translation 2002-04-24 09:01:51 +00:00
Matthew Green
eb0fdfed10 * gas/ppc/altivec.d: Fix dssall test.
* gas/ppc/altivec.s: Likewise.
	* gas/ppc/altivec_xcoff.d: Likewise.
	* gas/ppc/altivec_xcoff.s: Likewise.
	* gas/ppc/altivec_xcoff64.d: Likewise.
	* gas/ppc/altivec_xcoff64.s: Likewise.

	* ppc-opc.c (powerpc_opcode): Fix dssall operand list.
2002-04-17 14:43:28 +00:00
Matthew Green
0565ba9601 fix a typo in my name 2002-04-07 13:56:38 +00:00
Alan Modra
82674a1fec * dep-in.sed: Cope with absolute paths.
* Makefile.am (dep.sed): Subst TOPDIR.
	Run "make dep-am".
	* Makefile.in: Regenerate.
	* ppc-opc.c: Whitespace.
	* s390-dis.c: Fix copyright date.
2002-04-04 14:05:44 +00:00
Matthew Green
294b41b344 * ppc-opc.c (vmaddfp): Fix operand order. 2002-03-23 14:14:30 +00:00
Alan Modra
71b2105039 * Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
2002-03-21 09:23:41 +00:00
Alan Modra
5ae2e65e90 * ppc-opc.c: Add optional field to mtmsrd.
(MTMSRD_L, XRLARB_MASK): Define.
2002-03-21 09:01:49 +00:00
Jan Hubicka
c1a64871f9 * i386-dis.c (prefix_name): Fix handling of 32bit address prefix
in 64bit mode.
	(print_insn) Likewise.
	(putop): Fix handling of 'E'
	(OP_E, OP_OFF): handle 32bit addressing mode in 64bit.
	(ptr_reg): Likewise.
2002-03-18 20:11:49 +00:00
Nick Clifton
a1c259a138 Updated French translations 2002-03-18 09:44:22 +00:00
Chris Demetriou
444269101d 2002-03-16 Chris Demetriou <cgd@broadcom.com>
* mips-opc.c (M3D): Tweak comment.
        (mips_builtin_op): Add comment indicating that opcodes of the
        same name must be placed together in the table, and sort
        the "recip.fmt", "recip1.fmt", "recip2.fmt", "rsqrt.fmt",
        "rsqrt1.fmt", and "rsqrt2.fmt" opcodes by name.
2002-03-17 02:42:25 +00:00
Nick Clifton
43079f18a8 Tidy up sh64 rules 2002-03-16 08:55:53 +00:00