PENDING_FILL. Use PENDING_SCHED directly to handle the pending
set of the FCSR.
* sim-main.h (COCIDX): Remove definition; this isn't supported by
PENDING_FILL, and you can get the intended effect gracefully by
calling PENDING_SCHED directly.
* merge from internal repo -> sourceware
2000-03-02 Frank Ch. Eigler <fche@redhat.com>
* configure: Regenerated.
Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
* interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
calls, conditional on the simulator being in verbose mode.
1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
* interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
(load_word): Call SIM_CORE_SIGNAL hook on error.
(signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
starting. For exception dispatching, pass PC instead of NULL_CIA.
(decode_coproc): Use COP0_BADVADDR to store faulting address.
* sim-main.h (COP0_BADVADDR): Define.
(SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
(SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
(_sim_cpu): Add exc_* fields to store register value snapshots.
* mips.igen (*): Replace memory-related SignalException* calls
with references to SIM_CORE_SIGNAL hook.
* dv-tx3904irc.c (tx3904irc_port_event): printf format warning
fix.
* sim-main.c (*): Minor warning cleanups.
Set mips_fpu, and mips_fpu_bitsize.
Set sim_gen, and sim_igen_machine.
* configure: Rebuild.
* mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
* sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
* Followup patch for SCEI PR 15853
* First check-in of TX3904 interrupt controller devices for ECC. [sanitized]
* First implementation of MIPS hardware interrupt emulation.
Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
* configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
modules. Recognize TX39 target with "mips*tx39" pattern.
* configure: Rebuilt.
* sim-main.h (*): Added many macros defining bits in
TX39 control registers.
(SignalInterrupt): Send actual PC instead of NULL.
(SignalNMIReset): New exception type.
* interp.c (board): New variable for future use to identify
a particular board being simulated.
(mips_option_handler,mips_options): Added "--board" option.
(interrupt_event): Send actual PC.
(sim_open): Make memory layout conditional on board setting.
(signal_exception): Initial implementation of hardware interrupt
handling. Accept another break instruction variant for simulator
exit.
(decode_coproc): Implement RFE instruction for TX39.
(mips.igen): Decode RFE instruction as such.
start-sanitize-tx3904
* configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
* interp.c: Define "jmr3904" and "jmr3904debug" board types and
bbegin to implement memory map.
* dv-tx3904cpu.c: New file.
* dv-tx3904irc.c: New file.
end-sanitize-tx3904
Replace check_op_hilo with check_mult_hilo and check_div_hilo.
Add special r3900 version of do_mult_hilo.
(do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
with calls to check_mult_hilo.
(do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
with calls to check_div_hilo.
masking facility for PATH3 transfers.
[ChangeLog.sky]
Sun Apr 5 12:11:45 1998 Frank Ch. Eigler <fche@cygnus.com>
* sky-libvpe.c (exec-inst): Added "M" bit detection for upper
instruction.
* sky-pke.c (pke_check_stall): Added more assertions.
(pke_code_mskpath3): Use new GPUIF M3P control register.
* sky-pke.h (VU[01]_CIA): New macros that give VU CIA
pseudo-register addresses.
* sky-vu.h (vu_device, VectorUnitState): Merged structs.
(VectorUnitState.mflag): New field.
(VU_REG_{CMSAR0,CMSAR1,FBRST}) Added missing control registers.
* sky-vu.c (vu0_busy): New function.
(vu0_q_busy): New function.
(vu0_macro_issue): New function.
(vu0_micro_interlock_released): New function.
(vu0_busy_in_{micro,macro}_mode): Deleted stubs.
(vu0_macro_hazard_check): Deleted stubs.
(vu_attach): Adapted code to merged device & state struct.
(read_vu_special_reg): Compute VBS0/VBS1 bits in STAT register.
[ChangeLog]
start-sanitize-sky
Sun Apr 5 12:05:44 1998 Frank Ch. Eigler <fche@cygnus.com>
* interp.c (*): Adapt code to merged VU device & state structs.
(decode_coproc): Execute COP2 each macroinstruction without
pipelining, by stepping VU to completion state. Adapted to
read_vu_*_reg style of register access.
* mips.igen ([SL]QC2): Removed these COP2 instructions.
* r5900.igen ([SL]QC2): Transplanted these COP2 instructions here.
* sim-main.h (cop_[ls]q): Enclosed in TARGET_SKY guards.
end-sanitize-sky
into single PKE-style vu.[ch].
[ChangeLog]
Fri Mar 27 16:19:29 1998 Frank Ch. Eigler <fche@cygnus.com>
start-sanitize-sky
* Makefile.in (SIM_SKY_OBJS): Replaced sky-vu[01].o with sky-vu.o.
* interp.c (sim_{load,store}_register): Use new vu[01]_device
static to access VU registers.
(decode_coproc): Added skeleton of sky COP2 (VU) instruction
decoding. Work in progress.
* mips.igen (LDCzz, SDCzz): Removed *5900 case for this
overlapping/redundant bit pattern.
(LQC2, SQC2): Added *5900 COP2 instruction skeleta. Work in
progress.
* sim-main.h (status_CU[012]): Added COP[n]-enabled flags for
status register.
end-sanitize-sky
* interp.c (cop_lq, cop_sq): New functions for future 128-bit
access to coprocessor registers.
* sim-main.h (COP_LQ, COP_SQ): New macro front-ends for above.
[ChangeLog.sky]
* sky-engine.c (engine_run): Adapted from vu[01] -> vu merge.
* sky-hardware.c (register_devices): Ditto
* sky-pke.c (pke_fifo_*): Made these functions private again, now
that the GPUIF code does not use them.
* sky-pke.h (pke_fifo_*): Removed newly private declarations.
* sky-vu.c (*): Major rework: merge of old sky-vu0.c and
sky-vu1.c. Management of two VU devices parallels two PKEs.
Work in progress.
* sky-vu.h (*): Other half of merge.
(vu_device): New struct, parallel to pke_device.
little struct.
interp.c: Update. Also add floating point Max/Min functions.
mips.igen: Remove r5900 tag from any floating point instructions.
r5900.igen: Rewrite. Implement *all* floating point insns (except ld/st).
r5400.igen: Tag mdmx functions as being mdmx specific.
MIPS simulator so that correctly writes the value of CIA back int PC
(the global previously used) when the simulation halts.
Fix implementation of DELAY_SLOT and NULLIFY_NEXT_INSTRUCTION macros.
