darkkirb/old-cross-binutils
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity
29182 commits 1 branch 0 tags 272 MiB
Commit graph

116 commits

Author SHA1 Message Date
Andrew Cagney
eb2d80b469 Change profiling so that it is enabled by default. Re-generate everything. 2000-05-24 04:39:50 +00:00
Andrew Cagney
ba744a4f56 Add missing ChangeLog. 
Sync with mitsu's version.
 2000-05-03 09:26:07 +00:00
Andrew Cagney
27842f65f2 Add support for SIGILL (reserved-instruction-exception). 2000-04-18 07:55:35 +00:00
Frank Ch. Eigler
8ae7f924f3 * moved misplaced ChangeLog entry 2000-03-04 12:46:44 +00:00
Andrew Cagney
baa7ae6f10 When SIM_HAVE_ENVIRONMENT: use sim_set_trace() to enable tracing 
instead of sim_trace() to run the program; include support for ``-o''
option (operating environment); when a signal occurs, only continue
execution when operating environment mode.
Update d10v.
 2000-02-22 08:52:21 +00:00
Jason Molenda
c3f6f71df3 import gdb-2000-01-05 snapshot 2000-01-06 03:07:20 +00:00
Jason Molenda
c2d11a7da0 import gdb-1999-12-06 snapshot 1999-12-07 03:56:43 +00:00
Jason Molenda
4ce44c668d import gdb-1999-11-16 snapshot 1999-11-17 02:31:06 +00:00
Jason Molenda
5c44784c11 import gdb-1999-11-01 snapshot 1999-11-02 04:44:47 +00:00
Jason Molenda
c2c6d25f0d import gdb-1999-09-21 1999-09-22 03:28:34 +00:00
Jason Molenda
cff3e48be7 import gdb-1999-09-13 snapshot 1999-09-13 21:40:00 +00:00
Stan Shebs
d4f3574e77 import gdb-1999-09-08 snapshot 1999-09-09 00:02:17 +00:00
Stan Shebs
cd0fc7c3eb import gdb-1999-05-10 1999-05-11 13:35:55 +00:00
Stan Shebs
7a292a7adf import gdb-19990422 snapshot 1999-04-26 18:34:20 +00:00
Stan Shebs
c906108c21 Initial creation of sourceware repository 1999-04-16 01:35:26 +00:00
Stan Shebs
071ea11e85 Initial creation of sourceware repository 1999-04-16 01:34:07 +00:00
Jason Molenda
df59058c91 1999-01-26 Jason Molenda (jsm@bugshack.cygnus.com) 
* simops.c (OP_5605): Sign extend MIN32 and MAX32 before saturation
        comparison.
        (OP_5607): Ditto.
        (OP_2A00): Ditto.
        (OP_2800): Ditto.

PRs 18435 18436 18437 18439.
 1999-01-27 01:51:26 +00:00
Nick Clifton
1ee490ca0b Fix PR 17387: ignore auto increment for loads where the destination register 
and the address register are the same.
 1998-09-30 17:15:14 +00:00
Tom Tromey
5da9ce07eb * configure: Regenerated to track ../common/aclocal.m4 changes. 
* config.in: Ditto.
	* acconfig.h: New file.
	* configure.in: Reverted change of Apr 24; use sinclude again.
 1998-04-26 22:03:55 +00:00
Tom Tromey
b1df34b9ed * configure: Regenerated to track ../common/aclocal.m4 changes. 
* config.in: Ditto.
	* configure.in: Don't call sinclude.
 1998-04-24 20:39:48 +00:00
Andrew Cagney
21566f9fbe * interp.c (struct hash_entry): OPCODE and MASK are unsigned. 
* d10v_sim.h (remote-sim.h, sim-config.h): Include.
 1998-04-24 09:54:16 +00:00
Andrew Cagney
e1fe7a7966 * configure.in (SIM_AC_OPTION_WARNINGS): Add. 
configure: Re-generate.
 1998-04-01 02:56:05 +00:00
Andrew Cagney
d8f5304972 Do top level sim-hw module for device tree. 
Add to aclocal.m4, update all configure files.
 1998-03-27 11:42:16 +00:00
Andrew Cagney
729295b597 Implement "dbt" and "rtd" instructions. 
Import fixes to dmap_addr() from mitsu branch.
 1998-02-16 00:35:57 +00:00
Andrew Cagney
ac9a7d8a2c Implement separate user (SPU) and interrupt (SPI) stack pointers. 1998-02-13 05:22:49 +00:00
Andrew Cagney
b41dff6b54 Don't abort() when system call is unknown. 1998-02-11 07:11:28 +00:00
Andrew Cagney
19431a0280 Ensure zero-hardwired bits in DPSW remain zero. 1998-02-11 06:34:30 +00:00
Andrew Cagney
412c4e940e Add config support for the size of the target address and OF cell. 1998-01-31 14:07:23 +00:00
Michael Meissner
629cfff05f Exit status is in r0, not r2 1998-01-26 03:23:55 +00:00
Michael Meissner
88f7d309fd If DEBUG has 0x20 set, turn traps into batch debugging 1998-01-25 00:13:19 +00:00
Michael Meissner
8831cb01b0 First round of d10v ABI changes 1998-01-23 16:30:08 +00:00
Fred Fish
cee687386d * interp.c (UMEM_SEGMENTS): New define, set to 128. 
(sim_size): Use UMEM_SEGMENTS rather than hardwired constant.
	(sim_close): Reset prog_bfd to NULL after closing it.  Also
	reset prog_bfd_was_opened_p after closing prog_bfd.
	(sim_load): Reset prog_bfd_was_opened_p after closing prog_bfd.
	(sim_create_inferior): Get start address from abfd not prog_bfd.
	(xfer_mem): Do bounds checking on addresses and return zero length
	read/write on bad addresses, rather than aborting.  Prepare to
	be able to handle xfers that cross segment boundaries, but not
	yet implemented.  Only emit debug message when d10v_debug is
	set as well as DEBUG being defined.
 1998-01-22 21:51:31 +00:00
Doug Evans
462cfbc4eb * aclocal.m4: Recognize --enable-maintainer-mode. 
*/configure: Regenerated.
 1998-01-20 06:37:00 +00:00
Andrew Cagney
38d0ccc27a Fix typo, REP_S was refering to REP_E register. 
Add test.
 1997-12-08 23:44:11 +00:00
Andrew Cagney
bc6df23d14 For "trap", IBT and RIE exceptions, mask all PSW.SM. NB: Stepping 
through an exception may not work correctly.
For GDB reads/writes to the control registers, ensure the cpu state is
updated correctly.
 1997-12-08 03:22:58 +00:00
Doug Evans
6e51f990a2 Regenerate configure files. 1997-12-04 17:26:06 +00:00
Andrew Cagney
7f48c9fe1d Add DM (bit 4) to PSW. See 7-1 for more info. 
Test.
 1997-12-04 07:01:30 +00:00
Andrew Cagney
aa49c64f3e * d10v_sim.h (SEXT56): Define. 
* simops.c (OP_4201): For "rac", sign extend 56 bit value before
it is shifted.
* d10v_sim.h (MAX32, MIN32, MASK32, MASK40): Re-define using
SIGNED64 macro.
 1997-12-03 08:03:33 +00:00
Fred Fish
193e528cd4 * interp.c (sim_resume): Call do_2_short with LEFT_FIRST or 
RIGHT_FIRST, as appropriate, instead of hardcoded ints that
	don't match enum values.
PR 13496
 1997-12-02 23:13:56 +00:00
Andrew Cagney
d294a657d5 For "msbu", subtract unsigned product from ACC, 
Test.
 1997-12-02 07:18:53 +00:00
Andrew Cagney
9420287ed2 For "mulxu", store unsigned product in ACC. 
Test.
 1997-12-02 06:37:09 +00:00
Andrew Cagney
ae55807561 For MACU add unsigned multiply to accumulator. 
Test.
 1997-12-02 05:18:27 +00:00
Andrew Cagney
51b057f27b For sub2w, compute carry according to negated addition rules. 
Test.
 1997-12-02 00:27:27 +00:00
Andrew Cagney
70ee56c585 Rework sim/common/sim-alu.h to differentiate between direcct 
subtraction (involves borrow) and negated addition (involves carry).
Update d30v so that it uses this method.  Add more tests.
 1997-12-01 06:27:02 +00:00
Andrew Cagney
87192c630a * simops.c (OP_4201): "rachi". Sign extend bit 40 of ACC. Sign 
extend bit 44 all constants.
(OP_4201): Replace GCC specific 0x..LL with SIGNED64 macro.
 1997-11-10 22:40:14 +00:00
Andrew Cagney
b5da31ac7c Correct name of file given in ChangeLog for change: Pass lma_p and 
sim_write args to sim_load_file.
 1997-10-25 05:04:25 +00:00
Andrew Cagney
1315b4cb60 Address MSC compiler issues in d10v_sim.h 1997-10-24 00:52:23 +00:00
Andrew Cagney
9e03a68f13 Add LMA_P and DO_WRITE arguments to sim/common/sim-load.c:sim_load_file(). 
Update all simulators.
Clarify behavour of sim_load in remote-sim.h
 1997-10-22 05:26:27 +00:00
Fred Fish
1155e06e3f * simops.c (OP_6A01): Change OP_POSTDEC to OP_POSTINC and move 
exception generation code to OP_6E01.
	(OP_6E01): Change OP_POSTINC to OP_POSTDEC and insert exception
	generation code.
PR 13550
 1997-10-13 18:26:52 +00:00
Fred Fish
93f0cb6975 * simops.c (OP_6401): postdecrement on r15 is OK, remove exception. 
(OP_6601): Ditto.
 1997-10-11 16:48:47 +00:00