darkkirb/old-cross-binutils

Author	SHA1	Message	Date
Alan Modra	500b1f4473	make dep-am and regen opcodes/ * Makefile.am (HFILES): Move lm32-desc.h and lm32-opc.h from.. (CFILES): ..here.	2009-03-03 02:41:14 +00:00
Nick Clifton	c3b7224ae4	Add support for Score7 architecture.	2009-03-02 10:33:08 +00:00
Ralf Wildenhues	58e2467181	Backport from git Libtool: 2009-01-19 Robert Millan <rmh@aybabtu.com> Support GNU/kOpenSolaris. * libltdl/m4/libtool.m4 (_LT_SYS_DYNAMIC_LINKER) (_LT_CHECK_MAGIC_METHOD, _LT_COMPILER_PIC, _LT_LINKER_SHLIBS) (_LT_LANG_CXX_CONFIG) [kopensolaris-gnu]: Recognize GNU/kOpenSolaris. binutils/ configure: Regenerate. opcodes/ * configure: Regenerate. bfd/ * configure: Regenerate. gas/ * configure: Regenerate. gprof/ * configure: Regenerate. ld/ * configure: Regenerate.	2009-03-01 18:57:19 +00:00
H.J. Lu	d6f574e0ed	2009-02-27 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (OP_EX): Call OP_E_memory instead of OP_E.	2009-02-27 20:13:04 +00:00
Peter Bergner	066be9f7bd	gas/ * config/tc-ppc.c (pre_defined_registers): Add "f32" to "f63", "f.32" to "f.63", "vs0" to "vs63" and "vs.0" to "vs.63". (parse_cpu): Extend -mpower7 to accept power7 and isel instructions. gas/testsuite/ * gas/ppc/e500mc.d ("wait", "waitsrv", "waitimpl"): Add tests. * gas/ppc/e500mc.s: Likewise. * gas/ppc/power6.d ("cdtbcd", "cbcdtd", "addg6s"): Add tests. * gas/ppc/power6.s: Likewise. * gas/ppc/power7.d ("lfdpx", "mffgpr", "mftgpr"): Remove invalid tests. ("wait", "waitsrv", "waitimpl", "divwe", "divwe.", "divweo", "divweo.", "divweu", "divweu.", "divweuo", "divweuo.", "bpermd", "popcntw", "popcntd", "ldbrx", "stdbrx", "lfiwzx", "lfiwzx", "fcfids", "fcfids.", "fcfidus", "fcfidus.", "fctiwu", "fctiwu.", "fctiwuz", "fctiwuz.", "fctidu", "fctidu.", "fctiduz", "fctiduz.", "fcfidu", "fcfidu.", "ftdiv", "ftdiv", "ftsqrt", "ftsqrt", "dcbtt", "dcbtstt", "dcffix", "dcffix.", "lbarx", "lbarx", "lbarx", "lharx", "lharx", "lharx", "stbcx.", "sthcx.", "fre", "fre.", "fres", "fres.", "frsqrte", "frsqrte.", "frsqrtes", "frsqrtes.", "isel"): Add tests. * gas/ppc/power7.s: Likewise. * gas/ppc/vsx.d: New test. * gas/ppc/vsx.s: Likewise. * gas/ppc/ppc.exp: Run it. include/opcode/ * ppc.h (PPC_OPCODE_POWER7): New. opcodes/ * ppc-dis.c (powerpc_init_dialect): Extend -Mpower7 to disassemble the power7 and the isel instructions. * ppc-opc.c (insert_xc6, extract_xc6): New static functions. (insert_dm, extract_dm): Likewise. (XB6): Update comment to include XX2 form. (WC, XC6, SHW, DMEX, UIM, XX2, XX3RC, XX4, XX2_MASK, XX2UIM_MASK, XX2BF_MASK, XX3BF_MASK, XX3SHW_MASK, XX4_MASK, XWC_MASK, POWER7): New. (RemoveXX3DM): Delete. (powerpc_opcodes): <"lfdp", "lfdpx", "mcrxr", "mftb", "mffgpr", "mftgpr">: Deprecate for POWER7. <"fres", "fres.", "frsqrtes", "frsqrtes.", "fre", "fre.", "frsqrte", "frsqrte.">: Deprecate the three operand form and enable the two operand form for POWER7 and later. <"wait">: Extend to accept optional parameter. Enable for POWER7. <"waitsrv", "waitimpl">: Add extended opcodes. <"ldbrx", "stdbrx">: Enable for POWER7. <"cdtbcd", "cbcdtd", "addg6s">: Add POWER6 opcodes. <"bpermd", "dcbtstt", "dcbtt", "dcffix.", "dcffix", "divde.", "divde", "divdeo.", "divdeo", "divdeu.", "divdeu", "divdeuo.", "divdeuo", "divwe.", "divwe", "divweo.", "divweo", "divweu.", "divweu", "divweuo.", "divweuo", "fcfids.", "fcfids", "fcfidu.", "fcfidu", "fcfidus.", "fcfidus", "fctidu.", "fctidu", "fctiduz.", "fctiduz", "fctiwu.", "fctiwu", "fctiwuz.", "fctiwuz", "ftdiv", "ftsqrt", "lbarx", "lfiwzx", "lharx", "popcntd", "popcntw", "stbcx.", "sthcx.">: Add POWER7 opcodes. <"lxsdux", "lxsdx", "lxvdsx", "lxvw4ux", "lxvw4x", "stxsdux", "stxsdx", "stxvw4ux", "stxvw4x", "xsabsdp", "xsadddp", "xscmpodp", "xscmpudp", "xscpsgndp", "xscvdpsp", "xscvdpsxds", "xscvdpsxws", "xscvdpuxds", "xscvdpuxws", "xscvspdp", "xscvsxddp", "xscvuxddp", "xsdivdp", "xsmaddadp", "xsmaddmdp", "xsmaxdp", "xsmindp", "xsmsubadp", "xsmsubmdp", "xsmuldp", "xsnabsdp", "xsnegdp", "xsnmaddadp", "xsnmaddmdp", "xsnmsubadp", "xsnmsubmdp", "xsrdpi", "xsrdpic", "xsrdpim", "xsrdpip", "xsrdpiz", "xsredp", "xsrsqrtedp", "xssqrtdp", "xssubdp", "xstdivdp", "xstsqrtdp", "xvabsdp", "xvabssp", "xvadddp", "xvaddsp", "xvcmpeqdp.", "xvcmpeqdp", "xvcmpeqsp.", "xvcmpeqsp", "xvcmpgedp.", "xvcmpgedp", "xvcmpgesp.", "xvcmpgesp", "xvcmpgtdp.", "xvcmpgtdp", "xvcmpgtsp.", "xvcmpgtsp", "xvcpsgnsp", "xvcvdpsp", "xvcvdpsxds", "xvcvdpsxws", "xvcvdpuxds", "xvcvdpuxws", "xvcvspdp", "xvcvspsxds", "xvcvspsxws", "xvcvspuxds", "xvcvspuxws", "xvcvsxddp", "xvcvsxdsp", "xvcvsxwdp", "xvcvsxwsp", "xvcvuxddp", "xvcvuxdsp", "xvcvuxwdp", "xvcvuxwsp", "xvdivdp", "xvdivsp", "xvmaddadp", "xvmaddasp", "xvmaddmdp", "xvmaddmsp", "xvmaxdp", "xvmaxsp", "xvmindp", "xvminsp", "xvmovsp", "xvmsubadp", "xvmsubasp", "xvmsubmdp", "xvmsubmsp", "xvmuldp", "xvmulsp", "xvnabsdp", "xvnabssp", "xvnegdp", "xvnegsp", "xvnmaddadp", "xvnmaddasp", "xvnmaddmdp", "xvnmaddmsp", "xvnmsubadp", "xvnmsubasp", "xvnmsubmdp", "xvnmsubmsp", "xvrdpi", "xvrdpic", "xvrdpim", "xvrdpip", "xvrdpiz", "xvredp", "xvresp", "xvrspi", "xvrspic", "xvrspim", "xvrspip", "xvrspiz", "xvrsqrtedp", "xvrsqrtesp", "xvsqrtdp", "xvsqrtsp", "xvsubdp", "xvsubsp", "xvtdivdp", "xvtdivsp", "xvtsqrtdp", "xvtsqrtsp", "xxland", "xxlandc", "xxlnor", "xxlor", "xxlxor", "xxmrghw", "xxmrglw", "xxsel", "xxsldwi", "xxspltd", "xxspltw", "xxswapd">: Add VSX opcodes.	2009-02-26 22:07:33 +00:00
H.J. Lu	4c664d7bf7	gas/ 2009-02-23 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (vex_imm4): Removed. (VEX_check_operands): Likewise. (match_template): Updated. opcodes/ 2009-02-23 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (operand_type_init): Remove OPERAND_TYPE_VEX_IMM4. (operand_types): Remove Vex_Imm4. * i386-opc.h (Vex_Imm4): Removed. (OTMax): Updated. (i386_operand_type): Remove vex_imm4. * i386-opc.tbl: Remove Vex_Imm4 comments. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.	2009-02-23 20:41:46 +00:00
Richard Earnshaw	4ce8808b2c	* arm-dis.c (neon_opcodes): Correct bit-mask and patterns for vq{r}shr{u}n.s64 insnstructions.	2009-02-23 14:58:34 +00:00
Peter Bergner	0e55be1624	gas/testsuite/ * gas/ppc/e500mc.d ("lfdepx", "stfdepx"): Fix tests to expect a floating point register. opcodes/ * ppc-opc.c (powerpc_opcodes) <"lfdepx", "stfdepx">: Fix the first operand to be a float point register (FRT/FRS).	2009-02-19 21:18:46 +00:00
Adam Nemet	b1c9882d1b	opcodes/ * mips-opc.c (mips_builtin_opcodes): Move the Octeon-specific dmfc2 and dmtc2 before the architecture-level variants. gas/testsuite/ * gas/mips/octeon.s: Add more tests for dmfc2 and dmtc2. * gas/mips/octeon.d: Update. * gas/mips/octeon-ill.l: Update error message.	2009-02-18 20:51:59 +00:00
Nick Clifton	137f2437e0	* fr30-opc.c: Regenerate. * frv-opc.c: Regenerate. * ip2k-opc.c: Regenerate. * iq2000-opc.c: Regenerate. * lm32-opc.c: Regenerate. * m32c-opc.c: Regenerate. * m32r-opc.c: Regenerate. * mep-opc.c: Regenerate. * mt-opc.c: Regenerate. * xc16x-opc.c: Regenerate. * xstormy16-opc.c: Regenerate. * tic54x-dis.c (print_instruction): Avoid compiler warning on sprintf call. * opc-itab.scm (<>_cgen_init_opcode_table): Avoid compiler warning about calling memset with a zero length.	2009-02-18 17:13:04 +00:00
Nathan Sidwell	872989673f	gas/ * config/tc-m68k.c (mcf51qe_ctrl): Add CPUCR. (mcf52259_ctrl, mcf52277_ctrl, mcf53017_ctrl): New. (mcf5307_ctrl): Add VBR. (no_mac): New variable. (m68k_extensions): Refer to no_mac mask. (m68k_cpus): Add 51, 51ac, 51cn, 51em, 51jm, 52274, 52277, 52252..52259, 53011..53017. (m68k_ip): Process CPUCR. (init_table): Add cpucr entry. (m68k_set_extension): Allow negated mask to refer to a variable. (md_show_usage): Use '%s' to silence fprintf warning. * config/m68k-parse.h (CPUCR): New control register. gas/testsuite/ * m68k/br-isac.d, m68k/br-isac.s: Add stldsr test. opcodes/ * m68k-opc.c (m68k_opcodes): Add stldsr instruction.	2009-02-12 08:31:03 +00:00
Peter Bergner	80890a619b	gas/testsuite/ * gas/ppc/booke.s ("dcbt", "dcbtst"): New tests. * gas/ppc/booke.d: Likewise. * gas/ppc/power4_32.s: Likewise. * gas/ppc/power4_32.d: Likewise. opcodes/ * ppc-opc.c: Update copyright year. (powerpc_opcodes) <"dcbt", "dcbtst">: Deprecate the Embedded operand ordering for POWER4 and later and use the correct Server ordering.	2009-02-06 01:50:54 +00:00
H.J. Lu	ce2f5b3ce7	gas/ 2009-02-04 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (January, 2009) * config/tc-i386.c (CPU_FLAGS_PCLMUL_MATCH): New. (CPU_FLAGS_AVX_MATCH): Updated. (CPU_FLAGS_32BIT_MATCH): Likewise. (cpu_flags_match): Likewise. gas/testsuite/ 2009-02-04 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (January, 2009) * gas/i386/arch-avx-1-3.l: New. * gas/i386/arch-avx-1-3.s: Likewise. * gas/i386/arch-avx-1-4.l: Likewise. * gas/i386/arch-avx-1-4.s: Likewise. * gas/i386/arch-avx-1-5.l: Likewise. * gas/i386/arch-avx-1-5.s: Likewise. * gas/i386/arch-avx-1-6.l: Likewise. * gas/i386/arch-avx-1-6.s: Likewise. * gas/i386/arch-10.s: Add vpclmul instructions. * gas/i386/arch-avx-1.s: Likewise. * gas/i386/avx.s: Likewise. * gas/i386/x86-64-arch-2.s: Likewise. * gas/i386/x86-64-avx.s: Likewise. * gas/i386/sse2avx.s: Add pclmul instructions. * gas/i386/x86-64-sse2avx.s: Likewise. * gas/i386/arch-10.d: Updated. * gas/i386/arch-10-1.l: Likewise. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/arch-avx-1.d: Likewise. * gas/i386/arch-avx-1-1.l: Likewise. * gas/i386/arch-avx-1-2.l: Likewise. * gas/i386/avx.d: Likewise. * gas/i386/avx-intel.d: Likewise. * gas/i386/sse2avx.d: Likewise. * gas/i386/x86-64-arch-2.d: Likewise. * gas/i386/x86-64-avx.d: Likewise. * gas/i386/x86-64-avx-intel.d: Likewise. * gas/i386/x86-64-sse2avx.d: Likewise. * gas/i386/i386.exp: Run arch-avx-1-3, arch-avx-1-4, arch-avx-1-5 and arch-avx-1-6. opcodes/ 2009-02-04 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (January, 2009) * i386-dis.c (PREFIX_VEX_3A44): New. (VEX_LEN_3A44_P_2): Likewise. (PREFIX_VEX_3A48): Updated. (VEX_LEN_3A4C_P_2): Likewise. (prefix_table): Add PREFIX_VEX_3A44. (vex_table): Likewise. (vex_len_table): Add VEX_LEN_3A44_P_2. * i386-opc.tbl: Add PCLMUL + AVX instructions. * i386-tbl.h: Regenerated.	2009-02-04 16:03:31 +00:00
Joseph Myers	52b6b6b972	bfd: 2009-02-03 Sandip Matte <sandip@rmicorp.com> * aoutx.h (NAME (aout, machine_type)): Handle bfd_mach_mips_xlr. * archures.c (bfd_mach_mips_xlr): Define. * bfd-in2.h: Regenerate. * cpu-mips.c (I_xlr): Define. (arch_info_struct): Add XLR entry. * elfxx-mips.c (_bfd_elf_mips_mach): Handle E_MIPS_MACH_XLR. (mips_set_isa_flags): Handle bfd_mach_mips_xlr (mips_mach_extensions): Add XLR entry. binutils: 2009-02-03 Sandip Matte <sandip@rmicorp.com> * readelf.c (get_machine_flags): Handle E_MIPS_MACH_XLR. gas: 2009-02-03 Sandip Matte <sandip@rmicorp.com> * config/tc-mips.c (macro): Handle M_MSGSND, M_MSGLD, M_MSGLD_T, M_MSGWAIT and M_MSGWAIT_T. (mips_cpu_info_table): Add XLR entry. * doc/c-mips.texi (-march): Document xlr. gas/testsuite: 2009-02-03 Sandip Matte <sandip@rmicorp.com> * gas/mips/mips.exp (xlr): New architecture. (xlr-ext): Run test. * gas/mips/xlr-ext.d, gas/mips/xlr-ext.s: New. include/elf: 2009-02-03 Sandip Matte <sandip@rmicorp.com> * mips.h (E_MIPS_MACH_XLR): Define. include/opcode: 2009-02-03 Sandip Matte <sandip@rmicorp.com> * mips.h (INSN_XLR): Define. (INSN_CHIP_MASK): Update. (CPU_XLR): Define. (OPCODE_IS_MEMBER): Update. (M_MSGSND, M_MSGLD, M_MSGLD_T, M_MSGWAIT, M_MSGWAIT_T): Define. opcodes: 2009-02-03 Sandip Matte <sandip@rmicorp.com> * mips-dis.c (mips_cp0_names_xlr, mips_cp0sel_names_xlr): Define. (mips_arch_choices): Add XLR entry. * mips-opc.c (XLR): Define. (mips_builtin_opcodes): Add XLR instructions.	2009-02-03 18:16:04 +00:00
Joseph Myers	31dd3154f4	bfd: 2009-02-03 Carlos O'Donell <carlos@codesourcery.com> * configure.in: AC_SUBST pdfdir. * Makefile.am: Add install-pdf, install-pdf-am and install-pdf-recursive targets. Define pdfdir. * doc/Makefile.am: Define pdf__strip_dir. Add install-pdf and install-pdf-am targets. * po/Make-in: Add install-pdf target. * configure: Regenerate. * Makefile.in: Regenerate * doc/Makefile.in: Regenerate. binutils: 2009-02-03 Carlos O'Donell <carlos@codesourcery.com> * configure.in: AC_SUBST pdfdir. * Makefile.am: Add install-pdf, install-pdf-am, and install-pdf-recursive targets. * doc/Makefile.am: Define pdf__strip_dir. Add install-pdf and install-pdf-am targets. * po/Make-in: Add install-pdf target. * configure: Regenerate. * Makefile.in: Regenerate. * doc/Makefile.in: Regenerate. etc: 2009-02-03 Carlos O'Donell <carlos@codesourcery.com> * configure.in: AC_SUBST pdfdir. * configure: Regenerate. gas: 2009-02-03 Carlos O'Donell <carlos@codesourcery.com> * configure.in: AC_SUBST pdfdir. * Makefile.am: Add install-pdf, install-pdf-am, and install-pdf-recursive targets. * doc/Makefile.am: Define pdf__strip_dir. Add install-pdf and install-pdf-am targets. * po/Make-in: Add install-pdf target. * configure: Regenerate. * Makefile.in: Regenerate. * doc/Makefile.in: Regenerate. gprof: 2009-02-03 Carlos O'Donell <carlos@codesourcery.com> * configure.in: AC_SUBST pdfdir. * Makefile.am: Add install-pdf, install-pdf-am, and install-pdf-recursive targets. Define pdf__strip_dir. * po/Make-in: Add install-pdf target. * configure: Regenerate. * Makefile.in: Regenerate. ld: 2009-02-03 Carlos O'Donell <carlos@codesourcery.com> * configure.in: AC_SUBST pdfdir. * Makefile.am: Add install-pdf, install-pdf-am, and install-pdf-recursive targets. Define pdf__strip_dir. * po/Make-in: Add install-pdf target. * configure: Regenerate. * Makefile.in: Regenerate. opcodes: 2009-02-03 Carlos O'Donell <carlos@codesourcery.com> * Makefile.am: Add install-pdf target. * po/Make-in: Add install-pdf target. * Makefile.in: Regenerate.	2009-02-03 15:54:05 +00:00
DJ Delorie	c1a0a41faa	* elf32-mep.c (config_names): Regenerate configuration. * mep-asm.c: Regenerate. * mep-desc.c: Regenerate. * mep-desc.h: Regenerate. * mep-dis.c: Regenerate. * mep-ibld.c: Regenerate. * mep-opc.c: Regenerate. * mep-opc.h: Regenerate.	2009-02-03 02:15:57 +00:00
Joseph Myers	087b80de6e	gas: 2009-01-29 Mark Mitchell <mark@codesourcery.com> * config/tc-arm.c (insns): Correct encoding of qadd, qdadd, qsub, qdsub in Thumb-2 mode. gas/testsuite: 2009-01-29 Mark Mitchell <mark@codesourcery.com> * gas/arm/thumb32.s (qadd): Add qadd, qdadd, qsub, and qdsub. * gas/arm/thumb32.d: Likewise. opcodes: 2009-01-29 Mark Mitchell <mark@codesourcery.com> * arm-dis.c (thumb32_opcodes): Correct decoding for qadd, qdadd, qsub, and qdsub.	2009-01-29 11:48:34 +00:00
Nick Clifton	159073e6aa	* mips-opc.c (suxc1): Add the flag of FP_D.	2009-01-28 08:45:47 +00:00
Alan Modra	6f3b91a621	Regenerate for copyright date update.	2009-01-20 07:22:30 +00:00
Alan Modra	29670fb929	bfd/ * Makefile.am (libbfd_la_LIBADD, libbfd_la_LDFLAGS): Substitute SHARED_LIBADD and SHARED_LDFLAGS rather than WIN32LIBADD, WIN32LDFLAGS. * configure.in (commonbfdlib): Delete. (SHARED_LDFLAGS): Rename from WIN32LDFLAGS/ (SHARED_LIBADD): Rename from WIN32LIBADD. Add pic libiberty if such is available, not just for linux. * po/SRC-POTFILES.in: Regenerate. * Makefile.in: Regenerate. * configure: Regenerate. opcodes/ * configure.in (commonbfdlib): Delete. (SHARED_LIBADD): Add pic libiberty if such is available. * configure: Regenerate. * po/POTFILES.in: Regenerate. binutils/ * configure.in (commonbfdlib): Delete. * configure: Regenerate. gas/ * configure.in (commonbfdlib): Delete. * configure: Regenerate. * po/POTFILES.in: Regenerate.	2009-01-16 08:02:29 +00:00
Peter Bergner	21169fcfad	opcodes/ * ppc-dis.c (print_insn_powerpc): Skip insn if it is deprecated. * ppc-opc.c (powerpc_opcodes) <mtfsf, mtfsf.>: Deprecate the two operand form and enable the four operand form for POWER6 and later. <mtfsfi, mtfsfi.>: Deprecate the two operand form and enable the three operand form for POWER6 and later. gas/testsuite/ * gas/ppc/power6.s ("mtfsf", "mtfsf.", "mtfsfi", "mtfsfi."): Add tests. * gas/ppc/power6.d: Likewise.	2009-01-15 04:27:28 +00:00
Mike Frysinger	4ca47a519d	2009-01-14 Mike Frysinger <vapier@gentoo.org> * bfin-dis.c (OUTS): Use "%s" as format string.	2009-01-14 19:35:12 +00:00
H.J. Lu	8acd537727	2009-01-13 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (cpu_flag_init): Remove a white space. (operand_type_init): Likewise.	2009-01-14 00:42:07 +00:00
H.J. Lu	c1ec187589	gas/testsuite/ 2009-01-12 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/sse-noavx.s: Add tests for lfence, mfence and movnti. * gas/i386/x86-64-sse-noavx.s: Likewise. * gas/i386/sse-noavx.d: Updated. * gas/i386/x86-64-sse-noavx.d: Likewise. opcodes/ 2009-01-12 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.tbl: Add NoAVX to movnti, lfence and mfence. * i386-tbl.h: Regenerated.	2009-01-13 00:00:35 +00:00
H.J. Lu	c7532693f2	gas/testsuite/ 2009-01-12 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/opts.s: Add tests for add, adc, and, cmp, or, sbb, sub and xor. * gas/i386/x86-64-opts.s: Likewise. * gas/i386/opts.d: Updated. * gas/i386/opts-intel.d: Likewise. * gas/i386/x86-64-opts.d: Likewise. * gas/i386/x86-64-opts-intel.d: Likewise. opcodes/ 2009-01-12 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (dis386): Use EbS on addB, orB, adcB, sbbB, andB, subB, xorB and cmpB. Use EvS on addS, orS, adcS, sbbS, andS, subS, xorS and cmpS.	2009-01-12 16:04:11 +00:00
H.J. Lu	bd5295b282	gas/ 2009-01-10 H.J. Lu <hongjiu.lu@intel.com> * gas/config/tc-i386.c (cpu_arch): Add corei7, .clflush and .syscall. (i386_align_code): Handle PROCESSOR_COREI7. (md_show_usage): Add corei7, clflush and syscall. (i386_target_format): Replace cpup4 with cpuclflush. * gas/config/tc-i386.h (processor_type): Add PROCESSOR_COREI7. * doc/c-i386.texi: Document corei7, clflush and syscall. gas/testsuite/ 2009-01-10 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/arch-10.s: Add clflush and syscall. * gas/i386/x86-64-arch-2.s: Likewise. * gas/i386/arch-10.d: Updated. * gas/i386/arch-10-1.l: Likewise. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/x86-64-arch-2.d: Likewise. opcodes/ 2009-01-10 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (cpu_flag_init): Replace CpuP4 and CpuK6 with CpuClflush and CpuSYSCALL, respectively. Remove CpuK8. Add CPU_COREI7_FLAGS, CPU_CLFLUSH_FLAGS and CPU_SYSCALL_FLAGS. (cpu_flags): Remove CpuP4, CpuK6 and CpuK8. Add CpuClflush and CpuSYSCALL. (lineno): Removed. (set_bitfield): Take an argument, lineno. Don't report lineno on error if it is -1. (process_i386_cpu_flag): Take an argument, lineno. (process_i386_opcode_modifier): Likewise. (process_i386_operand_type): Likewise. (output_i386_opcode): Likewise. (opcode_hash_entry): Add lineno. (process_i386_opcodes): Updated. (process_i386_registers): Likewise. (process_i386_initializers): Likewise. * i386-opc.h (CpuP4): Removed. (CpuK6): Likewise. (CpuK8): Likewise. (CpuClflush): New. (CpuSYSCALL): Likewise. (CpuMMX): Updated. (i386_cpu_flags): Remove cpup4, cpuk6 and cpuk8. Add cpuclflush and cpusyscall. * i386-opc.tbl: Update movnti, clflush, lfence, mfence, pause, syscall and sysret. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.	2009-01-10 17:25:52 +00:00
H.J. Lu	1b7f3fb0dd	gas/ 2009-01-09 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (cpu_arch): Add .rdtscp. (md_show_usage): Display rdtscp. * doc/c-i386.texi: Document rdtscp. gas/testsuite/ 2009-01-09 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/arch-10.s: Add rdtscp. * gas/i386/x86-64-arch-2.s: Likewise. * gas/i386/arch-10.d: Updated. * gas/i386/arch-10-1.l: Likewise. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/x86-64-arch-2.d: Likewise. opcodes/ 2009-01-09 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (cpu_flag_init): Add CpuRdtscp to CPU_K8_FLAGS and CPU_AMDFAM10_FLAGS. Add CPU_RDTSCP_FLAGS. (cpu_flags): Add CpuRdtscp. (set_bitfield): Remove CpuSledgehammer check. * i386-opc.h (CpuRdtscp): New. (CpuLM): Updated. (i386_cpu_flags): Add cpurdtscp. * i386-opc.tbl: Replace CpuSledgehammer with CpuRdtscp. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.	2009-01-09 20:32:32 +00:00
Peter Bergner	1cb0a76746	gas/ * config/tc-ppc.c (ppc_setup_opcodes): Remove PPC_OPCODE_NOPOWER4 test. Test the new "deprecated" opcode field. include/opcode/ * ppc.h (struct powerpc_opcode): New field "deprecated". (PPC_OPCODE_NOPOWER4): Delete. opcodes/ * ppc-opc.c (PPCNONE): Define. (NOPOWER4): Delete. (powerpc_opcodes): Initialize the new "deprecated" field.	2009-01-09 18:50:58 +00:00
H.J. Lu	168e309712	gas/testsuite/ 2009-01-06 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * gas/i386/avx.s: Add tests for 256bit vmovntdq, vmovntpd and vmovntps. * gas/i386/x86-64-avx.s: Likewise. * gas/i386/avx.d: Updated. * gas/i386/avx-intel.d: Likewise. * gas/i386/x86-64-avx.d: Likewise. * gas/i386/x86-64-avx-intel.d: Likewise. opcodes/ 2009-01-06 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * i386-dis.c (VEX_LEN_2B_M_0): Removed. (VEX_LEN_E7_P_2_M_0): Likewise. (VEX_LEN_2C_P_1): Updated. (VEX_LEN_E8_P_2): Likewise. (vex_len_table): Remove VEX_LEN_2B_M_0 and VEX_LEN_E7_P_2_M_0. (mod_table): Likewise. * i386-opc.tbl: Add 256bit vmovntdq, vmovntpd and vmovntps. * i386-tbl.h: Regenerated.	2009-01-06 17:15:28 +00:00
H.J. Lu	22da050bbf	2009-01-05 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (process_copyright): Update for 2009. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.	2009-01-06 01:14:45 +00:00
H.J. Lu	0bfee64967	gas/ 2009-01-05 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * config/tc-i386.c (build_modrm_byte): Remove 5 operand instruction support. Don't swap REG and NDS for FMA. gas/testsuite/ 2009-01-05 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * gas/i386/arch-10.s: Replace vfmaddpd with vfmadd132pd. * gas/i386/x86-64-arch-2.s: Likewise. * gas/i386/arch-10.d: Updated. * gas/i386/arch-10-1.l: Likewise. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/avx.d: Likewise. * gas/i386/avx-intel.d: Likewise. * gas/i386/inval-avx.l: Likewise. * gas/i386/x86-64-arch-2.d: Likewise. * gas/i386/x86-64-avx.d: Likewise. * gas/i386/x86-64-avx-intel.d: Likewise. * gas/i386/x86-64-inval-avx.l: Likewise. * gas/i386/avx.s: Remove vpermil2ps/vpermil2pd and FMA instructions. Update tests. * gas/i386/inval-avx.s: Likewise. * gas/i386/x86-64-avx.s: Likewise. * gas/i386/x86-64-inval-avx.s: Likewise. * gas/i386/fma.d: New. * gas/i386/fma.s: Likewise. * gas/i386/fma-intel.d: Likewise. * gas/i386/x86-64-fma.d: Likewise. * gas/i386/x86-64-fma.s: Likewise. * gas/i386/x86-64-fma-intel.d: Likewise. * gas/i386/i386.exp: Run fma, fma-intel, x86-64-fma and x86-64-fma-intel. opcodes/ 2009-01-05 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * i386-dis.c (OP_VEX_FMA): Removed. (OP_EX_VexW): Likewise. (OP_EX_VexImmW): Likewise. (OP_XMM_VexW): Likewise. (VEXI4_Fixup): Likewise. (VPERMIL2_Fixup): Likewise. (VexI4): Likewise. (VexFMA): Likewise. (Vex128FMA): Likewise. (EXVexW): Likewise. (EXdVexW): Likewise. (EXqVexW): Likewise. (EXVexImmW): Likewise. (XMVexW): Likewise. (VPERMIL2): Likewise. (PREFIX_VEX_3A48...PREFIX_VEX_3A4A): Likewise. (PREFIX_VEX_3A5C...PREFIX_VEX_3A5F): Likewise. (PREFIX_VEX_3A68...PREFIX_VEX_3A6F): Likewise. (PREFIX_VEX_3A78...PREFIX_VEX_3A7F): Likewise. (VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2): Likewise. (VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2): Likewise. (get_vex_imm8): Likewise. (OP_EX_VexReg): Likewise. vpermil2_op): Likewise. (EXVexWdq): New. (vex_w_dq_mode): Likewise. (PREFIX_VEX_3896...PREFIX_VEX_389F): Likewise. (PREFIX_VEX_38A6...PREFIX_VEX_38AF): Likewise. (PREFIX_VEX_38B6...PREFIX_VEX_38BF): Likewise. (es_reg): Updated. (PREFIX_VEX_38DB): Likewise. (PREFIX_VEX_3A4A): Likewise. (PREFIX_VEX_3A60): Likewise. (PREFIX_VEX_3ADF): Likewise. (VEX_LEN_3ADF_P_2): Likewise. (prefix_table): Remove PREFIX_VEX_3A48...PREFIX_VEX_3A4A, PREFIX_VEX_3A5C...PREFIX_VEX_3A5F, PREFIX_VEX_3A68...PREFIX_VEX_3A6F and PREFIX_VEX_3A78...PREFIX_VEX_3A7F. Add PREFIX_VEX_3896...PREFIX_VEX_389F, PREFIX_VEX_38A6...PREFIX_VEX_38AF and PREFIX_VEX_38B6...PREFIX_VEX_38BF. (vex_table): Likewise. (vex_len_table): Remove VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2 and VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2. (putop): Support "%XW". (intel_operand_size): Handle vex_w_dq_mode. * i386-opc.h (VexNDS): Add a comment for VEX NDS and VEX DDS. * i386-opc.tbl: Remove vpermil2pd/vpermil2ps and old FMA instructions. Add new FMA instructions. * i386-tbl.h: Regenerated.	2009-01-06 01:03:27 +00:00
Nick Clifton	4ef2cf8be8	* or32-opc.c (or32_print_register, or32_print_immediate, disassemble_insn): Don't rely on undefined sprintf behaviour. * itbl-ops.c (itbl_disassemble): Don't rely on undefined sprintf behaviour.	2009-01-02 14:21:54 +00:00
Martin Schwidefsky	03a9f008a5	2008-12-30 Martin Schwidefsky <schwidefskyy@de.ibm.com> * s390-opc.txt: Add ptff instruction.	2008-12-30 10:00:47 +00:00
Jan Kratochvil	dffece59b8	Fix the LM32 port entry timestamp for the time of its application.	2008-12-24 10:06:43 +00:00
Jan Kratochvil	828c0124d0	opcodes/ * Makefile.am (CFILES, ALL_MACHINES): Add LM32 source and object files. * Makefile.in: Regenerate.	2008-12-24 09:58:03 +00:00
Nick Clifton	84e94c9023	Add LM32 port.	2008-12-23 19:10:25 +00:00
H.J. Lu	fa99fab222	gas/ 2008-12-23 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (match_template): Changed to return const template . Handle i.swap_operand for 3 operands. (build_vex_prefix): Take const template . Swap operand for 2-byte VEX prefix if possible. (md_assemble): Updated. (build_modrm_byte): Handle RegMem bit for SSE2AVX. gas/testsuite/ 2008-12-23 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Run x86-64-avx-swap and x86-64-avx-swap-intel. * gas/i386/opts.s: Add tests for movsd, movss, vmovsd and vmovss. * gas/i386/x86-64-opts.s: Likewise. * gas/i386/opts.d: Updated. * gas/i386/opts-intel.d: Likewise. * gas/i386/sse2avx-opts.d: Likewise. * gas/i386/sse2avx-opts-intel.d: Likewise. * gas/i386/x86-64-opts.d: Likewise. * gas/i386/x86-64-opts-intel.d: Likewise. * gas/i386/x86-64-sse2avx-opts.d: Likewise. * gas/i386/x86-64-sse2avx-opts-intel.d: Likewise. * gas/i386/x86-64-avx-swap.d: New. * gas/i386/x86-64-avx-swap.s: Likewise. * gas/i386/x86-64-avx-swap-intel.d: Likewise. opcodes/ 2008-12-23 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (EXdS): New. (EXdVexS): Likewise. (EXqVexS): Likewise. (d_swap_mode): Likewise. (q_mode): Updated. (prefix_table): Use EXdS on movss and EXqS on movsd. (vex_len_table): Use EXdVexS on vmovss and EXqVexS on vmovsd. (intel_operand_size): Handle d_swap_mode. (OP_EX): Likewise. * i386-opc.h (S): Update comments. * i386-opc.tbl: Add S to movss, movsd, vmovss and vmovsd. * i386-tbl.h: Regenerated.	2008-12-23 15:14:15 +00:00
Nick Clifton	b06f3b1b03	* po/ga.po: Updated Irish translation.	2008-12-23 09:54:26 +00:00
Ralf Wildenhues	22e8c8e0c1	Add missing ChangeLog entries for my last commit.	2008-12-21 12:45:53 +00:00
H.J. Lu	b6169b206a	gas/ 2008-12-20 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (_i386_insn): Add swap_operand. (parse_insn): Handle ".s". (match_template): Handle swap_operand. * doc/c-i386.texi: Document .s suffix. gas/testsuite/ 2008-12-20 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Run opts, opts-intel, sse2avx-opts, sse2avx-opts-intel, x86-64-opts, x86-64-opts-intel, x86-64-sse2avx-opts and x86-64-sse2avx-opts-intel. * gas/i386/opts.d: New. * gas/i386/opts-intel.d: Likewise. * gas/i386/opts.s: Likewise. * gas/i386/sse2avx-opts.d: Likewise. * gas/i386/sse2avx-opts-intel.d: Likewise. * gas/i386/x86-64-opts.d: Likewise. * gas/i386/x86-64-opts-intel.d: Likewise. * gas/i386/x86-64-opts.s: Likewise. * gas/i386/x86-64-sse2avx-opts.d: Likewise. * gas/i386/x86-64-sse2avx-opts-intel.d: Likewise. opcodes/ 2008-12-20 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (EbS): New. (EvS): Likewise. (EMS): Likewise. (EXqS): Likewise. (EXxS): Likewise. (b_swap_mode): Likewise. (v_swap_mode): Likewise. (q_swap_mode): Likewise. (x_swap_mode): Likewise. (v_mode): Updated. (w_mode): Likewise. (t_mode): Likewise. (xmm_mode): Likewise. (swap_operand): Likewise. (dis386): Use EbS on movB. Use EvS on moveS. (dis386_twobyte): Use EXxS on movapX. (prefix_table): Use EXxS on movups, movupd, movdqu, movdqa, vmovups, vmovdqu, vmovdqa. Use EMS and EXqS on movq. (vex_table): Use EXxS on vmovapX. (vex_len_table): Use EXqS on vmovq. (intel_operand_size): Handle b_swap_mode, v_swap_mode, q_swap_mode and x_swap_mode. (OP_E_register): Handle b_swap_mode and v_swap_mode. (OP_EM): Handle v_swap_mode. (OP_EX): x_swap_mode and q_swap_mode. * i386-gen.c (opcode_modifiers): Add S. * i386-opc.h (S): New. (Modrm): Updated. (i386_opcode_modifier): Add s. * i386-opc.tbl: Add S to movapd, movaps, movdqa, movdqu, movq, movupd, movups, vmovapd, vmovaps, vmovdqa, vmovdqu and vmovq. * i386-tbl.h: Regenerated.	2008-12-20 17:40:51 +00:00
H.J. Lu	ea397f5b07	gas/testsuite/ 2008-12-18 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/intel.d: Remove trailing white spaces after nop. * gas/i386/intelpic.d: Likewise. * gas/i386/nops16-1.d: Likewise. * gas/i386/nops-1-i686.d: Likewise. * gas/i386/nops-3.d: Likewise. * gas/i386/nops-3-i386.d: Likewise. * gas/i386/nops-3-i686.d: Likewise. * gas/i386/nops-4.d: Likewise. * gas/i386/nops-4-i386.d: Likewise. * gas/i386/nops-4-i686.d: Likewise. * gas/i386/opcode.d: Likewise. * gas/i386/opcode-suffix.d: Likewise. * gas/i386/reloc.d: Likewise. * gas/i386/tlsnopic.d: Likewise. * gas/i386/x86-64-nops-1.d: Likewise. * gas/i386/x86-64-nops-1-nocona.d: Likewise. * gas/i386/x86-64-nops-2.d: Likewise. * gas/i386/x86-64-nops-3.d: Likewise. * gas/i386/x86-64-nops-4-core2.d: Likewise. * gas/i386/x86-64-nops-4.d: Likewise. * gas/i386/x86-64-nops-4-k8.d: Likewise. * gas/i386/x86-64-opcode.d: Likewise. ld/testsuite/ 2008-12-18 H.J. Lu <hongjiu.lu@intel.com> * ld-i386/tlsld1.dd: Remove trailing white spaces after nop. opcodes/ 2008-12-18 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (mnemonicendp): New. (op): Likewise. (print_insn): Use mnemonicendp. (OP_3DNowSuffix): Likewise. (CMP_Fixup): Likewise. (CMPXCHG8B_Fixup): Likewise. (CRC32_Fixup): Likewise. (OP_DREX_FCMP): Likewise. (OP_DREX_ICMP): Likewise. (VZERO_Fixup): Likewise. (VCMP_Fixup): Likewise. (PCLMUL_Fixup): Likewise. (VPERMIL2_Fixup): Likewise. (MOVBE_Fixup): Likewise. (putop): Update mnemonicendp. (oappend): Use stpcpy. (simd_cmp_op): Changed to struct op. (vex_cmp_op): Likewise. (pclmul_op): Likewise. (vpermil2_op): Likewise.	2008-12-18 22:47:32 +00:00
Ralf Wildenhues	3914465446	Backport link test fix from upstream Libtool: * libltdl.m4 (_LT_SYS_DYNAMIC_LINKER, _LT_LINKER_SHLIBS): Add cache variables to tests that require the linker to work. For shlibpath_overrides_runpath, this also changes the semantics to let the result from the C compiler take precedence. compiler take precedence. binutils/ * configure: Regenerate. opcodes/ * configure: Regenerate. bfd/ * configure: Regenerate. gas/ * configure: Regenerate. gprof/ * configure: Regenerate. ld/ * configure: Regenerate.	2008-12-18 21:36:47 +00:00
Richard Earnshaw	7df76b802e	opcodes: * arm-dis.c (coprocessor_opcodes): Disassemble VFP instructions using unified syntax. gas/testsuite: * gas/arm/group-reloc-ldc.d: Disassembly of VFP instructions now uses unified syntax. * gas/arm/vfp-non-overlap.d: Likewise. * gas/arm/vfp-neon-syntax.d: Likewise. * gas/arm/vfp-neon-syntax_t2.d: Likewise. * gas/arm/vfp1.d: Likewise. * gas/arm/vfp1_t2.d: Likewise. * gas/arm/vfp1xD.d: Likewise. * gas/arm/vfp1xD_t2.d: Likewise. * gas/arm/vfp2.d: Likewise. * gas/arm/vfp2_t2.d: Likewise. * gas/arm/vfpv3-32drs.d: Likewise. * gas/arm/vfpv3-const-conv.d: Likewise. ld/testsuite: * ld-arm/vfp11-fix-scalar.d: Disassembly of VFP instructions now uses unified syntax. * ld-arm/vfp11-fix-vector.d: Likewise.	2008-12-15 17:24:13 +00:00
H.J. Lu	035475035d	2008-12-08 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (opcode_modifiers): Move VexNDS before VexNDD.	2008-12-08 18:07:26 +00:00
H.J. Lu	efa7dee728	2008-12-08 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (putop): Remove strayed comments.	2008-12-08 17:43:06 +00:00
Ben Elliston	2f3bb96af7	opcodes/ * ppc-dis.c (powerpc_init_dialect): Do not set PPC_OPCODE_BOOKE for -Mbooke. (print_ppc_disassembler_options): Update usage. * ppc-opc.c (DE, DES, DEO, DE_MASK): Remove. (BOOKE64): Remove. (PPCCHLK64): Likewise. (powerpc_opcodes): Remove all BOOKE64 instructions. gas/ * config/tc-ppc.c (parse_cpu): Remove booke64 support. Update usage strings. (ppc_setup_opcodes): Likewise, remove booke64 support. * doc/c-ppc.texi (PowerPC-Opts): Remove -mbooke32 and -mbooke64. * doc/as.texinfo (Overview): Likewise. binutils/ * doc/binutils.texi (objdump): Update booke documentation. * NEWS: Document user-visible changes to command line options.	2008-12-04 10:29:16 +00:00
Thiemo Seufer	3aa3176b2d	* aoutx.h (NAME): Add case statements for bfd_mach_mips14000, bfd_mach_mips16000. * archures.c (bfd_architecture): Add .#defines for bfd_mach_mips14000, bfd_mach_mips16000. * bfd-in2.h: Regenerate. * cpu-mips.c: Add enums I_mips14000, I_mips16000. (arch_info_struct): Add refs to R14000, R16000. * elfxx-mips.c (mips_set_isa_flags): Handle bfd_mach_mips14000, bfd_mach_mips16000. (mips_mach_extensions): Map R14000, R16000 to R10000. * config/tc-mips.c (hilo_interlocks): Handle CPU_R14000, CPU_R16000. (mips_cpu_info_table): Add r14000, r16000. * doc/c-mips.texi: Add entries for 14000, 16000. * mips-dis.c (mips_arch_choices): Add r14000, r16000. * mips.h: Define CPU_R14000, CPU_R16000. (OPCODE_IS_MEMBER): Include R14000, R16000 in test.	2008-11-28 18:02:17 +00:00
M R Swami Reddy	59b098c970	* cr16-dis.c (match_opcode): Truncate mcode to 32 bit and adjusted the mask for 32-bit branch instruction.	2008-11-27 11:30:33 +00:00
Alan Modra	e1c93c699b	* ppc-opc.c (extract_sprg): Correct operand range check.	2008-11-27 10:47:23 +00:00
Andreas Schwab	3c6528a8d8	Fix typo.	2008-11-26 10:49:06 +00:00
Andreas Schwab	9f7678f6ca	(NEXTBYTE, NEXTWORD, NEXTLONG, NEXTULONG, NEXTSINGLE) (NEXTDOUBLE, NEXTEXTEND, NEXTPACKED): Fix error handling. (save_printer, save_print_address): Remove. (fetch_data): Don't use them. (match_insn_m68k): Always restore printing functions. (print_insn_m68k): Don't save/restore printing functions.	2008-11-26 10:43:18 +00:00
Nick Clifton	62443ade10	* m68k-dis.c: Rewrite to remove use of setjmp/longjmp.	2008-11-25 10:33:06 +00:00
Catherine Moore	8e79c3df51	Add support for ARM half-precision conversion instructions.	2008-11-18 15:45:05 +00:00
Tristan Gingold	d387240a63	bfd/ 2008-11-14 Tristan Gingold <gingold@adacore.com> * configure.com: Handle bfd_default_target_size, BFD_HOST_LONG_LONG, BFD_HOST_64BIT_LONG_LONG, BFD_HOSTPTR_T, bfd_file_ptr. Generate bfdver.h. * vms-hdr.c (_bfd_vms_write_hdr): Use strdup/free instead of alloca. * hosts/alphavms.h: Defines macros to bypass i18n. * makefile.vms (OBJS): Update file list. (DEFS): Remove VMS_DEBUG, const, add DEBUGDIR. (CFLAGS): Update flags. * bfdio.c (real_fopen): Add code specific to VMS: extract attributes from modes. binutils/ 2008-11-14 Tristan Gingold <gingold@adacore.com> * configure.com: Get version from configure.in of bfd. * makefile.vms-in (DEBUG_OBJS): Add dwarf.obj. (CFLAGS): Update flags. include/ 2008-11-14 Tristan Gingold <gingold@adacore.com> * fopen-vms.h (FOPEN_RB): Use a single string to match the standard prototype. (FOPEN_WB): Ditto. (FOPEN_AB): Ditto. (FOPEN_RUB): Ditto. (FOPEN_WUB): Ditto. (FOPEN_AUB): Ditto. libiberty/ 2008-11-14 Tristan Gingold <gingold@adacore.com> * makefile.vms (OBJS): Update objects list. (CFLAGS): Update. (libiberty.olb): Remove alloca-conf.h dependency. * config.h-vms: Use new macro sets, use builtin alloca. opcodes/ 2008-11-14 Tristan Gingold <gingold@adacore.com> * makefile.vms (OBJS): Update list of objects. (DEFS): Update (CFLAGS): Update.	2008-11-14 09:57:35 +00:00
Chao-ying Fu	4dc48ef654	2008-11-06 Chao-ying Fu <fu@mips.com> * mips-opc.c (synciobdma, syncs, syncw, syncws): Move these before sync. (sync): New instruction with 5-bit sync type. * mips-dis.c (print_insn_args: Add case '1' to print 5-bit values.	2008-11-06 19:40:10 +00:00
Nick Clifton	c8941035c5	* avr-dis.c: Replace uses of sprintf without a format string with calls to strcpy.	2008-11-06 12:03:24 +00:00
H.J. Lu	a7bea99dc6	gas/testsuite/ 2008-11-03 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/intel.s: Add tests for cmovpe and cmovpo. * gas/i386/opcode.s: Likewise. * gas/i386/intel.d: Updated. * gas/i386/opcode.d: Likewise. * gas/i386/opcode-intel.d: Likewise. * gas/i386/opcode-suffix.d: Likewise. opcodes/ 2008-11-03 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.tbl: Add cmovpe and cmovpo. * i386-tbl.h: Regenerated.	2008-11-03 19:38:09 +00:00
Nick Clifton	4267b19fc7	PR 6937 * configure.in (SHARED_LIBADD): Revert previous change. Add a comment explaining why. (SHARED_DEPENDENCIES): Revert previous change. * configure: Regenerate.	2008-10-22 14:45:34 +00:00
Nick Clifton	8a9629d090	PR 6937 * configure.in (SHARED_LIBADD): Add libiberty.a. (SHARED_DEPENDENCIES): Add libiberty.a.	2008-10-10 11:35:36 +00:00
H.J. Lu	c587b3f982	2008-09-30 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c: Include "hashtab.h". (next_field): Take a new argument, last. Check last. (process_i386_cpu_flag): Updated. (process_i386_opcode_modifier): Likewise. (process_i386_operand_type): Likewise. (process_i386_registers): Likewise. (output_i386_opcode): New. (opcode_hash_entry): Likewise. (opcode_hash_table): Likewise. (opcode_hash_hash): Likewise. (opcode_hash_eq): Likewise. (process_i386_opcodes): Use opcode hash table and opcode array.	2008-09-30 19:47:14 +00:00
Andreas Krebbel	34b23dab7e	2008-09-30 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> * s390-opc.txt (stdy, stey): Fix description	2008-09-30 08:49:54 +00:00
Alan Modra	782e11fd41	run "make dep-am"	2008-09-30 07:49:32 +00:00
H.J. Lu	1927a18f31	2008-09-29 H.J. Lu <hongjiu.lu@intel.com> * aclocal.m4: Regenerated. * configure: Likewise. * Makefile.in: Likewise.	2008-09-29 16:54:07 +00:00
Nick Clifton	afac680a76	* po/vi.po: Updated Vietnamese translation. * po/fr.po: Updated French translation.	2008-09-29 09:48:31 +00:00
Andreas Krebbel	b40d5eb9ef	2008-09-26 Florian Krohm <fkrohm@us.ibm.com> * s390-opc.txt (thder, thdr): Change RRE_RR to RRE_FF. (cfxr, cfdr, cfer, clclu): Add esa flag. (sqd): Instruction added. (qadtr, qaxtr): Change RRF_FFFU to RRF_FUFF. * s390-opc.c: (INSTR_RRF_FFFU, MASK_RRF_FFFU): Removed. 2008-09-26 Andreas Krebbel <krebbel1@de.ibm.com> * gas/s390/esa-g5.d: Adjust according to the s390-opc changes. * gas/s390/esa-g5.s: Likewise. * gas/s390/esa-z990.d: Likewise. * gas/s390/esa-z990.s: Likewise. * gas/s390/zarch-z900.d: Likewise. * gas/s390/zarch-z900.s: Likewise. * gas/s390/zarch-z990.d: Likewise. * gas/s390/zarch-z990.s: Likewise.	2008-09-26 13:44:33 +00:00
Arnold Metselaar	d04117369b	Fix bugs in the disassembly of some ld-instructions	2008-09-14 08:38:02 +00:00
H.J. Lu	3e12678445	gas/testsuite/ 2008-09-11 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/sse2avx.s: Remove pclmulXXX tests. Add tests for Intel syntax. * gas/i386/x86-64-sse2avx.s: Likewise. * gas/i386/sse2avx.d: Updated. * gas/i386/x86-64-sse2avx.d: Likewise. opcodes/ 2008-09-11 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.tbl: Fix memory operand size for cmpXXXs[sd]. * i386-tbl.h: Regenerated.	2008-09-11 23:15:59 +00:00
Jan Beulich	ddab3d5917	gas/testsuite/ 2008-08-28 Jan Beulich <jbeulich@novell.com> * gas/i386/intel.s: Add retf. * gas/i386/intel.{d,e}: Adjust. * gas/i386/opcode-intel.d: Replace lret with retf. opcodes/ 2008-08-28 Jan Beulich <jbeulich@novell.com> * i386-dis.c (dis386): Adjust far return mnemonics. * i386-opc.tbl: Add retf. * i386-tbl.h: Re-generate.	2008-08-28 15:59:32 +00:00
Jan Beulich	b19d538532	gas/testsuite/ 2008-08-28 Jan Beulich <jbeulich@novell.com> * gas/i386/gas/i386/opcode-suffix.d: Add suffixes to cmovXX. opcodes/ 2008-08-28 Jan Beulich <jbeulich@novell.com> * i386-dis.c (dis386_twobyte): Adjust cmovXX mnemonics.	2008-08-28 15:30:30 +00:00
H.J. Lu	1ca35711f4	gas/ 2008-08-28 H.J. Lu <hongjiu.lu@intel.com> * config/tc-ia64.c (CR_IIB0): New. (CR_IIB1): Likewise. (cr): Add cr.iib0 and cr.iib1. (specify_resource): Handle IA64_RS_CR_IIB and CR_IIB0/CR_IIB1. gas/testsuite/ 2008-08-28 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/dv-raw-err.s: Add tests for cr.iib0 and cr.iib1. * gas/ia64/dv-waw-err.s: Likewise. * gas/ia64/regs.s: Likewise. * gas/ia64/dv-raw-err.l: Updated. * gas/ia64/dv-waw-err.l: Likewise. * gas/ia64/regs.d: Likewise. include/opcode/ 2008-08-28 H.J. Lu <hongjiu.lu@intel.com> * ia64.h (ia64_resource_specifier): Add IA64_RS_CR_IIB. Update IA64_RS_CR. opcodes/ 2008-08-28 H.J. Lu <hongjiu.lu@intel.com> * ia64-dis.c (print_insn_ia64): Handle cr.iib0 and cr.iib1. * ia64-gen.c (lookup_specifier): Likewise. * ia64-ic.tbl: Add support for cr.iib0 and cr.iib1. * ia64-raw.tbl: Likewise. * ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerated.	2008-08-28 14:07:50 +00:00
H.J. Lu	515c56e780	gas/testsuite/ 2008-08-27 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/intel.s: Add tests for fidivr. * gas/i386/intel.d: Updated. opcodes/ 2008-08-27 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.tbl: Correct fidivr operand size. * i386-tbl.h: Regenerated.	2008-08-27 17:53:42 +00:00
Alan Modra	da594c4a29	Update a number of obsolete autoconf macros.	2008-08-24 03:13:05 +00:00
H.J. Lu	a5ff0eb22b	gas/ 2008-08-20 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (August, 2008) * config/tc-i386.c (CPU_FLAGS_AES_MATCH): New. (CPU_FLAGS_AVX_MATCH): Likewise. (CPU_FLAGS_32BIT_MATCH): Updated. (cpu_flags_match): Likewise. gas/testsuite/ 2008-08-20 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (August, 2008) * gas/i386/avx.s: Add AES + AVX tests. * gas/i386/arch-10.s: Likewise. * gas/i386/sse2avx.s: Likewise. * gas/i386/x86-64-arch-2.s: Likewise. * gas/i386/x86-64-avx.s: Likewise. * gas/i386/x86-64-sse2avx.s: Likewise. * gas/i386/arch-10.d: Updated. * gas/i386/arch-10-1.l: Likewise. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/avx.d: Likewise. * gas/i386/avx-intel.d: Likewise. * gas/i386/sse2avx.d: Likewise. * gas/i386/x86-64-arch-2.d: Likewise. * gas/i386/x86-64-avx.d: Likewise. * gas/i386/x86-64-avx-intel.d: Likewise. * gas/i386/x86-64-sse2avx.d: Likewise. * gas/i386/i386.exp: Run arch-avx-1, arch-avx-1-1 and arch-avx-1-2. * gas/i386/arch-avx-1.d: New. * gas/i386/arch-avx-1.s: Likewise. * gas/i386/arch-avx-1-1.l: Likewise. * gas/i386/arch-avx-1-1.s: Likewise. * gas/i386/arch-avx-1-2.l: Likewise. * gas/i386/arch-avx-1-2.s: Likewise. opcodes/ 2008-08-20 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (August, 2008) * i386-dis.c (PREFIX_VEX_38DB): New. (PREFIX_VEX_38DC): Likewise. (PREFIX_VEX_38DD): Likewise. (PREFIX_VEX_38DE): Likewise. (PREFIX_VEX_38DF): Likewise. (PREFIX_VEX_3ADF): Likewise. (VEX_LEN_38DB_P_2): Likewise. (VEX_LEN_38DC_P_2): Likewise. (VEX_LEN_38DD_P_2): Likewise. (VEX_LEN_38DE_P_2): Likewise. (VEX_LEN_38DF_P_2): Likewise. (VEX_LEN_3ADF_P_2): Likewise. (PREFIX_VEX_3A04): Updated. (VEX_LEN_3A06_P_2): Likewise. (prefix_table): Add PREFIX_VEX_38DB, PREFIX_VEX_38DC, PREFIX_VEX_38DD, PREFIX_VEX_38DE and PREFIX_VEX_3ADF. (x86_64_table): Likewise. (vex_len_table): Add VEX_LEN_38DB_P_2, VEX_LEN_38DC_P_2, VEX_LEN_38DD_P_2, VEX_LEN_38DE_P_2, VEX_LEN_38DF_P_2 and VEX_LEN_3ADF_P_2. * i386-opc.tbl: Add AES + AVX instructions. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.	2008-08-20 18:38:40 +00:00
Andreas Krebbel	7dc6076f0c	2008-08-15 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> * s390-opc.c (INSTR_RRF_FFRU, MASK_RRF_FFRU): New instruction format. * s390-opc.txt (lxr, rrdtr, rrxtr): Fix instruction format. 2008-08-15 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> * gas/s390/esa-g5.d: lxr operands are floating point. * gas/s390/esa-g5.s: Likewise. * gas/testsuite/gas/s390/zarch-z9-ec.d: rrdtr, rrxtr third operands is gpr. * gas/testsuite/gas/s390/zarch-z9-ec.s: Likewise.	2008-08-15 12:10:21 +00:00
Alan Modra	7357c5b6a6	PR 6526 * configure.in: Invoke AC_USE_SYSTEM_EXTENSIONS.	2008-08-15 08:31:52 +00:00
Alan Modra	899d85bead	PR 6825 * ppc-opc.c (powerpc_opcodes): Enable rfci, mfpmr, mtpmr for e300.	2008-08-14 13:56:00 +00:00
H.J. Lu	dfb0759252	gas/testsuite/ 2008-08-12 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/amd.s: Add syscall and sysret. Remove padding. * gas/i386/amd.d: Updated. * gas/i386/x86-64-opcode.d: Likewise. * gas/i386/i386.exp: Run x86-64-intel64. * gas/i386/x86-64-intel64.d: New. * gas/i386/x86-64-intel64.s: Likewise. * gas/i386/x86-64-opcode.s: Add syscall and sysret. opcodes/ 2008-08-12 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.tbl: Add syscall and sysret for Cpu64. * i386-tbl.h: Regenerated.	2008-08-12 21:44:56 +00:00
Alan Modra	323ee3f41c	Set LC_ALL=C rather than unsetting LC_COLLATE for sort.	2008-08-04 06:55:33 +00:00
Peter Bergner	9b4e57660d	gas/ * config/tc-ppc.c (parse_cpu): Rename altivec_or_spe to retain_flags. Handle -mvsx and -mpower7. (md_show_usage): Document -mpower7 and -mvsx. * doc/as.texinfo (Target PowerPC): Document -mvsx. * doc/c-ppc.texi (PowerPC-Opts): Document -mvsx and -mpower7. gas/testsuite/ * gas/ppc/power7.d: New. * gas/ppc/power7.s: Likewise. * gas/ppc/ppc.exp: Run power7 test. include/opcode/ * ppc.h (PPC_OPCODE_VSX, PPC_OPERAND_VSR): New. opcodes/ * ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options. (print_insn_powerpc): Prepend 'vs' when printing VSX registers. (print_ppc_disassembler_options): Document -Mpower7 and -Mvsx. * ppc-opc.c (insert_xt6): New static function. (extract_xt6): Likewise. (insert_xa6): Likewise. (extract_xa6: Likewise. (insert_xb6): Likewise. (extract_xb6): Likewise. (insert_xb6s): Likewise. (extract_xb6s): Likewise. (XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK, XX3DM_MASK, PPCVSX): New. (powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x", "stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".	2008-08-02 04:38:51 +00:00
Pedro Alves	20fd6e2eb1	Missed ChangeLog entry for last change. * Makefile.am ($(srcdir)/ia64-asmtab.c): Remove line continuation. * Makefile.in: Regenerate.	2008-08-01 16:53:56 +00:00
Pedro Alves	e316cf6e3e	* Makefile.am ($(srcdir)/ia64-asmtab.c): Remove line continuation. * Makefile.in: Regenerate.	2008-08-01 14:35:06 +00:00
H.J. Lu	a656ed5bea	binutils/ 2008-08-01 H.J. Lu <hongjiu.lu@intel.com> * dwarf.c (dwarf_regnames_i386): Remove AVX registers. (dwarf_regnames_x86_64): Likewise. gas/testsuite/ 2008-08-01 H.J. Lu <hongjiu.lu@intel.com> * gas/cfi/cfi-i386.s: Remove tests for AVX register maps. * gas/cfi/cfi-x86_64.s: Likewise. * gas/cfi/cfi-i386.d: Updated. * gas/cfi/cfi-x86_64.d: Likewise. opcodes/ 2008-08-01 H.J. Lu <hongjiu.lu@intel.com> * i386-reg.tbl: Use Dw2Inval on AVX registers. * i386-tbl.h: Regenerated.	2008-08-01 14:21:30 +00:00
Alan Modra	081ba1b3c0	include/opcode/ * ppc.h (PPC_OPCODE_405): Define. (PPC_OPERAND_FSL, PPC_OPERAND_FCR, PPC_OPERAND_UDI): Define. gas/ * config/tc-ppc.c (parse_cpu): Separate handling of -m403/405. (md_show_usage): Likewise. opcodes/ * ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields. * ppc-opc.c (powerpc_operands): Add Xilinx APU related operands. (insert_sprg, PPC405): Use PPC_OPCODE_405. (powerpc_opcodes): Add Xilinx APU related opcodes.	2008-07-30 06:29:22 +00:00
Alan Modra	0af1713e7c	Silence gcc printf warnings	2008-07-30 04:34:58 +00:00
Richard Sandiford	30c0909079	include/elf/ * mips.h (ELF_ST_IS_MIPS16, ELF_ST_SET_MIPS16): New macros. bfd/ * elfxx-mips.c (mips_elf_check_mips16_stubs): Use ELF_ST_IS_MIPS16. (mips_elf_calculate_relocation): Likewise. (_bfd_mips_elf_add_symbol_hook): Likewise. (_bfd_mips_elf_finish_dynamic_symbol): Likewise. (_bfd_mips_vxworks_finish_dynamic_symbol): Likewise. opcodes/ * mips-dis.c (_print_insn_mips): Use ELF_ST_IS_MIPS16. gas/ * config/tc-mips.c (mips16_mark_labels): Use ELF_ST_SET_MIPS16. (mips_fix_adjustable): Likewise. (mips_frob_file_after_relocs): Likewise. gas/testsuite/ * gas/mips/mips16-vis-1.d, gas/mips/mips16-vis-1.s: New tests. * gas/mips/mips.exp: Run them.	2008-07-10 19:05:29 +00:00
Adam Nemet	c27e721e3e	* mips-opc.c (CP): New macro. (mips_builtin_opcodes): Mark c0, c2 and c3 as CP. Add Octeon to the membership of di, dmfc0, dmtc0, ei, mfc0 and mtc0. Add dmfc2 and dmtc2 Octeon instructions.	2008-07-07 19:11:15 +00:00
Stan Shebs	bd2e25575c	2008-07-07 Stan Shebs <stan@codesourcery.com> * dis-init.c (init_disassemble_info): Init endian_code field. * arm-dis.c (print_insn): Disassemble code according to setting of endian_code. (print_insn_big_arm): Detect when BE8 extension flag has been set.	2008-07-07 18:35:24 +00:00
Richard Sandiford	6ba2a41553	bfd/ * syms.c (BSF_SYNTHETIC): New flag. * elf.c (_bfd_elf_get_synthetic_symtab): Set it. * elf32-ppc.c (ppc_elf_get_synthetic_symtab): Likewise. * elf64-ppc.c (ppc64_elf_get_synthetic_symtab): Likewise. * bfd-in.h (bfd_asymbol_flavour): Return bfd_target_unknown_flavour for synthetic symbols. * bfd-in2.h: Regenerate. opcodes/ * mips-dis.c (_print_insn_mips): Use bfd_asymbol_flavour to check for ELF symbols.	2008-06-30 20:51:58 +00:00
Peter Bergner	c8187e1509	gas/ * config/tc-ppc.c (parse_cpu): Handle -m464. (md_show_usage): Likewise. opcodes/ * ppc-dis.c (powerpc_init_dialect): Handle -M464. (print_ppc_disassembler_options): Likewise. * ppc-opc.c (PPC464): Define. (powerpc_opcodes): Add mfdcrux and mtdcrux.	2008-06-25 16:49:03 +00:00
Ralf Wildenhues	7a283e077b	* configure: Regenerate. config/ * override.m4: Use m4_version_prereq throughout. (_AC_ARG_VAR_VALIDATE, AC_MSG_FAILURE): Backport from git Autoconf: output pwd along with fatal errors, so the right config.log file is hinted at more prominently. (PARSE_ARGS): Push setting of ac_pwd in this diversion. (_GCC_AUTOCONF_VERSION): New, define to 2.59 if not defined. (_GCC_AUTOCONF_VERSION_CHECK): New macro, require use of Autoconf version _GCC_AUTOCONF_VERSION throughout the tree. (m4_wrap): New override, fix for Posix semantics of m4wrap. binutils/ * configure: Regenerate. opcodes/ * configure: Regenerate. bfd/ * configure: Regenerate. gas/ * configure: Regenerate. gprof/ * configure: Regenerate. ld/ * config.in: Regenerate. * configure: Regenerate.	2008-06-17 23:14:44 +00:00
Peter Bergner	fa452fa683	include/opcode/ * ppc.h (ppc_cpu_t): New typedef. (struct powerpc_opcode <flags>): Use it. (struct powerpc_operand <insert, extract>): Likewise. (struct powerpc_macro <flags>): Likewise. gas/ * config/tc-ppc.c (ppc_cpu): Use ppc_cpu_t typedef. (ppc_insert_operand): Likewise. (ppc_machine): Likewise. * config/tc-ppc.h: #include "opcode/ppc.h" (struct _ppc_fix_extra <ppc_cpu>): Use ppc_cpu_t typedef. (ppc_cpu): Update extern decl. opcodes/ * ppc-dis.c (print_insn_powerpc): Update prototye to use new ppc_cpu_t typedef. (struct dis_private): New. (POWERPC_DIALECT): New define. (powerpc_dialect): Renamed to... (powerpc_init_dialect): This. Update to use ppc_cpu_t and struct dis_private. (print_insn_big_powerpc): Update for using structure in info->private_data. (print_insn_little_powerpc): Likewise. (operand_value_powerpc): Change type of dialect param to ppc_cpu_t. (skip_optional_operands): Likewise. (print_insn_powerpc): Likewise. Remove initialization of dialect. * ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp, extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe, extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr, extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm, insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe, insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs, insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect param to be of type ppc_cpu_t. Update prototype.	2008-06-13 20:16:00 +00:00
Nick Clifton	dd3cbb7ef7	* mips.h: Document new field descriptors +Q. (OP_SH_SEQI, OP_MASK_SEQI): New bit mask and shift count for SEQI. opcodes/ * mips-dis.c (print_insn_args): Handle field descriptor +Q. * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq, seqi, sne and snei. gas/ * config/tc-mips.c (validate_mips_insn): Handle field descriptor +Q. (mips_ip): Likewise. (macro_build): Likewise. (CPU_HAS_SEQ): New macro. (macro2) <M_SEQ_I, M_SNE_I>: Use it. Emit seq/sne and seqi/snei. gas/testsuite/ * gas/mips/octeon.s, gas/mips/octeon.d: Add tests for seq* and sne. gas/mips/octeon-ill.s, gas/mips/octeon-ill.s: Add tests for seqi and snei.	2008-06-12 21:44:54 +00:00
Nick Clifton	bb35fb24c1	include/opcode/ * mips.h: Document new field descriptors +x, +X, +p, +P, +s, +S. Update comment before MIPS16 field descriptors to mention MIPS16. (OP_SH_BBITIND, OP_MASK_BBITIND): New bit mask and shift count for BBIT. (OP_SH_CINSPOS, OP_MASK_CINSPOS, OP_SH_CINSLM1, OP_MASK_CINSLM1): New bit masks and shift counts for cins and exts. gas/ * config/tc-mips.c (validate_mips_insn): Handle field descriptors +x, +X, +p, +P, +s, +S. (mips_ip): Likewise. opcodes/ * mips-dis.c (print_insn_args): Handle field descriptors +x, +p, +s, +S. * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions baddu, bbit, cins, dmul, pop, dpop, exts, mtm, mtp, syncs, syncw, syncws, vm3mulu, vm0 and vmulu. gas/testsuite/ gas/mips/octeon.s, gas/mips/octeon.d: Add tests for baddu, bbit, cins, dmul, pop, dpop, exts, mtm, mtp, syncs, syncw, syncws, vm3mulu, vm0 and vmulu. gas/mips/octeon-ill.s, gas/mips/octeon-ill.s: New test. * gas/mips/mips.exp: Run it. Run octeon test with run_dump_test_arches.	2008-06-12 16:14:52 +00:00
H.J. Lu	a5dabbb023	gas/testsuite/ 2008-05-30 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/x86-64-avx.s: Add tests for vmovd on 64bit operands. * gas/i386/x86-64-sse2avx.s: Add tests for movd on 64bit operands. * gas/testsuite/gas/i386/x86-64-avx.d: Updated. * gas/testsuite/gas/i386/x86-64-avx-intel.d: Likewise. * gas/testsuite/gas/i386/x86-64-sse2avx.d: Likewise. opcodes/ 2008-05-30 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.tbl: Add vmovd with 64bit operand. * i386-tbl.h: Regenerated.	2008-05-30 19:49:18 +00:00
Martin Schwidefsky	725a9891bc	2008-05-27 Martin Schwidefsky <schwidefsky@de.ibm.com> * s390-opc.c (INSTR_RRF_R0RR): Fix RRF_R0RR operand format. 2008-05-27 Martin Schwidefsky <schwidefsky@de.ibm.com> * gas/s390/zarch-z990.d (idte): Fix operand format.	2008-05-27 12:52:44 +00:00
H.J. Lu	cbc80391d0	gas/testsuite/ 2008-05-22 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/sse-noavx.s: Add tests for cvtpd2pi, cvtpi2pd and cvttpd2pi. * gas/i386/x86-64-sse-noavx.s: Likewise. * gas/i386/sse-noavx.d: Updated. * gas/i386/x86-64-sse-noavx.d: Likewise. opcodes/ 2008-05-22 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi. * i386-tbl.h: Regenerated.	2008-05-23 00:18:52 +00:00
H.J. Lu	116615c5f7	gas/testsuite/ 2008-05-22 H.J. Lu <hongjiu.lu@intel.com> PR gas/6517 * gas/i386/avx.s: Add tests for unspecified memory operand size in Intel syntax. * gas/i386/x86-64-avx.s: Likewise. * gas/i386/simd.s: Add tests for cvtsi2ss and cvtsi2sd with unspecified memory operand size in Intel syntax. * gas/i386/avx.d: Updated. * gas/i386/avx-intel.d: Likewise. * gas/i386/simd.d: Likewise. * gas/i386/simd-intel.d: Likewise. * gas/i386/simd-suffix.d: Likewise. * gas/i386/x86-64-avx.d: Likewise. * gas/i386/x86-64-avx-intel.d: Likewise. opcodes/ 2008-05-22 H.J. Lu <hongjiu.lu@intel.com> PR gas/6517 * i386-opc.tbl: Break cvtsi2ss/cvtsi2sd/vcvtsi2sd/vcvtsi2ss into 32bit and 64bit. Remove Reg64\|Qword and add IgnoreSize\|No_qSuf on 32bit version. * i386-tbl.h: Regenerated.	2008-05-22 20:52:54 +00:00
H.J. Lu	d9479f2d8d	gas/testsuite/ 2008-05-21 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/sse-noavx.s: Add tests for movdq2q and movq2dq. * gas/i386/x86-64-sse-noavx.s: Likewise. * gas/i386/sse-noavx.d: Updated. * gas/i386/x86-64-sse-noavx.d: Likewise. opcodes/ 2008-05-21 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.tbl: Add NoAVX to movdq2q and movq2dq. * i386-tbl.h: Regenerated.	2008-05-21 21:40:57 +00:00
Nick Clifton	3ce6fddb77	* cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond.	2008-05-21 07:50:55 +00:00
Alan Modra	8944f3c277	update dependencies	2008-05-14 06:45:42 +00:00
H.J. Lu	f1f8f695c0	gas/ 2008-05-02 H.J. Lu <hongjiu.lu@intel.com> * NEWS: Mention XSAVE, EPT and MOVBE. * config/tc-i386.c (cpu_arch): Add .movbe and .ept. (md_show_usage): Add .movbe and .ept. * doc/c-i386.texi: Add movbe and ept to -march=. Document .movbe and .ept. gas/testsuite/ 2008-05-02 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Run movbe, movbe-intel, inval-movbe, ept, ept-intel, inval-ept, x86-64-movbe, x86-64-movbe-intel, x86-64-inval-movbe. x86-64-ept, x86-64-ept-intel and x86-64-inval-ept. * gas/i386/arch-10.s: Add movbe and invept. * gas/i386/x86-64-arch-2.s: Likewise. * gas/i386/ept.d: New file * gas/i386/ept-intel.d: Likewise. * gas/i386/ept.s: Likewise. * gas/i386/inval-ept.l: Likewise. * gas/i386/inval-ept.s: Likewise. * gas/i386/inval-movbe.l: Likewise. * gas/i386/inval-movbe.s: Likewise. * gas/i386/movbe.d: Likewise. * gas/i386/movbe-intel.d: Likewise. * gas/i386/movbe.s: Likewise. * gas/i386/x86-64-inval-ept.l: Likewise. * gas/i386/x86-64-inval-ept.s: Likewise. * gas/i386/x86-64-inval-movbe.l: Likewise. * gas/i386/x86-64-inval-movbe.s: Likewise. * gas/i386/x86-64-ept.d: Likewise. * gas/i386/x86-64-ept-intel.d: Likewise. * gas/i386/x86-64-ept.s: Likewise. * gas/i386/x86-64-movbe.d: Likewise. * gas/i386/x86-64-movbe-intel.d: Likewise. * gas/i386/x86-64-movbe.s: Likewise. * gas/i386/arch-10.d: Updated. * gas/i386/arch-10-1.l: Likewise. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/x86-64-arch-2.d: Likewise. opcodes/ 2008-05-02 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (MOVBE_Fixup): New. (Mo): Likewise. (PREFIX_0F3880): Likewise. (PREFIX_0F3881): Likewise. (PREFIX_0F38F0): Updated. (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881. Update PREFIX_0F38F0 and PREFIX_0F38F1 for movbe. (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881. * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and CPU_EPT_FLAGS. (cpu_flags): Add CpuMovbe and CpuEPT. * i386-opc.h (CpuMovbe): New. (CpuEPT): Likewise. (CpuLM): Updated. (i386_cpu_flags): Add cpumovbe and cpuept. * i386-opc.tbl: Add entries for movbe and EPT instructions. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.	2008-05-02 16:53:40 +00:00
Adam Nemet	89aa3097c2	* mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for the two drem and the two dremu macros.	2008-04-29 23:27:01 +00:00
Adam Nemet	39c5c16818	* mips-opc.c (mips_builtin_opcodes): Mark prefx and c1 instructions FP_S. Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and cop1 macros INSN2_M_FP_S. Mark l.d, li.d, ldc1 and sdc1 macros INSN2_M_FP_D. Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.	2008-04-28 17:03:58 +00:00
David S. Miller	f04d18b76a	gas/ * config/tc-sparc.c: Accept 'softint_clear' and 'softint_set' %asr aliases. * doc/c-sparc.texi: Consistently refer to architecture 'versions', rather than occaisionally 'levels'. Consistently refer to Sun's UNIX variant as SunOS, every version of Solaris is also SunOS. Document new 'softint_clear' and 'softint_set' aliases. Clarify which architecture versions support '%dcr', '%cq', and '%gl'. Add section on 32-bit/64-bit opcode translations. opcodes/ * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr instead of %sys_tick_cmpr, as suggested in architecture manuals.	2008-04-25 19:58:03 +00:00
H.J. Lu	6194aaaba7	bfd/ 2008-04-23 Paolo Bonzini <bonzini@gnu.org> * aclocal.m4: Regenerate. * configure: Regenerate. binutils/ 2008-04-23 Paolo Bonzini <bonzini@gnu.org> * aclocal.m4: Regenerate. * configure: Regenerate. gas/ 2008-04-23 Paolo Bonzini <bonzini@gnu.org> * aclocal.m4: Regenerate. * configure: Regenerate. gold/ 2008-04-23 Paolo Bonzini <bonzini@gnu.org> * aclocal.m4: Regenerate. * configure: Regenerate. gprof/ 2008-04-23 Paolo Bonzini <bonzini@gnu.org> * aclocal.m4: Regenerate. * configure: Regenerate. ld/ 2008-04-23 Paolo Bonzini <bonzini@gnu.org> * aclocal.m4: Regenerate. * configure: Regenerate. opcodes/ 2008-04-23 Paolo Bonzini <bonzini@gnu.org> * aclocal.m4: Regenerate. * configure: Regenerate.	2008-04-23 16:11:47 +00:00
David S. Miller	1a6b486f73	opcodes/ * sparc-opc.c (asi_table): Add UltraSPARC and Niagara extended values. (prefetch_table): Add missing values. gas/ * config/tc-sparc.c (v9a_asr_table): Add missing 'stick' and 'stick_cmpr', and document ordering rules of table. (tc_gen_reloc): Accept BFD_RELOC_SPARC_PC22 and BFD_RELOC_SPARC_PC10. * doc/c-sparc.texi: New section on Sparc constants. Add documentation for %stick and %stick_cmpr. gas/testsuite/ * gas/sparc/pc2210.d: New file. * gas/sparc/pc2210.d: Likewise. * gas/sparc/sparc.exp: Run new %pc22/%pc10 relocation test.	2008-04-23 07:49:33 +00:00
H.J. Lu	81f8a9131a	gas/ 2008-04-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (md_assemble): Don't check SSE instructions if noavx is 0. opcodes/ 2008-04-22 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (opcode_modifiers): Add NoAVX. * i386-opc.h (NoAVX): New. (OldGcc): Updated. (i386_opcode_modifier): Add noavx. * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3 instructions which don't have AVX equivalent. * i386-tbl.h: Regenerated.	2008-04-22 22:27:13 +00:00
H.J. Lu	dae39accc2	gas/ 2008-04-18 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (build_modrm_byte): Swap REG and NDS for FMA. gas/testsuite/ 2008-04-18 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/arch-10.d: Updated. * gas/i386/avx.d: Likewise. * gas/i386/avx-intel.d: Likewise. * gas/i386/x86-64-arch-2.d: Likewise. * gas/i386/x86-64-avx.d: Likewise. * gas/i386/x86-64-avx-intel.d: Likewise. opcodes/ 2008-04-18 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (OP_VEX_FMA): New. (OP_EX_VexImmW): Likewise. (VexFMA): Likewise. (Vex128FMA): Likewise. (EXVexImmW): Likewise. (get_vex_imm8): Likewise. (OP_EX_VexReg): Likewise. (vex_i4_done): Renamed to ... (vex_w_done): This. (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps and vpermil2pd. Replace Vex/Vex128 with VexFMA/Vex128FMA on FMA instructions. (print_insn): Updated. (OP_EX_VexW): Rewrite to swap register in VEX with EX. (OP_REG_VexI4): Check invalid high registers.	2008-04-18 13:10:32 +00:00
Dwarakanath Rajagopal	ce886ab1f8	<opcode changes> 2008-04-16 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> Michael Meissner <michael.meissner@amd.com> * i386-opc.tbl: Fix protX to allow memory in the middle operand. * i386-tbl.h: Regenerate from i386-opc.tbl. <gas/testsuite changes> 2008-04-16 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> Michael Meissner <michael.meissner@amd.com> * gas/i386/x86-64-sse5.s: Add protX tests to allow memory in the middle operand. * gas/i386/x86-64-sse5.d: Likewise.	2008-04-16 15:31:33 +00:00
Alan Modra	19a6653ce8	ppc e500mc support	2008-04-14 11:01:38 +00:00
Andreas Krebbel	112b7c5071	2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com> * s390-dis.c (init_disasm): Evaluate disassembler_options. (print_s390_disassembler_options): New function. * disassemble.c (disassembler_usage): Invoke print_s390_disassembler_options. 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com> * dis-asm.h (print_s390_disassembler_options): Prototype added.	2008-04-10 13:36:43 +00:00
Andreas Krebbel	7ff4264847	2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com> * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes of local variables used for mnemonic parsing: prefix, suffix and number.	2008-04-10 13:05:07 +00:00
Andreas Krebbel	45a5551e74	2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com> * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic extensions for conditional jumps (o, p, m, nz, z, nm, np, no). (s390_crb_extensions): New extensions table. (insertExpandedMnemonic): Handle '$' tag. * s390-opc.txt: Remove conditional jump variants which can now be expanded automatically. Replace '' tag with '$' in the compare and branch instructions. 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com> gas/s390/zarch-z10.d: Map the compare and branch variants with odd condition code mask to version with an even mask.	2008-04-10 08:59:46 +00:00
H.J. Lu	06c8514ace	2008-04-07 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (PREFIX_VEX_38XX): Add a tab. (PREFIX_VEX_3AXX): Likewis.	2008-04-07 21:29:50 +00:00
H.J. Lu	b122c2853a	2008-04-07 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.tbl: Remove 4 extra blank lines.	2008-04-07 17:35:12 +00:00
H.J. Lu	594ab6a333	gas/ 2008-04-04 H.J. Lu <hongjiu.lu@intel.com> * NEWS: Mention XSAVE. Change CLMUL to PCLMUL. * config/tc-i386.c (cpu_arch): Add .pclmul. (md_show_usage): Replace clmul with pclmul. * doc/c-i386.texi: Likewise. gas/testsuite/ 2008-04-04 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/arch-10-1.l: Replace CLMUL with PCLMUL. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/arch-10.s: Likewise. * gas/i386/clmul-intel.d: Likewise. * gas/i386/clmul.d: Likewise. * gas/i386/clmul.s: Likewise. * gas/i386/x86-64-arch-2.s: Likewise. * gas/i386/x86-64-clmul-intel.d: Likewise. * gas/i386/x86-64-clmul.d: Likewise. * gas/i386/x86-64-clmul.s: Likewise. * gas/i386/arch-10.d: Replace clmul with pclmul. * gas/i386/x86-64-arch-2.d: Likewise. opcodes/ 2008-04-04 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL with CPU_PCLMUL_FLAGS/CpuPCLMUL. (cpu_flags): Replace CpuCLMUL with CpuPCLMUL. * i386-opc.tbl: Likewise. * i386-opc.h (CpuCLMUL): Renamed to ... (CpuPCLMUL): This. (CpuFMA): Updated. (i386_cpu_flags): Replace cpuclmul with cpupclmul. * i386-init.h: Regenerated.	2008-04-04 16:34:23 +00:00
H.J. Lu	c0f3af977b	binutils/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * dwarf.c (dwarf_regnames_i386): Add AVX registers. (dwarf_regnames_x86_64): Likewise. gas/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * NEWS: Mention AES, CLMUL, AVX/FMA and -msse2avx. * doc/c-i386.texi: Add avx, aes, clmul and fma to -march=. Document -msse2avx, .avx, .aes, .clmul and .fma. * config/tc-i386.c (YMMWORD_MNEM_SUFFIX): New. (vex_prefix): Likewise. (sse2avx): Likewise. (CPU_FLAGS_ARCH_MATCH): Likewise. (CPU_FLAGS_64BIT_MATCH): Likewise. (CPU_FLAGS_32BIT_MATCH): Likewise. (CPU_FLAGS_PERFECT_MATCH): Likewise. (regymm): Likewise. (vex_imm4): Likewise. (fits_in_imm4): Likewise. (build_vex_prefix): Likewise. (VEX_check_operands): Likewise. (bad_implicit_operand): Likewise. (OPTION_MSSE2AVX): Likewise. (T_YMMWORD): Likewise. (_i386_insn): Add vex. (cpu_arch): Add .avx, .aes, .clmul and .fma. (cpu_flags_match): Changed to take a pointer to const template. Enable encoding SSE instructions with VEX prefix for -msse2avx. (match_mem_size): Also check ymmword. (operand_type_match): Clear ymmword. (md_begin): Allow '_' in mnemonic. (type_names): Add OPERAND_TYPE_VEX_IMM4. (process_immext): Update assert. (md_assemble): Don't call process_immext if sse2avx and immext are true. Call build_vex_prefix if vex is true. (parse_insn): Updated for cpu_flags_match. (swap_operands): Handle 5 operands. (match_template): Handle 5 operands. Updated for cpu_flags_match. Check regymm. Call VEX_check_operands. Handle YMMWORD_MNEM_SUFFIX. (process_suffix): Handle YMMWORD_MNEM_SUFFIX. (check_byte_reg): Check regymm. (process_operands): Duplicate the destination register for -msse2avx if needed. (build_modrm_byte): Updated for instructions with VEX encoding. (output_insn): Output VEX prefix if needed. (md_longopts): Add msse2avx. (md_parse_option): Handle OPTION_MSSE2AVX. (md_show_usage): Add avx, aes, clmul, fma and -msse2avx. (intel_e09): Support YMMWORD. (intel_e11): Likewise. (intel_get_token): Likewise. gas/testsuite/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Run aes, aes-intel, x86-64-aes, x86-64-aes-intel, avx, avx-intel, inval-avx, x86-64-avx, x86-64-avx-intel and x86-64-inval-avx. * gas/cfi/cfi-i386.s: Add tests for AVX register maps. * gas/cfi/cfi-x86_64.s: Likewise. * gas/i386/aes.d: New. * gas/i386/aes.s: Likewise. * gas/i386/aes-intel.d: Likewise. * gas/i386/avx.d: Likewise. * gas/i386/avx.s: Likewise. * gas/i386/avx-intel.d: Likewise. * gas/i386/clmul.d: Likewise. * gas/i386/clmul-intel.d: Likewise. * gas/i386/clmul.s: Likewise. * gas/i386/i386.exp: Likewise. * gas/i386/inval-avx.l: Likewise. * gas/i386/inval-avx.s: Likewise. * gas/i386/sse2avx.d: Likewise. * gas/i386/sse2avx.s: Likewise. * gas/i386/x86-64-aes.d: Likewise. * gas/i386/x86-64-aes.s: Likewise. * gas/i386/x86-64-aes-intel.d: Likewise. * gas/i386/x86-64-avx.d: Likewise. * gas/i386/x86-64-avx.s: Likewise. * gas/i386/x86-64-avx-intel.d: Likewise. * gas/i386/x86-64-clmul.d: Likewise. * gas/i386/x86-64-clmul-intel.d: Likewise. * gas/i386/x86-64-clmul.s: Likewise. * gas/i386/x86-64-inval-avx.l: Likewise. * gas/i386/x86-64-inval-avx.s: Likewise. * gas/i386/x86-64-sse2avx.d: Likewise. * gas/i386/x86-64-sse2avx.s: Likewise. * gas/i386/arch-10.s: Add tests for AVX, AES, CLMUL and FMA. * gas/i386/x86-64-arch-2.s: Likewise. * gas/i386/rexw.s: Add AVX tests. * gas/i386/x86-64-opcode-inval.s: Remove lds/les test. * gas/cfi/cfi-i386.d: Updated. * gas/cfi/cfi-x86_64.d: Likewise. * gas/i386/arch-10.d: Likewise. * gas/i386/arch-10-1.l: Likewise. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/rexw.d: Likewise. * gas/i386/x86-64-arch-2.d: Likewise. * gas/i386/x86-64-opcode-inval.d: Likewise. * gas/i386/x86-64-opcode-inval-intel.d: Likewise. include/opcode/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * i386.h (MAX_OPERANDS): Set to 5. (MAX_MNEM_SIZE): Changed to 20. opcodes/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (OP_E_register): New. (OP_E_memory): Likewise. (OP_VEX): Likewise. (OP_EX_Vex): Likewise. (OP_EX_VexW): Likewise. (OP_XMM_Vex): Likewise. (OP_XMM_VexW): Likewise. (OP_REG_VexI4): Likewise. (PCLMUL_Fixup): Likewise. (VEXI4_Fixup): Likewise. (VZERO_Fixup): Likewise. (VCMP_Fixup): Likewise. (VPERMIL2_Fixup): Likewise. (rex_original): Likewise. (rex_ignored): Likewise. (Mxmm): Likewise. (XMM): Likewise. (EXxmm): Likewise. (EXxmmq): Likewise. (EXymmq): Likewise. (Vex): Likewise. (Vex128): Likewise. (Vex256): Likewise. (VexI4): Likewise. (EXdVex): Likewise. (EXqVex): Likewise. (EXVexW): Likewise. (EXdVexW): Likewise. (EXqVexW): Likewise. (XMVex): Likewise. (XMVexW): Likewise. (XMVexI4): Likewise. (PCLMUL): Likewise. (VZERO): Likewise. (VCMP): Likewise. (VPERMIL2): Likewise. (xmm_mode): Likewise. (xmmq_mode): Likewise. (ymmq_mode): Likewise. (vex_mode): Likewise. (vex128_mode): Likewise. (vex256_mode): Likewise. (USE_VEX_C4_TABLE): Likewise. (USE_VEX_C5_TABLE): Likewise. (USE_VEX_LEN_TABLE): Likewise. (VEX_C4_TABLE): Likewise. (VEX_C5_TABLE): Likewise. (VEX_LEN_TABLE): Likewise. (REG_VEX_XX): Likewise. (MOD_VEX_XXX): Likewise. (PREFIX_0F38DB..PREFIX_0F38DF): Likewise. (PREFIX_0F3A44): Likewise. (PREFIX_0F3ADF): Likewise. (PREFIX_VEX_XXX): Likewise. (VEX_OF): Likewise. (VEX_OF38): Likewise. (VEX_OF3A): Likewise. (VEX_LEN_XXX): Likewise. (vex): Likewise. (need_vex): Likewise. (need_vex_reg): Likewise. (vex_i4_done): Likewise. (vex_table): Likewise. (vex_len_table): Likewise. (OP_REG_VexI4): Likewise. (vex_cmp_op): Likewise. (pclmul_op): Likewise. (vpermil2_op): Likewise. (m_mode): Updated. (es_reg): Likewise. (PREFIX_0F38F0): Likewise. (PREFIX_0F3A60): Likewise. (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE. (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF and PREFIX_VEX_XXX entries. (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE. (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and PREFIX_0F3ADF. (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE. Add MOD_VEX_XXX entries. (ckprefix): Initialize rex_original and rex_ignored. Store the REX byte in rex_original. (get_valid_dis386): Handle the implicit prefix in VEX prefix bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE. (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before calling get_valid_dis386. Use rex_original and rex_ignored when printing out REX. (putop): Handle "XY". (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and ymmq_mode. (OP_E_extended): Updated to use OP_E_register and OP_E_memory. (OP_XMM): Handle VEX. (OP_EX): Likewise. (XMM_Fixup): Likewise. (CMP_Fixup): Use ARRAY_SIZE. * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS, CPU_FMA_FLAGS and CPU_AVX_FLAGS. (operand_type_init): Add OPERAND_TYPE_REGYMM and OPERAND_TYPE_VEX_IMM4. (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA. (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD, VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources, VexImmExt and SSE2AVX. (operand_types): Add RegYMM, Ymmword and Vex_Imm4. * i386-opc.h (CpuAVX): New. (CpuAES): Likewise. (CpuCLMUL): Likewise. (CpuFMA): Likewise. (Vex): Likewise. (Vex256): Likewise. (VexNDS): Likewise. (VexNDD): Likewise. (VexW0): Likewise. (VexW1): Likewise. (Vex0F): Likewise. (Vex0F38): Likewise. (Vex0F3A): Likewise. (Vex3Sources): Likewise. (VexImmExt): Likewise. (SSE2AVX): Likewise. (RegYMM): Likewise. (Ymmword): Likewise. (Vex_Imm4): Likewise. (Implicit1stXmm0): Likewise. (CpuXsave): Updated. (CpuLM): Likewise. (ByteOkIntel): Likewise. (OldGcc): Likewise. (Control): Likewise. (Unspecified): Likewise. (OTMax): Likewise. (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma. (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256, vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a, vex3sources, veximmext and sse2avx. (i386_operand_type): Add regymm, ymmword and vex_imm4. * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions. * i386-reg.tbl: Add AVX registers, ymm0..ymm15. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.	2008-04-03 14:03:21 +00:00
Bernd Schmidt	086134ec0e	gas/testsuite/: From Robin Getz <rgetz@blackfin.uclinux.org> * gas/bfin/arithmetic.d: Update to reflect spaces/capitalization in recent changes in opcodes/bfin-dis.c. gas/bfin/arithmetic.s: Likewise. gas/bfin/bit.d: Likewise. gas/bfin/bit2.d: Likewise. gas/bfin/control_code.d: Likewise. gas/bfin/control_code2.d: Likewise. gas/bfin/event.d: Likewise. gas/bfin/event2.d: Likewise. gas/bfin/flow.d: Likewise. gas/bfin/flow2.d: Likewise. gas/bfin/load.d: Likewise. gas/bfin/logical.d: Likewise. gas/bfin/logical2.d: Likewise. gas/bfin/move.d: Likewise. gas/bfin/move2.d: Likewise. gas/bfin/parallel.d: Likewise. gas/bfin/parallel2.d: Likewise. gas/bfin/parallel3.d: Likewise. gas/bfin/parallel4.d: Likewise. gas/bfin/shift.d: Likewise. gas/bfin/shift2.d: Likewise. gas/bfin/stack.d: Likewise. gas/bfin/stack2.d: Likewise. gas/bfin/store.d: Likewise. gas/bfin/vector.d: Likewise. gas/bfin/vector2.d: Likewise. gas/bfin/video.d: Likewise. gas/bfin/video2.d: Likewise. opcodes/: * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d, c_imm32, c_huimm32e): Define. (constant_formats): Add flags for printing decimal, leading spaces, and exact symbols. (comment, parallel): Add global flags in all disassembly. (fmtconst): Take advantage of new flags, and print default in hex. (fmtconst_val): Likewise. (decode_macfunc): Be consistant with spaces, tabs, comments, capitalization in disassembly, fix minor coding style issues. (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise. (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0, decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0, decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0, decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0, decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0, decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0, decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0, decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0, decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0, _print_insn_bfin, print_insn_bfin): Likewise.	2008-03-26 16:48:32 +00:00
Bernd Schmidt	ee171c8f94	gas/ * config/bfin-parse.y (check_macfunc_option): Allow (IU) option for multiply and multiply-accumulate to data register instruction. (check_macfuncs): Don't check if accumulator matches the data register here. (assign_macfunc): Check if accumulator matches the data register in each rule that moves to the data register. gas/testsuite/ * gas/bfin/arithmetic.s, gas/bfin/arithmetic.d: Add check for IU option. * gas/bfin/expected_errors.l, gas/bfin/expected_errors.s: Add check for mismatch of accumulator and data register. opcodes/ * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for multiply and multiply-accumulate to data register instruction.	2008-03-26 16:21:10 +00:00
Bernd Schmidt	b21c9cb440	opcodes: From Robin Getz <robin.getz@analog.com> * bfin-dis.c (bu32): Typedef. (enum const_forms_t): Add c_uimm32 and c_huimm32. (constant_formats[]): Add uimm32 and huimm16. (fmtconst_val): New. (uimm32): Define. (huimm32): Define. (imm16_val): Define. (luimm16_val): Define. (struct saved_state): Define. (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG, A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG, LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define. (get_allreg): New. (decode_LDIMMhalf_0): Print out the whole register value. gas/testsuite: From Jie Zhang <jie.zhang@analog.com> * gas/bfin/load.d: Update.	2008-03-26 14:50:52 +00:00
Andreas Krebbel	5746fb46c8	2008-03-19 Andreas Krebbel <krebbel1@de.ibm.com> * opcodes/s390-mkopc.c (s390_opcode_cpu_val): S390_OPCODE_Z10 added. (s390_cond_extensions): Reduced extensions to the compare related. (main): z10 cpu type option added. (expandConditionalJump): Renamed to ... (insertExpandedMnemonic): ... this. * opcodes/s390-opc.c: Re-group the operand format makros. (INSTR_RIE_RRPU, INSTR_RIE_RRP0, INSTR_RIE_RUPI, INSTR_RIE_R0PI, INSTR_RIE_RUPU, INSTR_RIE_R0PU, INSTR_RIE_R0IU, INSTR_RIE_R0I0, INSTR_RIE_R0UU, INSTR_RIE_R0U0, INSTR_RIE_RRUUU, INSTR_RIS_RURDI, INSTR_RIS_R0RDI, INSTR_RIS_RURDU, INSTR_RIS_R0RDU, INSTR_RRF_U0RR, INSTR_RRF_00RR, INSTR_RRS_RRRDU, INSTR_RRS_RRRD0, INSTR_RXY_URRD, INSTR_SIY_IRD, INSTR_SIL_RDI, INSTR_SIL_RDU): New instruction formats added. (MASK_RIE_RRPU, MASK_RIE_RRP0, MASK_RIE_RUPI, MASK_RIE_R0PI, MASK_RIE_RUPU, MASK_RIE_R0PU, MASK_RIE_R0IU, MASK_RIE_R0I0, MASK_RIE_R0UU, MASK_RIE_R0U0, MASK_RIE_RRUUU, MASK_RIS_RURDI, MASK_RIS_R0RDI, MASK_RIS_RURDU, MASK_RIS_R0RDU, MASK_RRF_U0RR, MASK_RRF_00RR, MASK_RRS_RRRDU, MASK_RRS_RRRD0, MASK_RXY_URRD, MASK_SIY_IRD, MASK_SIL_RDI, MASK_SIL_RDU): New instruction format masks added. (s390_opformats): New formats added "ris", "rrs", "sil". * opcodes/s390-opc.txt: Add the conditional jumps with the extensions removed from automatic expansion in s390-mkopc.c manually. (asi - trtre): Add new System z10 EC instructions. * include/opcode/s390.h (s390_opcode_cpu_val): S390_OPCODE_Z10 added. 2008-03-19 Andreas Krebbel <krebbel1@de.ibm.com> * config/tc-s390.c (md_parse_option): z10 option added. 2008-03-19 Andreas Krebbel <krebbel1@de.ibm.com> * gas/s390/zarch-z10.d: New file. * gas/s390/zarch-z10.s: New file. * gas/s390/s390.exp: Run the z10 testcases.	2008-03-19 10:29:18 +00:00
Ralf Wildenhues	58c85be758	* configure.ac: m4_include config/proginstall.m4. * configure: Regenerate. config/ * proginstall.m4: New file, with fixed AC_PROG_INSTALL. bfd/ * aclocal.m4: Regenerate. * configure: Likewise. * Makefile.in: Likewise. bfd/doc/ * Makefile.in: Regenerate. intl/ * aclocal.m4: Regenerate. * configure: Likewise. gas/ * aclocal.m4: Regenerate. * configure: Likewise. * Makefile.in: Likewise. * doc/Makefile.in: Likewise. ld/ * aclocal.m4: Regenerate. * configure: Likewise. * Makefile.in: Likewise. opcodes/ * aclocal.m4: Regenerate. * configure: Likewise. * Makefile.in: Likewise. binutils/ * aclocal.m4: Regenerate. * configure: Likewise. * Makefile.in: Likewise. * doc/Makefile.in: Likewise. gprof/ * aclocal.m4: Regenerate. * configure: Likewise. * Makefile.in: Likewise.	2008-03-17 22:17:33 +00:00
Alan Modra	50e7d84b42	bfd/ * Makefile.am: Run "make dep-am". * Makefile.in: Regenerate. * po/SRC-POTFILES.in: Regenerate. bfd/doc/ * Makefile.in: Regenerate. binutils/ * Makefile.am: Run "make dep-am". * Makefile.in: Regenerate. * doc/Makefile.in: Regenerate. * configure: Regenerate. gas/ * Makefile.am: Run "make dep-am". * Makefile.in: Regenerate. * configure: Regenerate. gprof/ * configure: Regenerate. ld/ * Makefile.am: Run "make dep-am". * Makefile.in: Regenerate. * configure: Regenerate. opcodes/ * Makefile.am: Run "make dep-am". * Makefile.in: Regenerate. * configure: Regenerate.	2008-03-13 02:05:23 +00:00
Alan Modra	de866fccd8	* ppc-opc.c (powerpc_opcodes): Order and format.	2008-03-06 23:00:34 +00:00
Andreas Krebbel	98c3d90597	2008-03-06 Florian Krohm <fkrohm@us.ibm.com> * s390-opc.c (INSTR_RSL_R0RD): Fix operands. * s390-opc.txt (cmpsc): Duplicate entry removed. (dxr, sqdr, sqer, cxfbr, cdfbr, cefbr, lzer, lzdr, lzxr, cegbr, cdgbr, cxgbr, cegr, cdgr, cxgr, cxfr, cdfr, cefr, fixr, fidr, fier, cu42, cu41): Fix operand format. 2008-03-06 Andreas Krebbel <krebbel1@de.ibm.com> * gas/s390/esa-g5.d (cdfbr, cdfr, cefbr, cefr, cxfbr, cxfr, dxr, fidr, fier, fixr, lzdr, lzer, lzxr, sqdr, sqer, tp): Fix operand format. * gas/s390/esa-g5.s: Likewise. * gas/s390/zarch-z900.d (cdgbr, cdgr, cegbr, cegr, cxgbr, cxgr): Likewise. * gas/s390/zarch-z900.s: Likewise. * gas/s390/zarch-z9-109.d (cu41, cu42): Remove mask operand. * gas/s390/zarch-z9-109.s: Likewise.	2008-03-06 12:01:13 +00:00
H.J. Lu	28dbc07952	gas/testsuite/ 2008-03-01 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/x86-64-branch.s: Add tests for 16-bit near indirect branches. * gas/i386/x86-64-inval.s: Remove tests for 16-bit near indirect branches. * gas/i386/x86-64-branch.d: Updated. * gas/i386/x86-64-inval.l: Likewise. opcodes/ 2008-03-01 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64. * i386-tbl.h: Regenerated.	2008-03-01 23:30:51 +00:00
H.J. Lu	849830bdfb	gas/testsuite/ 2008-02-23 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/jump.s: Add tests for far branches. * gas/i386/jump16.s: Likewise. * gas/i386/jump.d: Updated. * gas/i386/jump16.d: Likewise. * gas/i386/x86-64-inval.l: Likewise. * gas/i386/x86-64-inval.s: Add tests for 16-bit near indirect branches. opcodes/ 2008-02-23 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.tbl: Disallow 16-bit near indirect branches for x86-64. * i386-tbl.h: Regenerated.	2008-02-23 17:29:17 +00:00
Jan Beulich	743ddb6b3d	opcodes/ 2008-02-21 Jan Beulich <jbeulich@novell.com> * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword and Fword for far indirect jmp. Allow Reg16 and Word for near indirect jmp on x86-64. Disallow Fword for lcall. * i386-tbl.h: Re-generate.	2008-02-21 16:18:04 +00:00
Nick Clifton	796d53134a	* cr16.h (cr16_num_optab): Declared. * cr16-opc.c (cr16_num_optab): Defined	2008-02-18 13:46:45 +00:00
H.J. Lu	65da13b5e0	gas/ 2008-02-16 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (inoutportreg): New. (process_immext): New. (md_assemble): Use it. (update_imm): Use imm16 and imm32s. (i386_att_operand): Use inoutportreg. opcodes/ 2008-02-16 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG. * i386-init.h: Regenerated.	2008-02-16 16:16:48 +00:00
Nick Clifton	0e3361806e	PR binutils/5524 * configure.in (SHARED_LIBADD): Select the correct host specific file extension for shared libraries. * configure: Regenerate.	2008-02-14 12:33:17 +00:00
Jan Beulich	b7240065b3	gas/ 2008-02-13 Jan Beulich <jbeulich@novell.com> * config/tc-i386.c (parse_real_register): Don't return 'FLAT' if not in Intel mode. (i386_intel_operand): Ignore segment overrides in immediate and offset operands. (intel_e11): Range-check i.mem_operands before use as array index. Filter out FLAT for uses other than as segment override. (intel_get_token): Remove broken promotion of "FLAT:" to mean "offset FLAT:". gas/testsuite/ 2008-02-13 Jan Beulich <jbeulich@novell.com> * gas/i386/intelok.s: Replace invalid offset expression with valid ones. * gas/i386/x86_64.s: Likewise. opcodes/ 2008-02-13 Jan Beulich <jbeulich@novell.com> * i386-opc.h (RegFlat): New. * i386-reg.tbl (flat): Add. * i386-tbl.h: Re-generate.	2008-02-13 13:41:26 +00:00
Jan Beulich	34b772a651	gas/ 2008-02-13 Jan Beulich <jbeulich@novell.com> * config/tc-i386.c (intel_e09): Also special-case 'bound'. gas/testsuite/ 2008-02-13 Jan Beulich <jbeulich@novell.com> * gas/i386/intelbad.s, gas/i386/intelok.s: Add 'bound' tests. * gas/i386/intelbad.l, gas/i386/intelok.l, gas/i386/intelok.e, gas/i386/opcode-intel.d: Adjust. opcodes/ 2008-02-13 Jan Beulich <jbeulich@novell.com> * i386-dis.c (a_mode): New. (cond_jump_mode): Adjust. (Ma): Change to a_mode. (intel_operand_size): Handle a_mode. * i386-opc.tbl: Allow Dword and Qword for bound. * i386-tbl.h: Re-generate.	2008-02-13 13:29:31 +00:00
Jan Beulich	a60de03c61	gas/ 2008-02-13 Jan Beulich <jbeulich@novell.com> * config/tc-i386.c (allow_pseudo_reg): New. (parse_real_register): Check for NULL just once. Allow all register table entries when allow_pseudo_reg is non-zero. Don't allow any registers without type when allow_pseudo_reg is zero. (tc_x86_regname_to_dw2regnum): Replace with ... (tc_x86_parse_to_dw2regnum): ... this. (tc_x86_frame_initial_instructions): Adjust for above change. * config/tc-i386.h (tc_regname_to_dw2regnum): Remove. (tc_parse_to_dw2regnum): New. (tc_x86_regname_to_dw2regnum): Replace with ... (tc_x86_parse_to_dw2regnum): ... this. * dw2gencfi.c (tc_parse_to_dw2regnum): New, broken out of ... (cfi_parse_reg): ... this. Use tc_parse_to_dw2regnum. Adjust error handling. gas/testsuite/ 2008-02-13 Jan Beulich <jbeulich@novell.com> * gas/cfi/cfi-i386.s: Add code testing use of all registers. Fix a few comments. * gas/cfi/cfi-x86_64.s: Likewise. * gas/cfi/cfi-i386.d, gas/cfi/cfi-x86_64.d: Adjust. opcodes/ 2008-02-13 Jan Beulich <jbeulich@novell.com> * i386-gen.c (process_i386_registers): Process new fields. * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to unsigned char. Add dw2_regnum and Dw2Inval. * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo register names. * i386-tbl.h: Re-generate.	2008-02-13 10:14:40 +00:00
H.J. Lu	4b6bc8ebeb	Correct last 2 ChangeLog entries.	2008-02-12 17:22:02 +00:00
H.J. Lu	f03fe4c110	gas/ 2008-02-11 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (cpu_arch): Add .xsave. (md_show_usage): Add .xsave. * doc/c-i386.texi: Add xsave to -march=. gas/testsuite/ 2008-02-11 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/arch-10.s: Add xgetbv. * gas/i386/arch-10.d: Updated. * gas/i386/arch-10-1.l: Likewise. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/x86-64-arch-10.d: Likewise. opcodes/ 2008-02-11 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS. * i386-init.h: Updated.	2008-02-12 05:35:36 +00:00
H.J. Lu	475a2301db	gas/testsuite/ 2002-02-11 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Run xsave, xsave-intel, x86-64-xsave and x86-64-xsave-intel. * gas/i386/x86-64-xsave-intel.d: New file. * gas/i386/x86-64-xsave.d: Likewise. * gas/i386/x86-64-xsave.s: Likewise. * gas/i386/xsave-intel.d: Likewise. * gas/i386/xsave.d: Likewise. * gas/i386/xsave.s: Likewise. opcodes/ 2008-02-11 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (cpu_flags): Add CpuXsave. * i386-opc.h (CpuXsave): New. (Cpu64): Updated. (i386_cpu_flags): Add cpuxsave. * i386-dis.c (MOD_0FAE_REG_4): New. (RM_0F01_REG_2): Likewise. (MOD_0FAE_REG_5): Updated. (RM_0F01_REG_3): Likewise. (reg_table): Use MOD_0FAE_REG_4. (mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated for xrstor. (rm_table): Add RM_0F01_REG_2. * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.	2008-02-12 00:04:45 +00:00
Ben Elliston	041179fc63	Fix formatting of most recent entry.	2008-02-11 22:56:13 +00:00
Jan Beulich	595785c698	opcodes/ 2008-02-11 Jan Beulich <jbeulich@novell.com> * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz). * i386-tbl.h: Re-generate.	2008-02-11 15:11:06 +00:00
H.J. Lu	bb8541b9c4	bfd/ 2008-02-04 Kai Tietz <kai.tietz@onevision.com> H.J. Lu <hongjiu.lu@intel.com> PR 5715 * warning.m4: Enable -Wno-format by default when using gcc on mingw. * configure: Regenerated. binutils/ 2008-02-04 H.J. Lu <hongjiu.lu@intel.com> PR 5715 * configure: Regenerated. gas/ 2008-02-04 H.J. Lu <hongjiu.lu@intel.com> PR 5715 * configure: Regenerated. ld/ 2008-02-04 H.J. Lu <hongjiu.lu@intel.com> PR 5715 * configure: Regenerated. opcodes/ 2008-02-04 H.J. Lu <hongjiu.lu@intel.com> PR 5715 * configure: Regenerated.	2008-02-04 19:43:51 +00:00
Adam Nemet	57b592a36d	* mips-dis.c: Update copyright. (mips_arch_choices): Add Octeon. * mips-opc.c: Update copyright. (IOCT): New macro. (mips_builtin_opcodes): Add Octeon instruction synciobdma.	2008-02-04 19:26:11 +00:00
Alan Modra	930bb4cfae	* ppc-opc.c: Support optional L form mtmsr.	2008-01-29 08:24:43 +00:00
H.J. Lu	82c18208b8	gas/testsuite/ 2008-01-24 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/x86-64-sib.s: Add tests for r12. * gas/i386/x86-64-sib-intel.d: Updated. * gas/i386/x86-64-sib.d: Likewise. opcodes/ 2008-01-24 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (OP_E_extended): Handle r12 like rsp.	2008-01-24 15:11:35 +00:00
H.J. Lu	599121aa77	gas/ 2008-01-23 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (md_show_usage): Replace tabs with spaces. gas/testsuite/ 2008-01-23 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp : Run x86-64-arch-1 and x86-64-arch-10. * gas/i386/x86-64-arch-1.d: New. * gas/i386/x86-64-arch-1.s: Likewise. * gas/i386/x86-64-arch-10.d: Likewise. opcodes/ 2008-01-23 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS. * i386-init.h: Regenerated.	2008-01-23 19:05:12 +00:00
Tristan Gingold	80098f5188	2008-01-23 Tristan Gingold <gingold@adacore.com> * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr, ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.	2008-01-23 08:53:44 +00:00
H.J. Lu	115c7c25fe	gas/ 2008-01-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (i386_target_format): Remove cpummx2. gas/testsuite/ 2008-01-22 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/arch-10.d: New. * gas/i386/arch-11.s: Likewise. * gas/i386/arch-12.d: Likewise. * gas/i386/arch-12.s: Likewise. * gas/i386/i386.exp: Run arch-11 and arch-12. opcodes/ 2008-01-22 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (cpu_flag_init): Remove CpuMMX2. (cpu_flags): Likewise. * i386-opc.h (CpuMMX2): Removed. (CpuSSE): Updated. * i386-opc.tbl: Replace CpuMMX2 with CpuSSE\|Cpu3dnowA. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.	2008-01-22 19:57:30 +00:00
H.J. Lu	6305a20382	gas/ 2008-01-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (XXX_PREFIX): Moved from tc-i386.h. (XXX_MNEM_SUFFIX): Likewise. (END_OF_INSN): Likewise. (templates): Likewise. (modrm_byte): Likewise. (rex_byte): Likewise. (DREX_XXX): Likewise. (drex_byte): Likewise. (sib_byte): Likewise. (processor_type): Likewise. (arch_entry): Likewise. (cpu_sub_arch_name): Remove const. (cpu_arch): Add .vmx and .smx. (set_cpu_arch): Append cpu_sub_arch_name. (md_parse_option): Support -march=CPU[,+EXTENSION...]. (md_show_usage): Updated. * config/tc-i386.h (XXX_PREFIX): Moved to tc-i386.c. (XXX_MNEM_SUFFIX): Likewise. (END_OF_INSN): Likewise. (templates): Likewise. (modrm_byte): Likewise. (rex_byte): Likewise. (DREX_XXX): Likewise. (drex_byte): Likewise. (sib_byte): Likewise. (processor_type): Likewise. (arch_entry): Likewise. * doc/as.texinfo: Update i386 -march option. * doc/c-i386.texi: Update -march= for ISA. gas/testsuite/ 2008-01-22 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/arch-10-1.l: New. * gas/i386/arch-10-1.s: Likewise. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-2.s: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-3.s: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/arch-10-4.s: Likewise. * gas/i386/arch-10.d: Likewise. * gas/i386/arch-10.s: Likewise. * gas/i386/i386.exp: Run arch-10, arch-10-1, arch-10-2, arch-10-3 and arch-10-4. * gas/i386/nops-2.s: Use movsbl instead of cmove. * gas/i386/nops-2-i386.d: Updated. * gas/i386/nops-2-merom.d: Likewise. * gas/i386/nops-2.d: Likewise. * gas/i386/x86-64-nops-2.d: Likewise. opcodes/ 2008-01-22 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and CPU_SMX_FLAGS. * i386-init.h: Regenerated.	2008-01-22 19:16:45 +00:00
H.J. Lu	fd07a1c880	gas/testsuite/ 2008-01-15 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/prescott.s: Add tests for movddup in Intel syntax. * gas/i386/x86-64-prescott.s: Likewise. * gas/i386/prescott.d: Updated. * gas/i386/x86-64-prescott.d: Likewise. opcodes/ 2008-01-15 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.tbl: Use Qword on movddup. * i386-tbl.h: Regenerated.	2008-01-16 00:05:56 +00:00
H.J. Lu	321fd21e2f	gas/ 2008-01-15 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (md_assemble): Also zap movzx and movsx suffix for AT&T syntax. gas/testsuite/ 2008-01-15 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.s: Add more tests for movsx and movzx. * gas/i386/x86_64.s: Likewise. * gas/i386/inval.s: Remove tests for movsxw and movzxw. * gas/i386/x86-64-inval.s: Remove tests for movsxb, movsxw, movsxl, movzxb and movzxw. * gas/i386/i386.d: Updated. * gas/i386/inval.l: Likewise. * gas/i386/x86_64.d: Likewise. * gas/i386/x86-64-inval.l: Likewise. opcodes/ 2008-01-15 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax. * i386-tbl.h: Regenerated.	2008-01-15 18:50:44 +00:00
H.J. Lu	4ee521786f	2008-01-15 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (Mx): New. (PREFIX_0FC3): Likewise. (PREFIX_0FC7_REG_6): Updated. (dis386_twobyte): Use PREFIX_0FC3. (prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd. Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on movntss.	2008-01-15 17:20:50 +00:00

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