* or32-opc.c (or32_print_register, or32_print_immediate,
disassemble_insn): Don't rely on undefined sprintf behaviour. * itbl-ops.c (itbl_disassemble): Don't rely on undefined sprintf behaviour.
This commit is contained in:
parent
e8f957fddd
commit
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4 changed files with 40 additions and 13 deletions
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@ -1,3 +1,8 @@
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2009-01-02 Matthias Klose <doko@ubuntu.com>
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* itbl-ops.c (itbl_disassemble): Don't rely on undefined sprintf
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behaviour.
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2008-12-23 Jon Beniston <jon@beniston.com>
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* NEWS: Record that support for LM32 has been added.
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@ -1,6 +1,6 @@
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/* itbl-ops.c
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Copyright 1997, 1999, 2000, 2001, 2002, 2003, 2005, 2006, 2007
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Free Software Foundation, Inc.
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Copyright 1997, 1999, 2000, 2001, 2002, 2003, 2005, 2006, 2007,
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2009 Free Software Foundation, Inc.
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This file is part of GAS, the GNU Assembler.
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@ -593,6 +593,7 @@ itbl_disassemble (char *s, unsigned long insn)
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{
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struct itbl_entry *r;
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unsigned long value;
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char s_value[20];
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if (f == e->fields) /* First operand is preceded by tab. */
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strcat (s, "\t");
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@ -611,14 +612,18 @@ itbl_disassemble (char *s, unsigned long insn)
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if (r)
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strcat (s, r->name);
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else
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sprintf (s, "%s$%lu", s, value);
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{
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sprintf (s_value, "$%lu", value);
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strcat (s, s_value);
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}
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break;
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case e_addr:
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/* Use assembler's symbol table to find symbol. */
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/* FIXME!! Do we need this? If so, what about relocs?? */
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/* If not a symbol, fall through to IMMED. */
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case e_immed:
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sprintf (s, "%s0x%lx", s, value);
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sprintf (s_value, "0x%lx", value);
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strcat (s, s_value);
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break;
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default:
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return 0; /* error; invalid field spec */
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@ -1,3 +1,8 @@
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2009-01-02 Matthias Klose <doko@ubuntu.com>
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* or32-opc.c (or32_print_register, or32_print_immediate,
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disassemble_insn): Don't rely on undefined sprintf behaviour.
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2008-12-30 Martin Schwidefsky <schwidefskyy@de.ibm.com>
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* s390-opc.txt: Add ptff instruction.
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@ -1,5 +1,5 @@
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/* Table of opcodes for the OpenRISC 1000 ISA.
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Copyright 2002, 2004, 2005, 2007, 2008 Free Software Foundation, Inc.
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Copyright 2002, 2004, 2005, 2007, 2008, 2009 Free Software Foundation, Inc.
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Contributed by Damjan Lampret (lampret@opencores.org).
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This file is part of the GNU opcodes library.
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@ -951,8 +951,10 @@ static void
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or32_print_register (char param_ch, char *encoding, unsigned long insn)
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{
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int regnum = or32_extract(param_ch, encoding, insn);
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sprintf (disassembled, "%sr%d", disassembled, regnum);
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char s_regnum[20];
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sprintf (s_regnum, "r%d", regnum);
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strcat (disassembled, s_regnum);
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}
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/* Print immediate. Used only by print_insn. */
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@ -961,18 +963,20 @@ static void
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or32_print_immediate (char param_ch, char *encoding, unsigned long insn)
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{
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int imm = or32_extract (param_ch, encoding, insn);
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char s_imm[20];
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imm = extend_imm (imm, param_ch);
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if (letter_signed (param_ch))
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{
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if (imm < 0)
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sprintf (disassembled, "%s%d", disassembled, imm);
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sprintf (s_imm, "%d", imm);
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else
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sprintf (disassembled, "%s0x%x", disassembled, imm);
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sprintf (s_imm, "0x%x", imm);
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}
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else
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sprintf (disassembled, "%s%#x", disassembled, imm);
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sprintf (s_imm, "%#x", imm);
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strcat (disassembled, s_imm);
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}
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/* Disassemble one instruction from insn to disassemble.
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if (strchr (opcode->encoding, *s))
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or32_print_immediate (*s, opcode->encoding, insn);
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else
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sprintf (disassembled, "%s%c", disassembled, *s);
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{
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char s_encoding[2] = { *s, '\0' };
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strcat (disassembled, s_encoding);
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}
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}
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}
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}
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else
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{
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char s_insn[20];
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/* This used to be %8x for binutils. */
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sprintf (disassembled, "%s.word 0x%08lx", disassembled, insn);
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sprintf (s_insn, ".word 0x%08lx", insn);
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strcat (disassembled, s_insn);
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}
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return insn_len (insn);
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