Commit graph

36 commits

Author SHA1 Message Date
Nick Clifton
d1cf510e5e Add MIPS r12k support 2001-05-23 17:26:40 +00:00
Nick Clifton
b3baf5d0a8 Add OpenRISC support 2001-04-24 15:08:16 +00:00
Nick Clifton
7898dedac0 Update copyright notices 2001-03-08 21:04:02 +00:00
Nick Clifton
3cac17aec8 Rest of the changes for Coldfire V4. 2001-03-06 20:15:27 +00:00
Nick Clifton
e135f41bc2 Add PDP-11 support 2001-02-18 23:33:11 +00:00
Nick Clifton
a85d7ed0f0 Add s390 support 2001-02-10 00:58:38 +00:00
Nick Clifton
0d2bcfafbf Updated ARC assembler from arccores.com 2001-01-11 21:20:20 +00:00
Nick Clifton
c6c98b3833 Add MIPS SB1 machine 2000-12-02 01:10:33 +00:00
Nick Clifton
84ea6cf2c5 Add MIPS V and MIPS 64 machine numbers 2000-12-02 00:55:22 +00:00
Nick Clifton
e7af610e14 Add MIPS32 as a seperate MIPS architecture 2000-12-01 21:35:38 +00:00
Nick Clifton
8d88c4ca53 Add support for x86_64-*-linux-gnu* target 2000-11-30 19:16:54 +00:00
Nick Clifton
077b8428ab Add ARM v5t, v5te and XScale support 2000-11-25 00:21:40 +00:00
Kazu Hirata
047066e166 2000-11-09 Kazu Hirata <kazu@hxi.com>
* archive.c: Fix formatting.
	* archures.c: Likewise.
2000-11-10 04:28:20 +00:00
Kazu Hirata
0ef5a5bdcb 2000-11-07 Kazu Hirata <kazu@hxi.com>
* aix386-core.c: Fix formatting.
	* aoutf1.h: Likewise.
	* aoutx.h: Likewise.
	* archures.c: Likewise.
	* armnetbsd.c: Likewise.
2000-11-07 19:11:31 +00:00
Jim Wilson
bbe66d0820 ia64-hpux patches from Steve Ellcey.
* archures.c: (bfd_mach_ia64_elf64, bfd_mach_ia64_elf32) Add defines
	to differentiate elf32 and elf64 on ia64.
	* bfd-in2.h: Regenerate.
	* config.bfd: Add target for "ia64*-*-hpux*".
	* configure.in: Add bfd_elf32_ia64_big_vec to selvecs switch.
	* configure: Regenerate.
	* cpu-ia64.c (bfd_ia64_elf32_arch) Add elf32 arch info structure.
	* targets.c: Add bfd_target bfd_elf32_ia64_big_vec.
	* Makefile.am: Make elf32-ia64.c and elf64-ia64.c derived objects
	from elfxx-ia64.c.  Add depenency rules for making elf32-ia64.lo.
	* Makefile.in: Regnerate.
	* elf64-ia64.c: Deleted
	* elfxx-ia64.c: New file, paramaterized version of elf64-ia64.c.
2000-11-07 00:43:26 +00:00
Jakub Jelinek
19f7b01094 gas/
* config/tc-sparc.c (sparc_ip): Fix a bug which caused v9_arg_p
	instructions to loose any special insn->architecture mask.

	* config/tc-sparc.c (v9a_asr_table): Add v9b ASRs.
	(sparc_md_end, sparc_arch_types, sparc_arch,
	sparc_elf_final_processing): Handle v8plusb and v9b architectures.
	(sparc_ip): Handle siam mode operands. Support v9b ASRs (and
	request v9b architecture if they are used).

bfd/
	* elf32-sparc.c (elf32_sparc_merge_private_bfd_data,
	elf32_sparc_object_p, elf32_sparc_final_write_processing):
	Support v8plusb.
	* elf64-sparc.c (sparc64_elf_merge_private_bfd_data,
	sparc64_elf_object_p): Support v9b.
	* archures.c: Declare v8plusb and v9b machines.
	* bfd-in2.h: Ditto.
	* cpu-sparc.c: Ditto.

include/opcode/
	* sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
	Note that '3' is used for siam operand.

opcodes/
	* sparc-dis.c (v9a_asr_reg_names): Add v9b ASRs.
	(compute_arch_mask): Add v8plusb and v9b machines.
	(print_insn_sparc): siam mode decoding, accept ASRs up to 25.
	* opcodes/sparc-opc.c: Support for Cheetah instruction set.
	(prefetch_table): Add #invalidate.
2000-10-20 10:38:47 +00:00
Nick Clifton
156c2f8bf7 Add support for the MIPS32 2000-09-14 01:47:38 +00:00
Hans-Peter Nilsson
06c15ad74f * Makefile.am (ALL_MACHINES): Add cpu-cris.lo.
(ALL_MACHINES_CFILES): Add cpu-cris.c.
	(BFD32_BACKENDS): Add aout-cris.lo and elf32-cris.lo.
	(BFD32_BACKENDS_CFILES): Add aout-cris.c and elf32-cris.c.
	(cpu-cris.lo, aout-cris.lo, elf32-cris.lo): New rules.
	* Makefile.in: Rebuild.
	* aclocal.m4: Rebuild.
	* aoutx.h (NAME(aout,machine_type)): Add case for bfd_arch_cris.
	* archures.c (enum bfd_architecture): Add bfd_arch_cris.
	(bfd_cris_arch): Declare.
	(bfd_archures_list): Add bfd_cris_arch.
	* bfd-in2.h: Rebuild.
	* config.bfd: (cris-*-*): New target.
	* configure.in (bfd_elf32_cris_vec, cris_aout_vec): New vectors.
	* configure: Rebuild.
	* elf.c (prep_headers): Add bfd_arch_cris.
	* libbfd.h: Rebuild.
	* libaout.h (enum machine_type): Add M_CRIS.
	* reloc.c: Add CRIS relocations.
	* targets.c (bfd_target bfd_elf32_cris_vec, cris_aout_vec):
	Declare.
	(bfd_target_vect): Add bfd_elf32_cris_vec and cris_aout_vec.
	* cpu-cris.c, aout-cris.c, elf32-cris.c: New files.
	* po/POTFILES.in, po/bfd.pot: Regenerate.
2000-07-20 16:21:07 +00:00
Nick Clifton
83ea41ad9c Add set of bfd_mach_ cases for compatibility with older binutils 2000-07-10 18:29:39 +00:00
Alan Modra
52b219b5e4 Add sequence id field to asection.
Tidy comments and replace deprecated CONST with const.
2000-07-08 12:08:43 +00:00
Nick Clifton
65aa24b6e8 Applied Marek Michalkiewicz <marekm@linux.org.pl>'s patch to ehance the AVR port. 2000-06-27 01:45:30 +00:00
Nick Clifton
60bcf0fa8c Applied Stephane Carrez <Stephane.Carrez@worldnet.fr> patches to add support
for m68hc11 and m68hc12 processors.
2000-06-19 01:22:44 +00:00
Nicholas Duffek
87f33987cd * archures.c (enum bfd_architecture): #define constants for
PowerPc and RS6000 machine numbers.
	* bfd-in2.h: Regenerate.
	* coffcode.h (coff_set_arch_mach_hook): #ifdef XCOFF64, set arch
	to bfd_arch_powerpc instead of bfd_arch_rs6000.  Refer to PowerPc
	and RS6000 machine numbers using #defined constants from
	archures.c.
	* cpu-powerpc.c (arch_info_struct): Refer to PowerPc and RS6000
	machine numbers using #defined constants from archures.c.  Add
	entries for EC603e, 630, A35, RS64II, RS64III, 7400.  Specify
	64-bit words in 620 entry.
	* cpu-rs6000.c (arch_info_struct): Create with entries for RS1,
	RSC, and RS2.
	(bfd_rs6000_arch): Change default machine to 0 (bfd_mach_rs6k).
2000-06-16 20:45:33 +00:00
Jim Wilson
800eeca487 IA-64 ELF support. 2000-04-21 20:22:24 +00:00
Timothy Wall
81635ce4f5 BFD and include/coff support for tic54x target. 2000-04-07 17:06:58 +00:00
Alan Modra
adde6300e0 ATMEL AVR microcontroller support. 2000-03-27 08:39:14 +00:00
Alan Modra
5b93d8bb51 Add IBM 370 support. 2000-02-23 13:52:23 +00:00
Alan Modra
f6af82bd44 This lot mainly cleans up `comparison between signed and unsigned' gcc
warnings.  One usused var, and a macro parenthesis fix too.  Also check
input sections are elf when doing gc in elflink.h.
2000-02-21 12:01:27 +00:00
Joern Rennecke
d4845d5762 bfd:
Reinstate bits of sh4 support that got accidentally deleted.
Add sh-dsp support.

bfd:

	* archures.c (bfd_mach_sh2, bfd_mach_sh_dsp): New macros.
	(bfd_mach_sh3_dsp): Likewise.
	(bfd_mach_sh4): Reinstate.
	(bfd_default_scan): Recognize 7410, 7708, 7729 and 7750.
	* bfd-in2.h: Regenerate.
	* coff-sh.c (struct sh_opcode): flags is no longer short.
	(USESAS, USESAS_REG, USESR8, SETSAS, SETSAS_REG): New macros.
	(sh_opcode41, sh_opcode42): Integrate as sh_opcode41.
	(sh_opcode01, sh_opcode02, sh_opcode40): Add sh-dsp opcodes.
	(sh_opcode41, sh_opcode4, sh_opcode80): Likewise.
	(sh_opcodes): No longer const.
	(sh_dsp_opcodef0, sh_dsp_opcodef): New arrays.
	(sh_insn_uses_reg): Check for USESAS and USESR8.
	(sh_insn_sets_reg, sh_insns_conflict): Check for SETSAS.
	(_bfd_sh_align_load_span): Return early for SH4.
	Modify sh_opcodes lookup table for sh-dsp / sh3-dsp.
	Take into account that field b of a parallel processing insn
	could be mistaken for a separate insn.
	* cpu-sh.c (arch_info_struct): New array elements for
	sh2, sh-dsp and sh3-dsp.
	Reinstate element for sh4.
	(SH2_NEXT, SH_DSP_NEXT, SH3_DSP_NEXT): New macros.
	(SH4_NEXT): Reinstate.
	(SH3_NEXT, SH3E_NEXT): Adjust.
	* elf-bfd.h (_sh_elf_set_mach_from_flags): Declare.
	* elf32-sh.c (sh_elf_set_private_flags): New function.
	(sh_elf_copy_private_data, sh_elf_set_mach_from_flags): Likewise.
	(sh_elf_merge_private_data): New function.
	(elf_backend_object_p, bfd_elf32_bfd_set_private_bfd_flags): Define.
	(bfd_elf32_bfd_copy_private_bfd_data): Define.
	(bfd_elf32_bfd_merge_private_bfd_data): Change to
	sh_elf_merge_private_data.

gas:

	* config/tc-sh.c ("elf/sh.h"): Include.
	(sh_dsp, valid_arch, reg_x, reg_y, reg_efg): New static variables.
	(md.begin): Initialize target_arch.
	Only include opcodes in has table that match selected architecture.
	(parse_reg): Recognize register names for sh-dsp.
	(parse_at): Recognize post-modify addressing.
	(get_operands): The leading space is now optional.
	(get_specific): Remove FDREG_N support.  Add support for sh-dsp
	arguments.  Update valid_arch.
	(build_Mytes): Add support for SDT_REG_N.
	(find_cooked_opcode): New function, broken out of md_assemble.
	(assemble_ppi, sh_elf_final_processing): New functions.
	(md_assemble): Use find_cooked_opcode and assemble_ppi.
	(md_longopts, md_parse_option): New option: -dsp.
	* config/tc-sh.h (elf_tc_final_processing): Define.
	(sh_elf_final_processing): Declare.

include/elf:

	* sh.h: (EF_SH_MACH_MASK, EF_SH_UNKNOWN, EF_SH1, EF_SH2): New macros.
	(EF_SH3, EF_SH_HAS_DSP, EF_SH_DSP, EF_SH3_DSP): Likewise.
	(EF_SH_HAS_FP, EF_SH3E, EF_SH4, EF_SH_MERGE_MACH): Likewise.

opcodes:

	* sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions.
	(print_insn_ppi): Likewise.
	(print_insn_shx): Use info->mach to select appropriate insn set.
	Add support for sh-dsp.  Remove FD_REG_N support.
	* sh-opc.h (sh_nibble_type): Add new values for sh-dsp support.
	(sh_arg_type): Likewise.  Remove FD_REG_N.
	(sh_dsp_reg_nums): New enum.
	(arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros.
	(arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise.
	(arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise.
	(arch_sh3_dsp_up): Likewise.
	(sh_opcode_info): New field: arch.
	(sh_table): Split up insn with FD_REG_N into ones with F_REG_N and
	D_REG_N.  Fill in arch field.  Add sh-dsp insns.
2000-02-17 00:33:36 +00:00
Nick Clifton
9a968f4332 Apply Tim walls octest vs bytes patch 2000-01-13 22:10:36 +00:00
Jeff Law
31f8dc8fce * archures.c (bfd_mach_am33): Define.
* bfd-in2.h: Rebuilt.
        * cpu-m10300.c (bfd_am33_arch): Add to the mn103 architecture list
        * elf-m10300.c (mn10300_elf_relax_section): Handle am33 instructions.
        (compute_function_info): Handle additional registers saved by
        movm on the am33.
        (elf_mn10300_mach): Handle E_MN10300_MACH_AM33.
        (_bfd_mn10300_elf_final_write_processing): Handle bfd_mach_am33.
1999-12-01 10:14:02 +00:00
Michael Meissner
7af8cca959 D10V patches from Cagney 1999-10-25 13:57:39 +00:00
Doug Evans
a23ef39fe9 * archures.c (bfd_mach_m32rx): Define it.
* bfd-in2.h: Rebuild.
1999-10-05 01:14:20 +00:00
Ian Lance Taylor
0bcb993b9f 1999-09-04 Steve Chamberlain <sac@pobox.com>
* cpu-pj.c: New file.
	* elf32-pj.c: New file.
	* config.bfd (pj*): New cpu.
	(pj-*-*, pjl-*-*): New targets.
	* configure.in (bfd_elf32_pj_vec): New target vector.
	(bfd_elf32_pjl_vec): New target vector.
 	* archures.c (bfd_arch_pj): Define.
	* elf.c (prep_headers): Handle bfd_arch_pj.
	* reloc.c: Define BFD_RELOC_PJ_* relocations.
	* targets.c (bfd_elf32_pj_vec, bfd_elf32_pjl_vec): Declare and add
	to target vector list.
	* Makefile.am: Rebuild dependencies.
	(ALL_MACHINES): Add cpu-pj.lo.
	(ALL_MACHINES_CFILES): Add cpu-pj.c.
	(BFD32_BACKENDS): Add elf32-pj.lo.
	(BFD32_BACKENDS_CFILES): Add elf32-pj.c.
	* configure, Makefile.in, bfd-in2.h, libbfd.h: Rebuild.
1999-09-04 17:07:46 +00:00
Nick Clifton
478d07d67c Add support for arm v5 architectures. 1999-07-05 07:28:24 +00:00
Richard Henderson
252b5132c7 19990502 sourceware import 1999-05-03 07:29:11 +00:00