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D10V patches from Cagney

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This commit is contained in:
Michael Meissner 1999-10-25 13:57:39 +00:00
parent 49c245078a
commit 7af8cca959
4 changed files with 58 additions and 14 deletions
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7
bfd/ChangeLog
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@ -1,3 +1,10 @@
Sat Oct 23 17:36:12 1999 Andrew Cagney <cagney@b1.cygnus.com>
* archures.c: Add definitions bfd_mach_d10v, bfd_mach_d10v_ts2 and
bfd_mach_d10v_ts3.
* cpu-d10v.c (d10v_ts3_info, d10v_ts2_info): Add.
* bfd-in2.h: Regenerate.
1999-10-15 Andrew Haley <aph@cygnus.com>
* dwarf1.c (parse_die): Fail to parse a die if its length is zero.

3
bfd/archures.c
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@ -147,6 +147,9 @@ DESCRIPTION
. bfd_arch_rs6000, {* IBM RS/6000 *}
. bfd_arch_hppa, {* HP PA RISC *}
. bfd_arch_d10v, {* Mitsubishi D10V *}
.#define bfd_mach_d10v 0
.#define bfd_mach_d10v_ts2 2
.#define bfd_mach_d10v_ts3 3
. bfd_arch_d30v, {* Mitsubishi D30V *}
. bfd_arch_z8k, {* Zilog Z8000 *}
.#define bfd_mach_z8001 1

3
bfd/bfd-in2.h
View file

@ -1335,6 +1335,9 @@ enum bfd_architecture
bfd_arch_rs6000, /* IBM RS/6000 */
bfd_arch_hppa, /* HP PA RISC */
bfd_arch_d10v, /* Mitsubishi D10V */
#define bfd_mach_d10v 0
#define bfd_mach_d10v_ts2 2
#define bfd_mach_d10v_ts3 3
bfd_arch_d30v, /* Mitsubishi D30V */
bfd_arch_z8k, /* Zilog Z8000 */
#define bfd_mach_z8001 1

59
bfd/cpu-d10v.c
View file

@ -1,5 +1,5 @@
/* BFD support for the D10V processor
Copyright 1996 Free Software Foundation, Inc.
Copyright 1996, 1999 Free Software Foundation, Inc.
Contributed by Martin Hunt (hunt@cygnus.com).
This file is part of BFD, the Binary File Descriptor library.
@ -22,19 +22,50 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#include "sysdep.h"
#include "libbfd.h"
const bfd_arch_info_type bfd_d10v_arch =
static const bfd_arch_info_type d10v_ts3_info =
{
16, /* 16 bits in a word */
16, /* 16 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_d10v,
0,
"d10v",
"d10v",
4, /* section alignment power */
true,
bfd_default_compatible,
bfd_default_scan,
0,
16, /* 16 bits in a word */
16, /* 16 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_d10v,
bfd_mach_d10v_ts3,
"d10v",
"d10v:ts3",
4, /* section alignment power */
false,
bfd_default_compatible,
bfd_default_scan,
0,
};
static const bfd_arch_info_type d10v_ts2_info =
{
16, /* 16 bits in a word */
16, /* 16 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_d10v,
bfd_mach_d10v_ts2,
"d10v",
"d10v:ts2",
4, /* section alignment power */
false,
bfd_default_compatible,
bfd_default_scan,
&d10v_ts3_info,
};
const bfd_arch_info_type bfd_d10v_arch =
{
16, /* 16 bits in a word */
16, /* 16 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_d10v,
bfd_mach_d10v,
"d10v",
"d10v",
4, /* section alignment power */
true,
bfd_default_compatible,
bfd_default_scan,
&d10v_ts2_info,
};