Commit graph

536 commits

Author SHA1 Message Date
Stu Grossman
42653e99b8 * (distclean): Remove targ-vals.def. 1997-01-24 00:38:32 +00:00
Stu Grossman
2757866e9e * configure: Remove Make-common.in from dependencies. (Actually in
../common/aclocal.m4).
1997-01-24 00:04:57 +00:00
Stu Grossman
e1dfb8c53c * aclocal.m4: Remove Make-common.in from dependencies. 1997-01-24 00:03:05 +00:00
Stu Grossman
295dbbe44c * configure configure.in Makefile.in: Update to new configure
scheme which is more compatible with WinGDB builds.
	* configure.in:  Improve comment on how to run autoconf.
	* configure:  Re-run autoconf to get new ../common/aclocal.m4.
	* Makefile.in:  Use autoconf substitution to install common
	makefile fragment.
1997-01-23 22:09:52 +00:00
Stu Grossman
80b7b3a50c * aclocal.m4 (SIM_AC_COMMON): Move contents of Make-common.in
into here.  Makes insertion into makefiles easier.  Also, change
	the way that callback.o, gentmap, targ-vals.h, targ-map.c,
	targ-map.o, and run are built.  They are now built in the
	individual simulator directories, taking sources from ../common as
	necessary.  This replaces the merging of libcommon.a into
	linsim.a, which was problematic for the WinGDB build process.
	* run.c:  Include config.h from . instead of ../common.
	* Make-common.in:  Remove.  It's no longer necessary.
1997-01-23 22:08:21 +00:00
Stu Grossman
6e1510a27d * configure configure.in: Don't configure common anymore. Files
from common are now built in the individual simualtor directories.
	This fixes problems with the WinGDB build procedure.
1997-01-23 22:07:08 +00:00
Jeff Law
f95251f068 * simops.c: Undo last change to "rol" and "ror", original code
was correct!
1997-01-21 22:03:39 +00:00
Michael Meissner
5a8023e5ba Multiply ops sign extend, not zero extend 1997-01-20 21:06:48 +00:00
Jeff Law
b4b290a020 * simops.c: Fix "rol" and "ror".
Something I noticed while working on the mn10200.
1997-01-16 18:28:46 +00:00
Jeff Law
898c77b856 * simops.c: Fix typo in last change. 1997-01-15 13:46:18 +00:00
Jeff Law
2da0bc1bf9 * simops.c: Use REG macros in few places not using them yet.
Something I noticed while working on the mn10200 simulator.
1997-01-13 20:28:37 +00:00
Jeff Law
c1848bd2ee * configure: Enable the mn10200 simulator. 1997-01-13 20:21:35 +00:00
Jim Wilson
b99125bc1c For NEC 4300 project, fix last remaining host/target endianness problem
* gencode.c (build_instruction): Use BigEndianCPU instead of
	ByteSwapMem.
1997-01-08 20:40:40 +00:00
Jeff Law
bbd1706224 * mn10300_sim.h (struct _state): Fix number of registers!
Just something I noticed while working on the mn10200 simulator.
1997-01-06 23:25:53 +00:00
Mark Alexander
e1db0d47c5 * interp.c (sim_monitor): Make output to stdout visible in
wingdb's I/O log window.
1997-01-03 06:28:21 +00:00
Jeff Law
b774c0e4b1 * mn10300_sim.h (struct _state): Put all registers into a single
array to make gdb implementation easier.
        (REG_*): Add definitions for all registers in the state array.
        (SEXT32, SEXT40, SEXT44, SEXT60): Remove unused macros.
        * simops.c: Related changes.
1996-12-31 23:26:11 +00:00
Michael Meissner
6ec96a0265 Deal with kill encoding the signal via the exit status. 1996-12-31 23:18:55 +00:00
Mark Alexander
2902e8ab51 * support.h: Undo previous change to SIGTRAP
and SIGQUIT values.
1996-12-31 15:05:46 +00:00
Ian Lance Taylor
7e6c297e82 * interp.c (store_word, load_word): New static functions.
(mips16_entry): New static function.
	(SignalException): Look for mips16 entry and exit instructions.
	(simulate): Use the correct index when setting fpr_state after
	doing a pending move.
1996-12-30 22:37:30 +00:00
Mark Alexander
0049ba7a8d * interp.c: Fix byte-swapping code throughout to work on
both little- and big-endian hosts.
1996-12-29 17:47:25 +00:00
Mark Alexander
2510786bd4 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
with gdb/config/i386/xm-windows.h.
1996-12-29 17:20:47 +00:00
Mark Alexander
39bf0ef4e6 * gencode.c (build_instruction): Work around MSVC++ code gen bug
that messes up arithmetic shifts.
1996-12-28 06:51:58 +00:00
Michael Meissner
ee3f2d4f6a Allow exit to work normally under gdb 1996-12-27 19:50:03 +00:00
Angela Marie Thomas
280f90e1a0 add flush_cache PMON routine 1996-12-25 06:14:26 +00:00
Stu Grossman
dbeec76839 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
SIGTRAP and SIGQUIT for _WIN32.
1996-12-20 19:05:28 +00:00
Ian Lance Taylor
deffd638b5 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
force a 64 bit multiplication.
	(build_instruction) [OR]: In mips16 mode, don't do anything if the
	destination register is 0, since that is the default mips16 nop
	instruction.
1996-12-19 19:08:46 +00:00
Jeff Law
d657034d38 * interp.c (sim_resume): Handle 0xff as a single byte insn.
* simops.c: Fix overflow computation for "add" and "inc"
        instructions.
1996-12-18 17:15:21 +00:00
David Edelsohn
5c8f1c0183 Getting there ... 1996-12-17 21:08:20 +00:00
Jeff Law
093e9a32d3 * simops.c: Handle "break" instruction. 1996-12-16 22:31:37 +00:00
Rob Savoye
af68520381 Link with SIM_EXTRA_LIBS, not just EXTRA_LIBS, which is never set. 1996-12-16 22:16:24 +00:00
Ian Lance Taylor
063443cf01 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
(build_endian_shift): Don't check proc64.
	(build_instruction): Always set memval to uword64.  Cast op2 to
	uword64 when shifting it left in memory instructions.  Always use
	the same code for stores--don't special case proc64.
1996-12-16 21:47:23 +00:00
Martin Hunt
dbdae3de36 Mon Dec 16 13:39:03 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
* interp.c (xfer_mem): Change unified memory to 0x0.
1996-12-16 21:39:47 +00:00
Ian Lance Taylor
aaff84371e * gencode.c (build_mips16_operands): Fix base PC value for PC
relative operands.
	(build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
	jal instruction.
	* interp.c (simJALDELAYSLOT): Define.
 	(JALDELAYSLOT): Define.
	(INDELAYSLOT, INJALDELAYSLOT): Define.
	(simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
1996-12-16 20:01:15 +00:00
Jeff Law
16d2e2b670 * simops.c: Fix restoring the PC for "ret" and "retf" instructions. 1996-12-16 17:08:10 +00:00
Jim Wilson
51c6d73375 For NEC 4100/4300 project: Add little endian support and misc cleanups.
* gencode.c (build_instruction): Use !ByteSwapMem instead of
	BigEndianMem.
	* interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
	(BigEndianMem): Rename to ByteSwapMem and change sense.
	(BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
	BigEndianMem references to !ByteSwapMem.
	(set_endianness): New function, with prototype.
	(sim_open): Call set_endianness.
	(sim_info): Use simBE instead of BigEndianMem.
	(xfer_direct_word, xfer_direct_long, swap_direct_word,
	swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
	xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
	ifdefs, keeping the prototype declaration.
	(swap_word): Rewrite correctly.
	(ColdReset): Delete references to CONFIG.  Delete endianness related
	code; moved to set_endianness.
1996-12-11 22:04:46 +00:00
Jeff Law
191c9d73de * gencode.c (write_opcodes): Also write out the format of the
opcode.
        * mn10300_sim.h (simops): Add "format" field.
        * interp.c (sim_resume): Deal with endianness issues here.
1996-12-11 16:58:33 +00:00
Jeff Law
95d18eb74d * simops.c (REG0_4): Define.
Use REG0_4 for indexed loads/stores.
Fixes bugs exposed after minor codegen improvements in the compiler.
1996-12-10 22:10:07 +00:00
Jim Wilson
6429b29698 For NEC 4100/4300 project
* gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
	* interp.c (CHECKHILO): Define away.
	(simSIGINT): New macro.
	(membank_size): Increase from 1MB to 2MB.
	(control_c): New function.
	(sim_resume): Rename parameter signal to signal_number.  Add local
	variable prev.  Call signal before and after simulate.
	(sim_stop_reason): Add simSIGINT support.
	(sim_warning, sim_error, dotrace, SignalException): Define as stdarg
	functions always.
	(sim_warning): Delete call to SignalException.  Do call printf_filtered
	if logfh is NULL.
	(AddressTranslation): Add #ifdef DEBUG around debugging message and
	a call to sim_warning.
1996-12-10 19:39:55 +00:00
Michael Meissner
3fbe064171 New revision from Andrew 1996-12-10 16:12:48 +00:00
David Edelsohn
966f47b470 * callback.c: #include <stdlib.h>
(os_error): New function.
	(default_callback): Add os_error.
1996-12-09 02:27:59 +00:00
Jeff Law
2e8f4133d7 * simops.c (REG0_16): Fix typo. 1996-12-07 16:54:57 +00:00
Jeff Law
5084d8e513 Add missing semicolons in last change. 1996-12-07 00:36:50 +00:00
Jeff Law
b2f7a7e5b3 * simops.c: Call abort for any instruction that's not currently
simulated.
1996-12-06 21:49:27 +00:00
Jeff Law
9f4a551e11 * simops.c: Define accessor macros to extract register
values from instructions.  Use them consistently.
1996-12-06 21:47:21 +00:00
Jeff Law
7c52bf32f2 * interp.c: Delete unused global variable "OP".
(sim_resume): Remove unused variable "opcode".
        * simops.c: Fix some uninitialized variable problems, add
        parens to fix various -Wall warnings.
Fixing assorted -Wall problems.
1996-12-06 21:33:48 +00:00
Jeff Law
fc038f5656 Opps. Forgot something in last change. 1996-12-06 21:20:17 +00:00
Jeff Law
d252301029 * gencode.c (write_header): Add "insn" and "extension" arguments
to the OP_* declarations.
        (write_template): Similarly for function templates.
        * interp.c (insn, extension): Remove global variables.  Instead
        pass them as arguments to the OP_* functions.
        * mn10300_sim.h: Remove decls for "insn" and "extension".
        * simops.c (OP_*): Accept "insn" and "extension" as arguments
        instead of using globals.
Starting to clean things up.
1996-12-06 21:19:37 +00:00
Jeff Law
e5a7a53799 * simops.c: Fix typos in "mov am,(d16,an)" and "mov am,(d32,an)"
Fixes remaining hangs while running c-torture execution tests.
Only 12 c-torture execution failures left:

  * 920625-1.c fails all 6 execution tests.

  * 960521-1.c fails all 6 execution tests.
1996-12-06 07:57:21 +00:00
Jeff Law
4d8ced6cb1 * simops.c: Fix thinkos in last change to "inc dn". 1996-12-06 05:30:24 +00:00
Jeff Law
61ecca95c0 * simops.c: "add imm,sp" does not effect the condition codes.
"inc dn" does effect the condition codes.
Just something I noticed.
1996-12-04 18:02:00 +00:00